annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.c @ 902:d4622533271d Evo_2_23

VPM table mode: Because of the model maths, usage of float data type and so on it may happen that the TTS decreases during ascent and continues calculation of the vpm. To keep the values stable the vpm table mode has been introduces. Instead of continously calculation of the stops the stop time is decreased if the diver is close to a deco stop. If the table is violated (e.g. by not doing gas change) the table will be updated to the new, longer runtime. The table will not be switch back to a shorter version in case e.g. the missed gas change is performed
author Ideenmodellierer
date Wed, 02 Oct 2024 22:18:19 +0200
parents c78bcbd5deda
children
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_ll_adc.c
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4 * @author MCD Application Team
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5 * @brief ADC LL module driver
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6 ******************************************************************************
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7 * @attention
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8 *
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9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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10 *
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11 * Redistribution and use in source and binary forms, with or without modification,
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12 * are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright notice,
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16 * this list of conditions and the following disclaimer in the documentation
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17 * and/or other materials provided with the distribution.
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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19 * may be used to endorse or promote products derived from this software
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20 * without specific prior written permission.
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21 *
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 *
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33 ******************************************************************************
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34 */
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35 #if defined(USE_FULL_LL_DRIVER)
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36
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37 /* Includes ------------------------------------------------------------------*/
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38 #include "stm32f4xx_ll_adc.h"
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39 #include "stm32f4xx_ll_bus.h"
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40
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41 #ifdef USE_FULL_ASSERT
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42 #include "stm32_assert.h"
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43 #else
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44 #define assert_param(expr) ((void)0U)
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45 #endif
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46
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47 /** @addtogroup STM32F4xx_LL_Driver
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48 * @{
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49 */
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50
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51 #if defined (ADC1) || defined (ADC2) || defined (ADC3)
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52
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53 /** @addtogroup ADC_LL ADC
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54 * @{
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55 */
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56
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57 /* Private types -------------------------------------------------------------*/
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58 /* Private variables ---------------------------------------------------------*/
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59 /* Private constants ---------------------------------------------------------*/
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60 /* Private macros ------------------------------------------------------------*/
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61
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62 /** @addtogroup ADC_LL_Private_Macros
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63 * @{
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64 */
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65
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66 /* Check of parameters for configuration of ADC hierarchical scope: */
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67 /* common to several ADC instances. */
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68 #define IS_LL_ADC_COMMON_CLOCK(__CLOCK__) \
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69 ( ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV2) \
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70 || ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV4) \
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71 || ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV6) \
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72 || ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV8) \
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73 )
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74
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75 /* Check of parameters for configuration of ADC hierarchical scope: */
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76 /* ADC instance. */
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77 #define IS_LL_ADC_RESOLUTION(__RESOLUTION__) \
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78 ( ((__RESOLUTION__) == LL_ADC_RESOLUTION_12B) \
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79 || ((__RESOLUTION__) == LL_ADC_RESOLUTION_10B) \
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80 || ((__RESOLUTION__) == LL_ADC_RESOLUTION_8B) \
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81 || ((__RESOLUTION__) == LL_ADC_RESOLUTION_6B) \
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82 )
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83
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84 #define IS_LL_ADC_DATA_ALIGN(__DATA_ALIGN__) \
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85 ( ((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_RIGHT) \
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86 || ((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_LEFT) \
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87 )
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88
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89 #define IS_LL_ADC_SCAN_SELECTION(__SCAN_SELECTION__) \
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90 ( ((__SCAN_SELECTION__) == LL_ADC_SEQ_SCAN_DISABLE) \
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91 || ((__SCAN_SELECTION__) == LL_ADC_SEQ_SCAN_ENABLE) \
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92 )
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93
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94 #define IS_LL_ADC_SEQ_SCAN_MODE(__SEQ_SCAN_MODE__) \
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95 ( ((__SCAN_MODE__) == LL_ADC_SEQ_SCAN_DISABLE) \
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96 || ((__SCAN_MODE__) == LL_ADC_SEQ_SCAN_ENABLE) \
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97 )
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98
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99 /* Check of parameters for configuration of ADC hierarchical scope: */
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100 /* ADC group regular */
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101 #define IS_LL_ADC_REG_TRIG_SOURCE(__REG_TRIG_SOURCE__) \
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102 ( ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_SOFTWARE) \
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103 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_CH1) \
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104 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_CH2) \
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105 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_CH3) \
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106 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_CH2) \
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107 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_CH3) \
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108 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_CH4) \
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109 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_TRGO) \
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110 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM3_CH1) \
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111 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM3_TRGO) \
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112 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM4_CH4) \
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113 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM5_CH1) \
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114 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM5_CH2) \
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115 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM5_CH3) \
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116 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM8_CH1) \
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117 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM8_TRGO) \
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118 || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_EXTI_LINE11) \
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119 )
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120 #define IS_LL_ADC_REG_CONTINUOUS_MODE(__REG_CONTINUOUS_MODE__) \
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121 ( ((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_SINGLE) \
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122 || ((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_CONTINUOUS) \
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123 )
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124
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125 #define IS_LL_ADC_REG_DMA_TRANSFER(__REG_DMA_TRANSFER__) \
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126 ( ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_NONE) \
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127 || ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_LIMITED) \
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128 || ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_UNLIMITED) \
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129 )
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130
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131 #define IS_LL_ADC_REG_FLAG_EOC_SELECTION(__REG_FLAG_EOC_SELECTION__) \
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132 ( ((__REG_FLAG_EOC_SELECTION__) == LL_ADC_REG_FLAG_EOC_SEQUENCE_CONV) \
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133 || ((__REG_FLAG_EOC_SELECTION__) == LL_ADC_REG_FLAG_EOC_UNITARY_CONV) \
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134 )
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135
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136 #define IS_LL_ADC_REG_SEQ_SCAN_LENGTH(__REG_SEQ_SCAN_LENGTH__) \
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137 ( ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_DISABLE) \
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138 || ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS) \
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139 || ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS) \
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140 || ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS) \
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141 || ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS) \
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142 || ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS) \
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143 || ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS) \
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144 || ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS) \
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145 || ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS) \
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146 || ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS) \
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147 || ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS) \
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148 || ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS) \
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149 || ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS) \
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150 || ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS) \
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151 || ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS) \
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152 || ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS) \
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153 )
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154
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155 #define IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(__REG_SEQ_DISCONT_MODE__) \
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156 ( ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_DISABLE) \
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157 || ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_1RANK) \
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158 || ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_2RANKS) \
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159 || ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_3RANKS) \
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160 || ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_4RANKS) \
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161 || ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_5RANKS) \
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162 || ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_6RANKS) \
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163 || ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_7RANKS) \
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164 || ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_8RANKS) \
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165 )
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166
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167 /* Check of parameters for configuration of ADC hierarchical scope: */
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168 /* ADC group injected */
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169 #define IS_LL_ADC_INJ_TRIG_SOURCE(__INJ_TRIG_SOURCE__) \
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170 ( ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_SOFTWARE) \
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171 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM1_CH4) \
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172 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM1_TRGO) \
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173 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM2_CH1) \
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174 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM2_TRGO) \
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175 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM3_CH2) \
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176 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM3_CH4) \
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177 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM4_CH1) \
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178 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM4_CH2) \
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179 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM4_CH3) \
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180 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM4_TRGO) \
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181 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM5_CH4) \
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182 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM5_TRGO) \
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183 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM8_CH2) \
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184 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM8_CH3) \
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185 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM8_CH4) \
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186 || ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_EXTI_LINE15) \
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187 )
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188
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189 #define IS_LL_ADC_INJ_TRIG_EXT_EDGE(__INJ_TRIG_EXT_EDGE__) \
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190 ( ((__INJ_TRIG_EXT_EDGE__) == LL_ADC_INJ_TRIG_EXT_RISING) \
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191 || ((__INJ_TRIG_EXT_EDGE__) == LL_ADC_INJ_TRIG_EXT_FALLING) \
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192 || ((__INJ_TRIG_EXT_EDGE__) == LL_ADC_INJ_TRIG_EXT_RISINGFALLING) \
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193 )
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194
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195 #define IS_LL_ADC_INJ_TRIG_AUTO(__INJ_TRIG_AUTO__) \
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196 ( ((__INJ_TRIG_AUTO__) == LL_ADC_INJ_TRIG_INDEPENDENT) \
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197 || ((__INJ_TRIG_AUTO__) == LL_ADC_INJ_TRIG_FROM_GRP_REGULAR) \
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198 )
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199
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200 #define IS_LL_ADC_INJ_SEQ_SCAN_LENGTH(__INJ_SEQ_SCAN_LENGTH__) \
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201 ( ((__INJ_SEQ_SCAN_LENGTH__) == LL_ADC_INJ_SEQ_SCAN_DISABLE) \
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202 || ((__INJ_SEQ_SCAN_LENGTH__) == LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS) \
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203 || ((__INJ_SEQ_SCAN_LENGTH__) == LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS) \
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204 || ((__INJ_SEQ_SCAN_LENGTH__) == LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS) \
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205 )
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206
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207 #define IS_LL_ADC_INJ_SEQ_SCAN_DISCONT_MODE(__INJ_SEQ_DISCONT_MODE__) \
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208 ( ((__INJ_SEQ_DISCONT_MODE__) == LL_ADC_INJ_SEQ_DISCONT_DISABLE) \
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209 || ((__INJ_SEQ_DISCONT_MODE__) == LL_ADC_INJ_SEQ_DISCONT_1RANK) \
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210 )
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211
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212 #if defined(ADC_MULTIMODE_SUPPORT)
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213 /* Check of parameters for configuration of ADC hierarchical scope: */
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214 /* multimode. */
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215 #if defined(ADC3)
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216 #define IS_LL_ADC_MULTI_MODE(__MULTI_MODE__) \
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217 ( ((__MULTI_MODE__) == LL_ADC_MULTI_INDEPENDENT) \
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218 || ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIMULT) \
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219 || ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_INTERL) \
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220 || ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_INJ_SIMULT) \
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221 || ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_INJ_ALTERN) \
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222 || ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM) \
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223 || ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT) \
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224 || ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM) \
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225 || ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_REG_SIM_INJ_SIM) \
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226 || ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_REG_SIM_INJ_ALT) \
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227 || ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_INJ_SIMULT) \
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228 || ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_REG_SIMULT) \
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229 || ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_REG_INTERL) \
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230 || ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_INJ_ALTERN) \
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231 )
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232 #else
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233 #define IS_LL_ADC_MULTI_MODE(__MULTI_MODE__) \
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234 ( ((__MULTI_MODE__) == LL_ADC_MULTI_INDEPENDENT) \
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235 || ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIMULT) \
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236 || ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_INTERL) \
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237 || ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_INJ_SIMULT) \
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238 || ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_INJ_ALTERN) \
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239 || ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM) \
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240 || ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT) \
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241 || ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM) \
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242 )
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243 #endif
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244
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245 #define IS_LL_ADC_MULTI_DMA_TRANSFER(__MULTI_DMA_TRANSFER__) \
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246 ( ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_EACH_ADC) \
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247 || ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_LIMIT_1) \
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248 || ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_LIMIT_2) \
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249 || ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_LIMIT_3) \
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250 || ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_UNLMT_1) \
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251 || ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_UNLMT_2) \
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252 || ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_UNLMT_3) \
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253 )
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254
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255 #define IS_LL_ADC_MULTI_TWOSMP_DELAY(__MULTI_TWOSMP_DELAY__) \
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256 ( ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES) \
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257 || ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES) \
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258 || ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES) \
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259 || ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES) \
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260 || ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES) \
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261 || ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES) \
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262 || ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES) \
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263 || ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES) \
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264 || ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_13CYCLES) \
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265 || ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_14CYCLES) \
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266 || ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_15CYCLES) \
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267 || ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_16CYCLES) \
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268 || ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_17CYCLES) \
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269 || ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_18CYCLES) \
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270 || ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_19CYCLES) \
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271 || ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_20CYCLES) \
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272 )
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273
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274 #define IS_LL_ADC_MULTI_MASTER_SLAVE(__MULTI_MASTER_SLAVE__) \
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275 ( ((__MULTI_MASTER_SLAVE__) == LL_ADC_MULTI_MASTER) \
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276 || ((__MULTI_MASTER_SLAVE__) == LL_ADC_MULTI_SLAVE) \
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277 || ((__MULTI_MASTER_SLAVE__) == LL_ADC_MULTI_MASTER_SLAVE) \
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278 )
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279
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280 #endif /* ADC_MULTIMODE_SUPPORT */
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281 /**
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282 * @}
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283 */
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284
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285
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286 /* Private function prototypes -----------------------------------------------*/
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287
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288 /* Exported functions --------------------------------------------------------*/
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289 /** @addtogroup ADC_LL_Exported_Functions
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290 * @{
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291 */
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292
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293 /** @addtogroup ADC_LL_EF_Init
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294 * @{
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295 */
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296
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297 /**
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298 * @brief De-initialize registers of all ADC instances belonging to
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299 * the same ADC common instance to their default reset values.
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300 * @param ADCxy_COMMON ADC common instance
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301 * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
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302 * @retval An ErrorStatus enumeration value:
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303 * - SUCCESS: ADC common registers are de-initialized
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304 * - ERROR: not applicable
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305 */
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306 ErrorStatus LL_ADC_CommonDeInit(ADC_Common_TypeDef *ADCxy_COMMON)
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307 {
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308 /* Check the parameters */
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309 assert_param(IS_ADC_COMMON_INSTANCE(ADCxy_COMMON));
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310
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311
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312 /* Force reset of ADC clock (core clock) */
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313 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_ADC);
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314
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315 /* Release reset of ADC clock (core clock) */
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316 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_ADC);
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317
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318 return SUCCESS;
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319 }
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320
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321 /**
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322 * @brief Initialize some features of ADC common parameters
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323 * (all ADC instances belonging to the same ADC common instance)
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324 * and multimode (for devices with several ADC instances available).
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325 * @note The setting of ADC common parameters is conditioned to
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326 * ADC instances state:
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327 * All ADC instances belonging to the same ADC common instance
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328 * must be disabled.
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329 * @param ADCxy_COMMON ADC common instance
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330 * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
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331 * @param ADC_CommonInitStruct Pointer to a @ref LL_ADC_CommonInitTypeDef structure
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332 * @retval An ErrorStatus enumeration value:
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333 * - SUCCESS: ADC common registers are initialized
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334 * - ERROR: ADC common registers are not initialized
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335 */
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336 ErrorStatus LL_ADC_CommonInit(ADC_Common_TypeDef *ADCxy_COMMON, LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct)
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337 {
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338 ErrorStatus status = SUCCESS;
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339
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340 /* Check the parameters */
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341 assert_param(IS_ADC_COMMON_INSTANCE(ADCxy_COMMON));
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342 assert_param(IS_LL_ADC_COMMON_CLOCK(ADC_CommonInitStruct->CommonClock));
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343
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344 #if defined(ADC_MULTIMODE_SUPPORT)
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345 assert_param(IS_LL_ADC_MULTI_MODE(ADC_CommonInitStruct->Multimode));
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346 if(ADC_CommonInitStruct->Multimode != LL_ADC_MULTI_INDEPENDENT)
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347 {
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348 assert_param(IS_LL_ADC_MULTI_DMA_TRANSFER(ADC_CommonInitStruct->MultiDMATransfer));
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349 assert_param(IS_LL_ADC_MULTI_TWOSMP_DELAY(ADC_CommonInitStruct->MultiTwoSamplingDelay));
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350 }
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351 #endif /* ADC_MULTIMODE_SUPPORT */
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352
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353 /* Note: Hardware constraint (refer to description of functions */
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354 /* "LL_ADC_SetCommonXXX()" and "LL_ADC_SetMultiXXX()"): */
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355 /* On this STM32 serie, setting of these features is conditioned to */
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356 /* ADC state: */
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357 /* All ADC instances of the ADC common group must be disabled. */
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358 if(__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(ADCxy_COMMON) == 0U)
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359 {
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360 /* Configuration of ADC hierarchical scope: */
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361 /* - common to several ADC */
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362 /* (all ADC instances belonging to the same ADC common instance) */
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363 /* - Set ADC clock (conversion clock) */
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364 /* - multimode (if several ADC instances available on the */
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365 /* selected device) */
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366 /* - Set ADC multimode configuration */
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367 /* - Set ADC multimode DMA transfer */
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368 /* - Set ADC multimode: delay between 2 sampling phases */
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369 #if defined(ADC_MULTIMODE_SUPPORT)
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370 if(ADC_CommonInitStruct->Multimode != LL_ADC_MULTI_INDEPENDENT)
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371 {
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372 MODIFY_REG(ADCxy_COMMON->CCR,
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373 ADC_CCR_ADCPRE
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374 | ADC_CCR_MULTI
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375 | ADC_CCR_DMA
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376 | ADC_CCR_DDS
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377 | ADC_CCR_DELAY
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378 ,
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379 ADC_CommonInitStruct->CommonClock
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380 | ADC_CommonInitStruct->Multimode
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381 | ADC_CommonInitStruct->MultiDMATransfer
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382 | ADC_CommonInitStruct->MultiTwoSamplingDelay
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383 );
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384 }
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385 else
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386 {
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387 MODIFY_REG(ADCxy_COMMON->CCR,
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388 ADC_CCR_ADCPRE
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389 | ADC_CCR_MULTI
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390 | ADC_CCR_DMA
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391 | ADC_CCR_DDS
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392 | ADC_CCR_DELAY
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393 ,
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394 ADC_CommonInitStruct->CommonClock
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395 | LL_ADC_MULTI_INDEPENDENT
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396 );
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397 }
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398 #else
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399 LL_ADC_SetCommonClock(ADCxy_COMMON, ADC_CommonInitStruct->CommonClock);
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400 #endif
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401 }
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402 else
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403 {
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404 /* Initialization error: One or several ADC instances belonging to */
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405 /* the same ADC common instance are not disabled. */
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406 status = ERROR;
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407 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
408
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409 return status;
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diff changeset
410 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
411
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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412 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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413 * @brief Set each @ref LL_ADC_CommonInitTypeDef field to default value.
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414 * @param ADC_CommonInitStruct Pointer to a @ref LL_ADC_CommonInitTypeDef structure
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415 * whose fields will be set to default values.
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416 * @retval None
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417 */
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418 void LL_ADC_CommonStructInit(LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct)
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419 {
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420 /* Set ADC_CommonInitStruct fields to default values */
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diff changeset
421 /* Set fields of ADC common */
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422 /* (all ADC instances belonging to the same ADC common instance) */
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423 ADC_CommonInitStruct->CommonClock = LL_ADC_CLOCK_SYNC_PCLK_DIV2;
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424
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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425 #if defined(ADC_MULTIMODE_SUPPORT)
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426 /* Set fields of ADC multimode */
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427 ADC_CommonInitStruct->Multimode = LL_ADC_MULTI_INDEPENDENT;
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428 ADC_CommonInitStruct->MultiDMATransfer = LL_ADC_MULTI_REG_DMA_EACH_ADC;
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429 ADC_CommonInitStruct->MultiTwoSamplingDelay = LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES;
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430 #endif /* ADC_MULTIMODE_SUPPORT */
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431 }
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diff changeset
432
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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433 /**
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434 * @brief De-initialize registers of the selected ADC instance
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435 * to their default reset values.
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436 * @note To reset all ADC instances quickly (perform a hard reset),
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437 * use function @ref LL_ADC_CommonDeInit().
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438 * @param ADCx ADC instance
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439 * @retval An ErrorStatus enumeration value:
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440 * - SUCCESS: ADC registers are de-initialized
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441 * - ERROR: ADC registers are not de-initialized
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442 */
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443 ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx)
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444 {
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445 ErrorStatus status = SUCCESS;
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446
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447 /* Check the parameters */
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448 assert_param(IS_ADC_ALL_INSTANCE(ADCx));
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449
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450 /* Disable ADC instance if not already disabled. */
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451 if(LL_ADC_IsEnabled(ADCx) == 1U)
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452 {
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453 /* Set ADC group regular trigger source to SW start to ensure to not */
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454 /* have an external trigger event occurring during the conversion stop */
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455 /* ADC disable process. */
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456 LL_ADC_REG_SetTriggerSource(ADCx, LL_ADC_REG_TRIG_SOFTWARE);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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457
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
458 /* Set ADC group injected trigger source to SW start to ensure to not */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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459 /* have an external trigger event occurring during the conversion stop */
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460 /* ADC disable process. */
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461 LL_ADC_INJ_SetTriggerSource(ADCx, LL_ADC_INJ_TRIG_SOFTWARE);
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462
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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463 /* Disable the ADC instance */
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464 LL_ADC_Disable(ADCx);
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465 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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466
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
467 /* Check whether ADC state is compliant with expected state */
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468 /* (hardware requirements of bits state to reset registers below) */
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469 if(READ_BIT(ADCx->CR2, ADC_CR2_ADON) == 0U)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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470 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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471 /* ========== Reset ADC registers ========== */
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472 /* Reset register SR */
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473 CLEAR_BIT(ADCx->SR,
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474 ( LL_ADC_FLAG_STRT
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475 | LL_ADC_FLAG_JSTRT
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476 | LL_ADC_FLAG_EOCS
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477 | LL_ADC_FLAG_OVR
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478 | LL_ADC_FLAG_JEOS
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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479 | LL_ADC_FLAG_AWD1 )
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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480 );
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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481
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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482 /* Reset register CR1 */
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483 CLEAR_BIT(ADCx->CR1,
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484 ( ADC_CR1_OVRIE | ADC_CR1_RES | ADC_CR1_AWDEN
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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485 | ADC_CR1_JAWDEN
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486 | ADC_CR1_DISCNUM | ADC_CR1_JDISCEN | ADC_CR1_DISCEN
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487 | ADC_CR1_JAUTO | ADC_CR1_AWDSGL | ADC_CR1_SCAN
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488 | ADC_CR1_JEOCIE | ADC_CR1_AWDIE | ADC_CR1_EOCIE
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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489 | ADC_CR1_AWDCH )
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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490 );
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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491
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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492 /* Reset register CR2 */
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493 CLEAR_BIT(ADCx->CR2,
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494 ( ADC_CR2_SWSTART | ADC_CR2_EXTEN | ADC_CR2_EXTSEL
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495 | ADC_CR2_JSWSTART | ADC_CR2_JEXTEN | ADC_CR2_JEXTSEL
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496 | ADC_CR2_ALIGN | ADC_CR2_EOCS
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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497 | ADC_CR2_DDS | ADC_CR2_DMA
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498 | ADC_CR2_CONT | ADC_CR2_ADON )
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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499 );
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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500
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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501 /* Reset register SMPR1 */
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502 CLEAR_BIT(ADCx->SMPR1,
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diff changeset
503 ( ADC_SMPR1_SMP18 | ADC_SMPR1_SMP17 | ADC_SMPR1_SMP16
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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504 | ADC_SMPR1_SMP15 | ADC_SMPR1_SMP14 | ADC_SMPR1_SMP13
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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505 | ADC_SMPR1_SMP12 | ADC_SMPR1_SMP11 | ADC_SMPR1_SMP10)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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506 );
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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507
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
508 /* Reset register SMPR2 */
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diff changeset
509 CLEAR_BIT(ADCx->SMPR2,
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510 ( ADC_SMPR2_SMP9
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511 | ADC_SMPR2_SMP8 | ADC_SMPR2_SMP7 | ADC_SMPR2_SMP6
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512 | ADC_SMPR2_SMP5 | ADC_SMPR2_SMP4 | ADC_SMPR2_SMP3
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513 | ADC_SMPR2_SMP2 | ADC_SMPR2_SMP1 | ADC_SMPR2_SMP0)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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514 );
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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515
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
516 /* Reset register JOFR1 */
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517 CLEAR_BIT(ADCx->JOFR1, ADC_JOFR1_JOFFSET1);
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518 /* Reset register JOFR2 */
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519 CLEAR_BIT(ADCx->JOFR2, ADC_JOFR2_JOFFSET2);
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520 /* Reset register JOFR3 */
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521 CLEAR_BIT(ADCx->JOFR3, ADC_JOFR3_JOFFSET3);
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522 /* Reset register JOFR4 */
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523 CLEAR_BIT(ADCx->JOFR4, ADC_JOFR4_JOFFSET4);
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524
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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525 /* Reset register HTR */
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526 SET_BIT(ADCx->HTR, ADC_HTR_HT);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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527 /* Reset register LTR */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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528 CLEAR_BIT(ADCx->LTR, ADC_LTR_LT);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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529
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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530 /* Reset register SQR1 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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531 CLEAR_BIT(ADCx->SQR1,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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532 ( ADC_SQR1_L
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533 | ADC_SQR1_SQ16
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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534 | ADC_SQR1_SQ15 | ADC_SQR1_SQ14 | ADC_SQR1_SQ13)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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535 );
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
536
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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537 /* Reset register SQR2 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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538 CLEAR_BIT(ADCx->SQR2,
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539 ( ADC_SQR2_SQ12 | ADC_SQR2_SQ11 | ADC_SQR2_SQ10
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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540 | ADC_SQR2_SQ9 | ADC_SQR2_SQ8 | ADC_SQR2_SQ7)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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541 );
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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542
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
543
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
544 /* Reset register JSQR */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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545 CLEAR_BIT(ADCx->JSQR,
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546 ( ADC_JSQR_JL
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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547 | ADC_JSQR_JSQ4 | ADC_JSQR_JSQ3
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548 | ADC_JSQR_JSQ2 | ADC_JSQR_JSQ1 )
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549 );
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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550
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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551 /* Reset register DR */
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552 /* bits in access mode read only, no direct reset applicable */
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Ideenmodellierer
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diff changeset
553
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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554 /* Reset registers JDR1, JDR2, JDR3, JDR4 */
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555 /* bits in access mode read only, no direct reset applicable */
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556
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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557 /* Reset register CCR */
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558 CLEAR_BIT(ADC->CCR, ADC_CCR_TSVREFE | ADC_CCR_ADCPRE);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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559 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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560
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561 return status;
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parents:
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562 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
563
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
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564 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
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565 * @brief Initialize some features of ADC instance.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
566 * @note These parameters have an impact on ADC scope: ADC instance.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
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567 * Affects both group regular and group injected (availability
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
568 * of ADC group injected depends on STM32 families).
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
569 * Refer to corresponding unitary functions into
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
570 * @ref ADC_LL_EF_Configuration_ADC_Instance .
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
571 * @note The setting of these parameters by function @ref LL_ADC_Init()
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
572 * is conditioned to ADC state:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
573 * ADC instance must be disabled.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
574 * This condition is applied to all ADC features, for efficiency
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
575 * and compatibility over all STM32 families. However, the different
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
576 * features can be set under different ADC state conditions
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
577 * (setting possible with ADC enabled without conversion on going,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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578 * ADC enabled with conversion on going, ...)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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579 * Each feature can be updated afterwards with a unitary function
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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580 * and potentially with ADC in a different state than disabled,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
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581 * refer to description of each function for setting
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
582 * conditioned to ADC state.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
583 * @note After using this function, some other features must be configured
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
584 * using LL unitary functions.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
585 * The minimum configuration remaining to be done is:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
586 * - Set ADC group regular or group injected sequencer:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
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587 * map channel on the selected sequencer rank.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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588 * Refer to function @ref LL_ADC_REG_SetSequencerRanks().
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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589 * - Set ADC channel sampling time
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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590 * Refer to function LL_ADC_SetChannelSamplingTime();
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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591 * @param ADCx ADC instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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592 * @param ADC_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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593 * @retval An ErrorStatus enumeration value:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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594 * - SUCCESS: ADC registers are initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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595 * - ERROR: ADC registers are not initialized
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596 */
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597 ErrorStatus LL_ADC_Init(ADC_TypeDef *ADCx, LL_ADC_InitTypeDef *ADC_InitStruct)
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598 {
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599 ErrorStatus status = SUCCESS;
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600
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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601 /* Check the parameters */
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602 assert_param(IS_ADC_ALL_INSTANCE(ADCx));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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603
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604 assert_param(IS_LL_ADC_RESOLUTION(ADC_InitStruct->Resolution));
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605 assert_param(IS_LL_ADC_DATA_ALIGN(ADC_InitStruct->DataAlignment));
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606 assert_param(IS_LL_ADC_SCAN_SELECTION(ADC_InitStruct->SequencersScanMode));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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607
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
608 /* Note: Hardware constraint (refer to description of this function): */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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609 /* ADC instance must be disabled. */
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610 if(LL_ADC_IsEnabled(ADCx) == 0U)
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611 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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612 /* Configuration of ADC hierarchical scope: */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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613 /* - ADC instance */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
614 /* - Set ADC data resolution */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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615 /* - Set ADC conversion data alignment */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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616 MODIFY_REG(ADCx->CR1,
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617 ADC_CR1_RES
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618 | ADC_CR1_SCAN
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619 ,
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620 ADC_InitStruct->Resolution
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621 | ADC_InitStruct->SequencersScanMode
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622 );
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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623
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624 MODIFY_REG(ADCx->CR2,
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625 ADC_CR2_ALIGN
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626 ,
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627 ADC_InitStruct->DataAlignment
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628 );
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629
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630 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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631 else
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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632 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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633 /* Initialization error: ADC instance is not disabled. */
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634 status = ERROR;
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635 }
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636 return status;
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637 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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638
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
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639 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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640 * @brief Set each @ref LL_ADC_InitTypeDef field to default value.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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641 * @param ADC_InitStruct Pointer to a @ref LL_ADC_InitTypeDef structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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642 * whose fields will be set to default values.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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643 * @retval None
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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644 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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645 void LL_ADC_StructInit(LL_ADC_InitTypeDef *ADC_InitStruct)
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646 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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647 /* Set ADC_InitStruct fields to default values */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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648 /* Set fields of ADC instance */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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649 ADC_InitStruct->Resolution = LL_ADC_RESOLUTION_12B;
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650 ADC_InitStruct->DataAlignment = LL_ADC_DATA_ALIGN_RIGHT;
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651
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
652 /* Enable scan mode to have a generic behavior with ADC of other */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
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653 /* STM32 families, without this setting available: */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
654 /* ADC group regular sequencer and ADC group injected sequencer depend */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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655 /* only of their own configuration. */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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656 ADC_InitStruct->SequencersScanMode = LL_ADC_SEQ_SCAN_ENABLE;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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657
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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658 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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659
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
660 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
661 * @brief Initialize some features of ADC group regular.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
662 * @note These parameters have an impact on ADC scope: ADC group regular.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
663 * Refer to corresponding unitary functions into
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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664 * @ref ADC_LL_EF_Configuration_ADC_Group_Regular
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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665 * (functions with prefix "REG").
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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666 * @note The setting of these parameters by function @ref LL_ADC_Init()
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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667 * is conditioned to ADC state:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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668 * ADC instance must be disabled.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
669 * This condition is applied to all ADC features, for efficiency
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
670 * and compatibility over all STM32 families. However, the different
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
671 * features can be set under different ADC state conditions
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
672 * (setting possible with ADC enabled without conversion on going,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
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673 * ADC enabled with conversion on going, ...)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
674 * Each feature can be updated afterwards with a unitary function
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
675 * and potentially with ADC in a different state than disabled,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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676 * refer to description of each function for setting
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
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677 * conditioned to ADC state.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
678 * @note After using this function, other features must be configured
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
679 * using LL unitary functions.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
680 * The minimum configuration remaining to be done is:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
681 * - Set ADC group regular or group injected sequencer:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
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682 * map channel on the selected sequencer rank.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
683 * Refer to function @ref LL_ADC_REG_SetSequencerRanks().
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
684 * - Set ADC channel sampling time
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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685 * Refer to function LL_ADC_SetChannelSamplingTime();
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686 * @param ADCx ADC instance
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687 * @param ADC_REG_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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688 * @retval An ErrorStatus enumeration value:
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689 * - SUCCESS: ADC registers are initialized
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690 * - ERROR: ADC registers are not initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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691 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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692 ErrorStatus LL_ADC_REG_Init(ADC_TypeDef *ADCx, LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct)
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693 {
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694 ErrorStatus status = SUCCESS;
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Ideenmodellierer
parents:
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695
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
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696 /* Check the parameters */
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697 assert_param(IS_ADC_ALL_INSTANCE(ADCx));
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diff changeset
698 assert_param(IS_LL_ADC_REG_TRIG_SOURCE(ADC_REG_InitStruct->TriggerSource));
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699 assert_param(IS_LL_ADC_REG_SEQ_SCAN_LENGTH(ADC_REG_InitStruct->SequencerLength));
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700 if(ADC_REG_InitStruct->SequencerLength != LL_ADC_REG_SEQ_SCAN_DISABLE)
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diff changeset
701 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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702 assert_param(IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(ADC_REG_InitStruct->SequencerDiscont));
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703 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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704 assert_param(IS_LL_ADC_REG_CONTINUOUS_MODE(ADC_REG_InitStruct->ContinuousMode));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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705 assert_param(IS_LL_ADC_REG_DMA_TRANSFER(ADC_REG_InitStruct->DMATransfer));
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diff changeset
706
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
707 /* Note: Hardware constraint (refer to description of this function): */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
708 /* ADC instance must be disabled. */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
709 if(LL_ADC_IsEnabled(ADCx) == 0U)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
710 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
711 /* Configuration of ADC hierarchical scope: */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
712 /* - ADC group regular */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
713 /* - Set ADC group regular trigger source */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
714 /* - Set ADC group regular sequencer length */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
715 /* - Set ADC group regular sequencer discontinuous mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
716 /* - Set ADC group regular continuous mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
717 /* - Set ADC group regular conversion data transfer: no transfer or */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
718 /* transfer by DMA, and DMA requests mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
719 /* Note: On this STM32 serie, ADC trigger edge is set when starting */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
720 /* ADC conversion. */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
721 /* Refer to function @ref LL_ADC_REG_StartConversionExtTrig(). */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
722 if(ADC_REG_InitStruct->SequencerLength != LL_ADC_REG_SEQ_SCAN_DISABLE)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
723 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
724 MODIFY_REG(ADCx->CR1,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
725 ADC_CR1_DISCEN
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
726 | ADC_CR1_DISCNUM
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
727 ,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
728 ADC_REG_InitStruct->SequencerLength
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
729 | ADC_REG_InitStruct->SequencerDiscont
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
730 );
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
731 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
732 else
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
733 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
734 MODIFY_REG(ADCx->CR1,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
735 ADC_CR1_DISCEN
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
736 | ADC_CR1_DISCNUM
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
737 ,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
738 ADC_REG_InitStruct->SequencerLength
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
739 | LL_ADC_REG_SEQ_DISCONT_DISABLE
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
740 );
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
741 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
742
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
743 MODIFY_REG(ADCx->CR2,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
744 ADC_CR2_EXTSEL
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
745 | ADC_CR2_EXTEN
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
746 | ADC_CR2_CONT
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
747 | ADC_CR2_DMA
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
748 | ADC_CR2_DDS
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
749 ,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
750 (ADC_REG_InitStruct->TriggerSource & ADC_CR2_EXTSEL)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
751 | ADC_REG_InitStruct->ContinuousMode
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
752 | ADC_REG_InitStruct->DMATransfer
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
753 );
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
754
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
755 /* Set ADC group regular sequencer length and scan direction */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
756 /* Note: Hardware constraint (refer to description of this function): */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
757 /* Note: If ADC instance feature scan mode is disabled */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
758 /* (refer to ADC instance initialization structure */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
759 /* parameter @ref SequencersScanMode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
760 /* or function @ref LL_ADC_SetSequencersScanMode() ), */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
761 /* this parameter is discarded. */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
762 LL_ADC_REG_SetSequencerLength(ADCx, ADC_REG_InitStruct->SequencerLength);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
763 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
764 else
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
765 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
766 /* Initialization error: ADC instance is not disabled. */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
767 status = ERROR;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
768 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
769 return status;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
770 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
771
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
772 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
773 * @brief Set each @ref LL_ADC_REG_InitTypeDef field to default value.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
774 * @param ADC_REG_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
775 * whose fields will be set to default values.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
776 * @retval None
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
777 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
778 void LL_ADC_REG_StructInit(LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
779 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
780 /* Set ADC_REG_InitStruct fields to default values */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
781 /* Set fields of ADC group regular */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
782 /* Note: On this STM32 serie, ADC trigger edge is set when starting */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
783 /* ADC conversion. */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
784 /* Refer to function @ref LL_ADC_REG_StartConversionExtTrig(). */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
785 ADC_REG_InitStruct->TriggerSource = LL_ADC_REG_TRIG_SOFTWARE;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
786 ADC_REG_InitStruct->SequencerLength = LL_ADC_REG_SEQ_SCAN_DISABLE;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
787 ADC_REG_InitStruct->SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
788 ADC_REG_InitStruct->ContinuousMode = LL_ADC_REG_CONV_SINGLE;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
789 ADC_REG_InitStruct->DMATransfer = LL_ADC_REG_DMA_TRANSFER_NONE;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
790 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
791
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
792 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
793 * @brief Initialize some features of ADC group injected.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
794 * @note These parameters have an impact on ADC scope: ADC group injected.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
795 * Refer to corresponding unitary functions into
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
796 * @ref ADC_LL_EF_Configuration_ADC_Group_Regular
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
797 * (functions with prefix "INJ").
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
798 * @note The setting of these parameters by function @ref LL_ADC_Init()
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
799 * is conditioned to ADC state:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
800 * ADC instance must be disabled.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
801 * This condition is applied to all ADC features, for efficiency
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
802 * and compatibility over all STM32 families. However, the different
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
803 * features can be set under different ADC state conditions
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
804 * (setting possible with ADC enabled without conversion on going,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
805 * ADC enabled with conversion on going, ...)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
806 * Each feature can be updated afterwards with a unitary function
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
807 * and potentially with ADC in a different state than disabled,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
808 * refer to description of each function for setting
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
809 * conditioned to ADC state.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
810 * @note After using this function, other features must be configured
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
811 * using LL unitary functions.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
812 * The minimum configuration remaining to be done is:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
813 * - Set ADC group injected sequencer:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
814 * map channel on the selected sequencer rank.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
815 * Refer to function @ref LL_ADC_INJ_SetSequencerRanks().
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
816 * - Set ADC channel sampling time
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
817 * Refer to function LL_ADC_SetChannelSamplingTime();
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
818 * @param ADCx ADC instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
819 * @param ADC_INJ_InitStruct Pointer to a @ref LL_ADC_INJ_InitTypeDef structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
820 * @retval An ErrorStatus enumeration value:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
821 * - SUCCESS: ADC registers are initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
822 * - ERROR: ADC registers are not initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
823 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
824 ErrorStatus LL_ADC_INJ_Init(ADC_TypeDef *ADCx, LL_ADC_INJ_InitTypeDef *ADC_INJ_InitStruct)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
825 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
826 ErrorStatus status = SUCCESS;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
827
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
828 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
829 assert_param(IS_ADC_ALL_INSTANCE(ADCx));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
830 assert_param(IS_LL_ADC_INJ_TRIG_SOURCE(ADC_INJ_InitStruct->TriggerSource));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
831 assert_param(IS_LL_ADC_INJ_SEQ_SCAN_LENGTH(ADC_INJ_InitStruct->SequencerLength));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
832 if(ADC_INJ_InitStruct->SequencerLength != LL_ADC_INJ_SEQ_SCAN_DISABLE)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
833 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
834 assert_param(IS_LL_ADC_INJ_SEQ_SCAN_DISCONT_MODE(ADC_INJ_InitStruct->SequencerDiscont));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
835 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
836 assert_param(IS_LL_ADC_INJ_TRIG_AUTO(ADC_INJ_InitStruct->TrigAuto));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
837
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
838 /* Note: Hardware constraint (refer to description of this function): */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
839 /* ADC instance must be disabled. */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
840 if(LL_ADC_IsEnabled(ADCx) == 0U)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
841 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
842 /* Configuration of ADC hierarchical scope: */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
843 /* - ADC group injected */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
844 /* - Set ADC group injected trigger source */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
845 /* - Set ADC group injected sequencer length */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
846 /* - Set ADC group injected sequencer discontinuous mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
847 /* - Set ADC group injected conversion trigger: independent or */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
848 /* from ADC group regular */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
849 /* Note: On this STM32 serie, ADC trigger edge is set when starting */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
850 /* ADC conversion. */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
851 /* Refer to function @ref LL_ADC_INJ_StartConversionExtTrig(). */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
852 if(ADC_INJ_InitStruct->SequencerLength != LL_ADC_REG_SEQ_SCAN_DISABLE)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
853 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
854 MODIFY_REG(ADCx->CR1,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
855 ADC_CR1_JDISCEN
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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856 | ADC_CR1_JAUTO
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857 ,
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858 ADC_INJ_InitStruct->SequencerDiscont
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859 | ADC_INJ_InitStruct->TrigAuto
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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860 );
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861 }
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862 else
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863 {
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864 MODIFY_REG(ADCx->CR1,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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865 ADC_CR1_JDISCEN
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866 | ADC_CR1_JAUTO
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867 ,
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868 LL_ADC_REG_SEQ_DISCONT_DISABLE
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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869 | ADC_INJ_InitStruct->TrigAuto
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870 );
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871 }
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872
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873 MODIFY_REG(ADCx->CR2,
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874 ADC_CR2_JEXTSEL
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875 | ADC_CR2_JEXTEN
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876 ,
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877 (ADC_INJ_InitStruct->TriggerSource & ADC_CR2_JEXTSEL)
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878 );
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879
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880 /* Note: Hardware constraint (refer to description of this function): */
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881 /* Note: If ADC instance feature scan mode is disabled */
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882 /* (refer to ADC instance initialization structure */
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883 /* parameter @ref SequencersScanMode */
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884 /* or function @ref LL_ADC_SetSequencersScanMode() ), */
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885 /* this parameter is discarded. */
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886 LL_ADC_INJ_SetSequencerLength(ADCx, ADC_INJ_InitStruct->SequencerLength);
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887 }
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888 else
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889 {
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890 /* Initialization error: ADC instance is not disabled. */
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891 status = ERROR;
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892 }
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893 return status;
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894 }
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895
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896 /**
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897 * @brief Set each @ref LL_ADC_INJ_InitTypeDef field to default value.
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898 * @param ADC_INJ_InitStruct Pointer to a @ref LL_ADC_INJ_InitTypeDef structure
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899 * whose fields will be set to default values.
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900 * @retval None
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901 */
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902 void LL_ADC_INJ_StructInit(LL_ADC_INJ_InitTypeDef *ADC_INJ_InitStruct)
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903 {
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904 /* Set ADC_INJ_InitStruct fields to default values */
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905 /* Set fields of ADC group injected */
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906 ADC_INJ_InitStruct->TriggerSource = LL_ADC_INJ_TRIG_SOFTWARE;
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907 ADC_INJ_InitStruct->SequencerLength = LL_ADC_INJ_SEQ_SCAN_DISABLE;
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908 ADC_INJ_InitStruct->SequencerDiscont = LL_ADC_INJ_SEQ_DISCONT_DISABLE;
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909 ADC_INJ_InitStruct->TrigAuto = LL_ADC_INJ_TRIG_INDEPENDENT;
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910 }
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911
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912 /**
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913 * @}
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914 */
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915
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916 /**
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917 * @}
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918 */
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919
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920 /**
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921 * @}
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922 */
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923
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924 #endif /* ADC1 || ADC2 || ADC3 */
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925
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926 /**
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927 * @}
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928 */
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929
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930 #endif /* USE_FULL_LL_DRIVER */
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931
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932 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/