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38
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1 /*****************************************************************************
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2 *** -*- coding: UTF-8 -*-
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3 ***
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4 *** \file Discovery/Src/startup_stm32f429xx.s
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5 *** \brief STM32F427xx Devices vector table
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6 *** \author Heinrichs Weikamp gmbh
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7 *** \date 15-December-2014
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8 ***
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9 *** \details
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10 *** STM32F427xx Devices vector table
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11 *** This module performs:
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12 *** - Set the initial SP
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13 *** - Set the initial PC == Reset_Handler,
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14 *** - Set the vector table entries with the exceptions ISR address
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15 *** - Branches to main in the C library (which eventually
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16 *** calls main()).
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17 *** After Reset the Cortex-M4 processor is in Thread mode,
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18 *** priority is Privileged, and the Stack is set to Main.
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19 ***
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20 *** $Id$
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21 ******************************************************************************
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22 *** \par Copyright (c) 2014-2018 Heinrichs Weikamp gmbh
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23 ***
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24 *** This program is free software: you can redistribute it and/or modify
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25 *** it under the terms of the GNU General Public License as published by
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26 *** the Free Software Foundation, either version 3 of the License, or
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27 *** (at your option) any later version.
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28 ***
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29 *** This program is distributed in the hope that it will be useful,
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30 *** but WITHOUT ANY WARRANTY; without even the implied warranty of
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31 *** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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32 *** GNU General Public License for more details.
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33 ***
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34 *** You should have received a copy of the GNU General Public License
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35 *** along with this program. If not, see <http://www.gnu.org/licenses/>.
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36 ******************************************************************************
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37 *** \par Copyright (c) 2014 STMicroelectronics
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38 ***
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39 *** Redistribution and use in source and binary forms, with or without modification,
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40 *** are permitted provided that the following conditions are met:
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41 *** 1. Redistributions of source code must retain the above copyright notice,
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42 *** this list of conditions and the following disclaimer.
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43 *** 2. Redistributions in binary form must reproduce the above copyright notice,
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44 *** this list of conditions and the following disclaimer in the documentation
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45 *** and/or other materials provided with the distribution.
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46 *** 3. Neither the name of STMicroelectronics nor the names of its contributors
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47 *** may be used to endorse or promote products derived from this software
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48 *** without specific prior written permission.
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49 ***
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50 *** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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51 *** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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52 *** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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53 *** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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54 *** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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55 *** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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56 *** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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57 *** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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58 *** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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59 *** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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60 *****************************************************************************/
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61
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62 .syntax unified
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63 .cpu cortex-m4
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64 .fpu softvfp
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65 .thumb
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66
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67 .global g_pfnVectors
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68 .global Default_Handler
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69
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70 /* start address for the initialization values of the .data section.
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71 defined in linker script */
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72 .word _sidata
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73 /* start address for the .data section. defined in linker script */
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74 .word _sdata
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75 /* end address for the .data section. defined in linker script */
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76 .word _edata
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77 /* start address for the .bss section. defined in linker script */
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78 .word _sbss
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79 /* end address for the .bss section. defined in linker script */
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80 .word _ebss
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81 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
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82
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83 /**
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84 * @brief This is the code that gets called when the processor first
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85 * starts execution following a reset event. Only the absolutely
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86 * necessary set is performed, after which the application
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87 * supplied main() routine is called.
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88 * @param None
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89 * @retval : None
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90 */
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91
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92 .section .text.Reset_Handler
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93 .weak Reset_Handler
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94 .type Reset_Handler, %function
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95 Reset_Handler:
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96 ldr sp, =_estack /* set stack pointer */
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97
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98 /* Copy the data segment initializers from flash to SRAM */
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99 movs r1, #0
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100 b LoopCopyDataInit
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101
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102 CopyDataInit:
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103 ldr r3, =_sidata
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104 ldr r3, [r3, r1]
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105 str r3, [r0, r1]
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106 adds r1, r1, #4
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107
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108 LoopCopyDataInit:
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109 ldr r0, =_sdata
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110 ldr r3, =_edata
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111 adds r2, r0, r1
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112 cmp r2, r3
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113 bcc CopyDataInit
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114 ldr r2, =_sbss
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115 b LoopFillZerobss
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116 /* Zero fill the bss segment. */
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117 FillZerobss:
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118 movs r3, #0
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119 str r3, [r2], #4
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120
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121 LoopFillZerobss:
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122 ldr r3, = _ebss
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123 cmp r2, r3
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124 bcc FillZerobss
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125
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126 /* Call the clock system intitialization function.*/
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127 bl SystemInit
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128 /* Call static constructors */
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129 bl __libc_init_array
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130 /* Call the application's entry point.*/
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131 bl main
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132 bx lr
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133 .size Reset_Handler, .-Reset_Handler
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134
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135 /**
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136 * @brief This is the code that gets called when the processor receives an
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137 * unexpected interrupt. This simply enters an infinite loop, preserving
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138 * the system state for examination by a debugger.
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139 * @param None
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140 * @retval None
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141 */
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142 .section .text.Default_Handler,"ax",%progbits
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143 Default_Handler:
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144 Infinite_Loop:
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145 b Infinite_Loop
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146 .size Default_Handler, .-Default_Handler
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147 /******************************************************************************
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148 *
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149 * The minimal vector table for a Cortex M3. Note that the proper constructs
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150 * must be placed on this to ensure that it ends up at physical address
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151 * 0x0000.0000.
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152 *
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153 *******************************************************************************/
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154 .section .isr_vector,"a",%progbits
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155 .type g_pfnVectors, %object
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156 .size g_pfnVectors, .-g_pfnVectors
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157
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158 g_pfnVectors:
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159 .word _estack
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160 .word Reset_Handler
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161
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162 .word NMI_Handler
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163 .word HardFault_Handler
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164 .word MemManage_Handler
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165 .word BusFault_Handler
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166 .word UsageFault_Handler
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167 .word 0
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168 .word 0
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169 .word 0
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170 .word 0
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171 .word SVC_Handler
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172 .word DebugMon_Handler
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173 .word 0
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174 .word PendSV_Handler
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175 .word SysTick_Handler
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176
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177 /* External Interrupts */
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178 .word WWDG_IRQHandler /* Window WatchDog */
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179 .word PVD_IRQHandler /* PVD through EXTI Line detection */
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180 .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
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181 .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
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182 .word FLASH_IRQHandler /* FLASH */
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183 .word RCC_IRQHandler /* RCC */
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184 .word EXTI0_IRQHandler /* EXTI Line0 */
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185 .word EXTI1_IRQHandler /* EXTI Line1 */
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186 .word EXTI2_IRQHandler /* EXTI Line2 */
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187 .word EXTI3_IRQHandler /* EXTI Line3 */
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188 .word EXTI4_IRQHandler /* EXTI Line4 */
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189 .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
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190 .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
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191 .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
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192 .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
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193 .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
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194 .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
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195 .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
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196 .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
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197 .word CAN1_TX_IRQHandler /* CAN1 TX */
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198 .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
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199 .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
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200 .word CAN1_SCE_IRQHandler /* CAN1 SCE */
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201 .word EXTI9_5_IRQHandler /* External Line[9:5]s */
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202 .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
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203 .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
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204 .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
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205 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
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206 .word TIM2_IRQHandler /* TIM2 */
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207 .word TIM3_IRQHandler /* TIM3 */
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208 .word TIM4_IRQHandler /* TIM4 */
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209 .word I2C1_EV_IRQHandler /* I2C1 Event */
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210 .word I2C1_ER_IRQHandler /* I2C1 Error */
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211 .word I2C2_EV_IRQHandler /* I2C2 Event */
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212 .word I2C2_ER_IRQHandler /* I2C2 Error */
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213 .word SPI1_IRQHandler /* SPI1 */
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214 .word SPI2_IRQHandler /* SPI2 */
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215 .word USART1_IRQHandler /* USART1 */
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216 .word USART2_IRQHandler /* USART2 */
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217 .word USART3_IRQHandler /* USART3 */
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218 .word EXTI15_10_IRQHandler /* External Line[15:10]s */
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219 .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
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220 .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
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221 .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
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222 .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
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223 .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
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224 .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
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225 .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
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226 .word FMC_IRQHandler /* FMC */
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227 .word SDIO_IRQHandler /* SDIO */
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228 .word TIM5_IRQHandler /* TIM5 */
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229 .word SPI3_IRQHandler /* SPI3 */
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230 .word UART4_IRQHandler /* UART4 */
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231 .word UART5_IRQHandler /* UART5 */
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232 .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
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233 .word TIM7_IRQHandler /* TIM7 */
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234 .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
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235 .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
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236 .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
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237 .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
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238 .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
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239 .word ETH_IRQHandler /* Ethernet */
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240 .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
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241 .word CAN2_TX_IRQHandler /* CAN2 TX */
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242 .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
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243 .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
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244 .word CAN2_SCE_IRQHandler /* CAN2 SCE */
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245 .word OTG_FS_IRQHandler /* USB OTG FS */
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246 .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
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247 .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
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248 .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
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249 .word USART6_IRQHandler /* USART6 */
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250 .word I2C3_EV_IRQHandler /* I2C3 event */
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251 .word I2C3_ER_IRQHandler /* I2C3 error */
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252 .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
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253 .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
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254 .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
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255 .word OTG_HS_IRQHandler /* USB OTG HS */
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256 .word DCMI_IRQHandler /* DCMI */
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257 .word 0 /* Reserved */
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258 .word HASH_RNG_IRQHandler /* Hash and Rng */
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259 .word FPU_IRQHandler /* FPU */
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260 .word UART7_IRQHandler /* UART7 */
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261 .word UART8_IRQHandler /* UART8 */
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262 .word SPI4_IRQHandler /* SPI4 */
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263 .word SPI5_IRQHandler /* SPI5 */
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264 .word SPI6_IRQHandler /* SPI6 */
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265 .word SAI1_IRQHandler /* SAI1 */
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266 .word LTDC_IRQHandler /* LTDC_IRQHandler */
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267 .word LTDC_ER_IRQHandler /* LTDC_ER_IRQHandler */
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268 .word DMA2D_IRQHandler /* DMA2D */
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269
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270 /*******************************************************************************
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271 *
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272 * Provide weak aliases for each Exception handler to the Default_Handler.
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273 * As they are weak aliases, any function with the same name will override
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274 * this definition.
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275 *
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276 *******************************************************************************/
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277 .weak NMI_Handler
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278 .thumb_set NMI_Handler,Default_Handler
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279
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280 .weak HardFault_Handler
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281 .thumb_set HardFault_Handler,Default_Handler
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282
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283 .weak MemManage_Handler
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284 .thumb_set MemManage_Handler,Default_Handler
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285
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286 .weak BusFault_Handler
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287 .thumb_set BusFault_Handler,Default_Handler
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288
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289 .weak UsageFault_Handler
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290 .thumb_set UsageFault_Handler,Default_Handler
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291
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292 .weak SVC_Handler
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293 .thumb_set SVC_Handler,Default_Handler
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294
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295 .weak DebugMon_Handler
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296 .thumb_set DebugMon_Handler,Default_Handler
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297
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298 .weak PendSV_Handler
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299 .thumb_set PendSV_Handler,Default_Handler
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300
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301 .weak SysTick_Handler
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302 .thumb_set SysTick_Handler,Default_Handler
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303
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304 .weak WWDG_IRQHandler
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305 .thumb_set WWDG_IRQHandler,Default_Handler
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306
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307 .weak PVD_IRQHandler
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308 .thumb_set PVD_IRQHandler,Default_Handler
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309
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310 .weak TAMP_STAMP_IRQHandler
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311 .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
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312
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313 .weak RTC_WKUP_IRQHandler
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314 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
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315
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316 .weak FLASH_IRQHandler
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317 .thumb_set FLASH_IRQHandler,Default_Handler
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318
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319 .weak RCC_IRQHandler
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320 .thumb_set RCC_IRQHandler,Default_Handler
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321
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322 .weak EXTI0_IRQHandler
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323 .thumb_set EXTI0_IRQHandler,Default_Handler
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324
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325 .weak EXTI1_IRQHandler
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326 .thumb_set EXTI1_IRQHandler,Default_Handler
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327
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328 .weak EXTI2_IRQHandler
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329 .thumb_set EXTI2_IRQHandler,Default_Handler
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330
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331 .weak EXTI3_IRQHandler
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332 .thumb_set EXTI3_IRQHandler,Default_Handler
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333
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334 .weak EXTI4_IRQHandler
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335 .thumb_set EXTI4_IRQHandler,Default_Handler
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336
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337 .weak DMA1_Stream0_IRQHandler
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338 .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
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339
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340 .weak DMA1_Stream1_IRQHandler
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341 .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
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342
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343 .weak DMA1_Stream2_IRQHandler
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344 .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
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345
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346 .weak DMA1_Stream3_IRQHandler
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347 .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
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348
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349 .weak DMA1_Stream4_IRQHandler
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350 .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
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351
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352 .weak DMA1_Stream5_IRQHandler
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353 .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
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354
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355 .weak DMA1_Stream6_IRQHandler
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356 .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
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357
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358 .weak ADC_IRQHandler
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359 .thumb_set ADC_IRQHandler,Default_Handler
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360
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361 .weak CAN1_TX_IRQHandler
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362 .thumb_set CAN1_TX_IRQHandler,Default_Handler
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363
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364 .weak CAN1_RX0_IRQHandler
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365 .thumb_set CAN1_RX0_IRQHandler,Default_Handler
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366
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367 .weak CAN1_RX1_IRQHandler
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368 .thumb_set CAN1_RX1_IRQHandler,Default_Handler
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369
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370 .weak CAN1_SCE_IRQHandler
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371 .thumb_set CAN1_SCE_IRQHandler,Default_Handler
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372
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373 .weak EXTI9_5_IRQHandler
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374 .thumb_set EXTI9_5_IRQHandler,Default_Handler
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375
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376 .weak TIM1_BRK_TIM9_IRQHandler
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377 .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
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378
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379 .weak TIM1_UP_TIM10_IRQHandler
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380 .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
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381
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382 .weak TIM1_TRG_COM_TIM11_IRQHandler
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383 .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
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384
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385 .weak TIM1_CC_IRQHandler
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386 .thumb_set TIM1_CC_IRQHandler,Default_Handler
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387
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388 .weak TIM2_IRQHandler
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389 .thumb_set TIM2_IRQHandler,Default_Handler
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390
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391 .weak TIM3_IRQHandler
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|
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392 .thumb_set TIM3_IRQHandler,Default_Handler
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393
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394 .weak TIM4_IRQHandler
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395 .thumb_set TIM4_IRQHandler,Default_Handler
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396
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397 .weak I2C1_EV_IRQHandler
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|
398 .thumb_set I2C1_EV_IRQHandler,Default_Handler
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399
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400 .weak I2C1_ER_IRQHandler
|
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|
401 .thumb_set I2C1_ER_IRQHandler,Default_Handler
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|
402
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403 .weak I2C2_EV_IRQHandler
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|
404 .thumb_set I2C2_EV_IRQHandler,Default_Handler
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405
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406 .weak I2C2_ER_IRQHandler
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|
407 .thumb_set I2C2_ER_IRQHandler,Default_Handler
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408
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409 .weak SPI1_IRQHandler
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410 .thumb_set SPI1_IRQHandler,Default_Handler
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411
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412 .weak SPI2_IRQHandler
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413 .thumb_set SPI2_IRQHandler,Default_Handler
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414
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415 .weak USART1_IRQHandler
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416 .thumb_set USART1_IRQHandler,Default_Handler
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417
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418 .weak USART2_IRQHandler
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419 .thumb_set USART2_IRQHandler,Default_Handler
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|
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420
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421 .weak USART3_IRQHandler
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422 .thumb_set USART3_IRQHandler,Default_Handler
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423
|
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424 .weak EXTI15_10_IRQHandler
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|
425 .thumb_set EXTI15_10_IRQHandler,Default_Handler
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426
|
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427 .weak RTC_Alarm_IRQHandler
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428 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
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|
|
429
|
|
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430 .weak OTG_FS_WKUP_IRQHandler
|
|
|
431 .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
|
|
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432
|
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433 .weak TIM8_BRK_TIM12_IRQHandler
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434 .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
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|
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435
|
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436 .weak TIM8_UP_TIM13_IRQHandler
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|
437 .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
|
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438
|
|
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439 .weak TIM8_TRG_COM_TIM14_IRQHandler
|
|
|
440 .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
|
|
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441
|
|
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442 .weak TIM8_CC_IRQHandler
|
|
|
443 .thumb_set TIM8_CC_IRQHandler,Default_Handler
|
|
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444
|
|
|
445 .weak DMA1_Stream7_IRQHandler
|
|
|
446 .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
|
|
|
447
|
|
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448 .weak FMC_IRQHandler
|
|
|
449 .thumb_set FMC_IRQHandler,Default_Handler
|
|
|
450
|
|
|
451 .weak SDIO_IRQHandler
|
|
|
452 .thumb_set SDIO_IRQHandler,Default_Handler
|
|
|
453
|
|
|
454 .weak TIM5_IRQHandler
|
|
|
455 .thumb_set TIM5_IRQHandler,Default_Handler
|
|
|
456
|
|
|
457 .weak SPI3_IRQHandler
|
|
|
458 .thumb_set SPI3_IRQHandler,Default_Handler
|
|
|
459
|
|
|
460 .weak UART4_IRQHandler
|
|
|
461 .thumb_set UART4_IRQHandler,Default_Handler
|
|
|
462
|
|
|
463 .weak UART5_IRQHandler
|
|
|
464 .thumb_set UART5_IRQHandler,Default_Handler
|
|
|
465
|
|
|
466 .weak TIM6_DAC_IRQHandler
|
|
|
467 .thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
|
|
468
|
|
|
469 .weak TIM7_IRQHandler
|
|
|
470 .thumb_set TIM7_IRQHandler,Default_Handler
|
|
|
471
|
|
|
472 .weak DMA2_Stream0_IRQHandler
|
|
|
473 .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
|
|
|
474
|
|
|
475 .weak DMA2_Stream1_IRQHandler
|
|
|
476 .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
|
|
|
477
|
|
|
478 .weak DMA2_Stream2_IRQHandler
|
|
|
479 .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
|
|
|
480
|
|
|
481 .weak DMA2_Stream3_IRQHandler
|
|
|
482 .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
|
|
|
483
|
|
|
484 .weak DMA2_Stream4_IRQHandler
|
|
|
485 .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
|
|
|
486
|
|
|
487 .weak ETH_IRQHandler
|
|
|
488 .thumb_set ETH_IRQHandler,Default_Handler
|
|
|
489
|
|
|
490 .weak ETH_WKUP_IRQHandler
|
|
|
491 .thumb_set ETH_WKUP_IRQHandler,Default_Handler
|
|
|
492
|
|
|
493 .weak CAN2_TX_IRQHandler
|
|
|
494 .thumb_set CAN2_TX_IRQHandler,Default_Handler
|
|
|
495
|
|
|
496 .weak CAN2_RX0_IRQHandler
|
|
|
497 .thumb_set CAN2_RX0_IRQHandler,Default_Handler
|
|
|
498
|
|
|
499 .weak CAN2_RX1_IRQHandler
|
|
|
500 .thumb_set CAN2_RX1_IRQHandler,Default_Handler
|
|
|
501
|
|
|
502 .weak CAN2_SCE_IRQHandler
|
|
|
503 .thumb_set CAN2_SCE_IRQHandler,Default_Handler
|
|
|
504
|
|
|
505 .weak OTG_FS_IRQHandler
|
|
|
506 .thumb_set OTG_FS_IRQHandler,Default_Handler
|
|
|
507
|
|
|
508 .weak DMA2_Stream5_IRQHandler
|
|
|
509 .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
|
|
|
510
|
|
|
511 .weak DMA2_Stream6_IRQHandler
|
|
|
512 .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
|
|
|
513
|
|
|
514 .weak DMA2_Stream7_IRQHandler
|
|
|
515 .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
|
|
|
516
|
|
|
517 .weak USART6_IRQHandler
|
|
|
518 .thumb_set USART6_IRQHandler,Default_Handler
|
|
|
519
|
|
|
520 .weak I2C3_EV_IRQHandler
|
|
|
521 .thumb_set I2C3_EV_IRQHandler,Default_Handler
|
|
|
522
|
|
|
523 .weak I2C3_ER_IRQHandler
|
|
|
524 .thumb_set I2C3_ER_IRQHandler,Default_Handler
|
|
|
525
|
|
|
526 .weak OTG_HS_EP1_OUT_IRQHandler
|
|
|
527 .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
|
|
|
528
|
|
|
529 .weak OTG_HS_EP1_IN_IRQHandler
|
|
|
530 .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
|
|
|
531
|
|
|
532 .weak OTG_HS_WKUP_IRQHandler
|
|
|
533 .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
|
|
|
534
|
|
|
535 .weak OTG_HS_IRQHandler
|
|
|
536 .thumb_set OTG_HS_IRQHandler,Default_Handler
|
|
|
537
|
|
|
538 .weak DCMI_IRQHandler
|
|
|
539 .thumb_set DCMI_IRQHandler,Default_Handler
|
|
|
540
|
|
|
541 .weak HASH_RNG_IRQHandler
|
|
|
542 .thumb_set HASH_RNG_IRQHandler,Default_Handler
|
|
|
543
|
|
|
544 .weak FPU_IRQHandler
|
|
|
545 .thumb_set FPU_IRQHandler,Default_Handler
|
|
|
546
|
|
|
547 .weak UART7_IRQHandler
|
|
|
548 .thumb_set UART7_IRQHandler,Default_Handler
|
|
|
549
|
|
|
550 .weak UART8_IRQHandler
|
|
|
551 .thumb_set UART8_IRQHandler,Default_Handler
|
|
|
552
|
|
|
553 .weak SPI4_IRQHandler
|
|
|
554 .thumb_set SPI4_IRQHandler,Default_Handler
|
|
|
555
|
|
|
556 .weak SPI5_IRQHandler
|
|
|
557 .thumb_set SPI5_IRQHandler,Default_Handler
|
|
|
558
|
|
|
559 .weak SPI6_IRQHandler
|
|
|
560 .thumb_set SPI6_IRQHandler,Default_Handler
|
|
|
561
|
|
|
562 .weak SAI1_IRQHandler
|
|
|
563 .thumb_set SAI1_IRQHandler,Default_Handler
|
|
|
564
|
|
|
565 .weak LTDC_IRQHandler
|
|
|
566 .thumb_set LTDC_IRQHandler,Default_Handler
|
|
|
567
|
|
|
568 .weak LTDC_ER_IRQHandler
|
|
|
569 .thumb_set LTDC_ER_IRQHandler,Default_Handler
|
|
|
570
|
|
|
571 .weak DMA2D_IRQHandler
|
|
|
572 .thumb_set DMA2D_IRQHandler,Default_Handler
|
