annotate Common/Drivers/STM32F4xx/Source/Templates/system_stm32f4xx.c @ 178:d36596281501

Minor: Replace stupid "Sleep Sleep Sleep" message with something more meaningful
author heinrichsweikamp
date Wed, 13 Mar 2019 20:51:50 +0100
parents c78bcbd5deda
children
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1 /**
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2 ******************************************************************************
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3 * @file system_stm32f4xx.c
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4 * @author MCD Application Team
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5 * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
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6 *
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7 * This file provides two functions and one global variable to be called from
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8 * user application:
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9 * - SystemInit(): This function is called at startup just after reset and
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10 * before branch to main program. This call is made inside
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11 * the "startup_stm32f4xx.s" file.
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12 *
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13 * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
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14 * by the user application to setup the SysTick
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15 * timer or configure other parameters.
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16 *
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17 * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
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18 * be called whenever the core clock is changed
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19 * during program execution.
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20 *
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21 *
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22 ******************************************************************************
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23 * @attention
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24 *
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25 * <h2><center>&copy; COPYRIGHT 2017 STMicroelectronics</center></h2>
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26 *
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27 * Redistribution and use in source and binary forms, with or without modification,
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28 * are permitted provided that the following conditions are met:
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29 * 1. Redistributions of source code must retain the above copyright notice,
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30 * this list of conditions and the following disclaimer.
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31 * 2. Redistributions in binary form must reproduce the above copyright notice,
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32 * this list of conditions and the following disclaimer in the documentation
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33 * and/or other materials provided with the distribution.
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34 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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35 * may be used to endorse or promote products derived from this software
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36 * without specific prior written permission.
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37 *
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38 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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39 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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40 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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41 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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42 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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43 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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44 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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45 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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46 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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48 *
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49 ******************************************************************************
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50 */
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51
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52 /** @addtogroup CMSIS
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53 * @{
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54 */
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55
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56 /** @addtogroup stm32f4xx_system
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57 * @{
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58 */
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59
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60 /** @addtogroup STM32F4xx_System_Private_Includes
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61 * @{
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62 */
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63
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64
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65 #include "stm32f4xx.h"
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66
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67 #if !defined (HSE_VALUE)
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68 #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
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69 #endif /* HSE_VALUE */
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70
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71 #if !defined (HSI_VALUE)
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72 #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
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73 #endif /* HSI_VALUE */
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74
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75 /**
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76 * @}
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77 */
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78
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79 /** @addtogroup STM32F4xx_System_Private_TypesDefinitions
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80 * @{
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81 */
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82
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83 /**
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84 * @}
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85 */
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86
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87 /** @addtogroup STM32F4xx_System_Private_Defines
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88 * @{
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89 */
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90
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91 /************************* Miscellaneous Configuration ************************/
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92 /*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory */
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93 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
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94 || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
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95 || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
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96 /* #define DATA_IN_ExtSRAM */
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97 #endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
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98 STM32F412Zx || STM32F412Vx */
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99
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100 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
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101 || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
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102 /* #define DATA_IN_ExtSDRAM */
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103 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
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104 STM32F479xx */
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105
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106 /*!< Uncomment the following line if you need to relocate your vector Table in
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107 Internal SRAM. */
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108 /* #define VECT_TAB_SRAM */
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109 #define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
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110 This value must be a multiple of 0x200. */
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111 /******************************************************************************/
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112
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113 /**
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114 * @}
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115 */
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116
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117 /** @addtogroup STM32F4xx_System_Private_Macros
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118 * @{
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119 */
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120
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121 /**
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122 * @}
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123 */
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124
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125 /** @addtogroup STM32F4xx_System_Private_Variables
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126 * @{
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127 */
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128 /* This variable is updated in three ways:
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129 1) by calling CMSIS function SystemCoreClockUpdate()
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130 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
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131 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
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132 Note: If you use this function to configure the system clock; then there
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133 is no need to call the 2 first functions listed above, since SystemCoreClock
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134 variable is updated automatically.
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135 */
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136 uint32_t SystemCoreClock = 16000000;
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137 const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
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138 const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
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139 /**
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140 * @}
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141 */
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142
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143 /** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
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144 * @{
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145 */
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146
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147 #if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
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148 static void SystemInit_ExtMemCtl(void);
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149 #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
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150
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151 /**
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152 * @}
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153 */
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154
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155 /** @addtogroup STM32F4xx_System_Private_Functions
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156 * @{
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157 */
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158
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159 /**
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160 * @brief Setup the microcontroller system
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161 * Initialize the FPU setting, vector table location and External memory
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162 * configuration.
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163 * @param None
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164 * @retval None
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165 */
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166 void SystemInit(void)
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167 {
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168 /* FPU settings ------------------------------------------------------------*/
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169 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
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170 SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
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171 #endif
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172 /* Reset the RCC clock configuration to the default reset state ------------*/
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173 /* Set HSION bit */
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174 RCC->CR |= (uint32_t)0x00000001;
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175
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176 /* Reset CFGR register */
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177 RCC->CFGR = 0x00000000;
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178
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179 /* Reset HSEON, CSSON and PLLON bits */
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180 RCC->CR &= (uint32_t)0xFEF6FFFF;
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181
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182 /* Reset PLLCFGR register */
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183 RCC->PLLCFGR = 0x24003010;
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184
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185 /* Reset HSEBYP bit */
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186 RCC->CR &= (uint32_t)0xFFFBFFFF;
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187
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188 /* Disable all interrupts */
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189 RCC->CIR = 0x00000000;
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190
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191 #if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
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192 SystemInit_ExtMemCtl();
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193 #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
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194
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195 /* Configure the Vector Table location add offset address ------------------*/
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196 #ifdef VECT_TAB_SRAM
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197 SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
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198 #else
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199 SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
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200 #endif
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201 }
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202
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203 /**
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204 * @brief Update SystemCoreClock variable according to Clock Register Values.
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205 * The SystemCoreClock variable contains the core clock (HCLK), it can
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206 * be used by the user application to setup the SysTick timer or configure
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207 * other parameters.
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208 *
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209 * @note Each time the core clock (HCLK) changes, this function must be called
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210 * to update SystemCoreClock variable value. Otherwise, any configuration
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211 * based on this variable will be incorrect.
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212 *
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213 * @note - The system frequency computed by this function is not the real
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214 * frequency in the chip. It is calculated based on the predefined
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215 * constant and the selected clock source:
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216 *
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217 * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
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218 *
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219 * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
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220 *
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221 * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
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222 * or HSI_VALUE(*) multiplied/divided by the PLL factors.
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223 *
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224 * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
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225 * 16 MHz) but the real value may vary depending on the variations
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226 * in voltage and temperature.
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227 *
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228 * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
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229 * depends on the application requirements), user has to ensure that HSE_VALUE
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230 * is same as the real frequency of the crystal used. Otherwise, this function
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231 * may have wrong result.
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232 *
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233 * - The result of this function could be not correct when using fractional
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234 * value for HSE crystal.
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235 *
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236 * @param None
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237 * @retval None
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238 */
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239 void SystemCoreClockUpdate(void)
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240 {
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241 uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
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242
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243 /* Get SYSCLK source -------------------------------------------------------*/
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244 tmp = RCC->CFGR & RCC_CFGR_SWS;
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245
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246 switch (tmp)
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247 {
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248 case 0x00: /* HSI used as system clock source */
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249 SystemCoreClock = HSI_VALUE;
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250 break;
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251 case 0x04: /* HSE used as system clock source */
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252 SystemCoreClock = HSE_VALUE;
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253 break;
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254 case 0x08: /* PLL used as system clock source */
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255
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256 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
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257 SYSCLK = PLL_VCO / PLL_P
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258 */
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259 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
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260 pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
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261
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262 if (pllsource != 0)
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263 {
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264 /* HSE used as PLL clock source */
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265 pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
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266 }
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267 else
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268 {
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269 /* HSI used as PLL clock source */
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270 pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
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271 }
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272
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273 pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
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274 SystemCoreClock = pllvco/pllp;
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275 break;
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276 default:
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277 SystemCoreClock = HSI_VALUE;
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278 break;
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279 }
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280 /* Compute HCLK frequency --------------------------------------------------*/
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281 /* Get HCLK prescaler */
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282 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
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283 /* HCLK frequency */
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284 SystemCoreClock >>= tmp;
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285 }
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286
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287 #if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)
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288 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
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289 || defined(STM32F469xx) || defined(STM32F479xx)
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290 /**
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291 * @brief Setup the external memory controller.
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292 * Called in startup_stm32f4xx.s before jump to main.
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293 * This function configures the external memories (SRAM/SDRAM)
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294 * This SRAM/SDRAM will be used as program data memory (including heap and stack).
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295 * @param None
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296 * @retval None
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297 */
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298 void SystemInit_ExtMemCtl(void)
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299 {
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300 __IO uint32_t tmp = 0x00;
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301
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302 register uint32_t tmpreg = 0, timeout = 0xFFFF;
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303 register __IO uint32_t index;
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304
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305 /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */
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diff changeset
306 RCC->AHB1ENR |= 0x000001F8;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
307
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
308 /* Delay after an RCC peripheral clock enabling */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
309 tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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310
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
311 /* Connect PDx pins to FMC Alternate function */
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312 GPIOD->AFR[0] = 0x00CCC0CC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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313 GPIOD->AFR[1] = 0xCCCCCCCC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
314 /* Configure PDx pins in Alternate function mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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315 GPIOD->MODER = 0xAAAA0A8A;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
316 /* Configure PDx pins speed to 100 MHz */
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317 GPIOD->OSPEEDR = 0xFFFF0FCF;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
318 /* Configure PDx pins Output type to push-pull */
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319 GPIOD->OTYPER = 0x00000000;
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diff changeset
320 /* No pull-up, pull-down for PDx pins */
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321 GPIOD->PUPDR = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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322
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
323 /* Connect PEx pins to FMC Alternate function */
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324 GPIOE->AFR[0] = 0xC00CC0CC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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325 GPIOE->AFR[1] = 0xCCCCCCCC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
326 /* Configure PEx pins in Alternate function mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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327 GPIOE->MODER = 0xAAAA828A;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
328 /* Configure PEx pins speed to 100 MHz */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
329 GPIOE->OSPEEDR = 0xFFFFC3CF;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
330 /* Configure PEx pins Output type to push-pull */
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331 GPIOE->OTYPER = 0x00000000;
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diff changeset
332 /* No pull-up, pull-down for PEx pins */
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333 GPIOE->PUPDR = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
334
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
335 /* Connect PFx pins to FMC Alternate function */
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336 GPIOF->AFR[0] = 0xCCCCCCCC;
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337 GPIOF->AFR[1] = 0xCCCCCCCC;
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diff changeset
338 /* Configure PFx pins in Alternate function mode */
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339 GPIOF->MODER = 0xAA800AAA;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
340 /* Configure PFx pins speed to 50 MHz */
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341 GPIOF->OSPEEDR = 0xAA800AAA;
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diff changeset
342 /* Configure PFx pins Output type to push-pull */
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343 GPIOF->OTYPER = 0x00000000;
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diff changeset
344 /* No pull-up, pull-down for PFx pins */
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345 GPIOF->PUPDR = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
346
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
347 /* Connect PGx pins to FMC Alternate function */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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348 GPIOG->AFR[0] = 0xCCCCCCCC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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349 GPIOG->AFR[1] = 0xCCCCCCCC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
350 /* Configure PGx pins in Alternate function mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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351 GPIOG->MODER = 0xAAAAAAAA;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
352 /* Configure PGx pins speed to 50 MHz */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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353 GPIOG->OSPEEDR = 0xAAAAAAAA;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
354 /* Configure PGx pins Output type to push-pull */
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355 GPIOG->OTYPER = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
356 /* No pull-up, pull-down for PGx pins */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
357 GPIOG->PUPDR = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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358
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
359 /* Connect PHx pins to FMC Alternate function */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
360 GPIOH->AFR[0] = 0x00C0CC00;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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361 GPIOH->AFR[1] = 0xCCCCCCCC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
362 /* Configure PHx pins in Alternate function mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
363 GPIOH->MODER = 0xAAAA08A0;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
364 /* Configure PHx pins speed to 50 MHz */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
365 GPIOH->OSPEEDR = 0xAAAA08A0;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
366 /* Configure PHx pins Output type to push-pull */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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367 GPIOH->OTYPER = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
368 /* No pull-up, pull-down for PHx pins */
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diff changeset
369 GPIOH->PUPDR = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
370
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
371 /* Connect PIx pins to FMC Alternate function */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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372 GPIOI->AFR[0] = 0xCCCCCCCC;
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373 GPIOI->AFR[1] = 0x00000CC0;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
374 /* Configure PIx pins in Alternate function mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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375 GPIOI->MODER = 0x0028AAAA;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
376 /* Configure PIx pins speed to 50 MHz */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
377 GPIOI->OSPEEDR = 0x0028AAAA;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
378 /* Configure PIx pins Output type to push-pull */
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379 GPIOI->OTYPER = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
380 /* No pull-up, pull-down for PIx pins */
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diff changeset
381 GPIOI->PUPDR = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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382
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
383 /*-- FMC Configuration -------------------------------------------------------*/
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diff changeset
384 /* Enable the FMC interface clock */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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385 RCC->AHB3ENR |= 0x00000001;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
386 /* Delay after an RCC peripheral clock enabling */
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387 tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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388
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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389 FMC_Bank5_6->SDCR[0] = 0x000019E4;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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390 FMC_Bank5_6->SDTR[0] = 0x01115351;
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diff changeset
391
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
392 /* SDRAM initialization sequence */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
393 /* Clock enable command */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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394 FMC_Bank5_6->SDCMR = 0x00000011;
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395 tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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396 while((tmpreg != 0) && (timeout-- > 0))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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397 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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398 tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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399 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
400
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
401 /* Delay */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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402 for (index = 0; index<1000; index++);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
403
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
404 /* PALL command */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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405 FMC_Bank5_6->SDCMR = 0x00000012;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
406 timeout = 0xFFFF;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
407 while((tmpreg != 0) && (timeout-- > 0))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
408 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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409 tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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410 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
411
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
412 /* Auto refresh command */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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413 FMC_Bank5_6->SDCMR = 0x00000073;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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414 timeout = 0xFFFF;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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415 while((tmpreg != 0) && (timeout-- > 0))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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416 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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417 tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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418 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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419
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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420 /* MRD register program */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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421 FMC_Bank5_6->SDCMR = 0x00046014;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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422 timeout = 0xFFFF;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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423 while((tmpreg != 0) && (timeout-- > 0))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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424 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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425 tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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426 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
427
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
428 /* Set refresh count */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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429 tmpreg = FMC_Bank5_6->SDRTR;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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430 FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
431
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
432 /* Disable write protection */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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433 tmpreg = FMC_Bank5_6->SDCR[0];
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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434 FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
435
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
436 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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437 /* Configure and enable Bank1_SRAM2 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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438 FMC_Bank1->BTCR[2] = 0x00001011;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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439 FMC_Bank1->BTCR[3] = 0x00000201;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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440 FMC_Bank1E->BWTR[2] = 0x0fffffff;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
441 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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442 #if defined(STM32F469xx) || defined(STM32F479xx)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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443 /* Configure and enable Bank1_SRAM2 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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444 FMC_Bank1->BTCR[2] = 0x00001091;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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445 FMC_Bank1->BTCR[3] = 0x00110212;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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446 FMC_Bank1E->BWTR[2] = 0x0fffffff;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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447 #endif /* STM32F469xx || STM32F479xx */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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448
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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449 (void)(tmp);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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450 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
451 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
452 #elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
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453 /**
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454 * @brief Setup the external memory controller.
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455 * Called in startup_stm32f4xx.s before jump to main.
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456 * This function configures the external memories (SRAM/SDRAM)
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457 * This SRAM/SDRAM will be used as program data memory (including heap and stack).
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458 * @param None
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459 * @retval None
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460 */
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461 void SystemInit_ExtMemCtl(void)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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462 {
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463 __IO uint32_t tmp = 0x00;
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464 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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465 || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
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466 #if defined (DATA_IN_ExtSDRAM)
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467 register uint32_t tmpreg = 0, timeout = 0xFFFF;
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468 register __IO uint32_t index;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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469
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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470 #if defined(STM32F446xx)
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471 /* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface
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472 clock */
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473 RCC->AHB1ENR |= 0x0000007D;
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474 #else
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475 /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
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476 clock */
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477 RCC->AHB1ENR |= 0x000001F8;
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478 #endif /* STM32F446xx */
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479 /* Delay after an RCC peripheral clock enabling */
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480 tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
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481
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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482 #if defined(STM32F446xx)
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483 /* Connect PAx pins to FMC Alternate function */
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484 GPIOA->AFR[0] |= 0xC0000000;
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485 GPIOA->AFR[1] |= 0x00000000;
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486 /* Configure PDx pins in Alternate function mode */
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487 GPIOA->MODER |= 0x00008000;
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488 /* Configure PDx pins speed to 50 MHz */
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489 GPIOA->OSPEEDR |= 0x00008000;
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diff changeset
490 /* Configure PDx pins Output type to push-pull */
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491 GPIOA->OTYPER |= 0x00000000;
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diff changeset
492 /* No pull-up, pull-down for PDx pins */
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493 GPIOA->PUPDR |= 0x00000000;
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494
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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495 /* Connect PCx pins to FMC Alternate function */
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496 GPIOC->AFR[0] |= 0x00CC0000;
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497 GPIOC->AFR[1] |= 0x00000000;
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498 /* Configure PDx pins in Alternate function mode */
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499 GPIOC->MODER |= 0x00000A00;
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500 /* Configure PDx pins speed to 50 MHz */
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501 GPIOC->OSPEEDR |= 0x00000A00;
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diff changeset
502 /* Configure PDx pins Output type to push-pull */
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503 GPIOC->OTYPER |= 0x00000000;
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504 /* No pull-up, pull-down for PDx pins */
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505 GPIOC->PUPDR |= 0x00000000;
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506 #endif /* STM32F446xx */
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507
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diff changeset
508 /* Connect PDx pins to FMC Alternate function */
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509 GPIOD->AFR[0] = 0x000000CC;
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510 GPIOD->AFR[1] = 0xCC000CCC;
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diff changeset
511 /* Configure PDx pins in Alternate function mode */
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512 GPIOD->MODER = 0xA02A000A;
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513 /* Configure PDx pins speed to 50 MHz */
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514 GPIOD->OSPEEDR = 0xA02A000A;
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diff changeset
515 /* Configure PDx pins Output type to push-pull */
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516 GPIOD->OTYPER = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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517 /* No pull-up, pull-down for PDx pins */
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518 GPIOD->PUPDR = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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519
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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520 /* Connect PEx pins to FMC Alternate function */
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521 GPIOE->AFR[0] = 0xC00000CC;
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522 GPIOE->AFR[1] = 0xCCCCCCCC;
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diff changeset
523 /* Configure PEx pins in Alternate function mode */
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524 GPIOE->MODER = 0xAAAA800A;
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525 /* Configure PEx pins speed to 50 MHz */
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526 GPIOE->OSPEEDR = 0xAAAA800A;
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diff changeset
527 /* Configure PEx pins Output type to push-pull */
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528 GPIOE->OTYPER = 0x00000000;
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diff changeset
529 /* No pull-up, pull-down for PEx pins */
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530 GPIOE->PUPDR = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
531
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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532 /* Connect PFx pins to FMC Alternate function */
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533 GPIOF->AFR[0] = 0xCCCCCCCC;
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534 GPIOF->AFR[1] = 0xCCCCCCCC;
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535 /* Configure PFx pins in Alternate function mode */
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536 GPIOF->MODER = 0xAA800AAA;
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537 /* Configure PFx pins speed to 50 MHz */
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538 GPIOF->OSPEEDR = 0xAA800AAA;
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539 /* Configure PFx pins Output type to push-pull */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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540 GPIOF->OTYPER = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
541 /* No pull-up, pull-down for PFx pins */
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542 GPIOF->PUPDR = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
543
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
544 /* Connect PGx pins to FMC Alternate function */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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545 GPIOG->AFR[0] = 0xCCCCCCCC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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546 GPIOG->AFR[1] = 0xCCCCCCCC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
547 /* Configure PGx pins in Alternate function mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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548 GPIOG->MODER = 0xAAAAAAAA;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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549 /* Configure PGx pins speed to 50 MHz */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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550 GPIOG->OSPEEDR = 0xAAAAAAAA;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
551 /* Configure PGx pins Output type to push-pull */
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552 GPIOG->OTYPER = 0x00000000;
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553 /* No pull-up, pull-down for PGx pins */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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554 GPIOG->PUPDR = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
555
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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556 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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557 || defined(STM32F469xx) || defined(STM32F479xx)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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558 /* Connect PHx pins to FMC Alternate function */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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559 GPIOH->AFR[0] = 0x00C0CC00;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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560 GPIOH->AFR[1] = 0xCCCCCCCC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
561 /* Configure PHx pins in Alternate function mode */
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diff changeset
562 GPIOH->MODER = 0xAAAA08A0;
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diff changeset
563 /* Configure PHx pins speed to 50 MHz */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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564 GPIOH->OSPEEDR = 0xAAAA08A0;
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diff changeset
565 /* Configure PHx pins Output type to push-pull */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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566 GPIOH->OTYPER = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
567 /* No pull-up, pull-down for PHx pins */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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568 GPIOH->PUPDR = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
569
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
570 /* Connect PIx pins to FMC Alternate function */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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571 GPIOI->AFR[0] = 0xCCCCCCCC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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572 GPIOI->AFR[1] = 0x00000CC0;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
573 /* Configure PIx pins in Alternate function mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
574 GPIOI->MODER = 0x0028AAAA;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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575 /* Configure PIx pins speed to 50 MHz */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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576 GPIOI->OSPEEDR = 0x0028AAAA;
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diff changeset
577 /* Configure PIx pins Output type to push-pull */
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578 GPIOI->OTYPER = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
579 /* No pull-up, pull-down for PIx pins */
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diff changeset
580 GPIOI->PUPDR = 0x00000000;
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diff changeset
581 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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582
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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583 /*-- FMC Configuration -------------------------------------------------------*/
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
584 /* Enable the FMC interface clock */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
585 RCC->AHB3ENR |= 0x00000001;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
586 /* Delay after an RCC peripheral clock enabling */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
587 tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
588
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
589 /* Configure and enable SDRAM bank1 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
590 #if defined(STM32F446xx)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
591 FMC_Bank5_6->SDCR[0] = 0x00001954;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
592 #else
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
593 FMC_Bank5_6->SDCR[0] = 0x000019E4;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
594 #endif /* STM32F446xx */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
595 FMC_Bank5_6->SDTR[0] = 0x01115351;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
596
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
597 /* SDRAM initialization sequence */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
598 /* Clock enable command */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
599 FMC_Bank5_6->SDCMR = 0x00000011;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
600 tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
601 while((tmpreg != 0) && (timeout-- > 0))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
602 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
603 tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
604 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
605
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
606 /* Delay */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
607 for (index = 0; index<1000; index++);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
608
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
609 /* PALL command */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
610 FMC_Bank5_6->SDCMR = 0x00000012;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
611 timeout = 0xFFFF;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
612 while((tmpreg != 0) && (timeout-- > 0))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
613 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
614 tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
615 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
616
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
617 /* Auto refresh command */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
618 #if defined(STM32F446xx)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
619 FMC_Bank5_6->SDCMR = 0x000000F3;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
620 #else
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
621 FMC_Bank5_6->SDCMR = 0x00000073;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
622 #endif /* STM32F446xx */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
623 timeout = 0xFFFF;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
624 while((tmpreg != 0) && (timeout-- > 0))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
625 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
626 tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
627 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
628
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
629 /* MRD register program */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
630 #if defined(STM32F446xx)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
631 FMC_Bank5_6->SDCMR = 0x00044014;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
632 #else
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
633 FMC_Bank5_6->SDCMR = 0x00046014;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
634 #endif /* STM32F446xx */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
635 timeout = 0xFFFF;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
636 while((tmpreg != 0) && (timeout-- > 0))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
637 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
638 tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
639 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
640
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
641 /* Set refresh count */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
642 tmpreg = FMC_Bank5_6->SDRTR;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
643 #if defined(STM32F446xx)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
644 FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
645 #else
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
646 FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
647 #endif /* STM32F446xx */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
648
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
649 /* Disable write protection */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
650 tmpreg = FMC_Bank5_6->SDCR[0];
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
651 FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
652 #endif /* DATA_IN_ExtSDRAM */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
653 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
654
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
655 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
656 || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
657 || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
658
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
659 #if defined(DATA_IN_ExtSRAM)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
660 /*-- GPIOs Configuration -----------------------------------------------------*/
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
661 /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
662 RCC->AHB1ENR |= 0x00000078;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
663 /* Delay after an RCC peripheral clock enabling */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
664 tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
665
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
666 /* Connect PDx pins to FMC Alternate function */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
667 GPIOD->AFR[0] = 0x00CCC0CC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
668 GPIOD->AFR[1] = 0xCCCCCCCC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
669 /* Configure PDx pins in Alternate function mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
670 GPIOD->MODER = 0xAAAA0A8A;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
671 /* Configure PDx pins speed to 100 MHz */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
672 GPIOD->OSPEEDR = 0xFFFF0FCF;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
673 /* Configure PDx pins Output type to push-pull */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
674 GPIOD->OTYPER = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
675 /* No pull-up, pull-down for PDx pins */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
676 GPIOD->PUPDR = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
677
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
678 /* Connect PEx pins to FMC Alternate function */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
679 GPIOE->AFR[0] = 0xC00CC0CC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
680 GPIOE->AFR[1] = 0xCCCCCCCC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
681 /* Configure PEx pins in Alternate function mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
682 GPIOE->MODER = 0xAAAA828A;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
683 /* Configure PEx pins speed to 100 MHz */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
684 GPIOE->OSPEEDR = 0xFFFFC3CF;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
685 /* Configure PEx pins Output type to push-pull */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
686 GPIOE->OTYPER = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
687 /* No pull-up, pull-down for PEx pins */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
688 GPIOE->PUPDR = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
689
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
690 /* Connect PFx pins to FMC Alternate function */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
691 GPIOF->AFR[0] = 0x00CCCCCC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
692 GPIOF->AFR[1] = 0xCCCC0000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
693 /* Configure PFx pins in Alternate function mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
694 GPIOF->MODER = 0xAA000AAA;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
695 /* Configure PFx pins speed to 100 MHz */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
696 GPIOF->OSPEEDR = 0xFF000FFF;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
697 /* Configure PFx pins Output type to push-pull */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
698 GPIOF->OTYPER = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
699 /* No pull-up, pull-down for PFx pins */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
700 GPIOF->PUPDR = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
701
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
702 /* Connect PGx pins to FMC Alternate function */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
703 GPIOG->AFR[0] = 0x00CCCCCC;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
704 GPIOG->AFR[1] = 0x000000C0;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
705 /* Configure PGx pins in Alternate function mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
706 GPIOG->MODER = 0x00085AAA;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
707 /* Configure PGx pins speed to 100 MHz */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
708 GPIOG->OSPEEDR = 0x000CAFFF;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
709 /* Configure PGx pins Output type to push-pull */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
710 GPIOG->OTYPER = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
711 /* No pull-up, pull-down for PGx pins */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
712 GPIOG->PUPDR = 0x00000000;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
713
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
714 /*-- FMC/FSMC Configuration --------------------------------------------------*/
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
715 /* Enable the FMC/FSMC interface clock */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
716 RCC->AHB3ENR |= 0x00000001;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
717
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
718 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
719 /* Delay after an RCC peripheral clock enabling */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
720 tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
721 /* Configure and enable Bank1_SRAM2 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
722 FMC_Bank1->BTCR[2] = 0x00001011;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
723 FMC_Bank1->BTCR[3] = 0x00000201;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
724 FMC_Bank1E->BWTR[2] = 0x0fffffff;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
725 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
726 #if defined(STM32F469xx) || defined(STM32F479xx)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
727 /* Delay after an RCC peripheral clock enabling */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
728 tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
729 /* Configure and enable Bank1_SRAM2 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
730 FMC_Bank1->BTCR[2] = 0x00001091;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
731 FMC_Bank1->BTCR[3] = 0x00110212;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
732 FMC_Bank1E->BWTR[2] = 0x0fffffff;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
733 #endif /* STM32F469xx || STM32F479xx */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
734 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
735 || defined(STM32F412Zx) || defined(STM32F412Vx)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
736 /* Delay after an RCC peripheral clock enabling */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
737 tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
738 /* Configure and enable Bank1_SRAM2 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
739 FSMC_Bank1->BTCR[2] = 0x00001011;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
740 FSMC_Bank1->BTCR[3] = 0x00000201;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
741 FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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742 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */
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743
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744 #endif /* DATA_IN_ExtSRAM */
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745 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
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746 STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx */
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747 (void)(tmp);
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748 }
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749 #endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
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750 /**
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751 * @}
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752 */
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753
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754 /**
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755 * @}
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756 */
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757
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758 /**
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759 * @}
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760 */
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761 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/