Mercurial > public > ostc4
annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_mmc.h @ 530:c880907fd1d7
Bugfix: No need to consider surface custom view in count of enabled view:
In early motion control versions the detection was also applied in surface mode (as development support). The condition check is no longer needed because motion control is only applied in dive mode.
author | Ideenmodellierer |
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date | Tue, 15 Sep 2020 20:54:54 +0200 |
parents | c78bcbd5deda |
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rev | line source |
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_hal_mmc.h |
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4 * @author MCD Application Team |
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5 * @brief Header file of MMC HAL module. |
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6 ****************************************************************************** |
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7 * @attention |
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8 * |
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9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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10 * |
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11 * Redistribution and use in source and binary forms, with or without modification, |
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12 * are permitted provided that the following conditions are met: |
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13 * 1. Redistributions of source code must retain the above copyright notice, |
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14 * this list of conditions and the following disclaimer. |
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15 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 * this list of conditions and the following disclaimer in the documentation |
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17 * and/or other materials provided with the distribution. |
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 * may be used to endorse or promote products derived from this software |
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20 * without specific prior written permission. |
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21 * |
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 * |
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33 ****************************************************************************** |
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34 */ |
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35 |
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36 /* Define to prevent recursive inclusion -------------------------------------*/ |
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37 #ifndef __STM32F4xx_HAL_MMC_H |
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38 #define __STM32F4xx_HAL_MMC_H |
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39 |
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40 #ifdef __cplusplus |
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41 extern "C" { |
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42 #endif |
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43 |
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44 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ |
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45 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ |
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46 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \ |
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47 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ |
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48 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
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49 |
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50 /* Includes ------------------------------------------------------------------*/ |
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51 #include "stm32f4xx_ll_sdmmc.h" |
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52 |
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53 /** @addtogroup STM32F4xx_HAL_Driver |
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54 * @{ |
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55 */ |
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56 |
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57 /** @defgroup MMC MMC |
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58 * @brief MMC HAL module driver |
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59 * @{ |
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60 */ |
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61 |
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62 /* Exported types ------------------------------------------------------------*/ |
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63 /** @defgroup MMC_Exported_Types MMC Exported Types |
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64 * @{ |
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65 */ |
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66 |
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67 /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure |
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68 * @{ |
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69 */ |
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70 typedef enum |
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71 { |
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72 HAL_MMC_STATE_RESET = 0x00000000U, /*!< MMC not yet initialized or disabled */ |
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73 HAL_MMC_STATE_READY = 0x00000001U, /*!< MMC initialized and ready for use */ |
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74 HAL_MMC_STATE_TIMEOUT = 0x00000002U, /*!< MMC Timeout state */ |
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75 HAL_MMC_STATE_BUSY = 0x00000003U, /*!< MMC process ongoing */ |
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76 HAL_MMC_STATE_PROGRAMMING = 0x00000004U, /*!< MMC Programming State */ |
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77 HAL_MMC_STATE_RECEIVING = 0x00000005U, /*!< MMC Receinving State */ |
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78 HAL_MMC_STATE_TRANSFER = 0x00000006U, /*!< MMC Transfert State */ |
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79 HAL_MMC_STATE_ERROR = 0x0000000FU /*!< MMC is in error state */ |
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80 }HAL_MMC_StateTypeDef; |
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81 /** |
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82 * @} |
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83 */ |
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84 |
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85 /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure |
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86 * @{ |
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87 */ |
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88 typedef enum |
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89 { |
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90 HAL_MMC_CARD_READY = 0x00000001U, /*!< Card state is ready */ |
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91 HAL_MMC_CARD_IDENTIFICATION = 0x00000002U, /*!< Card is in identification state */ |
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92 HAL_MMC_CARD_STANDBY = 0x00000003U, /*!< Card is in standby state */ |
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93 HAL_MMC_CARD_TRANSFER = 0x00000004U, /*!< Card is in transfer state */ |
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94 HAL_MMC_CARD_SENDING = 0x00000005U, /*!< Card is sending an operation */ |
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95 HAL_MMC_CARD_RECEIVING = 0x00000006U, /*!< Card is receiving operation information */ |
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96 HAL_MMC_CARD_PROGRAMMING = 0x00000007U, /*!< Card is in programming state */ |
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97 HAL_MMC_CARD_DISCONNECTED = 0x00000008U, /*!< Card is disconnected */ |
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98 HAL_MMC_CARD_ERROR = 0x000000FFU /*!< Card response Error */ |
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99 }HAL_MMC_CardStateTypeDef; |
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100 /** |
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101 * @} |
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102 */ |
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103 |
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104 /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition |
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105 * @{ |
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106 */ |
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107 #define MMC_InitTypeDef SDIO_InitTypeDef |
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108 #define MMC_TypeDef SDIO_TypeDef |
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109 |
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110 /** |
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111 * @brief MMC Card Information Structure definition |
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112 */ |
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113 typedef struct |
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114 { |
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115 uint32_t CardType; /*!< Specifies the card Type */ |
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116 |
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117 uint32_t Class; /*!< Specifies the class of the card class */ |
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118 |
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119 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ |
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120 |
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121 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ |
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122 |
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123 uint32_t BlockSize; /*!< Specifies one block size in bytes */ |
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124 |
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125 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ |
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126 |
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127 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ |
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128 |
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129 }HAL_MMC_CardInfoTypeDef; |
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130 |
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131 /** |
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132 * @brief MMC handle Structure definition |
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133 */ |
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134 typedef struct |
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135 { |
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136 MMC_TypeDef *Instance; /*!< MMC registers base address */ |
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137 |
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138 MMC_InitTypeDef Init; /*!< MMC required parameters */ |
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139 |
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140 HAL_LockTypeDef Lock; /*!< MMC locking object */ |
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141 |
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142 uint32_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ |
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143 |
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144 uint32_t TxXferSize; /*!< MMC Tx Transfer size */ |
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145 |
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146 uint32_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ |
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147 |
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148 uint32_t RxXferSize; /*!< MMC Rx Transfer size */ |
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149 |
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150 __IO uint32_t Context; /*!< MMC transfer context */ |
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151 |
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152 __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */ |
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153 |
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154 __IO uint32_t ErrorCode; /*!< MMC Card Error codes */ |
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155 |
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156 DMA_HandleTypeDef *hdmarx; /*!< MMC Rx DMA handle parameters */ |
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157 |
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158 DMA_HandleTypeDef *hdmatx; /*!< MMC Tx DMA handle parameters */ |
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159 |
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160 HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ |
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161 |
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162 uint32_t CSD[4U]; /*!< MMC card specific data table */ |
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163 |
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164 uint32_t CID[4U]; /*!< MMC card identification number table */ |
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165 |
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166 }MMC_HandleTypeDef; |
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167 |
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168 /** |
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169 * @} |
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170 */ |
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171 |
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172 /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register |
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173 * @{ |
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174 */ |
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175 typedef struct |
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176 { |
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177 __IO uint8_t CSDStruct; /*!< CSD structure */ |
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178 __IO uint8_t SysSpecVersion; /*!< System specification version */ |
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179 __IO uint8_t Reserved1; /*!< Reserved */ |
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180 __IO uint8_t TAAC; /*!< Data read access time 1 */ |
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181 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ |
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182 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ |
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183 __IO uint16_t CardComdClasses; /*!< Card command classes */ |
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184 __IO uint8_t RdBlockLen; /*!< Max. read data block length */ |
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185 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ |
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186 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ |
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187 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ |
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188 __IO uint8_t DSRImpl; /*!< DSR implemented */ |
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189 __IO uint8_t Reserved2; /*!< Reserved */ |
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190 __IO uint32_t DeviceSize; /*!< Device Size */ |
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191 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ |
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192 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ |
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193 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ |
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194 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ |
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195 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ |
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196 __IO uint8_t EraseGrSize; /*!< Erase group size */ |
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197 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ |
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198 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ |
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199 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ |
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200 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ |
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201 __IO uint8_t WrSpeedFact; /*!< Write speed factor */ |
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202 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ |
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203 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ |
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204 __IO uint8_t Reserved3; /*!< Reserved */ |
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205 __IO uint8_t ContentProtectAppli; /*!< Content protection application */ |
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206 __IO uint8_t FileFormatGrouop; /*!< File format group */ |
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207 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ |
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208 __IO uint8_t PermWrProtect; /*!< Permanent write protection */ |
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209 __IO uint8_t TempWrProtect; /*!< Temporary write protection */ |
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210 __IO uint8_t FileFormat; /*!< File format */ |
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211 __IO uint8_t ECC; /*!< ECC code */ |
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212 __IO uint8_t CSD_CRC; /*!< CSD CRC */ |
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213 __IO uint8_t Reserved4; /*!< Always 1 */ |
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214 |
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215 }HAL_MMC_CardCSDTypeDef; |
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216 /** |
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217 * @} |
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218 */ |
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219 |
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220 /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register |
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221 * @{ |
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222 */ |
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223 typedef struct |
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224 { |
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225 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ |
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226 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ |
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227 __IO uint32_t ProdName1; /*!< Product Name part1 */ |
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228 __IO uint8_t ProdName2; /*!< Product Name part2 */ |
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229 __IO uint8_t ProdRev; /*!< Product Revision */ |
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230 __IO uint32_t ProdSN; /*!< Product Serial Number */ |
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231 __IO uint8_t Reserved1; /*!< Reserved1 */ |
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232 __IO uint16_t ManufactDate; /*!< Manufacturing Date */ |
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233 __IO uint8_t CID_CRC; /*!< CID CRC */ |
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234 __IO uint8_t Reserved2; /*!< Always 1 */ |
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235 |
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236 }HAL_MMC_CardCIDTypeDef; |
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237 /** |
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238 * @} |
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239 */ |
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240 |
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241 /** @defgroup MMC_Exported_Types_Group6 MMC Card Status returned by ACMD13 |
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242 * @{ |
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243 */ |
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244 typedef struct |
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245 { |
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246 __IO uint8_t DataBusWidth; /*!< Shows the currently defined data bus width */ |
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247 __IO uint8_t SecuredMode; /*!< Card is in secured mode of operation */ |
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248 __IO uint16_t CardType; /*!< Carries information about card type */ |
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249 __IO uint32_t ProtectedAreaSize; /*!< Carries information about the capacity of protected area */ |
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250 __IO uint8_t SpeedClass; /*!< Carries information about the speed class of the card */ |
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251 __IO uint8_t PerformanceMove; /*!< Carries information about the card's performance move */ |
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252 __IO uint8_t AllocationUnitSize; /*!< Carries information about the card's allocation unit size */ |
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253 __IO uint16_t EraseSize; /*!< Determines the number of AUs to be erased in one operation */ |
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254 __IO uint8_t EraseTimeout; /*!< Determines the timeout for any number of AU erase */ |
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255 __IO uint8_t EraseOffset; /*!< Carries information about the erase offset */ |
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256 |
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257 }HAL_MMC_CardStatusTypeDef; |
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258 /** |
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259 * @} |
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260 */ |
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261 |
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262 /** |
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263 * @} |
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264 */ |
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265 |
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266 /* Exported constants --------------------------------------------------------*/ |
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267 /** @defgroup MMC_Exported_Constants Exported Constants |
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268 * @{ |
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269 */ |
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270 |
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271 #define BLOCKSIZE 512U /*!< Block size is 512 bytes */ |
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272 |
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273 #define CAPACITY 0x400000U /*!< Log Block Nuumber for 2 G bytes Cards */ |
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274 |
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275 /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition |
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276 * @{ |
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277 */ |
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278 #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ |
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279 #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ |
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280 #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ |
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281 #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ |
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282 #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ |
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283 #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ |
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284 #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ |
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285 #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ |
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286 #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the |
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287 number of transferred bytes does not match the block length */ |
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288 #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ |
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289 #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ |
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290 #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ |
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291 #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock |
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292 command or if there was an attempt to access a locked card */ |
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293 #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ |
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294 #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ |
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295 #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ |
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296 #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ |
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297 #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ |
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298 #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ |
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299 #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ |
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300 #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ |
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301 #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ |
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302 #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ |
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303 #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out |
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304 of erase sequence command was received */ |
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305 #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ |
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306 #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ |
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307 #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ |
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308 #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ |
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309 #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ |
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310 #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ |
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311 #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ |
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312 #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ |
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313 #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ |
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314 |
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315 /** |
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316 * @} |
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317 */ |
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318 |
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319 /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration structure |
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320 * @{ |
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321 */ |
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322 #define MMC_CONTEXT_NONE 0x00000000U /*!< None */ |
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323 #define MMC_CONTEXT_READ_SINGLE_BLOCK 0x00000001U /*!< Read single block operation */ |
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324 #define MMC_CONTEXT_READ_MULTIPLE_BLOCK 0x00000002U /*!< Read multiple blocks operation */ |
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325 #define MMC_CONTEXT_WRITE_SINGLE_BLOCK 0x00000010U /*!< Write single block operation */ |
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326 #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK 0x00000020U /*!< Write multiple blocks operation */ |
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327 #define MMC_CONTEXT_IT 0x00000008U /*!< Process in Interrupt mode */ |
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328 #define MMC_CONTEXT_DMA 0x00000080U /*!< Process in DMA mode */ |
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329 |
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330 /** |
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331 * @} |
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332 */ |
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333 |
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334 /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode |
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335 * @{ |
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336 */ |
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337 /** |
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338 * @brief |
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339 */ |
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340 #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< VALUE OF ARGUMENT */ |
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341 #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< VALUE OF ARGUMENT */ |
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342 #define eMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< for eMMC > 2Gb sector mode */ |
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343 #define eMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< for eMMC > 2Gb sector mode */ |
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344 #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U |
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345 /** |
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346 * @} |
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347 */ |
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348 |
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349 /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards |
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350 * @{ |
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351 */ |
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352 #define MMC_HIGH_VOLTAGE_CARD 0x00000000U |
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353 #define MMC_DUAL_VOLTAGE_CARD 0x00000001U |
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354 /** |
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355 * @} |
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356 */ |
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357 |
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358 /** |
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359 * @} |
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360 */ |
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361 |
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362 /* Exported macro ------------------------------------------------------------*/ |
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363 /** @defgroup MMC_Exported_macros MMC Exported Macros |
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364 * @brief macros to handle interrupts and specific clock configurations |
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365 * @{ |
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366 */ |
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367 |
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368 /** |
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369 * @brief Enable the MMC device. |
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370 * @retval None |
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371 */ |
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372 #define __HAL_MMC_ENABLE(__HANDLE__) __SDIO_ENABLE((__HANDLE__)->Instance) |
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373 |
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374 /** |
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375 * @brief Disable the MMC device. |
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376 * @retval None |
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377 */ |
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378 #define __HAL_MMC_DISABLE(__HANDLE__) __SDIO_DISABLE((__HANDLE__)->Instance) |
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379 |
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380 /** |
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381 * @brief Enable the SDMMC DMA transfer. |
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382 * @retval None |
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383 */ |
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384 #define __HAL_MMC_DMA_ENABLE(__HANDLE__) __SDIO_DMA_ENABLE((__HANDLE__)->Instance) |
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385 |
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386 /** |
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387 * @brief Disable the SDMMC DMA transfer. |
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388 * @retval None |
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389 */ |
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390 #define __HAL_MMC_DMA_DISABLE(__HANDLE__) __SDIO_DMA_DISABLE((__HANDLE__)->Instance) |
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391 |
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392 /** |
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393 * @brief Enable the MMC device interrupt. |
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394 * @param __HANDLE__ MMC Handle |
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395 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. |
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396 * This parameter can be one or a combination of the following values: |
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397 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
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398 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
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399 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
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400 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
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401 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
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402 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
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403 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
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404 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
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405 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
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406 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
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407 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
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408 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
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409 * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
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410 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
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411 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
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412 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
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413 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
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414 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
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415 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
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416 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
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417 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
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418 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
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419 * @retval None |
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420 */ |
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421 #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
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422 |
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423 /** |
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424 * @brief Disable the MMC device interrupt. |
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425 * @param __HANDLE__ MMC Handle |
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426 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. |
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427 * This parameter can be one or a combination of the following values: |
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428 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
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429 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
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430 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
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431 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
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432 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
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433 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
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434 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
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435 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
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436 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
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437 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
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438 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
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439 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
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440 * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
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441 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
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442 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
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443 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
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444 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
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445 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
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446 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
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447 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
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448 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
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449 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
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450 * @retval None |
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451 */ |
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452 #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
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453 |
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454 /** |
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455 * @brief Check whether the specified MMC flag is set or not. |
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456 * @param __HANDLE__ MMC Handle |
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457 * @param __FLAG__ specifies the flag to check. |
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458 * This parameter can be one of the following values: |
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459 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
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460 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
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461 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
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462 * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
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463 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
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464 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
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465 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
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466 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
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467 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
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468 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
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469 * @arg SDIO_FLAG_CMDACT: Command transfer in progress |
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470 * @arg SDIO_FLAG_TXACT: Data transmit in progress |
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471 * @arg SDIO_FLAG_RXACT: Data receive in progress |
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472 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty |
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473 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full |
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474 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full |
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475 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full |
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476 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty |
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477 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty |
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478 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO |
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479 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO |
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480 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
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481 * @retval The new state of MMC FLAG (SET or RESET). |
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482 */ |
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483 #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
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484 |
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485 /** |
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486 * @brief Clear the MMC's pending flags. |
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487 * @param __HANDLE__ MMC Handle |
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488 * @param __FLAG__ specifies the flag to clear. |
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489 * This parameter can be one or a combination of the following values: |
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490 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
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491 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
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492 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
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493 * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
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494 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
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495 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
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496 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
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497 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
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498 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
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499 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
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500 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
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501 * @retval None |
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502 */ |
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503 #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
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504 |
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505 /** |
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506 * @brief Check whether the specified MMC interrupt has occurred or not. |
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507 * @param __HANDLE__ MMC Handle |
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508 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. |
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509 * This parameter can be one of the following values: |
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510 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
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511 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
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512 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
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513 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
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514 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
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515 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
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516 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
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517 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
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518 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
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519 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
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520 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
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521 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
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522 * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
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523 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
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524 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
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525 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
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526 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
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527 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
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528 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
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529 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
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530 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
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531 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
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532 * @retval The new state of MMC IT (SET or RESET). |
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533 */ |
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534 #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDIO_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
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535 |
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536 /** |
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537 * @brief Clear the MMC's interrupt pending bits. |
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538 * @param __HANDLE__ MMC Handle |
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539 * @param __INTERRUPT__ specifies the interrupt pending bit to clear. |
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540 * This parameter can be one or a combination of the following values: |
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541 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
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542 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
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543 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
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544 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
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545 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
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546 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
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547 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
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548 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
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549 * @arg SDIO_IT_DATAEND: Data end (data counter, SDMMC_DCOUNT, is zero) interrupt |
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550 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
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551 * @retval None |
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552 */ |
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553 #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
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554 |
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555 /** |
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556 * @} |
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557 */ |
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558 |
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559 /* Exported functions --------------------------------------------------------*/ |
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560 /** @defgroup MMC_Exported_Functions MMC Exported Functions |
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561 * @{ |
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562 */ |
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563 |
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564 /** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions |
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565 * @{ |
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566 */ |
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567 HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); |
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568 HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); |
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569 HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc); |
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570 void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); |
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571 void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); |
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572 /** |
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573 * @} |
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574 */ |
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575 |
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576 /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions |
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577 * @{ |
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578 */ |
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579 /* Blocking mode: Polling */ |
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580 HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); |
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581 HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); |
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582 HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd); |
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583 /* Non-Blocking mode: IT */ |
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584 HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
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585 HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
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586 /* Non-Blocking mode: DMA */ |
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587 HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
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588 HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
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589 |
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590 void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc); |
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591 |
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592 /* Callback in non blocking modes (DMA) */ |
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593 void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); |
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594 void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); |
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595 void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); |
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596 void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); |
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597 /** |
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598 * @} |
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599 */ |
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600 |
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601 /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions |
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602 * @{ |
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603 */ |
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604 HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode); |
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605 /** |
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606 * @} |
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607 */ |
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608 |
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609 /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions |
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610 * @{ |
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611 */ |
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612 HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); |
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613 HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); |
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614 HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); |
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615 HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); |
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616 /** |
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617 * @} |
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618 */ |
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619 |
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620 /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions |
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621 * @{ |
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622 */ |
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623 HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc); |
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624 uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc); |
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625 /** |
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626 * @} |
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627 */ |
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628 |
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629 /** @defgroup MMC_Exported_Functions_Group6 Perioheral Abort management |
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630 * @{ |
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631 */ |
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632 HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc); |
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633 HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc); |
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634 /** |
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635 * @} |
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636 */ |
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637 |
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638 /* Private types -------------------------------------------------------------*/ |
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639 /** @defgroup MMC_Private_Types MMC Private Types |
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640 * @{ |
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641 */ |
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642 |
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643 /** |
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644 * @} |
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645 */ |
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646 |
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647 /* Private defines -----------------------------------------------------------*/ |
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648 /** @defgroup MMC_Private_Defines MMC Private Defines |
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649 * @{ |
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650 */ |
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651 |
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652 /** |
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653 * @} |
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654 */ |
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655 |
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656 /* Private variables ---------------------------------------------------------*/ |
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657 /** @defgroup MMC_Private_Variables MMC Private Variables |
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658 * @{ |
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659 */ |
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660 |
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661 /** |
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662 * @} |
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663 */ |
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664 |
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665 /* Private constants ---------------------------------------------------------*/ |
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666 /** @defgroup MMC_Private_Constants MMC Private Constants |
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667 * @{ |
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668 */ |
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669 |
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670 /** |
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671 * @} |
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672 */ |
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673 |
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674 /* Private macros ------------------------------------------------------------*/ |
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675 /** @defgroup MMC_Private_Macros MMC Private Macros |
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676 * @{ |
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677 */ |
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678 |
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679 /** |
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680 * @} |
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681 */ |
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682 |
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683 /* Private functions prototypes ----------------------------------------------*/ |
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684 /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes |
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685 * @{ |
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686 */ |
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687 |
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688 /** |
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689 * @} |
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690 */ |
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691 |
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692 /* Private functions ---------------------------------------------------------*/ |
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693 /** @defgroup MMC_Private_Functions MMC Private Functions |
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694 * @{ |
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695 */ |
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696 |
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697 /** |
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698 * @} |
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699 */ |
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700 |
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701 /** |
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702 * @} |
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703 */ |
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704 |
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705 /** |
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706 * @} |
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707 */ |
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708 |
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709 /** |
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710 * @} |
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711 */ |
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712 |
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713 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || |
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714 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || |
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715 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ |
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716 |
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717 #ifdef __cplusplus |
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718 } |
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719 #endif |
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720 |
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721 |
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722 #endif /* __STM32F4xx_HAL_MMC_H */ |
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723 |
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724 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |