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annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma2d.c @ 949:c6b858f2e025 Evo_2_23 tip
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The UTC time provided by the gnss module is not shown in the date-time settings menu. If a valid time signal is available then the OSTC RTC may be set to it by selecting the UTC menu entry. The time zone has to be selected manually. This is possible using a separate edit line.
author | Ideenmodellierer |
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date | Sun, 22 Dec 2024 21:19:21 +0100 |
parents | c78bcbd5deda |
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rev | line source |
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_ll_dma2d.c |
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4 * @author MCD Application Team |
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5 * @brief DMA2D LL module driver. |
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6 ****************************************************************************** |
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7 * @attention |
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8 * |
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9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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10 * |
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11 * Redistribution and use in source and binary forms, with or without modification, |
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12 * are permitted provided that the following conditions are met: |
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13 * 1. Redistributions of source code must retain the above copyright notice, |
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14 * this list of conditions and the following disclaimer. |
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15 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 * this list of conditions and the following disclaimer in the documentation |
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17 * and/or other materials provided with the distribution. |
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 * may be used to endorse or promote products derived from this software |
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20 * without specific prior written permission. |
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21 * |
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 * |
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33 ****************************************************************************** |
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34 */ |
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35 #if defined(USE_FULL_LL_DRIVER) |
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36 |
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37 /* Includes ------------------------------------------------------------------*/ |
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38 #include "stm32f4xx_ll_dma2d.h" |
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39 #include "stm32f4xx_ll_bus.h" |
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40 #ifdef USE_FULL_ASSERT |
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41 #include "stm32_assert.h" |
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42 #else |
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43 #define assert_param(expr) ((void)0U) |
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44 #endif |
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45 |
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46 /** @addtogroup STM32F4xx_LL_Driver |
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47 * @{ |
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48 */ |
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49 |
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50 #if defined (DMA2D) |
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51 |
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52 /** @addtogroup DMA2D_LL |
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53 * @{ |
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54 */ |
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55 |
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56 /* Private types -------------------------------------------------------------*/ |
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57 /* Private variables ---------------------------------------------------------*/ |
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58 /* Private constants ---------------------------------------------------------*/ |
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59 /** @addtogroup DMA2D_LL_Private_Constants DMA2D Private Constants |
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60 * @{ |
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61 */ |
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62 #define LL_DMA2D_COLOR 0xFFU /*!< Maximum output color setting */ |
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63 #define LL_DMA2D_NUMBEROFLINES DMA2D_NLR_NL /*!< Maximum number of lines */ |
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64 #define LL_DMA2D_NUMBEROFPIXELS (DMA2D_NLR_PL >> DMA2D_NLR_PL_Pos) /*!< Maximum number of pixels per lines */ |
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65 #define LL_DMA2D_OFFSET_MAX 0x3FFFU /*!< Maximum output line offset expressed in pixels */ |
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66 #define LL_DMA2D_CLUTSIZE_MAX 0xFFU /*!< Maximum CLUT size */ |
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67 /** |
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68 * @} |
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69 */ |
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70 /* Private macros ------------------------------------------------------------*/ |
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71 /** @addtogroup DMA2D_LL_Private_Macros |
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72 * @{ |
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73 */ |
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74 #define IS_LL_DMA2D_MODE(MODE) (((MODE) == LL_DMA2D_MODE_M2M) || \ |
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75 ((MODE) == LL_DMA2D_MODE_M2M_PFC) || \ |
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76 ((MODE) == LL_DMA2D_MODE_M2M_BLEND) || \ |
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77 ((MODE) == LL_DMA2D_MODE_R2M)) |
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78 |
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79 #define IS_LL_DMA2D_OCMODE(MODE_ARGB) (((MODE_ARGB) == LL_DMA2D_OUTPUT_MODE_ARGB8888) || \ |
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80 ((MODE_ARGB) == LL_DMA2D_OUTPUT_MODE_RGB888) || \ |
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81 ((MODE_ARGB) == LL_DMA2D_OUTPUT_MODE_RGB565) || \ |
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82 ((MODE_ARGB) == LL_DMA2D_OUTPUT_MODE_ARGB1555) || \ |
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83 ((MODE_ARGB) == LL_DMA2D_OUTPUT_MODE_ARGB4444)) |
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84 |
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85 #define IS_LL_DMA2D_GREEN(GREEN) ((GREEN) <= LL_DMA2D_COLOR) |
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86 #define IS_LL_DMA2D_RED(RED) ((RED) <= LL_DMA2D_COLOR) |
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87 #define IS_LL_DMA2D_BLUE(BLUE) ((BLUE) <= LL_DMA2D_COLOR) |
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88 #define IS_LL_DMA2D_ALPHA(ALPHA) ((ALPHA) <= LL_DMA2D_COLOR) |
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89 |
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90 #define IS_LL_DMA2D_OFFSET(OFFSET) ((OFFSET) <= LL_DMA2D_OFFSET_MAX) |
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91 |
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92 #define IS_LL_DMA2D_LINE(LINES) ((LINES) <= LL_DMA2D_NUMBEROFLINES) |
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93 #define IS_LL_DMA2D_PIXEL(PIXELS) ((PIXELS) <= LL_DMA2D_NUMBEROFPIXELS) |
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94 |
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95 #define IS_LL_DMA2D_LCMODE(MODE_ARGB) (((MODE_ARGB) == LL_DMA2D_INPUT_MODE_ARGB8888) || \ |
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96 ((MODE_ARGB) == LL_DMA2D_INPUT_MODE_RGB888) || \ |
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97 ((MODE_ARGB) == LL_DMA2D_INPUT_MODE_RGB565) || \ |
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98 ((MODE_ARGB) == LL_DMA2D_INPUT_MODE_ARGB1555) || \ |
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99 ((MODE_ARGB) == LL_DMA2D_INPUT_MODE_ARGB4444) || \ |
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100 ((MODE_ARGB) == LL_DMA2D_INPUT_MODE_L8) || \ |
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101 ((MODE_ARGB) == LL_DMA2D_INPUT_MODE_AL44) || \ |
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102 ((MODE_ARGB) == LL_DMA2D_INPUT_MODE_AL88) || \ |
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103 ((MODE_ARGB) == LL_DMA2D_INPUT_MODE_L4) || \ |
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104 ((MODE_ARGB) == LL_DMA2D_INPUT_MODE_A8) || \ |
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105 ((MODE_ARGB) == LL_DMA2D_INPUT_MODE_A4)) |
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106 |
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107 #define IS_LL_DMA2D_CLUTCMODE(CLUTCMODE) (((CLUTCMODE) == LL_DMA2D_CLUT_COLOR_MODE_ARGB8888) || \ |
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108 ((CLUTCMODE) == LL_DMA2D_CLUT_COLOR_MODE_RGB888)) |
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109 |
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110 #define IS_LL_DMA2D_CLUTSIZE(SIZE) ((SIZE) <= LL_DMA2D_CLUTSIZE_MAX) |
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111 |
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112 #define IS_LL_DMA2D_ALPHAMODE(MODE) (((MODE) == LL_DMA2D_ALPHA_MODE_NO_MODIF) || \ |
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113 ((MODE) == LL_DMA2D_ALPHA_MODE_REPLACE) || \ |
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114 ((MODE) == LL_DMA2D_ALPHA_MODE_COMBINE)) |
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115 /** |
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116 * @} |
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117 */ |
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118 |
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119 /* Private function prototypes -----------------------------------------------*/ |
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120 |
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121 /* Exported functions --------------------------------------------------------*/ |
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122 /** @addtogroup DMA2D_LL_Exported_Functions |
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123 * @{ |
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124 */ |
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125 |
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126 /** @addtogroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions |
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127 * @{ |
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128 */ |
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129 |
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130 /** |
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131 * @brief De-initialize DMA2D registers (registers restored to their default values). |
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132 * @param DMA2Dx DMA2D Instance |
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133 * @retval An ErrorStatus enumeration value: |
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134 * - SUCCESS: DMA2D registers are de-initialized |
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135 * - ERROR: DMA2D registers are not de-initialized |
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136 */ |
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137 ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx) |
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138 { |
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139 ErrorStatus status = SUCCESS; |
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140 |
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141 /* Check the parameters */ |
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142 assert_param(IS_DMA2D_ALL_INSTANCE(DMA2Dx)); |
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143 |
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144 if (DMA2Dx == DMA2D) |
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145 { |
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146 /* Force reset of DMA2D clock */ |
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147 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2D); |
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148 |
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149 /* Release reset of DMA2D clock */ |
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150 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2D); |
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151 } |
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152 else |
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153 { |
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154 status = ERROR; |
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155 } |
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156 |
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157 return (status); |
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158 } |
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159 |
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160 /** |
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161 * @brief Initialize DMA2D registers according to the specified parameters in DMA2D_InitStruct. |
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162 * @note DMA2D transfers must be disabled to set initialization bits in configuration registers, |
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163 * otherwise ERROR result is returned. |
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164 * @param DMA2Dx DMA2D Instance |
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165 * @param DMA2D_InitStruct pointer to a LL_DMA2D_InitTypeDef structure |
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166 * that contains the configuration information for the specified DMA2D peripheral. |
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167 * @retval An ErrorStatus enumeration value: |
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168 * - SUCCESS: DMA2D registers are initialized according to DMA2D_InitStruct content |
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169 * - ERROR: Issue occurred during DMA2D registers initialization |
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170 */ |
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171 ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct) |
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172 { |
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173 ErrorStatus status = ERROR; |
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174 LL_DMA2D_ColorTypeDef DMA2D_ColorStruct; |
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175 uint32_t tmp = 0U, tmp1 = 0U, tmp2 = 0U; |
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176 |
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177 /* Check the parameters */ |
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178 assert_param(IS_DMA2D_ALL_INSTANCE(DMA2Dx)); |
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179 assert_param(IS_LL_DMA2D_MODE(DMA2D_InitStruct->Mode)); |
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180 assert_param(IS_LL_DMA2D_OCMODE(DMA2D_InitStruct->ColorMode)); |
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181 assert_param(IS_LL_DMA2D_LINE(DMA2D_InitStruct->NbrOfLines)); |
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182 assert_param(IS_LL_DMA2D_PIXEL(DMA2D_InitStruct->NbrOfPixelsPerLines)); |
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183 assert_param(IS_LL_DMA2D_GREEN(DMA2D_InitStruct->OutputGreen)); |
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184 assert_param(IS_LL_DMA2D_RED(DMA2D_InitStruct->OutputRed)); |
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185 assert_param(IS_LL_DMA2D_BLUE(DMA2D_InitStruct->OutputBlue)); |
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186 assert_param(IS_LL_DMA2D_ALPHA(DMA2D_InitStruct->OutputAlpha)); |
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187 assert_param(IS_LL_DMA2D_OFFSET(DMA2D_InitStruct->LineOffset)); |
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188 |
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189 /* DMA2D transfers must be disabled to configure bits in initialization registers */ |
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190 tmp = LL_DMA2D_IsTransferOngoing(DMA2Dx); |
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191 tmp1 = LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2Dx); |
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192 tmp2 = LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2Dx); |
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193 if ((tmp == 0U) && (tmp1 == 0U) && (tmp2 == 0U)) |
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194 { |
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195 /* DMA2D CR register configuration -------------------------------------------*/ |
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196 LL_DMA2D_SetMode(DMA2Dx, DMA2D_InitStruct->Mode); |
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197 |
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198 /* DMA2D OPFCCR register configuration ---------------------------------------*/ |
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199 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, DMA2D_InitStruct->ColorMode); |
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200 |
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201 /* DMA2D OOR register configuration ------------------------------------------*/ |
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202 LL_DMA2D_SetLineOffset(DMA2Dx, DMA2D_InitStruct->LineOffset); |
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203 |
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204 /* DMA2D NLR register configuration ------------------------------------------*/ |
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205 LL_DMA2D_ConfigSize(DMA2Dx, DMA2D_InitStruct->NbrOfLines, DMA2D_InitStruct->NbrOfPixelsPerLines); |
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206 |
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207 /* DMA2D OMAR register configuration ------------------------------------------*/ |
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208 LL_DMA2D_SetOutputMemAddr(DMA2Dx, DMA2D_InitStruct->OutputMemoryAddress); |
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209 |
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210 /* DMA2D OCOLR register configuration ------------------------------------------*/ |
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211 DMA2D_ColorStruct.ColorMode = DMA2D_InitStruct->ColorMode; |
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212 DMA2D_ColorStruct.OutputBlue = DMA2D_InitStruct->OutputBlue; |
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213 DMA2D_ColorStruct.OutputGreen = DMA2D_InitStruct->OutputGreen; |
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214 DMA2D_ColorStruct.OutputRed = DMA2D_InitStruct->OutputRed; |
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215 DMA2D_ColorStruct.OutputAlpha = DMA2D_InitStruct->OutputAlpha; |
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216 LL_DMA2D_ConfigOutputColor(DMA2Dx, &DMA2D_ColorStruct); |
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217 |
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218 status = SUCCESS; |
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219 } |
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220 /* If DMA2D transfers are not disabled, return ERROR */ |
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221 |
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222 return (status); |
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223 } |
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224 |
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225 /** |
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226 * @brief Set each @ref LL_DMA2D_InitTypeDef field to default value. |
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227 * @param DMA2D_InitStruct pointer to a @ref LL_DMA2D_InitTypeDef structure |
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228 * whose fields will be set to default values. |
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229 * @retval None |
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230 */ |
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231 void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct) |
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232 { |
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233 /* Set DMA2D_InitStruct fields to default values */ |
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234 DMA2D_InitStruct->Mode = LL_DMA2D_MODE_M2M; |
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235 DMA2D_InitStruct->ColorMode = LL_DMA2D_OUTPUT_MODE_ARGB8888; |
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236 DMA2D_InitStruct->NbrOfLines = 0x0U; |
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237 DMA2D_InitStruct->NbrOfPixelsPerLines = 0x0U; |
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238 DMA2D_InitStruct->LineOffset = 0x0U; |
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239 DMA2D_InitStruct->OutputBlue = 0x0U; |
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240 DMA2D_InitStruct->OutputGreen = 0x0U; |
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241 DMA2D_InitStruct->OutputRed = 0x0U; |
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242 DMA2D_InitStruct->OutputAlpha = 0x0U; |
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243 DMA2D_InitStruct->OutputMemoryAddress = 0x0U; |
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244 } |
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245 |
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246 /** |
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247 * @brief Configure the foreground or background according to the specified parameters |
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248 * in the LL_DMA2D_LayerCfgTypeDef structure. |
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249 * @param DMA2Dx DMA2D Instance |
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250 * @param DMA2D_LayerCfg pointer to a LL_DMA2D_LayerCfgTypeDef structure that contains |
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251 * the configuration information for the specified layer. |
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252 * @param LayerIdx DMA2D Layer index. |
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253 * This parameter can be one of the following values: |
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254 * 0(background) / 1(foreground) |
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255 * @retval None |
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256 */ |
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257 void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx) |
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258 { |
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259 /* Check the parameters */ |
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260 assert_param(IS_LL_DMA2D_OFFSET(DMA2D_LayerCfg->LineOffset)); |
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261 assert_param(IS_LL_DMA2D_LCMODE(DMA2D_LayerCfg->ColorMode)); |
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262 assert_param(IS_LL_DMA2D_CLUTCMODE(DMA2D_LayerCfg->CLUTColorMode)); |
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263 assert_param(IS_LL_DMA2D_CLUTSIZE(DMA2D_LayerCfg->CLUTSize)); |
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264 assert_param(IS_LL_DMA2D_ALPHAMODE(DMA2D_LayerCfg->AlphaMode)); |
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265 assert_param(IS_LL_DMA2D_GREEN(DMA2D_LayerCfg->Green)); |
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266 assert_param(IS_LL_DMA2D_RED(DMA2D_LayerCfg->Red)); |
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267 assert_param(IS_LL_DMA2D_BLUE(DMA2D_LayerCfg->Blue)); |
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268 assert_param(IS_LL_DMA2D_ALPHA(DMA2D_LayerCfg->Alpha)); |
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269 |
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270 if (LayerIdx == 0U) |
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271 { |
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272 /* Configure the background memory address */ |
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273 LL_DMA2D_BGND_SetMemAddr(DMA2Dx, DMA2D_LayerCfg->MemoryAddress); |
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274 |
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275 /* Configure the background line offset */ |
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276 LL_DMA2D_BGND_SetLineOffset(DMA2Dx, DMA2D_LayerCfg->LineOffset); |
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277 |
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278 /* Configure the background Alpha value, Alpha mode, CLUT size, CLUT Color mode and Color mode */ |
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279 MODIFY_REG(DMA2Dx->BGPFCCR, \ |
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280 (DMA2D_BGPFCCR_ALPHA | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM | DMA2D_BGPFCCR_CM), \ |
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281 ((DMA2D_LayerCfg->Alpha << DMA2D_BGPFCCR_ALPHA_Pos) | DMA2D_LayerCfg->AlphaMode | \ |
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282 (DMA2D_LayerCfg->CLUTSize << DMA2D_BGPFCCR_CS_Pos) | DMA2D_LayerCfg->CLUTColorMode | \ |
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283 DMA2D_LayerCfg->ColorMode)); |
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284 |
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285 /* Configure the background color */ |
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286 LL_DMA2D_BGND_SetColor(DMA2Dx, DMA2D_LayerCfg->Red, DMA2D_LayerCfg->Green, DMA2D_LayerCfg->Blue); |
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287 |
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288 /* Configure the background CLUT memory address */ |
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289 LL_DMA2D_BGND_SetCLUTMemAddr(DMA2Dx, DMA2D_LayerCfg->CLUTMemoryAddress); |
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290 } |
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291 else |
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292 { |
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293 /* Configure the foreground memory address */ |
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294 LL_DMA2D_FGND_SetMemAddr(DMA2Dx, DMA2D_LayerCfg->MemoryAddress); |
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295 |
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296 /* Configure the foreground line offset */ |
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297 LL_DMA2D_FGND_SetLineOffset(DMA2Dx, DMA2D_LayerCfg->LineOffset); |
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298 |
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299 /* Configure the foreground Alpha value, Alpha mode, CLUT size, CLUT Color mode and Color mode */ |
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300 MODIFY_REG(DMA2Dx->FGPFCCR, \ |
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301 (DMA2D_FGPFCCR_ALPHA | DMA2D_FGPFCCR_AM | DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM | DMA2D_FGPFCCR_CM), \ |
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302 ((DMA2D_LayerCfg->Alpha << DMA2D_FGPFCCR_ALPHA_Pos) | DMA2D_LayerCfg->AlphaMode | \ |
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303 (DMA2D_LayerCfg->CLUTSize << DMA2D_FGPFCCR_CS_Pos) | DMA2D_LayerCfg->CLUTColorMode | \ |
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304 DMA2D_LayerCfg->ColorMode)); |
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305 |
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306 /* Configure the foreground color */ |
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307 LL_DMA2D_FGND_SetColor(DMA2Dx, DMA2D_LayerCfg->Red, DMA2D_LayerCfg->Green, DMA2D_LayerCfg->Blue); |
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308 |
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309 /* Configure the foreground CLUT memory address */ |
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310 LL_DMA2D_FGND_SetCLUTMemAddr(DMA2Dx, DMA2D_LayerCfg->CLUTMemoryAddress); |
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311 } |
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312 } |
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313 |
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314 /** |
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315 * @brief Set each @ref LL_DMA2D_LayerCfgTypeDef field to default value. |
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316 * @param DMA2D_LayerCfg pointer to a @ref LL_DMA2D_LayerCfgTypeDef structure |
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317 * whose fields will be set to default values. |
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318 * @retval None |
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319 */ |
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320 void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg) |
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321 { |
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322 /* Set DMA2D_LayerCfg fields to default values */ |
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323 DMA2D_LayerCfg->MemoryAddress = 0x0U; |
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324 DMA2D_LayerCfg->ColorMode = LL_DMA2D_INPUT_MODE_ARGB8888; |
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325 DMA2D_LayerCfg->LineOffset = 0x0U; |
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326 DMA2D_LayerCfg->CLUTColorMode = LL_DMA2D_CLUT_COLOR_MODE_ARGB8888; |
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327 DMA2D_LayerCfg->CLUTSize = 0x0U; |
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328 DMA2D_LayerCfg->AlphaMode = LL_DMA2D_ALPHA_MODE_NO_MODIF; |
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329 DMA2D_LayerCfg->Alpha = 0x0U; |
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330 DMA2D_LayerCfg->Blue = 0x0U; |
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331 DMA2D_LayerCfg->Green = 0x0U; |
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332 DMA2D_LayerCfg->Red = 0x0U; |
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333 DMA2D_LayerCfg->CLUTMemoryAddress = 0x0U; |
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334 } |
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335 |
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336 /** |
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337 * @brief Initialize DMA2D output color register according to the specified parameters |
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338 * in DMA2D_ColorStruct. |
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339 * @param DMA2Dx DMA2D Instance |
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340 * @param DMA2D_ColorStruct pointer to a LL_DMA2D_ColorTypeDef structure that contains |
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341 * the color configuration information for the specified DMA2D peripheral. |
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342 * @retval None |
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343 */ |
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344 void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct) |
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345 { |
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346 uint32_t outgreen = 0U; |
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347 uint32_t outred = 0U; |
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348 uint32_t outalpha = 0U; |
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349 |
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350 /* Check the parameters */ |
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351 assert_param(IS_DMA2D_ALL_INSTANCE(DMA2Dx)); |
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352 assert_param(IS_LL_DMA2D_OCMODE(DMA2D_ColorStruct->ColorMode)); |
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353 assert_param(IS_LL_DMA2D_GREEN(DMA2D_ColorStruct->OutputGreen)); |
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354 assert_param(IS_LL_DMA2D_RED(DMA2D_ColorStruct->OutputRed)); |
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355 assert_param(IS_LL_DMA2D_BLUE(DMA2D_ColorStruct->OutputBlue)); |
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356 assert_param(IS_LL_DMA2D_ALPHA(DMA2D_ColorStruct->OutputAlpha)); |
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357 |
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358 /* DMA2D OCOLR register configuration ------------------------------------------*/ |
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359 if (DMA2D_ColorStruct->ColorMode == LL_DMA2D_OUTPUT_MODE_ARGB8888) |
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360 { |
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361 outgreen = DMA2D_ColorStruct->OutputGreen << 8U; |
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362 outred = DMA2D_ColorStruct->OutputRed << 16U; |
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363 outalpha = DMA2D_ColorStruct->OutputAlpha << 24U; |
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364 } |
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365 else if (DMA2D_ColorStruct->ColorMode == LL_DMA2D_OUTPUT_MODE_RGB888) |
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366 { |
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367 outgreen = DMA2D_ColorStruct->OutputGreen << 8U; |
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368 outred = DMA2D_ColorStruct->OutputRed << 16U; |
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369 outalpha = 0x00000000U; |
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370 } |
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371 else if (DMA2D_ColorStruct->ColorMode == LL_DMA2D_OUTPUT_MODE_RGB565) |
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372 { |
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373 outgreen = DMA2D_ColorStruct->OutputGreen << 5U; |
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374 outred = DMA2D_ColorStruct->OutputRed << 11U; |
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375 outalpha = 0x00000000U; |
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376 } |
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377 else if (DMA2D_ColorStruct->ColorMode == LL_DMA2D_OUTPUT_MODE_ARGB1555) |
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378 { |
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379 outgreen = DMA2D_ColorStruct->OutputGreen << 5U; |
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380 outred = DMA2D_ColorStruct->OutputRed << 10U; |
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381 outalpha = DMA2D_ColorStruct->OutputAlpha << 15U; |
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382 } |
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383 else /* ColorMode = LL_DMA2D_OUTPUT_MODE_ARGB4444 */ |
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384 { |
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385 outgreen = DMA2D_ColorStruct->OutputGreen << 4U; |
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386 outred = DMA2D_ColorStruct->OutputRed << 8U; |
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387 outalpha = DMA2D_ColorStruct->OutputAlpha << 12U; |
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388 } |
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389 LL_DMA2D_SetOutputColor(DMA2Dx, (outgreen | outred | DMA2D_ColorStruct->OutputBlue | outalpha)); |
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390 } |
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391 |
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392 /** |
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393 * @brief Return DMA2D output Blue color. |
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394 * @param DMA2Dx DMA2D Instance. |
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395 * @param ColorMode This parameter can be one of the following values: |
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396 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 |
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397 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 |
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398 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 |
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399 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 |
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400 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 |
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401 * @retval Output Blue color value between Min_Data=0 and Max_Data=0xFF |
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402 */ |
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403 uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) |
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404 { |
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405 uint32_t color = 0U; |
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406 |
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407 /* Check the parameters */ |
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408 assert_param(IS_DMA2D_ALL_INSTANCE(DMA2Dx)); |
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409 assert_param(IS_LL_DMA2D_OCMODE(ColorMode)); |
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410 |
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411 /* DMA2D OCOLR register reading ------------------------------------------*/ |
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412 if (ColorMode == LL_DMA2D_OUTPUT_MODE_ARGB8888) |
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413 { |
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414 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0xFFU)); |
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415 } |
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416 else if (ColorMode == LL_DMA2D_OUTPUT_MODE_RGB888) |
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417 { |
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418 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0xFFU)); |
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419 } |
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420 else if (ColorMode == LL_DMA2D_OUTPUT_MODE_RGB565) |
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421 { |
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422 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0x1FU)); |
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423 } |
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424 else if (ColorMode == LL_DMA2D_OUTPUT_MODE_ARGB1555) |
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425 { |
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426 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0x1FU)); |
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427 } |
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428 else /* ColorMode = LL_DMA2D_OUTPUT_MODE_ARGB4444 */ |
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429 { |
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430 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0xFU)); |
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431 } |
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432 |
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433 return color; |
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434 } |
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435 |
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436 /** |
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437 * @brief Return DMA2D output Green color. |
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438 * @param DMA2Dx DMA2D Instance. |
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439 * @param ColorMode This parameter can be one of the following values: |
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440 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 |
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441 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 |
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442 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 |
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443 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 |
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444 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 |
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445 * @retval Output Green color value between Min_Data=0 and Max_Data=0xFF |
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446 */ |
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447 uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) |
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448 { |
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449 uint32_t color = 0U; |
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450 |
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451 /* Check the parameters */ |
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452 assert_param(IS_DMA2D_ALL_INSTANCE(DMA2Dx)); |
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453 assert_param(IS_LL_DMA2D_OCMODE(ColorMode)); |
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454 |
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455 /* DMA2D OCOLR register reading ------------------------------------------*/ |
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456 if (ColorMode == LL_DMA2D_OUTPUT_MODE_ARGB8888) |
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457 { |
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458 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0xFF00U) >> 8U); |
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459 } |
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460 else if (ColorMode == LL_DMA2D_OUTPUT_MODE_RGB888) |
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461 { |
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462 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0xFF00U) >> 8U); |
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463 } |
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464 else if (ColorMode == LL_DMA2D_OUTPUT_MODE_RGB565) |
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465 { |
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466 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0x7E0U) >> 5U); |
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467 } |
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468 else if (ColorMode == LL_DMA2D_OUTPUT_MODE_ARGB1555) |
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469 { |
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470 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0x3E0U) >> 5U); |
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471 } |
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472 else /* ColorMode = LL_DMA2D_OUTPUT_MODE_ARGB4444 */ |
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473 { |
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474 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0xF0U) >> 4U); |
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475 } |
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476 |
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477 return color; |
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478 } |
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479 |
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480 /** |
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481 * @brief Return DMA2D output Red color. |
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482 * @param DMA2Dx DMA2D Instance. |
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483 * @param ColorMode This parameter can be one of the following values: |
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484 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 |
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485 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 |
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486 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 |
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487 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 |
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488 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 |
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489 * @retval Output Red color value between Min_Data=0 and Max_Data=0xFF |
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490 */ |
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491 uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) |
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492 { |
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493 uint32_t color = 0U; |
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494 |
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495 /* Check the parameters */ |
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496 assert_param(IS_DMA2D_ALL_INSTANCE(DMA2Dx)); |
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497 assert_param(IS_LL_DMA2D_OCMODE(ColorMode)); |
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498 |
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499 /* DMA2D OCOLR register reading ------------------------------------------*/ |
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500 if (ColorMode == LL_DMA2D_OUTPUT_MODE_ARGB8888) |
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501 { |
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502 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0xFF0000U) >> 16U); |
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503 } |
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504 else if (ColorMode == LL_DMA2D_OUTPUT_MODE_RGB888) |
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505 { |
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506 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0xFF0000U) >> 16U); |
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507 } |
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508 else if (ColorMode == LL_DMA2D_OUTPUT_MODE_RGB565) |
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509 { |
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510 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0xF800U) >> 11U); |
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511 } |
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512 else if (ColorMode == LL_DMA2D_OUTPUT_MODE_ARGB1555) |
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513 { |
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514 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0x7C00U) >> 10U); |
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515 } |
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516 else /* ColorMode = LL_DMA2D_OUTPUT_MODE_ARGB4444 */ |
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517 { |
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518 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0xF00U) >> 8U); |
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519 } |
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520 |
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521 return color; |
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522 } |
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523 |
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524 /** |
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525 * @brief Return DMA2D output Alpha color. |
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526 * @param DMA2Dx DMA2D Instance. |
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527 * @param ColorMode This parameter can be one of the following values: |
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528 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 |
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529 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 |
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530 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 |
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531 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 |
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532 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 |
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533 * @retval Output Alpha color value between Min_Data=0 and Max_Data=0xFF |
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534 */ |
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535 uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) |
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536 { |
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537 uint32_t color = 0U; |
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538 |
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539 /* Check the parameters */ |
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540 assert_param(IS_DMA2D_ALL_INSTANCE(DMA2Dx)); |
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541 assert_param(IS_LL_DMA2D_OCMODE(ColorMode)); |
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542 |
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543 /* DMA2D OCOLR register reading ------------------------------------------*/ |
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544 if (ColorMode == LL_DMA2D_OUTPUT_MODE_ARGB8888) |
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545 { |
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546 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0xFF000000U) >> 24U); |
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547 } |
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548 else if ((ColorMode == LL_DMA2D_OUTPUT_MODE_RGB888) || (ColorMode == LL_DMA2D_OUTPUT_MODE_RGB565)) |
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549 { |
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550 color = 0x0U; |
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551 } |
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552 else if (ColorMode == LL_DMA2D_OUTPUT_MODE_ARGB1555) |
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553 { |
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554 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0x8000U) >> 15U); |
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555 } |
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556 else /* ColorMode = LL_DMA2D_OUTPUT_MODE_ARGB4444 */ |
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557 { |
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558 color = (uint32_t)(READ_BIT(DMA2Dx->OCOLR, 0xF000U) >> 12U); |
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559 } |
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560 |
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561 return color; |
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562 } |
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563 |
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564 /** |
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565 * @brief Configure DMA2D transfer size. |
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566 * @param DMA2Dx DMA2D Instance |
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567 * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF |
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568 * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF |
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569 * @retval None |
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570 */ |
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571 void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines) |
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572 { |
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573 MODIFY_REG(DMA2Dx->NLR, (DMA2D_NLR_PL | DMA2D_NLR_NL), \ |
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574 ((NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos) | NbrOfLines)); |
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575 } |
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576 |
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577 /** |
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578 * @} |
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579 */ |
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580 |
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581 /** |
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582 * @} |
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583 */ |
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584 |
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585 /** |
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586 * @} |
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587 */ |
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588 |
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589 #endif /* defined (DMA2D) */ |
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590 |
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591 /** |
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592 * @} |
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593 */ |
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594 |
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595 #endif /* USE_FULL_LL_DRIVER */ |
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596 |
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597 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |