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annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dsi.h @ 358:c6a084d1433f
Add Support for new end-2019 hardware:
support LSM303AGR compass (Now working)
Make a build file for testing
author | heinrichsweikamp |
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date | Sun, 24 Nov 2019 16:08:29 +0100 |
parents | c78bcbd5deda |
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rev | line source |
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128
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_hal_dsi.h |
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4 * @author MCD Application Team |
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5 * @brief Header file of DSI HAL module. |
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6 ****************************************************************************** |
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7 * @attention |
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8 * |
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9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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10 * |
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11 * Redistribution and use in source and binary forms, with or without modification, |
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12 * are permitted provided that the following conditions are met: |
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13 * 1. Redistributions of source code must retain the above copyright notice, |
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14 * this list of conditions and the following disclaimer. |
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15 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 * this list of conditions and the following disclaimer in the documentation |
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17 * and/or other materials provided with the distribution. |
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 * may be used to endorse or promote products derived from this software |
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20 * without specific prior written permission. |
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21 * |
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 * |
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33 ****************************************************************************** |
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34 */ |
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35 |
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36 /* Define to prevent recursive inclusion -------------------------------------*/ |
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37 #ifndef __STM32F4xx_HAL_DSI_H |
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38 #define __STM32F4xx_HAL_DSI_H |
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39 |
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40 #ifdef __cplusplus |
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41 extern "C" { |
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42 #endif |
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43 |
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44 #if defined(DSI) |
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45 /* Includes ------------------------------------------------------------------*/ |
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46 #include "stm32f4xx_hal_def.h" |
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47 |
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48 /** @addtogroup STM32F4xx_HAL_Driver |
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49 * @{ |
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50 */ |
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51 |
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52 /** @defgroup DSI DSI |
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53 * @brief DSI HAL module driver |
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54 * @{ |
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55 */ |
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56 |
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57 /* Exported types ------------------------------------------------------------*/ |
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58 /** |
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59 * @brief DSI Init Structure definition |
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60 */ |
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61 typedef struct |
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62 { |
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63 uint32_t AutomaticClockLaneControl; /*!< Automatic clock lane control |
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64 This parameter can be any value of @ref DSI_Automatic_Clk_Lane_Control */ |
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65 |
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66 uint32_t TXEscapeCkdiv; /*!< TX Escape clock division |
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67 The values 0 and 1 stop the TX_ESC clock generation */ |
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68 |
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69 uint32_t NumberOfLanes; /*!< Number of lanes |
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70 This parameter can be any value of @ref DSI_Number_Of_Lanes */ |
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71 |
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72 }DSI_InitTypeDef; |
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73 |
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74 /** |
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75 * @brief DSI PLL Clock structure definition |
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76 */ |
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77 typedef struct |
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78 { |
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79 uint32_t PLLNDIV; /*!< PLL Loop Division Factor |
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80 This parameter must be a value between 10 and 125 */ |
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81 |
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82 uint32_t PLLIDF; /*!< PLL Input Division Factor |
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83 This parameter can be any value of @ref DSI_PLL_IDF */ |
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84 |
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85 uint32_t PLLODF; /*!< PLL Output Division Factor |
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86 This parameter can be any value of @ref DSI_PLL_ODF */ |
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87 |
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88 }DSI_PLLInitTypeDef; |
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89 |
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90 /** |
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91 * @brief DSI Video mode configuration |
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92 */ |
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93 typedef struct |
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94 { |
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95 uint32_t VirtualChannelID; /*!< Virtual channel ID */ |
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96 |
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97 uint32_t ColorCoding; /*!< Color coding for LTDC interface |
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98 This parameter can be any value of @ref DSI_Color_Coding */ |
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99 |
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100 uint32_t LooselyPacked; /*!< Enable or disable loosely packed stream (needed only when using |
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101 18-bit configuration). |
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102 This parameter can be any value of @ref DSI_LooselyPacked */ |
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103 |
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104 uint32_t Mode; /*!< Video mode type |
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105 This parameter can be any value of @ref DSI_Video_Mode_Type */ |
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106 |
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107 uint32_t PacketSize; /*!< Video packet size */ |
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108 |
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109 uint32_t NumberOfChunks; /*!< Number of chunks */ |
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110 |
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111 uint32_t NullPacketSize; /*!< Null packet size */ |
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112 |
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113 uint32_t HSPolarity; /*!< HSYNC pin polarity |
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114 This parameter can be any value of @ref DSI_HSYNC_Polarity */ |
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115 |
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116 uint32_t VSPolarity; /*!< VSYNC pin polarity |
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117 This parameter can be any value of @ref DSI_VSYNC_Active_Polarity */ |
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118 |
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119 uint32_t DEPolarity; /*!< Data Enable pin polarity |
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120 This parameter can be any value of @ref DSI_DATA_ENABLE_Polarity */ |
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121 |
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122 uint32_t HorizontalSyncActive; /*!< Horizontal synchronism active duration (in lane byte clock cycles) */ |
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123 |
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124 uint32_t HorizontalBackPorch; /*!< Horizontal back-porch duration (in lane byte clock cycles) */ |
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125 |
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126 uint32_t HorizontalLine; /*!< Horizontal line duration (in lane byte clock cycles) */ |
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127 |
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128 uint32_t VerticalSyncActive; /*!< Vertical synchronism active duration */ |
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129 |
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130 uint32_t VerticalBackPorch; /*!< Vertical back-porch duration */ |
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131 |
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132 uint32_t VerticalFrontPorch; /*!< Vertical front-porch duration */ |
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133 |
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134 uint32_t VerticalActive; /*!< Vertical active duration */ |
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135 |
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136 uint32_t LPCommandEnable; /*!< Low-power command enable |
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137 This parameter can be any value of @ref DSI_LP_Command */ |
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138 |
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139 uint32_t LPLargestPacketSize; /*!< The size, in bytes, of the low power largest packet that |
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140 can fit in a line during VSA, VBP and VFP regions */ |
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141 |
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142 uint32_t LPVACTLargestPacketSize; /*!< The size, in bytes, of the low power largest packet that |
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143 can fit in a line during VACT region */ |
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144 |
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145 uint32_t LPHorizontalFrontPorchEnable; /*!< Low-power horizontal front-porch enable |
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146 This parameter can be any value of @ref DSI_LP_HFP */ |
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147 |
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148 uint32_t LPHorizontalBackPorchEnable; /*!< Low-power horizontal back-porch enable |
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149 This parameter can be any value of @ref DSI_LP_HBP */ |
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150 |
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151 uint32_t LPVerticalActiveEnable; /*!< Low-power vertical active enable |
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152 This parameter can be any value of @ref DSI_LP_VACT */ |
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153 |
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154 uint32_t LPVerticalFrontPorchEnable; /*!< Low-power vertical front-porch enable |
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155 This parameter can be any value of @ref DSI_LP_VFP */ |
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156 |
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157 uint32_t LPVerticalBackPorchEnable; /*!< Low-power vertical back-porch enable |
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158 This parameter can be any value of @ref DSI_LP_VBP */ |
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159 |
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160 uint32_t LPVerticalSyncActiveEnable; /*!< Low-power vertical sync active enable |
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161 This parameter can be any value of @ref DSI_LP_VSYNC */ |
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162 |
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163 uint32_t FrameBTAAcknowledgeEnable; /*!< Frame bus-turn-around acknowledge enable |
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164 This parameter can be any value of @ref DSI_FBTA_acknowledge */ |
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165 |
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166 }DSI_VidCfgTypeDef; |
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167 |
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168 /** |
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169 * @brief DSI Adapted command mode configuration |
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170 */ |
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171 typedef struct |
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172 { |
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173 uint32_t VirtualChannelID; /*!< Virtual channel ID */ |
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174 |
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175 uint32_t ColorCoding; /*!< Color coding for LTDC interface |
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176 This parameter can be any value of @ref DSI_Color_Coding */ |
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177 |
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178 uint32_t CommandSize; /*!< Maximum allowed size for an LTDC write memory command, measured in |
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179 pixels. This parameter can be any value between 0x00 and 0xFFFFU */ |
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180 |
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181 uint32_t TearingEffectSource; /*!< Tearing effect source |
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182 This parameter can be any value of @ref DSI_TearingEffectSource */ |
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183 |
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184 uint32_t TearingEffectPolarity; /*!< Tearing effect pin polarity |
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185 This parameter can be any value of @ref DSI_TearingEffectPolarity */ |
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186 |
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187 uint32_t HSPolarity; /*!< HSYNC pin polarity |
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188 This parameter can be any value of @ref DSI_HSYNC_Polarity */ |
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189 |
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190 uint32_t VSPolarity; /*!< VSYNC pin polarity |
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191 This parameter can be any value of @ref DSI_VSYNC_Active_Polarity */ |
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192 |
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193 uint32_t DEPolarity; /*!< Data Enable pin polarity |
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194 This parameter can be any value of @ref DSI_DATA_ENABLE_Polarity */ |
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195 |
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196 uint32_t VSyncPol; /*!< VSync edge on which the LTDC is halted |
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197 This parameter can be any value of @ref DSI_Vsync_Polarity */ |
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198 |
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199 uint32_t AutomaticRefresh; /*!< Automatic refresh mode |
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200 This parameter can be any value of @ref DSI_AutomaticRefresh */ |
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201 |
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202 uint32_t TEAcknowledgeRequest; /*!< Tearing Effect Acknowledge Request Enable |
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203 This parameter can be any value of @ref DSI_TE_AcknowledgeRequest */ |
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204 |
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205 }DSI_CmdCfgTypeDef; |
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206 |
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207 /** |
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208 * @brief DSI command transmission mode configuration |
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209 */ |
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210 typedef struct |
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211 { |
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212 uint32_t LPGenShortWriteNoP; /*!< Generic Short Write Zero parameters Transmission |
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213 This parameter can be any value of @ref DSI_LP_LPGenShortWriteNoP */ |
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214 |
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215 uint32_t LPGenShortWriteOneP; /*!< Generic Short Write One parameter Transmission |
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216 This parameter can be any value of @ref DSI_LP_LPGenShortWriteOneP */ |
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217 |
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218 uint32_t LPGenShortWriteTwoP; /*!< Generic Short Write Two parameters Transmission |
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219 This parameter can be any value of @ref DSI_LP_LPGenShortWriteTwoP */ |
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220 |
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221 uint32_t LPGenShortReadNoP; /*!< Generic Short Read Zero parameters Transmission |
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222 This parameter can be any value of @ref DSI_LP_LPGenShortReadNoP */ |
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223 |
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224 uint32_t LPGenShortReadOneP; /*!< Generic Short Read One parameter Transmission |
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225 This parameter can be any value of @ref DSI_LP_LPGenShortReadOneP */ |
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226 |
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227 uint32_t LPGenShortReadTwoP; /*!< Generic Short Read Two parameters Transmission |
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228 This parameter can be any value of @ref DSI_LP_LPGenShortReadTwoP */ |
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229 |
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230 uint32_t LPGenLongWrite; /*!< Generic Long Write Transmission |
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231 This parameter can be any value of @ref DSI_LP_LPGenLongWrite */ |
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232 |
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233 uint32_t LPDcsShortWriteNoP; /*!< DCS Short Write Zero parameters Transmission |
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234 This parameter can be any value of @ref DSI_LP_LPDcsShortWriteNoP */ |
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235 |
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236 uint32_t LPDcsShortWriteOneP; /*!< DCS Short Write One parameter Transmission |
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237 This parameter can be any value of @ref DSI_LP_LPDcsShortWriteOneP */ |
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238 |
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239 uint32_t LPDcsShortReadNoP; /*!< DCS Short Read Zero parameters Transmission |
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240 This parameter can be any value of @ref DSI_LP_LPDcsShortReadNoP */ |
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241 |
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242 uint32_t LPDcsLongWrite; /*!< DCS Long Write Transmission |
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243 This parameter can be any value of @ref DSI_LP_LPDcsLongWrite */ |
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244 |
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245 uint32_t LPMaxReadPacket; /*!< Maximum Read Packet Size Transmission |
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246 This parameter can be any value of @ref DSI_LP_LPMaxReadPacket */ |
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247 |
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248 uint32_t AcknowledgeRequest; /*!< Acknowledge Request Enable |
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249 This parameter can be any value of @ref DSI_AcknowledgeRequest */ |
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250 |
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251 }DSI_LPCmdTypeDef; |
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252 |
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253 /** |
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254 * @brief DSI PHY Timings definition |
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255 */ |
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256 typedef struct |
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257 { |
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258 uint32_t ClockLaneHS2LPTime; /*!< The maximum time that the D-PHY clock lane takes to go from high-speed |
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259 to low-power transmission */ |
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260 |
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261 uint32_t ClockLaneLP2HSTime; /*!< The maximum time that the D-PHY clock lane takes to go from low-power |
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262 to high-speed transmission */ |
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263 |
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264 uint32_t DataLaneHS2LPTime; /*!< The maximum time that the D-PHY data lanes takes to go from high-speed |
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265 to low-power transmission */ |
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266 |
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267 uint32_t DataLaneLP2HSTime; /*!< The maximum time that the D-PHY data lanes takes to go from low-power |
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268 to high-speed transmission */ |
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269 |
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270 uint32_t DataLaneMaxReadTime; /*!< The maximum time required to perform a read command */ |
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271 |
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272 uint32_t StopWaitTime; /*!< The minimum wait period to request a High-Speed transmission after the |
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273 Stop state */ |
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274 |
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275 }DSI_PHY_TimerTypeDef; |
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276 |
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277 /** |
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278 * @brief DSI HOST Timeouts definition |
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279 */ |
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280 typedef struct |
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281 { |
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282 uint32_t TimeoutCkdiv; /*!< Time-out clock division */ |
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283 |
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284 uint32_t HighSpeedTransmissionTimeout; /*!< High-speed transmission time-out */ |
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285 |
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286 uint32_t LowPowerReceptionTimeout; /*!< Low-power reception time-out */ |
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287 |
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288 uint32_t HighSpeedReadTimeout; /*!< High-speed read time-out */ |
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289 |
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290 uint32_t LowPowerReadTimeout; /*!< Low-power read time-out */ |
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291 |
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292 uint32_t HighSpeedWriteTimeout; /*!< High-speed write time-out */ |
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293 |
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294 uint32_t HighSpeedWritePrespMode; /*!< High-speed write presp mode |
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295 This parameter can be any value of @ref DSI_HS_PrespMode */ |
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296 |
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297 uint32_t LowPowerWriteTimeout; /*!< Low-speed write time-out */ |
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298 |
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299 uint32_t BTATimeout; /*!< BTA time-out */ |
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300 |
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301 }DSI_HOST_TimeoutTypeDef; |
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302 |
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303 /** |
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304 * @brief DSI States Structure definition |
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305 */ |
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306 typedef enum |
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307 { |
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308 HAL_DSI_STATE_RESET = 0x00U, |
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309 HAL_DSI_STATE_READY = 0x01U, |
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310 HAL_DSI_STATE_ERROR = 0x02U, |
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311 HAL_DSI_STATE_BUSY = 0x03U, |
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312 HAL_DSI_STATE_TIMEOUT = 0x04U |
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313 }HAL_DSI_StateTypeDef; |
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314 |
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315 /** |
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316 * @brief DSI Handle Structure definition |
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317 */ |
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318 typedef struct |
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319 { |
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320 DSI_TypeDef *Instance; /*!< Register base address */ |
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321 DSI_InitTypeDef Init; /*!< DSI required parameters */ |
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322 HAL_LockTypeDef Lock; /*!< DSI peripheral status */ |
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323 __IO HAL_DSI_StateTypeDef State; /*!< DSI communication state */ |
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324 __IO uint32_t ErrorCode; /*!< DSI Error code */ |
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325 uint32_t ErrorMsk; /*!< DSI Error monitoring mask */ |
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326 }DSI_HandleTypeDef; |
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327 |
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328 /* Exported constants --------------------------------------------------------*/ |
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329 /** @defgroup DSI_DCS_Command DSI DCS Command |
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330 * @{ |
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331 */ |
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332 #define DSI_ENTER_IDLE_MODE 0x39U |
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333 #define DSI_ENTER_INVERT_MODE 0x21U |
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334 #define DSI_ENTER_NORMAL_MODE 0x13U |
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335 #define DSI_ENTER_PARTIAL_MODE 0x12U |
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336 #define DSI_ENTER_SLEEP_MODE 0x10U |
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337 #define DSI_EXIT_IDLE_MODE 0x38U |
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338 #define DSI_EXIT_INVERT_MODE 0x20U |
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339 #define DSI_EXIT_SLEEP_MODE 0x11U |
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340 #define DSI_GET_3D_CONTROL 0x3FU |
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341 #define DSI_GET_ADDRESS_MODE 0x0BU |
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342 #define DSI_GET_BLUE_CHANNEL 0x08U |
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343 #define DSI_GET_DIAGNOSTIC_RESULT 0x0FU |
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344 #define DSI_GET_DISPLAY_MODE 0x0DU |
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345 #define DSI_GET_GREEN_CHANNEL 0x07U |
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346 #define DSI_GET_PIXEL_FORMAT 0x0CU |
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347 #define DSI_GET_POWER_MODE 0x0AU |
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348 #define DSI_GET_RED_CHANNEL 0x06U |
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349 #define DSI_GET_SCANLINE 0x45U |
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350 #define DSI_GET_SIGNAL_MODE 0x0EU |
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351 #define DSI_NOP 0x00U |
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352 #define DSI_READ_DDB_CONTINUE 0xA8U |
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353 #define DSI_READ_DDB_START 0xA1U |
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354 #define DSI_READ_MEMORY_CONTINUE 0x3EU |
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355 #define DSI_READ_MEMORY_START 0x2EU |
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356 #define DSI_SET_3D_CONTROL 0x3DU |
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357 #define DSI_SET_ADDRESS_MODE 0x36U |
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358 #define DSI_SET_COLUMN_ADDRESS 0x2AU |
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359 #define DSI_SET_DISPLAY_OFF 0x28U |
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360 #define DSI_SET_DISPLAY_ON 0x29U |
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361 #define DSI_SET_GAMMA_CURVE 0x26U |
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362 #define DSI_SET_PAGE_ADDRESS 0x2BU |
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363 #define DSI_SET_PARTIAL_COLUMNS 0x31U |
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364 #define DSI_SET_PARTIAL_ROWS 0x30U |
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365 #define DSI_SET_PIXEL_FORMAT 0x3AU |
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366 #define DSI_SET_SCROLL_AREA 0x33U |
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367 #define DSI_SET_SCROLL_START 0x37U |
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368 #define DSI_SET_TEAR_OFF 0x34U |
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369 #define DSI_SET_TEAR_ON 0x35U |
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370 #define DSI_SET_TEAR_SCANLINE 0x44U |
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371 #define DSI_SET_VSYNC_TIMING 0x40U |
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372 #define DSI_SOFT_RESET 0x01U |
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373 #define DSI_WRITE_LUT 0x2DU |
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374 #define DSI_WRITE_MEMORY_CONTINUE 0x3CU |
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375 #define DSI_WRITE_MEMORY_START 0x2CU |
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376 /** |
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377 * @} |
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378 */ |
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379 |
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380 /** @defgroup DSI_Video_Mode_Type DSI Video Mode Type |
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381 * @{ |
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382 */ |
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383 #define DSI_VID_MODE_NB_PULSES 0U |
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384 #define DSI_VID_MODE_NB_EVENTS 1U |
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385 #define DSI_VID_MODE_BURST 2U |
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386 /** |
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387 * @} |
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388 */ |
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389 |
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390 /** @defgroup DSI_Color_Mode DSI Color Mode |
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391 * @{ |
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392 */ |
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393 #define DSI_COLOR_MODE_FULL 0x00000000U |
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394 #define DSI_COLOR_MODE_EIGHT DSI_WCR_COLM |
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395 /** |
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396 * @} |
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397 */ |
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398 |
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399 /** @defgroup DSI_ShutDown DSI ShutDown |
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400 * @{ |
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401 */ |
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402 #define DSI_DISPLAY_ON 0x00000000U |
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403 #define DSI_DISPLAY_OFF DSI_WCR_SHTDN |
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404 /** |
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405 * @} |
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406 */ |
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407 |
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408 /** @defgroup DSI_LP_Command DSI LP Command |
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409 * @{ |
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410 */ |
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411 #define DSI_LP_COMMAND_DISABLE 0x00000000U |
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412 #define DSI_LP_COMMAND_ENABLE DSI_VMCR_LPCE |
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413 /** |
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414 * @} |
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415 */ |
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416 |
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417 /** @defgroup DSI_LP_HFP DSI LP HFP |
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418 * @{ |
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419 */ |
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420 #define DSI_LP_HFP_DISABLE 0x00000000U |
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421 #define DSI_LP_HFP_ENABLE DSI_VMCR_LPHFPE |
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422 /** |
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423 * @} |
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424 */ |
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425 |
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426 /** @defgroup DSI_LP_HBP DSI LP HBP |
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427 * @{ |
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428 */ |
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429 #define DSI_LP_HBP_DISABLE 0x00000000U |
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430 #define DSI_LP_HBP_ENABLE DSI_VMCR_LPHBPE |
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431 /** |
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432 * @} |
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433 */ |
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434 |
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435 /** @defgroup DSI_LP_VACT DSI LP VACT |
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436 * @{ |
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437 */ |
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438 #define DSI_LP_VACT_DISABLE 0x00000000U |
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439 #define DSI_LP_VACT_ENABLE DSI_VMCR_LPVAE |
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440 /** |
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441 * @} |
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442 */ |
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443 |
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444 /** @defgroup DSI_LP_VFP DSI LP VFP |
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445 * @{ |
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446 */ |
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447 #define DSI_LP_VFP_DISABLE 0x00000000U |
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448 #define DSI_LP_VFP_ENABLE DSI_VMCR_LPVFPE |
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449 /** |
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450 * @} |
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451 */ |
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452 |
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453 /** @defgroup DSI_LP_VBP DSI LP VBP |
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454 * @{ |
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455 */ |
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456 #define DSI_LP_VBP_DISABLE 0x00000000U |
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457 #define DSI_LP_VBP_ENABLE DSI_VMCR_LPVBPE |
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458 /** |
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459 * @} |
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460 */ |
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461 |
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462 /** @defgroup DSI_LP_VSYNC DSI LP VSYNC |
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463 * @{ |
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464 */ |
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465 #define DSI_LP_VSYNC_DISABLE 0x00000000U |
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466 #define DSI_LP_VSYNC_ENABLE DSI_VMCR_LPVSAE |
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467 /** |
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468 * @} |
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469 */ |
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470 |
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471 /** @defgroup DSI_FBTA_acknowledge DSI FBTA Acknowledge |
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472 * @{ |
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473 */ |
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474 #define DSI_FBTAA_DISABLE 0x00000000U |
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475 #define DSI_FBTAA_ENABLE DSI_VMCR_FBTAAE |
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476 /** |
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477 * @} |
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478 */ |
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479 |
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480 /** @defgroup DSI_TearingEffectSource DSI Tearing Effect Source |
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481 * @{ |
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482 */ |
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483 #define DSI_TE_DSILINK 0x00000000U |
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484 #define DSI_TE_EXTERNAL DSI_WCFGR_TESRC |
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485 /** |
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486 * @} |
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487 */ |
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488 |
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489 /** @defgroup DSI_TearingEffectPolarity DSI Tearing Effect Polarity |
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490 * @{ |
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491 */ |
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492 #define DSI_TE_RISING_EDGE 0x00000000U |
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493 #define DSI_TE_FALLING_EDGE DSI_WCFGR_TEPOL |
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494 /** |
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495 * @} |
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496 */ |
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497 |
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498 /** @defgroup DSI_Vsync_Polarity DSI Vsync Polarity |
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499 * @{ |
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500 */ |
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501 #define DSI_VSYNC_FALLING 0x00000000U |
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502 #define DSI_VSYNC_RISING DSI_WCFGR_VSPOL |
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503 /** |
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504 * @} |
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505 */ |
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506 |
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507 /** @defgroup DSI_AutomaticRefresh DSI Automatic Refresh |
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508 * @{ |
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509 */ |
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510 #define DSI_AR_DISABLE 0x00000000U |
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511 #define DSI_AR_ENABLE DSI_WCFGR_AR |
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512 /** |
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513 * @} |
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514 */ |
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515 |
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516 /** @defgroup DSI_TE_AcknowledgeRequest DSI TE Acknowledge Request |
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517 * @{ |
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518 */ |
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519 #define DSI_TE_ACKNOWLEDGE_DISABLE 0x00000000U |
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520 #define DSI_TE_ACKNOWLEDGE_ENABLE DSI_CMCR_TEARE |
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521 /** |
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522 * @} |
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523 */ |
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524 |
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525 /** @defgroup DSI_AcknowledgeRequest DSI Acknowledge Request |
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526 * @{ |
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527 */ |
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528 #define DSI_ACKNOWLEDGE_DISABLE 0x00000000U |
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529 #define DSI_ACKNOWLEDGE_ENABLE DSI_CMCR_ARE |
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530 /** |
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531 * @} |
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532 */ |
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533 |
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|
534 /** @defgroup DSI_LP_LPGenShortWriteNoP DSI LP LPGen Short Write NoP |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
535 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
536 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
537 #define DSI_LP_GSW0P_DISABLE 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
538 #define DSI_LP_GSW0P_ENABLE DSI_CMCR_GSW0TX |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
539 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
540 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
541 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
542 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
543 /** @defgroup DSI_LP_LPGenShortWriteOneP DSI LP LPGen Short Write OneP |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
544 * @{ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
545 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
546 #define DSI_LP_GSW1P_DISABLE 0x00000000U |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
547 #define DSI_LP_GSW1P_ENABLE DSI_CMCR_GSW1TX |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
548 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
549 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
550 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
551 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
552 /** @defgroup DSI_LP_LPGenShortWriteTwoP DSI LP LPGen Short Write TwoP |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
553 * @{ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
554 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
555 #define DSI_LP_GSW2P_DISABLE 0x00000000U |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
556 #define DSI_LP_GSW2P_ENABLE DSI_CMCR_GSW2TX |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
557 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
558 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
559 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
560 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
561 /** @defgroup DSI_LP_LPGenShortReadNoP DSI LP LPGen Short Read NoP |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
562 * @{ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
563 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
564 #define DSI_LP_GSR0P_DISABLE 0x00000000U |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
565 #define DSI_LP_GSR0P_ENABLE DSI_CMCR_GSR0TX |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
566 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
567 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
568 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
569 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
570 /** @defgroup DSI_LP_LPGenShortReadOneP DSI LP LPGen Short Read OneP |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
571 * @{ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
572 */ |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
573 #define DSI_LP_GSR1P_DISABLE 0x00000000U |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
574 #define DSI_LP_GSR1P_ENABLE DSI_CMCR_GSR1TX |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
575 /** |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
576 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
577 */ |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
578 |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
579 /** @defgroup DSI_LP_LPGenShortReadTwoP DSI LP LPGen Short Read TwoP |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
580 * @{ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
581 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
582 #define DSI_LP_GSR2P_DISABLE 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
583 #define DSI_LP_GSR2P_ENABLE DSI_CMCR_GSR2TX |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
584 /** |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
585 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
586 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
587 |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
588 /** @defgroup DSI_LP_LPGenLongWrite DSI LP LPGen LongWrite |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
589 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
590 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
591 #define DSI_LP_GLW_DISABLE 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
592 #define DSI_LP_GLW_ENABLE DSI_CMCR_GLWTX |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
593 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
594 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
595 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
596 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
597 /** @defgroup DSI_LP_LPDcsShortWriteNoP DSI LP LPDcs Short Write NoP |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
598 * @{ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
599 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
600 #define DSI_LP_DSW0P_DISABLE 0x00000000U |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
601 #define DSI_LP_DSW0P_ENABLE DSI_CMCR_DSW0TX |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
602 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
603 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
604 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
605 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
606 /** @defgroup DSI_LP_LPDcsShortWriteOneP DSI LP LPDcs Short Write OneP |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
607 * @{ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
608 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
609 #define DSI_LP_DSW1P_DISABLE 0x00000000U |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
610 #define DSI_LP_DSW1P_ENABLE DSI_CMCR_DSW1TX |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
611 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
612 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
613 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
614 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
615 /** @defgroup DSI_LP_LPDcsShortReadNoP DSI LP LPDcs Short Read NoP |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
616 * @{ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
617 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
618 #define DSI_LP_DSR0P_DISABLE 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
619 #define DSI_LP_DSR0P_ENABLE DSI_CMCR_DSR0TX |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
620 /** |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
621 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
622 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
623 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
624 /** @defgroup DSI_LP_LPDcsLongWrite DSI LP LPDcs Long Write |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
625 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
626 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
627 #define DSI_LP_DLW_DISABLE 0x00000000U |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
628 #define DSI_LP_DLW_ENABLE DSI_CMCR_DLWTX |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
629 /** |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
630 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
631 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
632 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
633 /** @defgroup DSI_LP_LPMaxReadPacket DSI LP LPMax Read Packet |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
634 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
635 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
636 #define DSI_LP_MRDP_DISABLE 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
637 #define DSI_LP_MRDP_ENABLE DSI_CMCR_MRDPS |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
638 /** |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
639 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
640 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
641 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
642 /** @defgroup DSI_HS_PrespMode DSI HS Presp Mode |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
643 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
644 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
645 #define DSI_HS_PM_DISABLE 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
646 #define DSI_HS_PM_ENABLE DSI_TCCR3_PM |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
647 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
648 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
649 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
650 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
651 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
652 /** @defgroup DSI_Automatic_Clk_Lane_Control DSI Automatic Clk Lane Control |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
653 * @{ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
654 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
655 #define DSI_AUTO_CLK_LANE_CTRL_DISABLE 0x00000000U |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
656 #define DSI_AUTO_CLK_LANE_CTRL_ENABLE DSI_CLCR_ACR |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
657 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
658 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
659 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
660 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
661 /** @defgroup DSI_Number_Of_Lanes DSI Number Of Lanes |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
662 * @{ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
663 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
664 #define DSI_ONE_DATA_LANE 0U |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
665 #define DSI_TWO_DATA_LANES 1U |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
666 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
667 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
668 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
669 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
670 /** @defgroup DSI_FlowControl DSI Flow Control |
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671 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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672 */ |
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Added current STM32 standandard libraries in version independend folder structure
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673 #define DSI_FLOW_CONTROL_CRC_RX DSI_PCR_CRCRXE |
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Added current STM32 standandard libraries in version independend folder structure
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674 #define DSI_FLOW_CONTROL_ECC_RX DSI_PCR_ECCRXE |
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675 #define DSI_FLOW_CONTROL_BTA DSI_PCR_BTAE |
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Added current STM32 standandard libraries in version independend folder structure
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676 #define DSI_FLOW_CONTROL_EOTP_RX DSI_PCR_ETRXE |
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Added current STM32 standandard libraries in version independend folder structure
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677 #define DSI_FLOW_CONTROL_EOTP_TX DSI_PCR_ETTXE |
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678 #define DSI_FLOW_CONTROL_ALL (DSI_FLOW_CONTROL_CRC_RX | DSI_FLOW_CONTROL_ECC_RX | \ |
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Added current STM32 standandard libraries in version independend folder structure
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679 DSI_FLOW_CONTROL_BTA | DSI_FLOW_CONTROL_EOTP_RX | \ |
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Added current STM32 standandard libraries in version independend folder structure
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|
680 DSI_FLOW_CONTROL_EOTP_TX) |
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Added current STM32 standandard libraries in version independend folder structure
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|
681 /** |
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682 * @} |
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|
683 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
684 |
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Added current STM32 standandard libraries in version independend folder structure
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685 /** @defgroup DSI_Color_Coding DSI Color Coding |
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Added current STM32 standandard libraries in version independend folder structure
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686 * @{ |
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687 */ |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
688 #define DSI_RGB565 0x00000000U /*!< The values 0x00000001 and 0x00000002 can also be used for the RGB565 color mode configuration */ |
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Added current STM32 standandard libraries in version independend folder structure
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689 #define DSI_RGB666 0x00000003U /*!< The value 0x00000004 can also be used for the RGB666 color mode configuration */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
690 #define DSI_RGB888 0x00000005U |
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Added current STM32 standandard libraries in version independend folder structure
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|
691 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
692 * @} |
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|
693 */ |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
694 |
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Added current STM32 standandard libraries in version independend folder structure
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|
695 /** @defgroup DSI_LooselyPacked DSI Loosely Packed |
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|
696 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
697 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
698 #define DSI_LOOSELY_PACKED_ENABLE DSI_LCOLCR_LPE |
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Added current STM32 standandard libraries in version independend folder structure
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699 #define DSI_LOOSELY_PACKED_DISABLE 0x00000000U |
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|
700 /** |
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|
701 * @} |
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|
702 */ |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
703 |
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Added current STM32 standandard libraries in version independend folder structure
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|
704 /** @defgroup DSI_HSYNC_Polarity DSI HSYNC Polarity |
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|
705 * @{ |
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|
706 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
707 #define DSI_HSYNC_ACTIVE_HIGH 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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|
708 #define DSI_HSYNC_ACTIVE_LOW DSI_LPCR_HSP |
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Added current STM32 standandard libraries in version independend folder structure
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|
709 /** |
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|
710 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
711 */ |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
712 |
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Ideenmodellierer
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diff
changeset
|
713 /** @defgroup DSI_VSYNC_Active_Polarity DSI VSYNC Active Polarity |
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|
714 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
715 */ |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
716 #define DSI_VSYNC_ACTIVE_HIGH 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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|
717 #define DSI_VSYNC_ACTIVE_LOW DSI_LPCR_VSP |
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Added current STM32 standandard libraries in version independend folder structure
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|
718 /** |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
719 * @} |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
720 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
changeset
|
721 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
722 /** @defgroup DSI_DATA_ENABLE_Polarity DSI DATA ENABLE Polarity |
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Added current STM32 standandard libraries in version independend folder structure
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|
723 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
724 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
725 #define DSI_DATA_ENABLE_ACTIVE_HIGH 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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|
726 #define DSI_DATA_ENABLE_ACTIVE_LOW DSI_LPCR_DEP |
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Added current STM32 standandard libraries in version independend folder structure
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|
727 /** |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
728 * @} |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
729 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
730 |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
731 /** @defgroup DSI_PLL_IDF DSI PLL IDF |
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Added current STM32 standandard libraries in version independend folder structure
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|
732 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
733 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
734 #define DSI_PLL_IN_DIV1 0x00000001U |
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Added current STM32 standandard libraries in version independend folder structure
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|
735 #define DSI_PLL_IN_DIV2 0x00000002U |
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Added current STM32 standandard libraries in version independend folder structure
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|
736 #define DSI_PLL_IN_DIV3 0x00000003U |
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Added current STM32 standandard libraries in version independend folder structure
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|
737 #define DSI_PLL_IN_DIV4 0x00000004U |
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Added current STM32 standandard libraries in version independend folder structure
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|
738 #define DSI_PLL_IN_DIV5 0x00000005U |
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Added current STM32 standandard libraries in version independend folder structure
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|
739 #define DSI_PLL_IN_DIV6 0x00000006U |
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Added current STM32 standandard libraries in version independend folder structure
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|
740 #define DSI_PLL_IN_DIV7 0x00000007U |
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Added current STM32 standandard libraries in version independend folder structure
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|
741 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
742 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
743 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
744 |
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Added current STM32 standandard libraries in version independend folder structure
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|
745 /** @defgroup DSI_PLL_ODF DSI PLL ODF |
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Added current STM32 standandard libraries in version independend folder structure
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|
746 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
747 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
748 #define DSI_PLL_OUT_DIV1 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
749 #define DSI_PLL_OUT_DIV2 0x00000001U |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
750 #define DSI_PLL_OUT_DIV4 0x00000002U |
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Added current STM32 standandard libraries in version independend folder structure
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|
751 #define DSI_PLL_OUT_DIV8 0x00000003U |
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Added current STM32 standandard libraries in version independend folder structure
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|
752 /** |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
753 * @} |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
754 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
755 |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
756 /** @defgroup DSI_Flags DSI Flags |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
757 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
758 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
759 #define DSI_FLAG_TE DSI_WISR_TEIF |
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Added current STM32 standandard libraries in version independend folder structure
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|
760 #define DSI_FLAG_ER DSI_WISR_ERIF |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
761 #define DSI_FLAG_BUSY DSI_WISR_BUSY |
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Added current STM32 standandard libraries in version independend folder structure
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|
762 #define DSI_FLAG_PLLLS DSI_WISR_PLLLS |
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Added current STM32 standandard libraries in version independend folder structure
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|
763 #define DSI_FLAG_PLLL DSI_WISR_PLLLIF |
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Added current STM32 standandard libraries in version independend folder structure
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|
764 #define DSI_FLAG_PLLU DSI_WISR_PLLUIF |
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Added current STM32 standandard libraries in version independend folder structure
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|
765 #define DSI_FLAG_RRS DSI_WISR_RRS |
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Added current STM32 standandard libraries in version independend folder structure
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|
766 #define DSI_FLAG_RR DSI_WISR_RRIF |
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Added current STM32 standandard libraries in version independend folder structure
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|
767 /** |
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|
768 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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|
769 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
770 |
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Added current STM32 standandard libraries in version independend folder structure
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|
771 /** @defgroup DSI_Interrupts DSI Interrupts |
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|
772 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
773 */ |
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|
774 #define DSI_IT_TE DSI_WIER_TEIE |
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Added current STM32 standandard libraries in version independend folder structure
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|
775 #define DSI_IT_ER DSI_WIER_ERIE |
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|
776 #define DSI_IT_PLLL DSI_WIER_PLLLIE |
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|
777 #define DSI_IT_PLLU DSI_WIER_PLLUIE |
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|
778 #define DSI_IT_RR DSI_WIER_RRIE |
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|
779 /** |
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|
780 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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|
781 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
782 |
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|
783 /** @defgroup DSI_SHORT_WRITE_PKT_Data_Type DSI SHORT WRITE PKT Data Type |
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Added current STM32 standandard libraries in version independend folder structure
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|
784 * @{ |
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|
785 */ |
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|
786 #define DSI_DCS_SHORT_PKT_WRITE_P0 0x00000005U /*!< DCS short write, no parameters */ |
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|
787 #define DSI_DCS_SHORT_PKT_WRITE_P1 0x00000015U /*!< DCS short write, one parameter */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
788 #define DSI_GEN_SHORT_PKT_WRITE_P0 0x00000003U /*!< Generic short write, no parameters */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
789 #define DSI_GEN_SHORT_PKT_WRITE_P1 0x00000013U /*!< Generic short write, one parameter */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
790 #define DSI_GEN_SHORT_PKT_WRITE_P2 0x00000023U /*!< Generic short write, two parameters */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
791 /** |
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|
792 * @} |
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|
793 */ |
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|
794 |
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|
795 /** @defgroup DSI_LONG_WRITE_PKT_Data_Type DSI LONG WRITE PKT Data Type |
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|
796 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
797 */ |
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|
798 #define DSI_DCS_LONG_PKT_WRITE 0x00000039U /*!< DCS long write */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
799 #define DSI_GEN_LONG_PKT_WRITE 0x00000029U /*!< Generic long write */ |
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|
800 /** |
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|
801 * @} |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
802 */ |
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Ideenmodellierer
parents:
diff
changeset
|
803 |
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parents:
diff
changeset
|
804 /** @defgroup DSI_SHORT_READ_PKT_Data_Type DSI SHORT READ PKT Data Type |
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Ideenmodellierer
parents:
diff
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|
805 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
806 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
807 #define DSI_DCS_SHORT_PKT_READ 0x00000006U /*!< DCS short read */ |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
808 #define DSI_GEN_SHORT_PKT_READ_P0 0x00000004U /*!< Generic short read, no parameters */ |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
809 #define DSI_GEN_SHORT_PKT_READ_P1 0x00000014U /*!< Generic short read, one parameter */ |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
810 #define DSI_GEN_SHORT_PKT_READ_P2 0x00000024U /*!< Generic short read, two parameters */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
811 /** |
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|
812 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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diff
changeset
|
813 */ |
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Added current STM32 standandard libraries in version independend folder structure
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diff
changeset
|
814 |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
815 /** @defgroup DSI_Error_Data_Type DSI Error Data Type |
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diff
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|
816 * @{ |
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diff
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|
817 */ |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
818 #define HAL_DSI_ERROR_NONE 0U |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
819 #define HAL_DSI_ERROR_ACK 0x00000001U /*!< acknowledge errors */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
820 #define HAL_DSI_ERROR_PHY 0x00000002U /*!< PHY related errors */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
821 #define HAL_DSI_ERROR_TX 0x00000004U /*!< transmission error */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
822 #define HAL_DSI_ERROR_RX 0x00000008U /*!< reception error */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
823 #define HAL_DSI_ERROR_ECC 0x00000010U /*!< ECC errors */ |
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|
824 #define HAL_DSI_ERROR_CRC 0x00000020U /*!< CRC error */ |
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Added current STM32 standandard libraries in version independend folder structure
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825 #define HAL_DSI_ERROR_PSE 0x00000040U /*!< Packet Size error */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
826 #define HAL_DSI_ERROR_EOT 0x00000080U /*!< End Of Transmission error */ |
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|
827 #define HAL_DSI_ERROR_OVF 0x00000100U /*!< FIFO overflow error */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
828 #define HAL_DSI_ERROR_GEN 0x00000200U /*!< Generic FIFO related errors */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
829 /** |
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|
830 * @} |
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diff
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|
831 */ |
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Added current STM32 standandard libraries in version independend folder structure
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diff
changeset
|
832 |
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|
833 /** @defgroup DSI_Lane_Group DSI Lane Group |
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|
834 * @{ |
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|
835 */ |
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|
836 #define DSI_CLOCK_LANE 0x00000000U |
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837 #define DSI_DATA_LANES 0x00000001U |
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|
838 /** |
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|
839 * @} |
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|
840 */ |
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Ideenmodellierer
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|
841 |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
842 /** @defgroup DSI_Communication_Delay DSI Communication Delay |
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|
843 * @{ |
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|
844 */ |
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|
845 #define DSI_SLEW_RATE_HSTX 0x00000000U |
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|
846 #define DSI_SLEW_RATE_LPTX 0x00000001U |
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847 #define DSI_HS_DELAY 0x00000002U |
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|
848 /** |
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|
849 * @} |
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diff
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|
850 */ |
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Ideenmodellierer
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|
851 |
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Ideenmodellierer
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|
852 /** @defgroup DSI_CustomLane DSI CustomLane |
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diff
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|
853 * @{ |
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diff
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|
854 */ |
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|
855 #define DSI_SWAP_LANE_PINS 0x00000000U |
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|
856 #define DSI_INVERT_HS_SIGNAL 0x00000001U |
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|
857 /** |
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|
858 * @} |
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|
859 */ |
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Added current STM32 standandard libraries in version independend folder structure
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diff
changeset
|
860 |
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Added current STM32 standandard libraries in version independend folder structure
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|
861 /** @defgroup DSI_Lane_Select DSI Lane Select |
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|
862 * @{ |
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|
863 */ |
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|
864 #define DSI_CLK_LANE 0x00000000U |
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|
865 #define DSI_DATA_LANE0 0x00000001U |
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|
866 #define DSI_DATA_LANE1 0x00000002U |
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|
867 /** |
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|
868 * @} |
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|
869 */ |
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|
870 |
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|
871 /** @defgroup DSI_PHY_Timing DSI PHY Timing |
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|
872 * @{ |
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|
873 */ |
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|
874 #define DSI_TCLK_POST 0x00000000U |
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|
875 #define DSI_TLPX_CLK 0x00000001U |
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|
876 #define DSI_THS_EXIT 0x00000002U |
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|
877 #define DSI_TLPX_DATA 0x00000003U |
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|
878 #define DSI_THS_ZERO 0x00000004U |
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|
879 #define DSI_THS_TRAIL 0x00000005U |
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|
880 #define DSI_THS_PREPARE 0x00000006U |
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|
881 #define DSI_TCLK_ZERO 0x00000007U |
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|
882 #define DSI_TCLK_PREPARE 0x00000008U |
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|
883 /** |
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|
884 * @} |
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|
885 */ |
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|
886 |
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|
887 /* Exported macros -----------------------------------------------------------*/ |
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|
888 /** |
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|
889 * @brief Enables the DSI host. |
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|
890 * @param __HANDLE__ DSI handle |
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|
891 * @retval None. |
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|
892 */ |
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|
893 #define __HAL_DSI_ENABLE(__HANDLE__) do { \ |
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|
894 __IO uint32_t tmpreg = 0x00U; \ |
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|
895 SET_BIT((__HANDLE__)->Instance->CR, DSI_CR_EN);\ |
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|
896 /* Delay after an DSI Host enabling */ \ |
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|
897 tmpreg = READ_BIT((__HANDLE__)->Instance->CR, DSI_CR_EN);\ |
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|
898 UNUSED(tmpreg); \ |
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|
899 }while(0U) |
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|
900 |
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|
901 /** |
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|
902 * @brief Disables the DSI host. |
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|
903 * @param __HANDLE__ DSI handle |
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|
904 * @retval None. |
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|
905 */ |
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|
906 #define __HAL_DSI_DISABLE(__HANDLE__) do { \ |
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907 __IO uint32_t tmpreg = 0x00U; \ |
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|
908 CLEAR_BIT((__HANDLE__)->Instance->CR, DSI_CR_EN);\ |
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|
909 /* Delay after an DSI Host disabling */ \ |
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|
910 tmpreg = READ_BIT((__HANDLE__)->Instance->CR, DSI_CR_EN);\ |
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911 UNUSED(tmpreg); \ |
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912 }while(0U) |
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|
913 |
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|
914 /** |
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|
915 * @brief Enables the DSI wrapper. |
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|
916 * @param __HANDLE__ DSI handle |
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917 * @retval None. |
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|
918 */ |
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|
919 #define __HAL_DSI_WRAPPER_ENABLE(__HANDLE__) do { \ |
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920 __IO uint32_t tmpreg = 0x00U; \ |
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921 SET_BIT((__HANDLE__)->Instance->WCR, DSI_WCR_DSIEN);\ |
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922 /* Delay after an DSI warpper enabling */ \ |
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|
923 tmpreg = READ_BIT((__HANDLE__)->Instance->WCR, DSI_WCR_DSIEN);\ |
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|
924 UNUSED(tmpreg); \ |
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|
925 }while(0U) |
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|
926 |
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|
927 /** |
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|
928 * @brief Disable the DSI wrapper. |
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|
929 * @param __HANDLE__ DSI handle |
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|
930 * @retval None. |
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|
931 */ |
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932 #define __HAL_DSI_WRAPPER_DISABLE(__HANDLE__) do { \ |
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933 __IO uint32_t tmpreg = 0x00U; \ |
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934 CLEAR_BIT((__HANDLE__)->Instance->WCR, DSI_WCR_DSIEN);\ |
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935 /* Delay after an DSI warpper disabling*/ \ |
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936 tmpreg = READ_BIT((__HANDLE__)->Instance->WCR, DSI_WCR_DSIEN);\ |
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937 UNUSED(tmpreg); \ |
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938 }while(0U) |
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939 |
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940 /** |
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941 * @brief Enables the DSI PLL. |
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942 * @param __HANDLE__ DSI handle |
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943 * @retval None. |
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944 */ |
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945 #define __HAL_DSI_PLL_ENABLE(__HANDLE__) do { \ |
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946 __IO uint32_t tmpreg = 0x00U; \ |
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947 SET_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_PLLEN);\ |
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948 /* Delay after an DSI PLL enabling */ \ |
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949 tmpreg = READ_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_PLLEN);\ |
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950 UNUSED(tmpreg); \ |
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951 }while(0U) |
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952 |
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953 /** |
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954 * @brief Disables the DSI PLL. |
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955 * @param __HANDLE__ DSI handle |
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956 * @retval None. |
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957 */ |
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958 #define __HAL_DSI_PLL_DISABLE(__HANDLE__) do { \ |
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959 __IO uint32_t tmpreg = 0x00U; \ |
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960 CLEAR_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_PLLEN);\ |
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961 /* Delay after an DSI PLL disabling */ \ |
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962 tmpreg = READ_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_PLLEN);\ |
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963 UNUSED(tmpreg); \ |
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964 }while(0U) |
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965 |
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966 /** |
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967 * @brief Enables the DSI regulator. |
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968 * @param __HANDLE__ DSI handle |
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969 * @retval None. |
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970 */ |
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971 #define __HAL_DSI_REG_ENABLE(__HANDLE__) do { \ |
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972 __IO uint32_t tmpreg = 0x00U; \ |
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973 SET_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_REGEN);\ |
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974 /* Delay after an DSI regulator enabling */ \ |
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975 tmpreg = READ_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_REGEN);\ |
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976 UNUSED(tmpreg); \ |
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977 }while(0U) |
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978 |
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979 /** |
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980 * @brief Disables the DSI regulator. |
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981 * @param __HANDLE__ DSI handle |
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982 * @retval None. |
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983 */ |
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984 #define __HAL_DSI_REG_DISABLE(__HANDLE__) do { \ |
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985 __IO uint32_t tmpreg = 0x00U; \ |
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986 CLEAR_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_REGEN);\ |
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987 /* Delay after an DSI regulator disabling */ \ |
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988 tmpreg = READ_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_REGEN);\ |
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989 UNUSED(tmpreg); \ |
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990 }while(0U) |
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991 |
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992 /** |
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993 * @brief Get the DSI pending flags. |
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994 * @param __HANDLE__ DSI handle. |
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995 * @param __FLAG__ Get the specified flag. |
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996 * This parameter can be any combination of the following values: |
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997 * @arg DSI_FLAG_TE : Tearing Effect Interrupt Flag |
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998 * @arg DSI_FLAG_ER : End of Refresh Interrupt Flag |
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999 * @arg DSI_FLAG_BUSY : Busy Flag |
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1000 * @arg DSI_FLAG_PLLLS: PLL Lock Status |
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1001 * @arg DSI_FLAG_PLLL : PLL Lock Interrupt Flag |
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1002 * @arg DSI_FLAG_PLLU : PLL Unlock Interrupt Flag |
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1003 * @arg DSI_FLAG_RRS : Regulator Ready Flag |
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1004 * @arg DSI_FLAG_RR : Regulator Ready Interrupt Flag |
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1005 * @retval The state of FLAG (SET or RESET). |
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1006 */ |
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1007 #define __HAL_DSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->WISR & (__FLAG__)) |
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1008 |
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1009 /** |
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1010 * @brief Clears the DSI pending flags. |
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1011 * @param __HANDLE__ DSI handle. |
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1012 * @param __FLAG__ specifies the flag to clear. |
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1013 * This parameter can be any combination of the following values: |
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1014 * @arg DSI_FLAG_TE : Tearing Effect Interrupt Flag |
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1015 * @arg DSI_FLAG_ER : End of Refresh Interrupt Flag |
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1016 * @arg DSI_FLAG_PLLL : PLL Lock Interrupt Flag |
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1017 * @arg DSI_FLAG_PLLU : PLL Unlock Interrupt Flag |
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1018 * @arg DSI_FLAG_RR : Regulator Ready Interrupt Flag |
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1019 * @retval None |
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1020 */ |
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1021 #define __HAL_DSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->WIFCR = (__FLAG__)) |
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1022 |
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1023 /** |
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1024 * @brief Enables the specified DSI interrupts. |
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1025 * @param __HANDLE__ DSI handle. |
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1026 * @param __INTERRUPT__ specifies the DSI interrupt sources to be enabled. |
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1027 * This parameter can be any combination of the following values: |
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1028 * @arg DSI_IT_TE : Tearing Effect Interrupt |
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1029 * @arg DSI_IT_ER : End of Refresh Interrupt |
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1030 * @arg DSI_IT_PLLL: PLL Lock Interrupt |
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1031 * @arg DSI_IT_PLLU: PLL Unlock Interrupt |
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1032 * @arg DSI_IT_RR : Regulator Ready Interrupt |
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1033 * @retval None |
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1034 */ |
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1035 #define __HAL_DSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->WIER |= (__INTERRUPT__)) |
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1036 |
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1037 /** |
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1038 * @brief Disables the specified DSI interrupts. |
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1039 * @param __HANDLE__ DSI handle |
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1040 * @param __INTERRUPT__ specifies the DSI interrupt sources to be disabled. |
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1041 * This parameter can be any combination of the following values: |
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1042 * @arg DSI_IT_TE : Tearing Effect Interrupt |
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1043 * @arg DSI_IT_ER : End of Refresh Interrupt |
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1044 * @arg DSI_IT_PLLL: PLL Lock Interrupt |
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1045 * @arg DSI_IT_PLLU: PLL Unlock Interrupt |
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1046 * @arg DSI_IT_RR : Regulator Ready Interrupt |
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1047 * @retval None |
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1048 */ |
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1049 #define __HAL_DSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->WIER &= ~(__INTERRUPT__)) |
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1050 |
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1051 /** |
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1052 * @brief Checks whether the specified DSI interrupt source is enabled or not. |
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1053 * @param __HANDLE__ DSI handle |
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1054 * @param __INTERRUPT__ specifies the DSI interrupt source to check. |
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1055 * This parameter can be one of the following values: |
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1056 * @arg DSI_IT_TE : Tearing Effect Interrupt |
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1057 * @arg DSI_IT_ER : End of Refresh Interrupt |
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1058 * @arg DSI_IT_PLLL: PLL Lock Interrupt |
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1059 * @arg DSI_IT_PLLU: PLL Unlock Interrupt |
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1060 * @arg DSI_IT_RR : Regulator Ready Interrupt |
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1061 * @retval The state of INTERRUPT (SET or RESET). |
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1062 */ |
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1063 #define __HAL_DSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->WIER & (__INTERRUPT__)) |
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1064 |
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1065 /* Exported functions --------------------------------------------------------*/ |
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1066 /** @defgroup DSI_Exported_Functions DSI Exported Functions |
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1067 * @{ |
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1068 */ |
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1069 HAL_StatusTypeDef HAL_DSI_Init(DSI_HandleTypeDef *hdsi, DSI_PLLInitTypeDef *PLLInit); |
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1070 HAL_StatusTypeDef HAL_DSI_DeInit(DSI_HandleTypeDef *hdsi); |
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1071 void HAL_DSI_MspInit(DSI_HandleTypeDef *hdsi); |
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1072 void HAL_DSI_MspDeInit(DSI_HandleTypeDef *hdsi); |
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1073 |
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1074 void HAL_DSI_IRQHandler(DSI_HandleTypeDef *hdsi); |
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1075 void HAL_DSI_TearingEffectCallback(DSI_HandleTypeDef *hdsi); |
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1076 void HAL_DSI_EndOfRefreshCallback(DSI_HandleTypeDef *hdsi); |
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1077 void HAL_DSI_ErrorCallback(DSI_HandleTypeDef *hdsi); |
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1078 |
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1079 HAL_StatusTypeDef HAL_DSI_SetGenericVCID(DSI_HandleTypeDef *hdsi, uint32_t VirtualChannelID); |
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1080 HAL_StatusTypeDef HAL_DSI_ConfigVideoMode(DSI_HandleTypeDef *hdsi, DSI_VidCfgTypeDef *VidCfg); |
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1081 HAL_StatusTypeDef HAL_DSI_ConfigAdaptedCommandMode(DSI_HandleTypeDef *hdsi, DSI_CmdCfgTypeDef *CmdCfg); |
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1082 HAL_StatusTypeDef HAL_DSI_ConfigCommand(DSI_HandleTypeDef *hdsi, DSI_LPCmdTypeDef *LPCmd); |
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1083 HAL_StatusTypeDef HAL_DSI_ConfigFlowControl(DSI_HandleTypeDef *hdsi, uint32_t FlowControl); |
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1084 HAL_StatusTypeDef HAL_DSI_ConfigPhyTimer(DSI_HandleTypeDef *hdsi, DSI_PHY_TimerTypeDef *PhyTimers); |
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1085 HAL_StatusTypeDef HAL_DSI_ConfigHostTimeouts(DSI_HandleTypeDef *hdsi, DSI_HOST_TimeoutTypeDef *HostTimeouts); |
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1086 HAL_StatusTypeDef HAL_DSI_Start(DSI_HandleTypeDef *hdsi); |
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1087 HAL_StatusTypeDef HAL_DSI_Stop(DSI_HandleTypeDef *hdsi); |
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1088 HAL_StatusTypeDef HAL_DSI_Refresh(DSI_HandleTypeDef *hdsi); |
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1089 HAL_StatusTypeDef HAL_DSI_ColorMode(DSI_HandleTypeDef *hdsi, uint32_t ColorMode); |
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1090 HAL_StatusTypeDef HAL_DSI_Shutdown(DSI_HandleTypeDef *hdsi, uint32_t Shutdown); |
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1091 HAL_StatusTypeDef HAL_DSI_ShortWrite(DSI_HandleTypeDef *hdsi, |
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1092 uint32_t ChannelID, |
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1093 uint32_t Mode, |
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1094 uint32_t Param1, |
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1095 uint32_t Param2); |
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1096 HAL_StatusTypeDef HAL_DSI_LongWrite(DSI_HandleTypeDef *hdsi, |
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1097 uint32_t ChannelID, |
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1098 uint32_t Mode, |
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1099 uint32_t NbParams, |
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1100 uint32_t Param1, |
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1101 uint8_t* ParametersTable); |
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1102 HAL_StatusTypeDef HAL_DSI_Read(DSI_HandleTypeDef *hdsi, |
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1103 uint32_t ChannelNbr, |
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1104 uint8_t* Array, |
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1105 uint32_t Size, |
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1106 uint32_t Mode, |
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1107 uint32_t DCSCmd, |
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1108 uint8_t* ParametersTable); |
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1109 HAL_StatusTypeDef HAL_DSI_EnterULPMData(DSI_HandleTypeDef *hdsi); |
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1110 HAL_StatusTypeDef HAL_DSI_ExitULPMData(DSI_HandleTypeDef *hdsi); |
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1111 HAL_StatusTypeDef HAL_DSI_EnterULPM(DSI_HandleTypeDef *hdsi); |
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1112 HAL_StatusTypeDef HAL_DSI_ExitULPM(DSI_HandleTypeDef *hdsi); |
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1113 |
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1114 HAL_StatusTypeDef HAL_DSI_PatternGeneratorStart(DSI_HandleTypeDef *hdsi, uint32_t Mode, uint32_t Orientation); |
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1115 HAL_StatusTypeDef HAL_DSI_PatternGeneratorStop(DSI_HandleTypeDef *hdsi); |
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1116 |
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1117 HAL_StatusTypeDef HAL_DSI_SetSlewRateAndDelayTuning(DSI_HandleTypeDef *hdsi, uint32_t CommDelay, uint32_t Lane, uint32_t Value); |
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1118 HAL_StatusTypeDef HAL_DSI_SetLowPowerRXFilter(DSI_HandleTypeDef *hdsi, uint32_t Frequency); |
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1119 HAL_StatusTypeDef HAL_DSI_SetSDD(DSI_HandleTypeDef *hdsi, FunctionalState State); |
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1120 HAL_StatusTypeDef HAL_DSI_SetLanePinsConfiguration(DSI_HandleTypeDef *hdsi, uint32_t CustomLane, uint32_t Lane, FunctionalState State); |
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1121 HAL_StatusTypeDef HAL_DSI_SetPHYTimings(DSI_HandleTypeDef *hdsi, uint32_t Timing, FunctionalState State, uint32_t Value); |
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1122 HAL_StatusTypeDef HAL_DSI_ForceTXStopMode(DSI_HandleTypeDef *hdsi, uint32_t Lane, FunctionalState State); |
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1123 HAL_StatusTypeDef HAL_DSI_ForceRXLowPower(DSI_HandleTypeDef *hdsi, FunctionalState State); |
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1124 HAL_StatusTypeDef HAL_DSI_ForceDataLanesInRX(DSI_HandleTypeDef *hdsi, FunctionalState State); |
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1125 HAL_StatusTypeDef HAL_DSI_SetPullDown(DSI_HandleTypeDef *hdsi, FunctionalState State); |
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1126 HAL_StatusTypeDef HAL_DSI_SetContentionDetectionOff(DSI_HandleTypeDef *hdsi, FunctionalState State); |
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1127 |
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1128 uint32_t HAL_DSI_GetError(DSI_HandleTypeDef *hdsi); |
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1129 HAL_StatusTypeDef HAL_DSI_ConfigErrorMonitor(DSI_HandleTypeDef *hdsi, uint32_t ActiveErrors); |
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1130 HAL_DSI_StateTypeDef HAL_DSI_GetState(DSI_HandleTypeDef *hdsi); |
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1131 /** |
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1132 * @} |
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1133 */ |
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1134 |
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1135 /* Private types -------------------------------------------------------------*/ |
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1136 /** @defgroup DSI_Private_Types DSI Private Types |
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1137 * @{ |
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1138 */ |
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1139 |
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1140 /** |
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1141 * @} |
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1142 */ |
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1143 |
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1144 /* Private defines -----------------------------------------------------------*/ |
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1145 /** @defgroup DSI_Private_Defines DSI Private Defines |
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1146 * @{ |
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1147 */ |
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1148 |
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1149 /** |
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1150 * @} |
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1151 */ |
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1152 |
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1153 /* Private variables ---------------------------------------------------------*/ |
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1154 /** @defgroup DSI_Private_Variables DSI Private Variables |
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1155 * @{ |
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1156 */ |
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1157 |
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1158 /** |
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1159 * @} |
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1160 */ |
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1161 |
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1162 /* Private constants ---------------------------------------------------------*/ |
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1163 /** @defgroup DSI_Private_Constants DSI Private Constants |
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1164 * @{ |
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1165 */ |
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1166 #define DSI_MAX_RETURN_PKT_SIZE (0x00000037U) /*!< Maximum return packet configuration */ |
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1167 /** |
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1168 * @} |
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1169 */ |
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1170 |
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1171 /* Private macros ------------------------------------------------------------*/ |
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1172 /** @defgroup DSI_Private_Macros DSI Private Macros |
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1173 * @{ |
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1174 */ |
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1175 #define IS_DSI_PLL_NDIV(NDIV) ((10U <= (NDIV)) && ((NDIV) <= 125U)) |
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1176 #define IS_DSI_PLL_IDF(IDF) (((IDF) == DSI_PLL_IN_DIV1) || \ |
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1177 ((IDF) == DSI_PLL_IN_DIV2) || \ |
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1178 ((IDF) == DSI_PLL_IN_DIV3) || \ |
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1179 ((IDF) == DSI_PLL_IN_DIV4) || \ |
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1180 ((IDF) == DSI_PLL_IN_DIV5) || \ |
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1181 ((IDF) == DSI_PLL_IN_DIV6) || \ |
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1182 ((IDF) == DSI_PLL_IN_DIV7)) |
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1183 #define IS_DSI_PLL_ODF(ODF) (((ODF) == DSI_PLL_OUT_DIV1) || \ |
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1184 ((ODF) == DSI_PLL_OUT_DIV2) || \ |
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1185 ((ODF) == DSI_PLL_OUT_DIV4) || \ |
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1186 ((ODF) == DSI_PLL_OUT_DIV8)) |
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1187 #define IS_DSI_AUTO_CLKLANE_CONTROL(AutoClkLane) (((AutoClkLane) == DSI_AUTO_CLK_LANE_CTRL_DISABLE) || ((AutoClkLane) == DSI_AUTO_CLK_LANE_CTRL_ENABLE)) |
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1188 #define IS_DSI_NUMBER_OF_LANES(NumberOfLanes) (((NumberOfLanes) == DSI_ONE_DATA_LANE) || ((NumberOfLanes) == DSI_TWO_DATA_LANES)) |
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1189 #define IS_DSI_FLOW_CONTROL(FlowControl) (((FlowControl) | DSI_FLOW_CONTROL_ALL) == DSI_FLOW_CONTROL_ALL) |
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1190 #define IS_DSI_COLOR_CODING(ColorCoding) ((ColorCoding) <= 5U) |
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1191 #define IS_DSI_LOOSELY_PACKED(LooselyPacked) (((LooselyPacked) == DSI_LOOSELY_PACKED_ENABLE) || ((LooselyPacked) == DSI_LOOSELY_PACKED_DISABLE)) |
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1192 #define IS_DSI_DE_POLARITY(DataEnable) (((DataEnable) == DSI_DATA_ENABLE_ACTIVE_HIGH) || ((DataEnable) == DSI_DATA_ENABLE_ACTIVE_LOW)) |
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1193 #define IS_DSI_VSYNC_POLARITY(VSYNC) (((VSYNC) == DSI_VSYNC_ACTIVE_HIGH) || ((VSYNC) == DSI_VSYNC_ACTIVE_LOW)) |
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1194 #define IS_DSI_HSYNC_POLARITY(HSYNC) (((HSYNC) == DSI_HSYNC_ACTIVE_HIGH) || ((HSYNC) == DSI_HSYNC_ACTIVE_LOW)) |
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1195 #define IS_DSI_VIDEO_MODE_TYPE(VideoModeType) (((VideoModeType) == DSI_VID_MODE_NB_PULSES) || \ |
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1196 ((VideoModeType) == DSI_VID_MODE_NB_EVENTS) || \ |
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1197 ((VideoModeType) == DSI_VID_MODE_BURST)) |
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1198 #define IS_DSI_COLOR_MODE(ColorMode) (((ColorMode) == DSI_COLOR_MODE_FULL) || ((ColorMode) == DSI_COLOR_MODE_EIGHT)) |
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1199 #define IS_DSI_SHUT_DOWN(ShutDown) (((ShutDown) == DSI_DISPLAY_ON) || ((ShutDown) == DSI_DISPLAY_OFF)) |
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1200 #define IS_DSI_LP_COMMAND(LPCommand) (((LPCommand) == DSI_LP_COMMAND_DISABLE) || ((LPCommand) == DSI_LP_COMMAND_ENABLE)) |
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1201 #define IS_DSI_LP_HFP(LPHFP) (((LPHFP) == DSI_LP_HFP_DISABLE) || ((LPHFP) == DSI_LP_HFP_ENABLE)) |
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1202 #define IS_DSI_LP_HBP(LPHBP) (((LPHBP) == DSI_LP_HBP_DISABLE) || ((LPHBP) == DSI_LP_HBP_ENABLE)) |
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1203 #define IS_DSI_LP_VACTIVE(LPVActive) (((LPVActive) == DSI_LP_VACT_DISABLE) || ((LPVActive) == DSI_LP_VACT_ENABLE)) |
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1204 #define IS_DSI_LP_VFP(LPVFP) (((LPVFP) == DSI_LP_VFP_DISABLE) || ((LPVFP) == DSI_LP_VFP_ENABLE)) |
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1205 #define IS_DSI_LP_VBP(LPVBP) (((LPVBP) == DSI_LP_VBP_DISABLE) || ((LPVBP) == DSI_LP_VBP_ENABLE)) |
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1206 #define IS_DSI_LP_VSYNC(LPVSYNC) (((LPVSYNC) == DSI_LP_VSYNC_DISABLE) || ((LPVSYNC) == DSI_LP_VSYNC_ENABLE)) |
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1207 #define IS_DSI_FBTAA(FrameBTAAcknowledge) (((FrameBTAAcknowledge) == DSI_FBTAA_DISABLE) || ((FrameBTAAcknowledge) == DSI_FBTAA_ENABLE)) |
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1208 #define IS_DSI_TE_SOURCE(TESource) (((TESource) == DSI_TE_DSILINK) || ((TESource) == DSI_TE_EXTERNAL)) |
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1209 #define IS_DSI_TE_POLARITY(TEPolarity) (((TEPolarity) == DSI_TE_RISING_EDGE) || ((TEPolarity) == DSI_TE_FALLING_EDGE)) |
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1210 #define IS_DSI_AUTOMATIC_REFRESH(AutomaticRefresh) (((AutomaticRefresh) == DSI_AR_DISABLE) || ((AutomaticRefresh) == DSI_AR_ENABLE)) |
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1211 #define IS_DSI_VS_POLARITY(VSPolarity) (((VSPolarity) == DSI_VSYNC_FALLING) || ((VSPolarity) == DSI_VSYNC_RISING)) |
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1212 #define IS_DSI_TE_ACK_REQUEST(TEAcknowledgeRequest) (((TEAcknowledgeRequest) == DSI_TE_ACKNOWLEDGE_DISABLE) || ((TEAcknowledgeRequest) == DSI_TE_ACKNOWLEDGE_ENABLE)) |
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1213 #define IS_DSI_ACK_REQUEST(AcknowledgeRequest) (((AcknowledgeRequest) == DSI_ACKNOWLEDGE_DISABLE) || ((AcknowledgeRequest) == DSI_ACKNOWLEDGE_ENABLE)) |
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1214 #define IS_DSI_LP_GSW0P(LP_GSW0P) (((LP_GSW0P) == DSI_LP_GSW0P_DISABLE) || ((LP_GSW0P) == DSI_LP_GSW0P_ENABLE)) |
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1215 #define IS_DSI_LP_GSW1P(LP_GSW1P) (((LP_GSW1P) == DSI_LP_GSW1P_DISABLE) || ((LP_GSW1P) == DSI_LP_GSW1P_ENABLE)) |
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1216 #define IS_DSI_LP_GSW2P(LP_GSW2P) (((LP_GSW2P) == DSI_LP_GSW2P_DISABLE) || ((LP_GSW2P) == DSI_LP_GSW2P_ENABLE)) |
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1217 #define IS_DSI_LP_GSR0P(LP_GSR0P) (((LP_GSR0P) == DSI_LP_GSR0P_DISABLE) || ((LP_GSR0P) == DSI_LP_GSR0P_ENABLE)) |
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1218 #define IS_DSI_LP_GSR1P(LP_GSR1P) (((LP_GSR1P) == DSI_LP_GSR1P_DISABLE) || ((LP_GSR1P) == DSI_LP_GSR1P_ENABLE)) |
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1219 #define IS_DSI_LP_GSR2P(LP_GSR2P) (((LP_GSR2P) == DSI_LP_GSR2P_DISABLE) || ((LP_GSR2P) == DSI_LP_GSR2P_ENABLE)) |
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1220 #define IS_DSI_LP_GLW(LP_GLW) (((LP_GLW) == DSI_LP_GLW_DISABLE) || ((LP_GLW) == DSI_LP_GLW_ENABLE)) |
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1221 #define IS_DSI_LP_DSW0P(LP_DSW0P) (((LP_DSW0P) == DSI_LP_DSW0P_DISABLE) || ((LP_DSW0P) == DSI_LP_DSW0P_ENABLE)) |
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1222 #define IS_DSI_LP_DSW1P(LP_DSW1P) (((LP_DSW1P) == DSI_LP_DSW1P_DISABLE) || ((LP_DSW1P) == DSI_LP_DSW1P_ENABLE)) |
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1223 #define IS_DSI_LP_DSR0P(LP_DSR0P) (((LP_DSR0P) == DSI_LP_DSR0P_DISABLE) || ((LP_DSR0P) == DSI_LP_DSR0P_ENABLE)) |
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1224 #define IS_DSI_LP_DLW(LP_DLW) (((LP_DLW) == DSI_LP_DLW_DISABLE) || ((LP_DLW) == DSI_LP_DLW_ENABLE)) |
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1225 #define IS_DSI_LP_MRDP(LP_MRDP) (((LP_MRDP) == DSI_LP_MRDP_DISABLE) || ((LP_MRDP) == DSI_LP_MRDP_ENABLE)) |
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1226 #define IS_DSI_SHORT_WRITE_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_SHORT_PKT_WRITE_P0) || \ |
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1227 ((MODE) == DSI_DCS_SHORT_PKT_WRITE_P1) || \ |
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1228 ((MODE) == DSI_GEN_SHORT_PKT_WRITE_P0) || \ |
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1229 ((MODE) == DSI_GEN_SHORT_PKT_WRITE_P1) || \ |
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1230 ((MODE) == DSI_GEN_SHORT_PKT_WRITE_P2)) |
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1231 #define IS_DSI_LONG_WRITE_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_LONG_PKT_WRITE) || \ |
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1232 ((MODE) == DSI_GEN_LONG_PKT_WRITE)) |
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1233 #define IS_DSI_READ_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_SHORT_PKT_READ) || \ |
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1234 ((MODE) == DSI_GEN_SHORT_PKT_READ_P0) || \ |
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1235 ((MODE) == DSI_GEN_SHORT_PKT_READ_P1) || \ |
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1236 ((MODE) == DSI_GEN_SHORT_PKT_READ_P2)) |
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1237 #define IS_DSI_COMMUNICATION_DELAY(CommDelay) (((CommDelay) == DSI_SLEW_RATE_HSTX) || ((CommDelay) == DSI_SLEW_RATE_LPTX) || ((CommDelay) == DSI_HS_DELAY)) |
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1238 #define IS_DSI_LANE_GROUP(Lane) (((Lane) == DSI_CLOCK_LANE) || ((Lane) == DSI_DATA_LANES)) |
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1239 #define IS_DSI_CUSTOM_LANE(CustomLane) (((CustomLane) == DSI_SWAP_LANE_PINS) || ((CustomLane) == DSI_INVERT_HS_SIGNAL)) |
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1240 #define IS_DSI_LANE(Lane) (((Lane) == DSI_CLOCK_LANE) || ((Lane) == DSI_DATA_LANE0) || ((Lane) == DSI_DATA_LANE1)) |
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1241 #define IS_DSI_PHY_TIMING(Timing) (((Timing) == DSI_TCLK_POST ) || \ |
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1242 ((Timing) == DSI_TLPX_CLK ) || \ |
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1243 ((Timing) == DSI_THS_EXIT ) || \ |
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1244 ((Timing) == DSI_TLPX_DATA ) || \ |
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1245 ((Timing) == DSI_THS_ZERO ) || \ |
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1246 ((Timing) == DSI_THS_TRAIL ) || \ |
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1247 ((Timing) == DSI_THS_PREPARE ) || \ |
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1248 ((Timing) == DSI_TCLK_ZERO ) || \ |
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1249 ((Timing) == DSI_TCLK_PREPARE)) |
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1250 |
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1251 /** |
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1252 * @} |
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1253 */ |
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1254 |
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1255 /* Private functions prototypes ----------------------------------------------*/ |
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1256 /** @defgroup DSI_Private_Functions_Prototypes DSI Private Functions Prototypes |
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1257 * @{ |
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1258 */ |
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1259 |
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1260 /** |
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1261 * @} |
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1262 */ |
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1263 |
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1264 /* Private functions ---------------------------------------------------------*/ |
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1265 /** @defgroup DSI_Private_Functions DSI Private Functions |
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1266 * @{ |
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1267 */ |
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1268 |
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1269 /** |
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1270 * @} |
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1271 */ |
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1272 |
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1273 /** |
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1274 * @} |
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1275 */ |
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1276 |
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1277 /** |
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1278 * @} |
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1279 */ |
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1280 #endif /* DSI */ |
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1281 |
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1282 #ifdef __cplusplus |
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1283 } |
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1284 #endif |
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1285 |
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1286 #endif /* __STM32F4xx_HAL_DSI_H */ |
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1287 |
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1288 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |