Mercurial > public > ostc4
annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cec.c @ 842:c3dd461ca3f9 Evo_2_23
Migrated Sentinel protocol to new UART structure:
The Sentinel protocol had not been migrated to the new UART structure which was introduced with the introduction of the UART MUX. The Sentinel is now supported by autodetection again (development version only)
author | Ideenmodellierer |
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date | Mon, 15 Jan 2024 21:44:18 +0100 |
parents | c78bcbd5deda |
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rev | line source |
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_hal_cec.c |
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4 * @author MCD Application Team |
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5 * @brief CEC HAL module driver. |
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6 * This file provides firmware functions to manage the following |
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7 * functionalities of the High Definition Multimedia Interface |
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8 * Consumer Electronics Control Peripheral (CEC). |
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9 * + Initialization and de-initialization functions |
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10 * + IO operation functions |
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11 * + Peripheral Control functions |
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12 * |
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13 * |
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14 @verbatim |
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15 =============================================================================== |
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16 ##### How to use this driver ##### |
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17 =============================================================================== |
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18 [..] |
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19 The CEC HAL driver can be used as follow: |
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20 |
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21 (#) Declare a CEC_HandleTypeDef handle structure. |
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22 (#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API: |
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23 (##) Enable the CEC interface clock. |
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24 (##) CEC pins configuration: |
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25 (+++) Enable the clock for the CEC GPIOs. |
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26 (+++) Configure these CEC pins as alternate function pull-up. |
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27 (##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT() |
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28 and HAL_CEC_Receive_IT() APIs): |
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29 (+++) Configure the CEC interrupt priority. |
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30 (+++) Enable the NVIC CEC IRQ handle. |
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31 (+++) The specific CEC interrupts (Transmission complete interrupt, |
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32 RXNE interrupt and Error Interrupts) will be managed using the macros |
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33 __HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit |
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34 and receive process. |
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35 |
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36 (#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in |
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37 in case of Bit Rising Error, Error-Bit generation conditions, device logical |
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38 address and Listen mode in the hcec Init structure. |
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39 |
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40 (#) Initialize the CEC registers by calling the HAL_CEC_Init() API. |
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41 |
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42 [..] |
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43 (@) This API (HAL_CEC_Init()) configures also the low level Hardware (GPIO, CLOCK, CORTEX...) |
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44 by calling the customed HAL_CEC_MspInit() API. |
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45 |
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46 @endverbatim |
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47 ****************************************************************************** |
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48 * @attention |
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49 * |
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50 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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51 * |
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52 * Redistribution and use in source and binary forms, with or without modification, |
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53 * are permitted provided that the following conditions are met: |
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54 * 1. Redistributions of source code must retain the above copyright notice, |
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55 * this list of conditions and the following disclaimer. |
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56 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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57 * this list of conditions and the following disclaimer in the documentation |
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58 * and/or other materials provided with the distribution. |
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59 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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60 * may be used to endorse or promote products derived from this software |
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61 * without specific prior written permission. |
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62 * |
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63 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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64 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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65 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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66 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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67 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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68 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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69 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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70 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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71 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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72 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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73 * |
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74 ****************************************************************************** |
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75 */ |
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76 |
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77 /* Includes ------------------------------------------------------------------*/ |
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78 #include "stm32f4xx_hal.h" |
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79 |
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80 /** @addtogroup STM32F4xx_HAL_Driver |
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81 * @{ |
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82 */ |
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83 |
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84 /** @defgroup CEC CEC |
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85 * @brief HAL CEC module driver |
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86 * @{ |
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87 */ |
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88 #ifdef HAL_CEC_MODULE_ENABLED |
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89 |
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90 #if defined(STM32F446xx) |
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91 |
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92 /* Private typedef -----------------------------------------------------------*/ |
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93 /* Private define ------------------------------------------------------------*/ |
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94 /** @defgroup CEC_Private_Constants CEC Private Constants |
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95 * @{ |
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96 */ |
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97 /** |
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98 * @} |
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99 */ |
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100 |
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101 /* Private macro -------------------------------------------------------------*/ |
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102 /* Private variables ---------------------------------------------------------*/ |
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103 /* Private function prototypes -----------------------------------------------*/ |
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104 /** @defgroup CEC_Private_Functions CEC Private Functions |
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105 * @{ |
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106 */ |
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107 /** |
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108 * @} |
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109 */ |
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110 |
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111 /* Exported functions ---------------------------------------------------------*/ |
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112 |
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113 /** @defgroup CEC_Exported_Functions CEC Exported Functions |
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114 * @{ |
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115 */ |
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116 |
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117 /** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions |
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118 * @brief Initialization and Configuration functions |
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119 * |
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120 @verbatim |
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121 =============================================================================== |
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122 ##### Initialization and Configuration functions ##### |
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123 =============================================================================== |
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124 [..] |
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125 This subsection provides a set of functions allowing to initialize the CEC |
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126 (+) The following parameters need to be configured: |
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127 (++) SignalFreeTime |
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128 (++) Tolerance |
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129 (++) BRERxStop (RX stopped or not upon Bit Rising Error) |
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130 (++) BREErrorBitGen (Error-Bit generation in case of Bit Rising Error) |
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131 (++) LBPEErrorBitGen (Error-Bit generation in case of Long Bit Period Error) |
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132 (++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error) |
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133 (++) SignalFreeTimeOption (SFT Timer start definition) |
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134 (++) OwnAddress (CEC device address) |
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135 (++) ListenMode |
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136 |
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137 @endverbatim |
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138 * @{ |
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139 */ |
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140 |
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141 /** |
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142 * @brief Initializes the CEC mode according to the specified |
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143 * parameters in the CEC_InitTypeDef and creates the associated handle . |
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144 * @param hcec CEC handle |
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145 * @retval HAL status |
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146 */ |
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147 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec) |
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148 { |
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149 /* Check the CEC handle allocation */ |
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150 if((hcec == NULL) ||(hcec->Init.RxBuffer == NULL)) |
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151 { |
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152 return HAL_ERROR; |
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153 } |
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154 |
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155 /* Check the parameters */ |
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156 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance)); |
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157 assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime)); |
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158 assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance)); |
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159 assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop)); |
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160 assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen)); |
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161 assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen)); |
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162 assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen)); |
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163 assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption)); |
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164 assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode)); |
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165 assert_param(IS_CEC_OWN_ADDRESS(hcec->Init.OwnAddress)); |
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166 |
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167 if(hcec->gState == HAL_CEC_STATE_RESET) |
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168 { |
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169 /* Allocate lock resource and initialize it */ |
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170 hcec->Lock = HAL_UNLOCKED; |
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171 /* Init the low level hardware : GPIO, CLOCK */ |
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172 HAL_CEC_MspInit(hcec); |
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173 } |
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174 hcec->gState = HAL_CEC_STATE_BUSY; |
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175 |
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176 /* Disable the Peripheral */ |
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177 __HAL_CEC_DISABLE(hcec); |
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178 |
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179 /* Write to CEC Control Register */ |
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180 hcec->Instance->CFGR = hcec->Init.SignalFreeTime | hcec->Init.Tolerance | hcec->Init.BRERxStop|\ |
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181 hcec->Init.BREErrorBitGen | hcec->Init.LBPEErrorBitGen | hcec->Init.BroadcastMsgNoErrorBitGen |\ |
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182 hcec->Init.SignalFreeTimeOption |((uint32_t)(hcec->Init.OwnAddress)<<16U) |\ |
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183 hcec->Init.ListenMode; |
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184 |
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185 /* Enable the following CEC Transmission/Reception interrupts as |
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186 * well as the following CEC Transmission/Reception Errors interrupts |
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187 * Rx Byte Received IT |
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188 * End of Reception IT |
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189 * Rx overrun |
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190 * Rx bit rising error |
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191 * Rx short bit period error |
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192 * Rx long bit period error |
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193 * Rx missing acknowledge |
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194 * Tx Byte Request IT |
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195 * End of Transmission IT |
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196 * Tx Missing Acknowledge IT |
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197 * Tx-Error IT |
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198 * Tx-Buffer Underrun IT |
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199 * Tx arbitration lost */ |
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200 __HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR); |
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201 |
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202 /* Enable the CEC Peripheral */ |
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203 __HAL_CEC_ENABLE(hcec); |
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204 |
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205 hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
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206 hcec->gState = HAL_CEC_STATE_READY; |
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207 hcec->RxState = HAL_CEC_STATE_READY; |
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208 |
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209 return HAL_OK; |
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210 } |
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211 |
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212 /** |
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213 * @brief DeInitializes the CEC peripheral |
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214 * @param hcec CEC handle |
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215 * @retval HAL status |
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216 */ |
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217 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec) |
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218 { |
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219 /* Check the CEC handle allocation */ |
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220 if(hcec == NULL) |
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221 { |
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222 return HAL_ERROR; |
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223 } |
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224 |
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225 /* Check the parameters */ |
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226 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance)); |
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227 |
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228 hcec->gState = HAL_CEC_STATE_BUSY; |
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229 |
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230 /* DeInit the low level hardware */ |
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231 HAL_CEC_MspDeInit(hcec); |
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232 /* Disable the Peripheral */ |
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233 __HAL_CEC_DISABLE(hcec); |
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234 |
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235 /* Clear Flags */ |
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236 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXEND|CEC_FLAG_TXBR|CEC_FLAG_RXBR|CEC_FLAG_RXEND|CEC_ISR_ALL_ERROR); |
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237 |
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238 /* Disable the following CEC Transmission/Reception interrupts as |
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239 * well as the following CEC Transmission/Reception Errors interrupts |
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240 * Rx Byte Received IT |
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241 * End of Reception IT |
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242 * Rx overrun |
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243 * Rx bit rising error |
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244 * Rx short bit period error |
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245 * Rx long bit period error |
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246 * Rx missing acknowledge |
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247 * Tx Byte Request IT |
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248 * End of Transmission IT |
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249 * Tx Missing Acknowledge IT |
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250 * Tx-Error IT |
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251 * Tx-Buffer Underrun IT |
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252 * Tx arbitration lost */ |
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253 __HAL_CEC_DISABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR); |
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254 |
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255 hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
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256 hcec->gState = HAL_CEC_STATE_RESET; |
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257 hcec->RxState = HAL_CEC_STATE_RESET; |
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258 |
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259 /* Process Unlock */ |
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260 __HAL_UNLOCK(hcec); |
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261 |
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262 return HAL_OK; |
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263 } |
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264 |
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265 /** |
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266 * @brief Initializes the Own Address of the CEC device |
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267 * @param hcec CEC handle |
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268 * @param CEC_OwnAddress The CEC own address. |
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269 * @retval HAL status |
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270 */ |
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271 HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress) |
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272 { |
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273 /* Check the parameters */ |
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274 assert_param(IS_CEC_OWN_ADDRESS(CEC_OwnAddress)); |
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275 |
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276 if ((hcec->gState == HAL_CEC_STATE_READY) && (hcec->RxState == HAL_CEC_STATE_READY)) |
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277 { |
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278 /* Process Locked */ |
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279 __HAL_LOCK(hcec); |
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280 |
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281 hcec->gState = HAL_CEC_STATE_BUSY; |
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282 |
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283 /* Disable the Peripheral */ |
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284 __HAL_CEC_DISABLE(hcec); |
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285 |
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286 if(CEC_OwnAddress != CEC_OWN_ADDRESS_NONE) |
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287 { |
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288 hcec->Instance->CFGR |= ((uint32_t)CEC_OwnAddress<<16U); |
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289 } |
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290 else |
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291 { |
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292 hcec->Instance->CFGR &= ~(CEC_CFGR_OAR); |
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293 } |
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294 |
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295 hcec->gState = HAL_CEC_STATE_READY; |
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296 hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
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297 |
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298 /* Process Unlocked */ |
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299 __HAL_UNLOCK(hcec); |
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300 |
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301 /* Enable the Peripheral */ |
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302 __HAL_CEC_ENABLE(hcec); |
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303 |
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304 return HAL_OK; |
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305 } |
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306 else |
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307 { |
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308 return HAL_BUSY; |
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309 } |
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310 } |
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311 |
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312 /** |
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313 * @brief CEC MSP Init |
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314 * @param hcec CEC handle |
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315 * @retval None |
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316 */ |
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317 __weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec) |
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318 { |
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319 /* Prevent unused argument(s) compilation warning */ |
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320 UNUSED(hcec); |
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321 /* NOTE : This function should not be modified, when the callback is needed, |
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322 the HAL_CEC_MspInit can be implemented in the user file |
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323 */ |
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324 } |
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325 |
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326 /** |
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327 * @brief CEC MSP DeInit |
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328 * @param hcec CEC handle |
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329 * @retval None |
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330 */ |
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331 __weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec) |
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332 { |
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333 /* Prevent unused argument(s) compilation warning */ |
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334 UNUSED(hcec); |
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335 /* NOTE : This function should not be modified, when the callback is needed, |
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336 the HAL_CEC_MspDeInit can be implemented in the user file |
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337 */ |
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338 } |
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339 |
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340 /** |
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341 * @} |
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342 */ |
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343 |
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344 /** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions |
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345 * @brief CEC Transmit/Receive functions |
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346 * |
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347 @verbatim |
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348 =============================================================================== |
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349 ##### IO operation functions ##### |
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350 =============================================================================== |
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351 This subsection provides a set of functions allowing to manage the CEC data transfers. |
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352 |
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353 (#) The CEC handle must contain the initiator (TX side) and the destination (RX side) |
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354 logical addresses (4-bit long addresses, 0x0F for broadcast messages destination) |
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355 |
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356 (#) The communication is performed using Interrupts. |
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357 These API's return the HAL status. |
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358 The end of the data processing will be indicated through the |
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359 dedicated CEC IRQ when using Interrupt mode. |
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360 The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks |
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361 will be executed respectivelly at the end of the transmit or Receive process |
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362 The HAL_CEC_ErrorCallback()user callback will be executed when a communication |
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363 error is detected |
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364 |
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365 (#) API's with Interrupt are : |
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366 (+) HAL_CEC_Transmit_IT() |
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367 (+) HAL_CEC_IRQHandler() |
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368 |
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369 (#) A set of User Callbacks are provided: |
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370 (+) HAL_CEC_TxCpltCallback() |
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371 (+) HAL_CEC_RxCpltCallback() |
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372 (+) HAL_CEC_ErrorCallback() |
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373 |
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374 @endverbatim |
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375 * @{ |
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376 */ |
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377 |
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378 /** |
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379 * @brief Send data in interrupt mode |
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380 * @param hcec CEC handle |
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381 * @param InitiatorAddress Initiator logical address |
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382 * @param DestinationAddress destination logical address |
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383 * @param pData pointer to input byte data buffer |
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384 * @param Size amount of data to be sent in bytes (without counting the header). |
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385 * 0 means only the header is sent (ping operation). |
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386 * Maximum TX size is 15 bytes (1 opcode and up to 14 operands). |
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387 * @retval HAL status |
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388 */ |
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389 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size) |
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390 { |
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391 /* if the IP isn't already busy and if there is no previous transmission |
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392 already pending due to arbitration lost */ |
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393 if (hcec->gState == HAL_CEC_STATE_READY) |
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394 { |
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395 if((pData == NULL ) && (Size > 0U)) |
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396 { |
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397 return HAL_ERROR; |
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398 } |
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399 |
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400 assert_param(IS_CEC_ADDRESS(DestinationAddress)); |
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401 assert_param(IS_CEC_ADDRESS(InitiatorAddress)); |
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402 assert_param(IS_CEC_MSGSIZE(Size)); |
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403 |
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404 /* Process Locked */ |
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405 __HAL_LOCK(hcec); |
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406 hcec->pTxBuffPtr = pData; |
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407 hcec->gState = HAL_CEC_STATE_BUSY_TX; |
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408 hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
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409 |
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410 /* initialize the number of bytes to send, |
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411 * 0 means only one header is sent (ping operation) */ |
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412 hcec->TxXferCount = Size; |
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413 |
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414 /* in case of no payload (Size = 0), sender is only pinging the system; |
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415 Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */ |
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416 if (Size == 0U) |
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417 { |
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418 __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
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419 } |
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420 |
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421 /* send header block */ |
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422 hcec->Instance->TXDR = ((uint8_t)(InitiatorAddress << CEC_INITIATOR_LSB_POS) |(uint8_t) DestinationAddress); |
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423 /* Set TX Start of Message (TXSOM) bit */ |
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424 __HAL_CEC_FIRST_BYTE_TX_SET(hcec); |
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425 |
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426 /* Process Unlocked */ |
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427 __HAL_UNLOCK(hcec); |
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428 |
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429 return HAL_OK; |
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430 |
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431 } |
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432 else |
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433 { |
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434 return HAL_BUSY; |
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435 } |
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436 } |
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437 |
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438 /** |
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439 * @brief Get size of the received frame. |
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440 * @param hcec CEC handle |
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441 * @retval Frame size |
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442 */ |
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443 uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec) |
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444 { |
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445 return hcec->RxXferSize; |
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446 } |
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447 |
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448 /** |
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449 * @brief Change Rx Buffer. |
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450 * @param hcec CEC handle |
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451 * @param Rxbuffer Rx Buffer |
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452 * @note This function can be called only inside the HAL_CEC_RxCpltCallback() |
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453 * @retval Frame size |
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454 */ |
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455 void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer) |
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456 { |
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457 hcec->Init.RxBuffer = Rxbuffer; |
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458 } |
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459 |
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460 /** |
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461 * @brief This function handles CEC interrupt requests. |
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462 * @param hcec CEC handle |
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463 * @retval None |
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464 */ |
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465 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec) |
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466 { |
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467 |
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468 /* save interrupts register for further error or interrupts handling purposes */ |
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469 uint32_t reg = 0U; |
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470 reg = hcec->Instance->ISR; |
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471 |
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472 |
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473 /* ----------------------------Arbitration Lost Management----------------------------------*/ |
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474 /* CEC TX arbitration error interrupt occurred --------------------------------------*/ |
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475 if((reg & CEC_FLAG_ARBLST) != RESET) |
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476 { |
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477 hcec->ErrorCode = HAL_CEC_ERROR_ARBLST; |
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478 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST); |
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479 } |
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480 |
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481 /* ----------------------------Rx Management----------------------------------*/ |
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482 /* CEC RX byte received interrupt ---------------------------------------------------*/ |
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483 if((reg & CEC_FLAG_RXBR) != RESET) |
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484 { |
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485 /* reception is starting */ |
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486 hcec->RxState = HAL_CEC_STATE_BUSY_RX; |
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487 hcec->RxXferSize++; |
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488 /* read received byte */ |
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489 *hcec->Init.RxBuffer++ = hcec->Instance->RXDR; |
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490 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR); |
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491 } |
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492 |
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493 /* CEC RX end received interrupt ---------------------------------------------------*/ |
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494 if((reg & CEC_FLAG_RXEND) != RESET) |
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495 { |
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496 /* clear IT */ |
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497 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND); |
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498 |
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499 /* Rx process is completed, restore hcec->RxState to Ready */ |
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500 hcec->RxState = HAL_CEC_STATE_READY; |
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501 hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
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502 hcec->Init.RxBuffer -= hcec->RxXferSize; |
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503 HAL_CEC_RxCpltCallback(hcec, hcec->RxXferSize); |
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504 hcec->RxXferSize = 0U; |
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505 } |
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506 |
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507 /* ----------------------------Tx Management----------------------------------*/ |
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508 /* CEC TX byte request interrupt ------------------------------------------------*/ |
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509 if((reg & CEC_FLAG_TXBR) != RESET) |
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510 { |
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511 if (hcec->TxXferCount == 0U) |
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512 { |
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513 /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */ |
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514 __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
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515 hcec->Instance->TXDR = *hcec->pTxBuffPtr++; |
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516 } |
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517 else |
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518 { |
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519 hcec->Instance->TXDR = *hcec->pTxBuffPtr++; |
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520 hcec->TxXferCount--; |
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521 } |
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522 /* clear Tx-Byte request flag */ |
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523 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXBR); |
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524 } |
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525 |
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526 /* CEC TX end interrupt ------------------------------------------------*/ |
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527 if((reg & CEC_FLAG_TXEND) != RESET) |
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528 { |
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529 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND); |
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530 |
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531 /* Tx process is ended, restore hcec->gState to Ready */ |
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532 hcec->gState = HAL_CEC_STATE_READY; |
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533 /* Call the Process Unlocked before calling the Tx call back API to give the possibility to |
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534 start again the Transmission under the Tx call back API */ |
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535 __HAL_UNLOCK(hcec); |
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536 hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
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537 HAL_CEC_TxCpltCallback(hcec); |
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538 } |
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539 |
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540 /* ----------------------------Rx/Tx Error Management----------------------------------*/ |
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541 if ((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != 0U) |
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542 { |
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543 hcec->ErrorCode = reg; |
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544 __HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR|HAL_CEC_ERROR_BRE|CEC_FLAG_LBPE|CEC_FLAG_SBPE|HAL_CEC_ERROR_RXACKE|HAL_CEC_ERROR_TXUDR|HAL_CEC_ERROR_TXERR|HAL_CEC_ERROR_TXACKE); |
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545 |
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546 |
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547 if((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE)) != RESET) |
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548 { |
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549 hcec->Init.RxBuffer-=hcec->RxXferSize; |
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550 hcec->RxXferSize = 0U; |
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551 hcec->RxState = HAL_CEC_STATE_READY; |
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552 } |
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553 else if (((reg & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != RESET) && ((reg & CEC_ISR_ARBLST) == RESET)) |
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554 { |
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555 /* Set the CEC state ready to be able to start again the process */ |
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556 hcec->gState = HAL_CEC_STATE_READY; |
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557 } |
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558 |
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559 /* Error Call Back */ |
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560 HAL_CEC_ErrorCallback(hcec); |
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561 } |
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562 |
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563 } |
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564 |
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565 /** |
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566 * @brief Tx Transfer completed callback |
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567 * @param hcec CEC handle |
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568 * @retval None |
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569 */ |
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570 __weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec) |
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571 { |
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572 /* Prevent unused argument(s) compilation warning */ |
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573 UNUSED(hcec); |
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574 /* NOTE : This function should not be modified, when the callback is needed, |
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575 the HAL_CEC_TxCpltCallback can be implemented in the user file |
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576 */ |
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577 } |
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578 |
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579 /** |
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580 * @brief Rx Transfer completed callback |
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581 * @param hcec CEC handle |
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582 * @param RxFrameSize Size of frame |
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583 * @retval None |
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584 */ |
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585 __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize) |
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586 { |
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587 /* Prevent unused argument(s) compilation warning */ |
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588 UNUSED(hcec); |
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589 UNUSED(RxFrameSize); |
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590 /* NOTE : This function should not be modified, when the callback is needed, |
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591 the HAL_CEC_RxCpltCallback can be implemented in the user file |
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592 */ |
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593 } |
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594 |
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595 /** |
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596 * @brief CEC error callbacks |
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597 * @param hcec CEC handle |
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598 * @retval None |
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599 */ |
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600 __weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec) |
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601 { |
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602 /* Prevent unused argument(s) compilation warning */ |
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603 UNUSED(hcec); |
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604 /* NOTE : This function should not be modified, when the callback is needed, |
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605 the HAL_CEC_ErrorCallback can be implemented in the user file |
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606 */ |
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607 } |
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608 /** |
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609 * @} |
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610 */ |
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611 |
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612 /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control function |
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613 * @brief CEC control functions |
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614 * |
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615 @verbatim |
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616 =============================================================================== |
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617 ##### Peripheral Control function ##### |
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618 =============================================================================== |
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619 [..] |
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620 This subsection provides a set of functions allowing to control the CEC. |
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621 (+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral. |
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622 (+) HAL_CEC_GetError() API can be helpful to check in run-time the error of the CEC peripheral. |
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623 @endverbatim |
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624 * @{ |
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625 */ |
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626 /** |
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627 * @brief return the CEC state |
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628 * @param hcec pointer to a CEC_HandleTypeDef structure that contains |
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629 * the configuration information for the specified CEC module. |
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630 * @retval HAL state |
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631 */ |
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632 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec) |
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633 { |
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634 uint32_t temp1 = 0x00U, temp2 = 0x00U; |
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635 temp1 = hcec->gState; |
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636 temp2 = hcec->RxState; |
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637 |
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638 return (HAL_CEC_StateTypeDef)(temp1 | temp2); |
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639 } |
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640 |
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641 /** |
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642 * @brief Return the CEC error code |
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643 * @param hcec pointer to a CEC_HandleTypeDef structure that contains |
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644 * the configuration information for the specified CEC. |
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645 * @retval CEC Error Code |
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646 */ |
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647 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec) |
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648 { |
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649 return hcec->ErrorCode; |
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650 } |
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651 |
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652 /** |
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653 * @} |
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654 */ |
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655 |
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656 /** |
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657 * @} |
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658 */ |
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659 |
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660 #endif /* STM32F446xx */ |
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661 |
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662 #endif /* HAL_CEC_MODULE_ENABLED */ |
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663 /** |
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664 * @} |
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665 */ |
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666 |
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667 /** |
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668 * @} |
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669 */ |
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670 |
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Added current STM32 standandard libraries in version independend folder structure
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671 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |