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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_pwr.h
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4 * @author MCD Application Team
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5 * @version V1.2.0
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6 * @date 26-December-2014
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7 * @brief Header file of PWR HAL module.
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8 ******************************************************************************
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9 * @attention
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10 *
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11 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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12 *
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13 * Redistribution and use in source and binary forms, with or without modification,
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14 * are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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17 * 2. Redistributions in binary form must reproduce the above copyright notice,
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18 * this list of conditions and the following disclaimer in the documentation
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19 * and/or other materials provided with the distribution.
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20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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21 * may be used to endorse or promote products derived from this software
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22 * without specific prior written permission.
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23 *
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24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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34 *
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35 ******************************************************************************
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36 */
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37
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38 /* Define to prevent recursive inclusion -------------------------------------*/
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39 #ifndef __STM32F4xx_HAL_PWR_H
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40 #define __STM32F4xx_HAL_PWR_H
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41
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42 #ifdef __cplusplus
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43 extern "C" {
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44 #endif
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45
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46 /* Includes ------------------------------------------------------------------*/
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47 #include "stm32f4xx_hal_def.h"
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48
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49 /** @addtogroup STM32F4xx_HAL_Driver
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50 * @{
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51 */
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52
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53 /** @addtogroup PWR
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54 * @{
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55 */
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56
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57 /* Exported types ------------------------------------------------------------*/
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58
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59 /** @defgroup PWR_Exported_Types PWR Exported Types
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60 * @{
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61 */
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62
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63 /**
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64 * @brief PWR PVD configuration structure definition
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65 */
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66 typedef struct
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67 {
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68 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
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69 This parameter can be a value of @ref PWR_PVD_detection_level */
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70
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71 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
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72 This parameter can be a value of @ref PWR_PVD_Mode */
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73 }PWR_PVDTypeDef;
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74
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75 /**
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76 * @}
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77 */
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78
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79 /* Exported constants --------------------------------------------------------*/
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80 /** @defgroup PWR_Exported_Constants PWR Exported Constants
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81 * @{
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82 */
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83
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84 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
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85 * @{
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86 */
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87 #define PWR_WAKEUP_PIN1 PWR_CSR_EWUP
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88 /**
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89 * @}
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90 */
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91
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92 /** @defgroup PWR_PVD_detection_level PWR PVD detection level
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93 * @{
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94 */
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95 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
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96 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
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97 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
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98 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
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99 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
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100 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
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101 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
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102 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage
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103 (Compare internally to VREFINT) */
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104 /**
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105 * @}
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106 */
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107
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108 /** @defgroup PWR_PVD_Mode PWR PVD Mode
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109 * @{
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110 */
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111 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */
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112 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */
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113 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */
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114 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
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115 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */
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116 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */
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117 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */
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118 /**
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119 * @}
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120 */
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121
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122
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123 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode
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124 * @{
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125 */
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126 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000)
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127 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
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128 /**
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129 * @}
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130 */
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131
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132 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
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133 * @{
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134 */
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135 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
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136 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
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137 /**
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138 * @}
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139 */
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140
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141 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
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142 * @{
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143 */
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144 #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
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145 #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
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146 /**
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147 * @}
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148 */
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149
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150 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale
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151 * @{
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152 */
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153 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS
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154 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1
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155 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS_0
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156 /**
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157 * @}
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158 */
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159
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160 /** @defgroup PWR_Flag PWR Flag
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161 * @{
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162 */
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163 #define PWR_FLAG_WU PWR_CSR_WUF
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164 #define PWR_FLAG_SB PWR_CSR_SBF
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165 #define PWR_FLAG_PVDO PWR_CSR_PVDO
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166 #define PWR_FLAG_BRR PWR_CSR_BRR
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167 #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
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168 /**
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169 * @}
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170 */
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171
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172 /**
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173 * @}
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174 */
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175
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176 /* Exported macro ------------------------------------------------------------*/
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177 /** @defgroup PWR_Exported_Macro PWR Exported Macro
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178 * @{
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179 */
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180
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181 /** @brief macros configure the main internal regulator output voltage.
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182 * @param __REGULATOR__: specifies the regulator output voltage to achieve
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183 * a tradeoff between performance and power consumption when the device does
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184 * not operate at the maximum frequency (refer to the datasheets for more details).
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185 * This parameter can be one of the following values:
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186 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
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187 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
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188 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
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189 * @retval None
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190 */
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191 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
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192
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193 /** @brief Check PWR flag is set or not.
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194 * @param __FLAG__: specifies the flag to check.
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195 * This parameter can be one of the following values:
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196 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
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197 * was received from the WKUP pin or from the RTC alarm (Alarm A
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198 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
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199 * An additional wakeup event is detected if the WKUP pin is enabled
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200 * (by setting the EWUP bit) when the WKUP pin level is already high.
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201 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
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202 * resumed from StandBy mode.
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203 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
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204 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
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205 * For this reason, this bit is equal to 0 after Standby or reset
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206 * until the PVDE bit is set.
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207 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
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208 * when the device wakes up from Standby mode or by a system reset
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209 * or power reset.
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210 * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
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211 * scaling output selection is ready.
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212 * @retval The new state of __FLAG__ (TRUE or FALSE).
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213 */
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214 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
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215
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216 /** @brief Clear the PWR's pending flags.
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217 * @param __FLAG__: specifies the flag to clear.
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218 * This parameter can be one of the following values:
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219 * @arg PWR_FLAG_WU: Wake Up flag
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220 * @arg PWR_FLAG_SB: StandBy flag
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221 */
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222 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2)
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223
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224 /**
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225 * @brief Enable the PVD Exti Line 16.
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226 * @retval None.
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227 */
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228 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
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229
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230 /**
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231 * @brief Disable the PVD EXTI Line 16.
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232 * @retval None.
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233 */
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234 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
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235
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236 /**
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237 * @brief Enable event on PVD Exti Line 16.
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238 * @retval None.
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239 */
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240 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
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241
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242 /**
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243 * @brief Disable event on PVD Exti Line 16.
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244 * @retval None.
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245 */
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246 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
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247
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248 /**
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249 * @brief Enable the PVD Extended Interrupt Rising Trigger.
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250 * @retval None.
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251 */
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252 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
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253
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254 /**
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255 * @brief Disable the PVD Extended Interrupt Rising Trigger.
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256 * @retval None.
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257 */
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258 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
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259
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260 /**
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261 * @brief Enable the PVD Extended Interrupt Falling Trigger.
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262 * @retval None.
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263 */
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264 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
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265
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266
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267 /**
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268 * @brief Disable the PVD Extended Interrupt Falling Trigger.
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269 * @retval None.
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270 */
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271 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
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272
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273
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274 /**
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275 * @brief PVD EXTI line configuration: set rising & falling edge trigger.
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276 * @retval None.
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277 */
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278 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
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279
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280 /**
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281 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
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282 * This parameter can be:
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283 * @retval None.
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284 */
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285 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
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286
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287 /**
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288 * @brief checks whether the specified PVD Exti interrupt flag is set or not.
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289 * @retval EXTI PVD Line Status.
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290 */
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291 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
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292
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293 /**
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294 * @brief Clear the PVD Exti flag.
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295 * @retval None.
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296 */
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297 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
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298
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299 /**
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300 * @brief Generates a Software interrupt on PVD EXTI line.
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301 * @retval None
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302 */
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303 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
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304
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305 /**
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306 * @}
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307 */
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308
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309 /* Include PWR HAL Extension module */
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310 #include "stm32f4xx_hal_pwr_ex.h"
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311
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312 /* Exported functions --------------------------------------------------------*/
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313 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
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314 * @{
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315 */
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316
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317 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
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318 * @{
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319 */
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320 /* Initialization and de-initialization functions *****************************/
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321 void HAL_PWR_DeInit(void);
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322 void HAL_PWR_EnableBkUpAccess(void);
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323 void HAL_PWR_DisableBkUpAccess(void);
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324 /**
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325 * @}
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326 */
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327
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328 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
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329 * @{
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330 */
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331 /* Peripheral Control functions **********************************************/
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332 /* PVD configuration */
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333 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
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334 void HAL_PWR_EnablePVD(void);
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335 void HAL_PWR_DisablePVD(void);
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336
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337 /* WakeUp pins configuration */
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338 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
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339 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
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340
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341 /* Low Power modes entry */
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342 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
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343 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
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344 void HAL_PWR_EnterSTANDBYMode(void);
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345
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346 /* Power PVD IRQ Handler */
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347 void HAL_PWR_PVD_IRQHandler(void);
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348 void HAL_PWR_PVDCallback(void);
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349
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350 /* Cortex System Control functions *******************************************/
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351 void HAL_PWR_EnableSleepOnExit(void);
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352 void HAL_PWR_DisableSleepOnExit(void);
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353 void HAL_PWR_EnableSEVOnPend(void);
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354 void HAL_PWR_DisableSEVOnPend(void);
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355 /**
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356 * @}
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357 */
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358
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359 /**
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360 * @}
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361 */
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362
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363 /* Private types -------------------------------------------------------------*/
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364 /* Private variables ---------------------------------------------------------*/
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365 /* Private constants ---------------------------------------------------------*/
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366 /** @defgroup PWR_Private_Constants PWR Private Constants
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367 * @{
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368 */
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369
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370 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line
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371 * @{
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372 */
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373 #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
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374 /**
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375 * @}
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376 */
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377
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378 /** @defgroup PWR_register_alias_address PWR Register alias address
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379 * @{
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380 */
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381 /* ------------- PWR registers bit address in the alias region ---------------*/
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382 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
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383 #define PWR_CR_OFFSET 0x00
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384 #define PWR_CSR_OFFSET 0x04
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385 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
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386 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
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387 /**
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388 * @}
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389 */
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390
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391 /** @defgroup PWR_CR_register_alias PWR CR Register alias address
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392 * @{
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393 */
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394 /* --- CR Register ---*/
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395 /* Alias word address of DBP bit */
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396 #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP)
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397 #define CR_DBP_BB (PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (DBP_BIT_NUMBER * 4))
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398
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399 /* Alias word address of PVDE bit */
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400 #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE)
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401 #define CR_PVDE_BB (PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (PVDE_BIT_NUMBER * 4))
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402
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403 /* Alias word address of PMODE bit */
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404 #define PMODE_BIT_NUMBER POSITION_VAL(PWR_CR_PMODE)
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405 #define CR_PMODE_BB (PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (PMODE_BIT_NUMBER * 4))
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406 /**
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407 * @}
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408 */
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409
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410 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
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411 * @{
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412 */
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413 /* --- CSR Register ---*/
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414 /* Alias word address of EWUP bit */
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415 #define EWUP_BIT_NUMBER POSITION_VAL(PWR_CSR_EWUP)
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416 #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (EWUP_BIT_NUMBER * 4))
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417 /**
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418 * @}
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419 */
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420
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421 /**
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422 * @}
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423 */
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424 /* Private macros ------------------------------------------------------------*/
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425 /** @defgroup PWR_Private_Macros PWR Private Macros
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426 * @{
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427 */
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428
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429 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters
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430 * @{
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431 */
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432 #define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1)
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433 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
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434 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
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435 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
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436 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
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437 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
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438 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
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439 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
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440 ((MODE) == PWR_PVD_MODE_NORMAL))
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441 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
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442 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
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443 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
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444 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
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445 #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
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446 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
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447 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
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448
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449 /**
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450 * @}
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451 */
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452
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453 /**
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454 * @}
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455 */
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456
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457 /**
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458 * @}
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459 */
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460
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461 /**
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462 * @}
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463 */
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464
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465 #ifdef __cplusplus
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466 }
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467 #endif
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468
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469
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470 #endif /* __STM32F4xx_HAL_PWR_H */
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471
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472 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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