annotate Documentations/OSTC4_CPU1_F429.ioc @ 623:ba83a8ef9bad

Improvment frame Handling: In previous version, especially during fast menu operations, from time to time a flicker (in case of cyclic updated views) or corrupted menus appeared. Possible root cause is a interferance in the chain: refresh display (~100ms) => release frame (in parallel to) provide frame (~45ms) => clear frame (~45ms). to improve the behaviour the clear frame loop is not iterated until all bufferes are cleared (before one buffer every~45ms). getFrame() does now iterate through all frame buffers instead reusing the first possible (to avoid ghoust views and to provide more time to housekeeping function for cleanup)
author Ideenmodellierer
date Sun, 07 Feb 2021 22:04:43 +0100
parents 7d1b61176708
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
1 #MicroXplorer Configuration settings - do not modify
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
2 #Fri May 22 13:40:39 CEST 2015
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
3 File.Version=5
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
4 KeepUserPlacement=false
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
5 Mcu.Family=STM32F4
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
6 Mcu.IP0=DMA2D
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
7 Mcu.IP1=FMC
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
8 Mcu.IP10=SPI5
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
9 Mcu.IP11=SYS
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
10 Mcu.IP12=USART1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
11 Mcu.IP2=I2C1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
12 Mcu.IP3=LTDC
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
13 Mcu.IP4=NVIC
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
14 Mcu.IP5=RCC
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
15 Mcu.IP6=RTC
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
16 Mcu.IP7=SPI1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
17 Mcu.IP8=SPI2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
18 Mcu.IP9=SPI3
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
19 Mcu.IPNb=13
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
20 Mcu.Name=STM32F429I(E-G-I)Tx
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
21 Mcu.Package=LQFP176
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
22 Mcu.Pin0=PE4
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
23 Mcu.Pin1=PE5
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
24 Mcu.Pin10=PF3
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
25 Mcu.Pin11=PF4
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
26 Mcu.Pin12=PF5
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
27 Mcu.Pin13=PF6
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
28 Mcu.Pin14=PF7
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
29 Mcu.Pin15=PF8
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
30 Mcu.Pin16=PF9
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
31 Mcu.Pin17=PF10
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
32 Mcu.Pin18=PH0/OSC_IN
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
33 Mcu.Pin19=PH1/OSC_OUT
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
34 Mcu.Pin2=PE6
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
35 Mcu.Pin20=PC0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
36 Mcu.Pin21=PC2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
37 Mcu.Pin22=PC3
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
38 Mcu.Pin23=PA0/WKUP
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
39 Mcu.Pin24=PH2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
40 Mcu.Pin25=PH3
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
41 Mcu.Pin26=PA3
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
42 Mcu.Pin27=PA4
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
43 Mcu.Pin28=PA5
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
44 Mcu.Pin29=PA6
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
45 Mcu.Pin3=PC14/OSC32_IN
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
46 Mcu.Pin30=PA7
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
47 Mcu.Pin31=PB0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
48 Mcu.Pin32=PB1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
49 Mcu.Pin33=PF11
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
50 Mcu.Pin34=PF12
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
51 Mcu.Pin35=PF13
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
52 Mcu.Pin36=PF14
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
53 Mcu.Pin37=PF15
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
54 Mcu.Pin38=PG0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
55 Mcu.Pin39=PG1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
56 Mcu.Pin4=PC15/OSC32_OUT
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
57 Mcu.Pin40=PE7
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
58 Mcu.Pin41=PE8
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
59 Mcu.Pin42=PE9
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
60 Mcu.Pin43=PE10
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
61 Mcu.Pin44=PE11
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
62 Mcu.Pin45=PE12
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
63 Mcu.Pin46=PE13
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
64 Mcu.Pin47=PE14
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
65 Mcu.Pin48=PE15
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
66 Mcu.Pin49=PB10
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
67 Mcu.Pin5=PI9
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
68 Mcu.Pin50=PB11
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
69 Mcu.Pin51=PH8
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
70 Mcu.Pin52=PH10
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
71 Mcu.Pin53=PH11
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
72 Mcu.Pin54=PB12
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
73 Mcu.Pin55=PB15
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
74 Mcu.Pin56=PD8
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
75 Mcu.Pin57=PD9
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
76 Mcu.Pin58=PD10
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
77 Mcu.Pin59=PD14
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
78 Mcu.Pin6=PI10
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
79 Mcu.Pin60=PD15
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
80 Mcu.Pin61=PG4
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
81 Mcu.Pin62=PG5
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
82 Mcu.Pin63=PG6
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
83 Mcu.Pin64=PG7
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
84 Mcu.Pin65=PG8
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
85 Mcu.Pin66=PC7
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
86 Mcu.Pin67=PA10
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
87 Mcu.Pin68=PA13
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
88 Mcu.Pin69=PH13
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
89 Mcu.Pin7=PF0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
90 Mcu.Pin70=PH14
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
91 Mcu.Pin71=PH15
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
92 Mcu.Pin72=PI2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
93 Mcu.Pin73=PI3
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
94 Mcu.Pin74=PA14
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
95 Mcu.Pin75=PA15
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
96 Mcu.Pin76=PC10
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
97 Mcu.Pin77=PC11
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
98 Mcu.Pin78=PC12
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
99 Mcu.Pin79=PD0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
100 Mcu.Pin8=PF1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
101 Mcu.Pin80=PD1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
102 Mcu.Pin81=PD3
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
103 Mcu.Pin82=PD6
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
104 Mcu.Pin83=PG11
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
105 Mcu.Pin84=PG12
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
106 Mcu.Pin85=PG15
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
107 Mcu.Pin86=PB3
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
108 Mcu.Pin87=PB6
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
109 Mcu.Pin88=PB7
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
110 Mcu.Pin89=PB8
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
111 Mcu.Pin9=PF2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
112 Mcu.Pin90=PB9
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
113 Mcu.Pin91=PE0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
114 Mcu.Pin92=PE1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
115 Mcu.Pin93=PI4
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
116 Mcu.Pin94=PI6
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
117 Mcu.Pin95=VP_DMA2D_VS_DMA2D
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
118 Mcu.Pin96=VP_RTC_VS_RTC_Alarm_A_Intern
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
119 Mcu.PinsNb=97
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
120 Mcu.UserName=STM32F429IITx
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
121 MxCube.Version=4.7.1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
122 MxDb.Version=DB.4.0.71
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
123 NVIC.PriorityGroup=NVIC_PRIORITYGROUP_2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
124 NVIC.SysTick_IRQn=true\:0\:0\:true
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
125 PA0/WKUP.Mode=SYS-WakeUp
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
126 PA0/WKUP.Signal=SYS_WKUP
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
127 PA10.Mode=Asynchronous
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
128 PA10.Signal=USART1_RX
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
129 PA13.Mode=Trace-Asynchronous_SW
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
130 PA13.Signal=SYS_JTMS-SWDIO
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
131 PA14.Mode=Trace-Asynchronous_SW
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
132 PA14.Signal=SYS_JTCK-SWCLK
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
133 PA15.Mode=NSS_Signal_Hard
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
134 PA15.Signal=SPI3_NSS
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
135 PA3.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
136 PA3.Signal=LTDC_B5
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
137 PA4.Mode=NSS_Signal_Hard
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
138 PA4.Signal=SPI1_NSS
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
139 PA5.Mode=Full_Duplex_Master
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
140 PA5.Signal=SPI1_SCK
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
141 PA6.Mode=Full_Duplex_Master
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
142 PA6.Signal=SPI1_MISO
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
143 PA7.Mode=Full_Duplex_Master
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
144 PA7.Signal=SPI1_MOSI
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
145 PB0.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
146 PB0.Signal=LTDC_R3
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
147 PB1.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
148 PB1.Signal=LTDC_R6
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
149 PB10.Mode=Full_Duplex_Master
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
150 PB10.Signal=SPI2_SCK
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
151 PB11.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
152 PB11.Signal=LTDC_G5
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
153 PB12.Mode=NSS_Signal_Hard
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
154 PB12.Signal=SPI2_NSS
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
155 PB15.GPIOParameters=GPIO_Label
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
156 PB15.GPIO_Label=ALLES_OK_OUTPUT
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
157 PB15.Locked=true
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
158 PB15.Signal=GPIO_Output
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
159 PB3.Mode=Trace-Asynchronous_SW
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
160 PB3.Signal=SYS_JTDO-SWO
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
161 PB6.Mode=Asynchronous
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
162 PB6.Signal=USART1_TX
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
163 PB7.Mode=I2C
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
164 PB7.Signal=I2C1_SDA
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
165 PB8.Mode=I2C
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
166 PB8.Signal=I2C1_SCL
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
167 PB9.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
168 PB9.Signal=LTDC_B7
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
169 PC0.Signal=FMC_SDNWE
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
170 PC10.Mode=Full_Duplex_Master
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
171 PC10.Signal=SPI3_SCK
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
172 PC11.Mode=Full_Duplex_Master
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
173 PC11.Signal=SPI3_MISO
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
174 PC12.Mode=Full_Duplex_Master
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
175 PC12.Signal=SPI3_MOSI
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
176 PC14/OSC32_IN.Mode=LSE-External-Oscillator
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
177 PC14/OSC32_IN.Signal=RCC_OSC32_IN
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
178 PC15/OSC32_OUT.Mode=LSE-External-Oscillator
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
179 PC15/OSC32_OUT.Signal=RCC_OSC32_OUT
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
180 PC2.Mode=SdramChipSelect1_2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
181 PC2.Signal=FMC_SDNE0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
182 PC3.Mode=SdramChipSelect1_2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
183 PC3.Signal=FMC_SDCKE0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
184 PC7.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
185 PC7.Signal=LTDC_G6
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
186 PCC.Checker=false
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
187 PCC.Family=STM32F4
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
188 PCC.MCU=STM32F429I(E-G-I)Tx
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
189 PCC.MXVersion=4.7.1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
190 PCC.PartNumber=STM32F429IITx
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
191 PCC.Seq0=0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
192 PCC.SubFamily=STM32F429/439
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
193 PCC.Temperature=25
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
194 PCC.Vdd=1.8
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
195 PD0.Signal=FMC_D2_DA2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
196 PD1.Signal=FMC_D3_DA3
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
197 PD10.Signal=FMC_D15_DA15
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
198 PD14.Signal=FMC_D0_DA0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
199 PD15.Signal=FMC_D1_DA1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
200 PD3.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
201 PD3.Signal=LTDC_G7
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
202 PD6.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
203 PD6.Signal=LTDC_B2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
204 PD8.Signal=FMC_D13_DA13
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
205 PD9.Signal=FMC_D14_DA14
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
206 PE0.Signal=FMC_NBL0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
207 PE1.Signal=FMC_NBL1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
208 PE10.Signal=FMC_D7_DA7
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
209 PE11.Signal=FMC_D8_DA8
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
210 PE12.Signal=FMC_D9_DA9
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
211 PE13.Signal=FMC_D10_DA10
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
212 PE14.Signal=FMC_D11_DA11
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
213 PE15.Signal=FMC_D12_DA12
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
214 PE4.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
215 PE4.Signal=LTDC_B0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
216 PE5.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
217 PE5.Signal=LTDC_G0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
218 PE6.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
219 PE6.Signal=LTDC_G1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
220 PE7.Signal=FMC_D4_DA4
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
221 PE8.Signal=FMC_D5_DA5
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
222 PE9.Signal=FMC_D6_DA6
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
223 PF0.Signal=FMC_A0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
224 PF1.Signal=FMC_A1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
225 PF10.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
226 PF10.Signal=LTDC_DE
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
227 PF11.Signal=FMC_SDNRAS
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
228 PF12.Signal=FMC_A6
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
229 PF13.Signal=FMC_A7
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
230 PF14.Signal=FMC_A8
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
231 PF15.Signal=FMC_A9
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
232 PF2.Signal=FMC_A2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
233 PF3.Signal=FMC_A3
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
234 PF4.Signal=FMC_A4
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
235 PF5.Signal=FMC_A5
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
236 PF6.Mode=NSS_Signal_Hard
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
237 PF6.Signal=SPI5_NSS
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
238 PF7.Mode=Full_Duplex_Master
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
239 PF7.Signal=SPI5_SCK
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
240 PF8.Mode=Full_Duplex_Master
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
241 PF8.Signal=SPI5_MISO
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
242 PF9.Mode=Full_Duplex_Master
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
243 PF9.Signal=SPI5_MOSI
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
244 PG0.Signal=FMC_A10
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
245 PG1.Signal=FMC_A11
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
246 PG11.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
247 PG11.Signal=LTDC_B3
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
248 PG12.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
249 PG12.Signal=LTDC_B1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
250 PG15.Signal=FMC_SDNCAS
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
251 PG4.Signal=FMC_A14_BA0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
252 PG5.Signal=FMC_A15_BA1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
253 PG6.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
254 PG6.Signal=LTDC_R7
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
255 PG7.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
256 PG7.Signal=LTDC_CLK
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
257 PG8.Signal=FMC_SDCLK
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
258 PH0/OSC_IN.Mode=HSE-External-Oscillator
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
259 PH0/OSC_IN.Signal=RCC_OSC_IN
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
260 PH1/OSC_OUT.Mode=HSE-External-Oscillator
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
261 PH1/OSC_OUT.Signal=RCC_OSC_OUT
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
262 PH10.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
263 PH10.Signal=LTDC_R4
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
264 PH11.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
265 PH11.Signal=LTDC_R5
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
266 PH13.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
267 PH13.Signal=LTDC_G2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
268 PH14.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
269 PH14.Signal=LTDC_G3
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
270 PH15.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
271 PH15.Signal=LTDC_G4
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
272 PH2.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
273 PH2.Signal=LTDC_R0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
274 PH3.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
275 PH3.Signal=LTDC_R1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
276 PH8.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
277 PH8.Signal=LTDC_R2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
278 PI10.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
279 PI10.Signal=LTDC_HSYNC
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
280 PI2.Mode=Full_Duplex_Master
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
281 PI2.Signal=SPI2_MISO
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
282 PI3.Mode=Full_Duplex_Master
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
283 PI3.Signal=SPI2_MOSI
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
284 PI4.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
285 PI4.Signal=LTDC_B4
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
286 PI6.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
287 PI6.Signal=LTDC_B6
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
288 PI9.Mode=RGB888
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
289 PI9.Signal=LTDC_VSYNC
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
290 ProjectManager.AskForMigrate=true
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
291 ProjectManager.BackupPrevious=false
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
292 ProjectManager.CompilerOptimize=2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
293 ProjectManager.ComputerToolchain=false
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
294 ProjectManager.CoupleFile=false
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
295 ProjectManager.DeletePrevious=false
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
296 ProjectManager.DeviceId=STM32F429IITx
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
297 ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.5.0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
298 ProjectManager.FreePins=true
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
299 ProjectManager.HalAssertFull=false
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
300 ProjectManager.KeepUserCode=false
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
301 ProjectManager.LastFirmware=true
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
302 ProjectManager.LibraryCopy=0
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
303 ProjectManager.ProjectBuild=false
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
304 ProjectManager.ProjectFileName=OSTC4.ioc
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
305 ProjectManager.ProjectName=OSTC4
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
306 ProjectManager.TargetToolchain=MDK-ARM 4.73
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
307 ProjectManager.ToolChainLocation=
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
308 RCC.48MHZClocksFreq_Value=48000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
309 RCC.AHBFreq_Value=168000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
310 RCC.APB1CLKDivider=RCC_HCLK_DIV4
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
311 RCC.APB1Freq_Value=42000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
312 RCC.APB1TimFreq_Value=84000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
313 RCC.APB2CLKDivider=RCC_HCLK_DIV2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
314 RCC.APB2Freq_Value=84000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
315 RCC.APB2TimFreq_Value=168000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
316 RCC.CortexFreq_Value=21000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
317 RCC.EthernetFreq_Value=168000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
318 RCC.FCLKCortexFreq_Value=168000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
319 RCC.FamilyName=M
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
320 RCC.HCLKFreq_Value=168000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
321 RCC.HSE_VALUE=8000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
322 RCC.HSI_VALUE=16000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
323 RCC.I2SClocksFreq_Value=153600000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
324 RCC.IPParameters=PLLSource,LSI_VALUE,APB1TimFreq_Value,VcooutputI2SQ,SAI_AClocksFreq_Value,APB2Freq_Value,MCO2PinFreq_Value,APB1CLKDivider,PLLSourceVirtualString,FCLKCortexFreq_Value,RCC_RTC_Clock_SourceVirtual,48MHZClocksFreq_Value,AHBFreq_Value,VCOInputFreq_Value,PLLSourceVirtual,I2SClocksFreq_Value,VCOSAIOutputFreq_Value,SYSCLKFreq_VALUE,PLLQ,SYSCLKSource,LSE_VALUE,HSE_VALUE,HSI_VALUE,LCDTFTFreq_Value,VCOSAIOutputFreq_ValueQ,VCOI2SOutputFreq_Value,VCOSAIOutputFreq_ValueR,PLLCLKFreq_Value,PLLSAIN,RTCFreq_Value,VDD_VALUE,FamilyName,HCLKFreq_Value,EthernetFreq_Value,APB2CLKDivider,PLLM,PLLN,VCOOutputFreq_Value,SAI_BClocksFreq_Value,VcooutputI2S,CortexFreq_Value,APB1Freq_Value,RCC_RTC_Clock_Source_FROM_HSE,RTCHSEDivFreq_Value,APB2TimFreq_Value
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
325 RCC.LCDTFTFreq_Value=30800000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
326 RCC.LSE_VALUE=32768
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
327 RCC.LSI_VALUE=32000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
328 RCC.MCO2PinFreq_Value=168000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
329 RCC.PLLCLKFreq_Value=168000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
330 RCC.PLLM=5
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
331 RCC.PLLN=210
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
332 RCC.PLLQ=7
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
333 RCC.PLLSAIN=77
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
334 RCC.PLLSource=RCC_PLLSOURCE_HSE
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
335 RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
336 RCC.PLLSourceVirtualString=RCC_PLLSOURCE_HSE
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
337 RCC.RCC_RTC_Clock_SourceVirtual=RCC_RTCCLKSOURCE_LSE
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
338 RCC.RCC_RTC_Clock_Source_FROM_HSE=RCC_RTCCLKSOURCE_HSE_DIV25
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
339 RCC.RTCFreq_Value=32768
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
340 RCC.RTCHSEDivFreq_Value=320000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
341 RCC.SAI_AClocksFreq_Value=30800000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
342 RCC.SAI_BClocksFreq_Value=30800000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
343 RCC.SYSCLKFreq_VALUE=168000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
344 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
345 RCC.VCOI2SOutputFreq_Value=307200000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
346 RCC.VCOInputFreq_Value=1600000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
347 RCC.VCOOutputFreq_Value=336000000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
348 RCC.VCOSAIOutputFreq_Value=123200000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
349 RCC.VCOSAIOutputFreq_ValueQ=30800000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
350 RCC.VCOSAIOutputFreq_ValueR=61600000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
351 RCC.VDD_VALUE=1.8
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
352 RCC.VcooutputI2S=153600000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
353 RCC.VcooutputI2SQ=153600000
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
354 SH.FMC_A0.0=FMC_A0,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
355 SH.FMC_A0.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
356 SH.FMC_A1.0=FMC_A1,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
357 SH.FMC_A1.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
358 SH.FMC_A10.0=FMC_A10,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
359 SH.FMC_A10.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
360 SH.FMC_A11.0=FMC_A11,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
361 SH.FMC_A11.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
362 SH.FMC_A14_BA0.0=FMC_BA0,FourSdramBanks2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
363 SH.FMC_A14_BA0.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
364 SH.FMC_A15_BA1.0=FMC_BA1,FourSdramBanks2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
365 SH.FMC_A15_BA1.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
366 SH.FMC_A2.0=FMC_A2,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
367 SH.FMC_A2.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
368 SH.FMC_A3.0=FMC_A3,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
369 SH.FMC_A3.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
370 SH.FMC_A4.0=FMC_A4,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
371 SH.FMC_A4.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
372 SH.FMC_A5.0=FMC_A5,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
373 SH.FMC_A5.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
374 SH.FMC_A6.0=FMC_A6,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
375 SH.FMC_A6.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
376 SH.FMC_A7.0=FMC_A7,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
377 SH.FMC_A7.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
378 SH.FMC_A8.0=FMC_A8,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
379 SH.FMC_A8.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
380 SH.FMC_A9.0=FMC_A9,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
381 SH.FMC_A9.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
382 SH.FMC_D0_DA0.0=FMC_D0,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
383 SH.FMC_D0_DA0.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
384 SH.FMC_D10_DA10.0=FMC_D10,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
385 SH.FMC_D10_DA10.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
386 SH.FMC_D11_DA11.0=FMC_D11,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
387 SH.FMC_D11_DA11.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
388 SH.FMC_D12_DA12.0=FMC_D12,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
389 SH.FMC_D12_DA12.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
390 SH.FMC_D13_DA13.0=FMC_D13,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
391 SH.FMC_D13_DA13.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
392 SH.FMC_D14_DA14.0=FMC_D14,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
393 SH.FMC_D14_DA14.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
394 SH.FMC_D15_DA15.0=FMC_D15,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
395 SH.FMC_D15_DA15.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
396 SH.FMC_D1_DA1.0=FMC_D1,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
397 SH.FMC_D1_DA1.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
398 SH.FMC_D2_DA2.0=FMC_D2,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
399 SH.FMC_D2_DA2.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
400 SH.FMC_D3_DA3.0=FMC_D3,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
401 SH.FMC_D3_DA3.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
402 SH.FMC_D4_DA4.0=FMC_D4,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
403 SH.FMC_D4_DA4.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
404 SH.FMC_D5_DA5.0=FMC_D5,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
405 SH.FMC_D5_DA5.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
406 SH.FMC_D6_DA6.0=FMC_D6,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
407 SH.FMC_D6_DA6.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
408 SH.FMC_D7_DA7.0=FMC_D7,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
409 SH.FMC_D7_DA7.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
410 SH.FMC_D8_DA8.0=FMC_D8,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
411 SH.FMC_D8_DA8.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
412 SH.FMC_D9_DA9.0=FMC_D9,sd-16b-d2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
413 SH.FMC_D9_DA9.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
414 SH.FMC_NBL0.0=FMC_NBL0,Sd2ByteEnable2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
415 SH.FMC_NBL0.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
416 SH.FMC_NBL1.0=FMC_NBL1,Sd2ByteEnable2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
417 SH.FMC_NBL1.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
418 SH.FMC_SDCLK.0=FMC_SDCLK,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
419 SH.FMC_SDCLK.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
420 SH.FMC_SDNCAS.0=FMC_SDNCAS,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
421 SH.FMC_SDNCAS.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
422 SH.FMC_SDNRAS.0=FMC_SDNRAS,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
423 SH.FMC_SDNRAS.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
424 SH.FMC_SDNWE.0=FMC_SDNWE,12b-sda2
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
425 SH.FMC_SDNWE.ConfNb=1
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
426 SPI1.CalculateBaudRate=42.0 MBits/s
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
427 SPI1.IPParameters=VirtualNSS,Mode,CalculateBaudRate
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
428 SPI1.Mode=SPI_MODE_MASTER
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
429 SPI1.VirtualNSS=VM_NSSHARD
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
430 SPI2.CalculateBaudRate=21.0 MBits/s
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
431 SPI2.IPParameters=VirtualNSS,Mode,CalculateBaudRate
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
432 SPI2.Mode=SPI_MODE_MASTER
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
433 SPI2.VirtualNSS=VM_NSSHARD
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
434 SPI3.CalculateBaudRate=21.0 MBits/s
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
435 SPI3.IPParameters=VirtualNSS,Mode,CalculateBaudRate
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
436 SPI3.Mode=SPI_MODE_MASTER
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
437 SPI3.VirtualNSS=VM_NSSHARD
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
438 SPI5.CalculateBaudRate=42.0 MBits/s
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
439 SPI5.IPParameters=VirtualNSS,Mode,CalculateBaudRate
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
440 SPI5.Mode=SPI_MODE_MASTER
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
441 SPI5.VirtualNSS=VM_NSSHARD
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
442 VP_DMA2D_VS_DMA2D.Mode=DMA2D_Activate
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
443 VP_DMA2D_VS_DMA2D.Signal=DMA2D_VS_DMA2D
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
444 VP_RTC_VS_RTC_Alarm_A_Intern.Mode=Alarm A
7d1b61176708 Add chip documentations
jDG
parents:
diff changeset
445 VP_RTC_VS_RTC_Alarm_A_Intern.Signal=RTC_VS_RTC_Alarm_A_Intern