annotate Common/Drivers/STM32F4xx_HAL_DRIVER_v120/Src/stm32f4xx_hal_nand.c @ 116:b848056057ce FlipDisplay

Added small helper for runtime evaluation Moved initialisation of settings before GFX init to have parameters available during init phase
author Ideenmodellierer
date Sun, 06 Jan 2019 22:27:46 +0100
parents 5f11787b4f42
children
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38
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_nand.c
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4 * @author MCD Application Team
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5 * @version V1.2.0
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6 * @date 26-December-2014
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7 * @brief NAND HAL module driver.
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8 * This file provides a generic firmware to drive NAND memories mounted
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9 * as external device.
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10 *
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11 @verbatim
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12 ==============================================================================
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13 ##### How to use this driver #####
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14 ==============================================================================
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15 [..]
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16 This driver is a generic layered driver which contains a set of APIs used to
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17 control NAND flash memories. It uses the FMC/FSMC layer functions to interface
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18 with NAND devices. This driver is used as follows:
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19
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20 (+) NAND flash memory configuration sequence using the function HAL_NAND_Init()
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21 with control and timing parameters for both common and attribute spaces.
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22
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23 (+) Read NAND flash memory maker and device IDs using the function
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24 HAL_NAND_Read_ID(). The read information is stored in the NAND_ID_TypeDef
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25 structure declared by the function caller.
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26
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27 (+) Access NAND flash memory by read/write operations using the functions
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28 HAL_NAND_Read_Page()/HAL_NAND_Read_SpareArea(), HAL_NAND_Write_Page()/HAL_NAND_Write_SpareArea()
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29 to read/write page(s)/spare area(s). These functions use specific device
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30 information (Block, page size..) predefined by the user in the HAL_NAND_Info_TypeDef
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31 structure. The read/write address information is contained by the Nand_Address_Typedef
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32 structure passed as parameter.
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33
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34 (+) Perform NAND flash Reset chip operation using the function HAL_NAND_Reset().
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35
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36 (+) Perform NAND flash erase block operation using the function HAL_NAND_Erase_Block().
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37 The erase block address information is contained in the Nand_Address_Typedef
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38 structure passed as parameter.
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39
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40 (+) Read the NAND flash status operation using the function HAL_NAND_Read_Status().
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41
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42 (+) You can also control the NAND device by calling the control APIs HAL_NAND_ECC_Enable()/
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43 HAL_NAND_ECC_Disable() to respectively enable/disable the ECC code correction
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44 feature or the function HAL_NAND_GetECC() to get the ECC correction code.
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45
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46 (+) You can monitor the NAND device HAL state by calling the function
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47 HAL_NAND_GetState()
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48
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49 [..]
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50 (@) This driver is a set of generic APIs which handle standard NAND flash operations.
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51 If a NAND flash device contains different operations and/or implementations,
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52 it should be implemented separately.
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53
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54 @endverbatim
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55 ******************************************************************************
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56 * @attention
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57 *
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58 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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59 *
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60 * Redistribution and use in source and binary forms, with or without modification,
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61 * are permitted provided that the following conditions are met:
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62 * 1. Redistributions of source code must retain the above copyright notice,
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63 * this list of conditions and the following disclaimer.
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64 * 2. Redistributions in binary form must reproduce the above copyright notice,
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65 * this list of conditions and the following disclaimer in the documentation
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66 * and/or other materials provided with the distribution.
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67 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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68 * may be used to endorse or promote products derived from this software
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69 * without specific prior written permission.
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70 *
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71 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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72 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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73 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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74 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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75 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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76 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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77 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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78 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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79 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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80 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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81 *
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82 ******************************************************************************
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83 */
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84
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85 /* Includes ------------------------------------------------------------------*/
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86 #include "stm32f4xx_hal.h"
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87
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88 /** @addtogroup STM32F4xx_HAL_Driver
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89 * @{
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90 */
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91
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92
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93 #ifdef HAL_NAND_MODULE_ENABLED
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94
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95 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
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96
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97 /** @defgroup NAND NAND
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98 * @brief NAND HAL module driver
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99 * @{
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100 */
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101
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102 /* Private typedef -----------------------------------------------------------*/
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103 /* Private define ------------------------------------------------------------*/
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104 /** @defgroup NAND_Private_Constants NAND Private Constants
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105 * @{
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106 */
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107
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108 /**
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109 * @}
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110 */
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111
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112 /* Private macro -------------------------------------------------------------*/
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113 /** @defgroup NAND_Private_Macros NAND Private Macros
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114 * @{
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115 */
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116
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117 /**
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118 * @}
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119 */
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120 /* Private variables ---------------------------------------------------------*/
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121 /* Private function prototypes -----------------------------------------------*/
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122 /* Exported functions --------------------------------------------------------*/
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123 /** @defgroup NAND_Exported_Functions NAND Exported Functions
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124 * @{
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125 */
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126
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127 /** @defgroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
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128 * @brief Initialization and Configuration functions
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129 *
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130 @verbatim
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131 ==============================================================================
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132 ##### NAND Initialization and de-initialization functions #####
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133 ==============================================================================
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134 [..]
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135 This section provides functions allowing to initialize/de-initialize
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136 the NAND memory
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137
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138 @endverbatim
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139 * @{
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140 */
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141
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142 /**
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143 * @brief Perform NAND memory Initialization sequence
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144 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
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145 * the configuration information for NAND module.
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146 * @param ComSpace_Timing: pointer to Common space timing structure
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147 * @param AttSpace_Timing: pointer to Attribute space timing structure
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148 * @retval HAL status
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149 */
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150 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing)
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151 {
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152 /* Check the NAND handle state */
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153 if(hnand == NULL)
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154 {
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155 return HAL_ERROR;
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156 }
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157
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158 if(hnand->State == HAL_NAND_STATE_RESET)
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159 {
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160 /* Initialize the low level hardware (MSP) */
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161 HAL_NAND_MspInit(hnand);
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162 }
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163
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164 /* Initialize NAND control Interface */
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165 FMC_NAND_Init(hnand->Instance, &(hnand->Init));
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166
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167 /* Initialize NAND common space timing Interface */
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168 FMC_NAND_CommonSpace_Timing_Init(hnand->Instance, ComSpace_Timing, hnand->Init.NandBank);
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169
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170 /* Initialize NAND attribute space timing Interface */
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171 FMC_NAND_AttributeSpace_Timing_Init(hnand->Instance, AttSpace_Timing, hnand->Init.NandBank);
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172
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173 /* Enable the NAND device */
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174 __FMC_NAND_ENABLE(hnand->Instance, hnand->Init.NandBank);
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175
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176 /* Update the NAND controller state */
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177 hnand->State = HAL_NAND_STATE_READY;
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178
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179 return HAL_OK;
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180 }
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181
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182 /**
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183 * @brief Perform NAND memory De-Initialization sequence
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184 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
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185 * the configuration information for NAND module.
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186 * @retval HAL status
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187 */
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188 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand)
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189 {
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190 /* Initialize the low level hardware (MSP) */
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191 HAL_NAND_MspDeInit(hnand);
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192
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193 /* Configure the NAND registers with their reset values */
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194 FMC_NAND_DeInit(hnand->Instance, hnand->Init.NandBank);
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195
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196 /* Reset the NAND controller state */
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197 hnand->State = HAL_NAND_STATE_RESET;
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198
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199 /* Release Lock */
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200 __HAL_UNLOCK(hnand);
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201
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202 return HAL_OK;
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203 }
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204
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205 /**
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206 * @brief NAND MSP Init
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207 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
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208 * the configuration information for NAND module.
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209 * @retval None
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210 */
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211 __weak void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand)
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212 {
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213 /* NOTE : This function Should not be modified, when the callback is needed,
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214 the HAL_NAND_MspInit could be implemented in the user file
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215 */
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216 }
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217
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218 /**
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219 * @brief NAND MSP DeInit
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220 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
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221 * the configuration information for NAND module.
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222 * @retval None
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223 */
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224 __weak void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand)
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225 {
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226 /* NOTE : This function Should not be modified, when the callback is needed,
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227 the HAL_NAND_MspDeInit could be implemented in the user file
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228 */
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229 }
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230
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231
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232 /**
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233 * @brief This function handles NAND device interrupt request.
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234 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
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235 * the configuration information for NAND module.
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236 * @retval HAL status
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237 */
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238 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand)
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239 {
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240 /* Check NAND interrupt Rising edge flag */
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241 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_RISING_EDGE))
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242 {
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243 /* NAND interrupt callback*/
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244 HAL_NAND_ITCallback(hnand);
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245
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246 /* Clear NAND interrupt Rising edge pending bit */
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247 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_RISING_EDGE);
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248 }
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249
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250 /* Check NAND interrupt Level flag */
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251 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_LEVEL))
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252 {
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253 /* NAND interrupt callback*/
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254 HAL_NAND_ITCallback(hnand);
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255
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256 /* Clear NAND interrupt Level pending bit */
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257 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_LEVEL);
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258 }
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259
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260 /* Check NAND interrupt Falling edge flag */
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261 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FALLING_EDGE))
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262 {
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263 /* NAND interrupt callback*/
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264 HAL_NAND_ITCallback(hnand);
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265
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266 /* Clear NAND interrupt Falling edge pending bit */
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267 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FALLING_EDGE);
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268 }
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269
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270 /* Check NAND interrupt FIFO empty flag */
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271 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FEMPT))
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272 {
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273 /* NAND interrupt callback*/
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274 HAL_NAND_ITCallback(hnand);
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275
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276 /* Clear NAND interrupt FIFO empty pending bit */
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277 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FEMPT);
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278 }
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279
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280 }
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281
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282 /**
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283 * @brief NAND interrupt feature callback
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284 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
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285 * the configuration information for NAND module.
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286 * @retval None
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287 */
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288 __weak void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand)
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289 {
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290 /* NOTE : This function Should not be modified, when the callback is needed,
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291 the HAL_NAND_ITCallback could be implemented in the user file
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292 */
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293 }
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294
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295 /**
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296 * @}
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297 */
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298
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299 /** @defgroup NAND_Exported_Functions_Group2 Input and Output functions
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300 * @brief Input Output and memory control functions
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301 *
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302 @verbatim
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303 ==============================================================================
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304 ##### NAND Input and Output functions #####
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305 ==============================================================================
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306 [..]
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307 This section provides functions allowing to use and control the NAND
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308 memory
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309
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310 @endverbatim
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311 * @{
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312 */
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313
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314 /**
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315 * @brief Read the NAND memory electronic signature
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316 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
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317 * the configuration information for NAND module.
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318 * @param pNAND_ID: NAND ID structure
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319 * @retval HAL status
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320 */
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321 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID)
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322 {
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323 __IO uint32_t data = 0;
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324 uint32_t deviceaddress = 0;
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325
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326 /* Process Locked */
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327 __HAL_LOCK(hnand);
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328
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329 /* Check the NAND controller state */
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330 if(hnand->State == HAL_NAND_STATE_BUSY)
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331 {
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332 return HAL_BUSY;
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333 }
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334
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335 /* Identify the device address */
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336 if(hnand->Init.NandBank == FMC_NAND_BANK2)
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337 {
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338 deviceaddress = NAND_DEVICE1;
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339 }
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340 else
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341 {
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342 deviceaddress = NAND_DEVICE2;
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343 }
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344
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345 /* Update the NAND controller state */
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346 hnand->State = HAL_NAND_STATE_BUSY;
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347
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348 /* Send Read ID command sequence */
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349 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_READID;
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350 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
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351
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352 /* Read the electronic signature from NAND flash */
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353 data = *(__IO uint32_t *)deviceaddress;
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354
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355 /* Return the data read */
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356 pNAND_ID->Maker_Id = ADDR_1ST_CYCLE(data);
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357 pNAND_ID->Device_Id = ADDR_2ND_CYCLE(data);
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358 pNAND_ID->Third_Id = ADDR_3RD_CYCLE(data);
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359 pNAND_ID->Fourth_Id = ADDR_4TH_CYCLE(data);
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360
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361 /* Update the NAND controller state */
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362 hnand->State = HAL_NAND_STATE_READY;
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363
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364 /* Process unlocked */
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365 __HAL_UNLOCK(hnand);
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366
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367 return HAL_OK;
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parents:
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368 }
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369
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parents:
diff changeset
370 /**
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parents:
diff changeset
371 * @brief NAND memory reset
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parents:
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372 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
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parents:
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373 * the configuration information for NAND module.
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parents:
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374 * @retval HAL status
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heinrichsweikamp
parents:
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375 */
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parents:
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376 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand)
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diff changeset
377 {
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378 uint32_t deviceaddress = 0;
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diff changeset
379
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parents:
diff changeset
380 /* Process Locked */
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diff changeset
381 __HAL_LOCK(hnand);
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diff changeset
382
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parents:
diff changeset
383 /* Check the NAND controller state */
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384 if(hnand->State == HAL_NAND_STATE_BUSY)
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parents:
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385 {
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386 return HAL_BUSY;
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387 }
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parents:
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388
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parents:
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389 /* Identify the device address */
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390 if(hnand->Init.NandBank == FMC_NAND_BANK2)
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391 {
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392 deviceaddress = NAND_DEVICE1;
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393 }
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394 else
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395 {
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396 deviceaddress = NAND_DEVICE2;
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397 }
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398
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399 /* Update the NAND controller state */
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400 hnand->State = HAL_NAND_STATE_BUSY;
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401
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heinrichsweikamp
parents:
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402 /* Send NAND reset command */
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403 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = 0xFF;
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heinrichsweikamp
parents:
diff changeset
404
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heinrichsweikamp
parents:
diff changeset
405
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heinrichsweikamp
parents:
diff changeset
406 /* Update the NAND controller state */
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heinrichsweikamp
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407 hnand->State = HAL_NAND_STATE_READY;
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heinrichsweikamp
parents:
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408
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heinrichsweikamp
parents:
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409 /* Process unlocked */
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410 __HAL_UNLOCK(hnand);
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heinrichsweikamp
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411
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412 return HAL_OK;
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heinrichsweikamp
parents:
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413
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heinrichsweikamp
parents:
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414 }
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heinrichsweikamp
parents:
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415
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heinrichsweikamp
parents:
diff changeset
416 /**
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heinrichsweikamp
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diff changeset
417 * @brief Read Page(s) from NAND memory block
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418 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
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419 * the configuration information for NAND module.
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heinrichsweikamp
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420 * @param pAddress : pointer to NAND address structure
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421 * @param pBuffer : pointer to destination read buffer
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parents:
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422 * @param NumPageToRead : number of pages to read from block
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423 * @retval HAL status
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heinrichsweikamp
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424 */
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425 HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead)
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heinrichsweikamp
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426 {
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heinrichsweikamp
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diff changeset
427 __IO uint32_t index = 0;
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heinrichsweikamp
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diff changeset
428 uint32_t deviceaddress = 0, size = 0, numpagesread = 0, addressstatus = NAND_VALID_ADDRESS;
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429 NAND_AddressTypeDef nandaddress;
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heinrichsweikamp
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diff changeset
430 uint32_t addressoffset = 0;
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heinrichsweikamp
parents:
diff changeset
431
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heinrichsweikamp
parents:
diff changeset
432 /* Process Locked */
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diff changeset
433 __HAL_LOCK(hnand);
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heinrichsweikamp
parents:
diff changeset
434
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heinrichsweikamp
parents:
diff changeset
435 /* Check the NAND controller state */
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heinrichsweikamp
parents:
diff changeset
436 if(hnand->State == HAL_NAND_STATE_BUSY)
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parents:
diff changeset
437 {
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heinrichsweikamp
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diff changeset
438 return HAL_BUSY;
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heinrichsweikamp
parents:
diff changeset
439 }
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heinrichsweikamp
parents:
diff changeset
440
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heinrichsweikamp
parents:
diff changeset
441 /* Identify the device address */
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heinrichsweikamp
parents:
diff changeset
442 if(hnand->Init.NandBank == FMC_NAND_BANK2)
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parents:
diff changeset
443 {
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diff changeset
444 deviceaddress = NAND_DEVICE1;
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heinrichsweikamp
parents:
diff changeset
445 }
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heinrichsweikamp
parents:
diff changeset
446 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
447 {
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heinrichsweikamp
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diff changeset
448 deviceaddress = NAND_DEVICE2;
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heinrichsweikamp
parents:
diff changeset
449 }
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heinrichsweikamp
parents:
diff changeset
450
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heinrichsweikamp
parents:
diff changeset
451 /* Update the NAND controller state */
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heinrichsweikamp
parents:
diff changeset
452 hnand->State = HAL_NAND_STATE_BUSY;
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heinrichsweikamp
parents:
diff changeset
453
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heinrichsweikamp
parents:
diff changeset
454 /* Save the content of pAddress as it will be modified */
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heinrichsweikamp
parents:
diff changeset
455 nandaddress.Block = pAddress->Block;
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heinrichsweikamp
parents:
diff changeset
456 nandaddress.Page = pAddress->Page;
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diff changeset
457 nandaddress.Zone = pAddress->Zone;
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heinrichsweikamp
parents:
diff changeset
458
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heinrichsweikamp
parents:
diff changeset
459 /* Page(s) read loop */
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heinrichsweikamp
parents:
diff changeset
460 while((NumPageToRead != 0) && (addressstatus == NAND_VALID_ADDRESS))
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heinrichsweikamp
parents:
diff changeset
461 {
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heinrichsweikamp
parents:
diff changeset
462 /* update the buffer size */
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463 size = hnand->Info.PageSize + ((hnand->Info.PageSize) * numpagesread);
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heinrichsweikamp
parents:
diff changeset
464
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heinrichsweikamp
parents:
diff changeset
465 /* Get the address offset */
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diff changeset
466 addressoffset = ARRAY_ADDRESS(&nandaddress, hnand);
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heinrichsweikamp
parents:
diff changeset
467
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heinrichsweikamp
parents:
diff changeset
468 /* Send read page command sequence */
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diff changeset
469 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_A;
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heinrichsweikamp
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diff changeset
470
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diff changeset
471 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
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472 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(addressoffset);
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473 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(addressoffset);
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474 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(addressoffset);
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heinrichsweikamp
parents:
diff changeset
475
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heinrichsweikamp
parents:
diff changeset
476 /* for 512 and 1 GB devices, 4th cycle is required */
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heinrichsweikamp
parents:
diff changeset
477 if(hnand->Info.BlockNbr >= 1024)
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heinrichsweikamp
parents:
diff changeset
478 {
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parents:
diff changeset
479 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_4TH_CYCLE(addressoffset);
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parents:
diff changeset
480 }
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heinrichsweikamp
parents:
diff changeset
481
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diff changeset
482 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_TRUE1;
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heinrichsweikamp
parents:
diff changeset
483
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
484 /* Get Data into Buffer */
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heinrichsweikamp
parents:
diff changeset
485 for(; index < size; index++)
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heinrichsweikamp
parents:
diff changeset
486 {
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487 *(uint8_t *)pBuffer++ = *(uint8_t *)deviceaddress;
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heinrichsweikamp
parents:
diff changeset
488 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
489
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heinrichsweikamp
parents:
diff changeset
490 /* Increment read pages number */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
491 numpagesread++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
492
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
493 /* Decrement pages to read */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
494 NumPageToRead--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
495
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
496 /* Increment the NAND address */
5f11787b4f42 include in ostc4 repository
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diff changeset
497 addressstatus = HAL_NAND_Address_Inc(hnand, &nandaddress);
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diff changeset
498 }
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heinrichsweikamp
parents:
diff changeset
499
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heinrichsweikamp
parents:
diff changeset
500 /* Update the NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
501 hnand->State = HAL_NAND_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
502
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
503 /* Process unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
504 __HAL_UNLOCK(hnand);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
505
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heinrichsweikamp
parents:
diff changeset
506 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
507
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
508 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
509
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
510 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
511 * @brief Write Page(s) to NAND memory block
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
512 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
513 * the configuration information for NAND module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
514 * @param pAddress : pointer to NAND address structure
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
515 * @param pBuffer : pointer to source buffer to write
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
516 * @param NumPageToWrite : number of pages to write to block
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heinrichsweikamp
parents:
diff changeset
517 * @retval HAL status
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heinrichsweikamp
parents:
diff changeset
518 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
519 HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite)
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heinrichsweikamp
parents:
diff changeset
520 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
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diff changeset
521 __IO uint32_t index = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
522 uint32_t tickstart = 0;
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heinrichsweikamp
parents:
diff changeset
523 uint32_t deviceaddress = 0 , size = 0, numpageswritten = 0, addressstatus = NAND_VALID_ADDRESS;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
524 NAND_AddressTypeDef nandaddress;
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heinrichsweikamp
parents:
diff changeset
525 uint32_t addressoffset = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
526
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
527 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
528 __HAL_LOCK(hnand);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
529
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
530 /* Check the NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
531 if(hnand->State == HAL_NAND_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
532 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
533 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
534 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
535
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
536 /* Identify the device address */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
537 if(hnand->Init.NandBank == FMC_NAND_BANK2)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
538 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
539 deviceaddress = NAND_DEVICE1;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
540 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
541 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
542 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
543 deviceaddress = NAND_DEVICE2;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
544 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
545
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
546 /* Update the NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
547 hnand->State = HAL_NAND_STATE_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
548
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
549 /* Save the content of pAddress as it will be modified */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
550 nandaddress.Block = pAddress->Block;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
551 nandaddress.Page = pAddress->Page;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
552 nandaddress.Zone = pAddress->Zone;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
553
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
554 /* Page(s) write loop */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
555 while((NumPageToWrite != 0) && (addressstatus == NAND_VALID_ADDRESS))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
556 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
557 /* update the buffer size */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
558 size = hnand->Info.PageSize + ((hnand->Info.PageSize) * numpageswritten);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
559
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
560 /* Get the address offset */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
561 addressoffset = ARRAY_ADDRESS(&nandaddress, hnand);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
562
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
563 /* Send write page command sequence */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
564 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_A;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
565 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
566
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
567 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
568 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(addressoffset);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
569 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(addressoffset);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
570 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(addressoffset);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
571
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
572 /* for 512 and 1 GB devices, 4th cycle is required */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
573 if(hnand->Info.BlockNbr >= 1024)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
574 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
575 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_4TH_CYCLE(addressoffset);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
576 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
577
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
578 /* Write data to memory */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
579 for(; index < size; index++)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
580 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
581 *(__IO uint8_t *)deviceaddress = *(uint8_t *)pBuffer++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
582 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
583
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
584 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
585
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
586 /* Get tick */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
587 tickstart = HAL_GetTick();
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
588
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
589 /* Read status until NAND is ready */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
590 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
591 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
592 if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
593 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
594 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
595 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
596 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
597
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
598 /* Increment written pages number */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
599 numpageswritten++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
600
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
601 /* Decrement pages to write */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
602 NumPageToWrite--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
603
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
604 /* Increment the NAND address */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
605 addressstatus = HAL_NAND_Address_Inc(hnand, &nandaddress);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
606 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
607
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
608 /* Update the NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
609 hnand->State = HAL_NAND_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
610
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
611 /* Process unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
612 __HAL_UNLOCK(hnand);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
613
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
614 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
615 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
616
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
617 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
618 * @brief Read Spare area(s) from NAND memory
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
619 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
620 * the configuration information for NAND module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
621 * @param pAddress : pointer to NAND address structure
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
622 * @param pBuffer: pointer to source buffer to write
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
623 * @param NumSpareAreaToRead: Number of spare area to read
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
624 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
625 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
626 HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
627 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
628 __IO uint32_t index = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
629 uint32_t deviceaddress = 0, size = 0, num_spare_area_read = 0, addressstatus = NAND_VALID_ADDRESS;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
630 NAND_AddressTypeDef nandaddress;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
631 uint32_t addressoffset = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
632
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
633 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
634 __HAL_LOCK(hnand);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
635
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
636 /* Check the NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
637 if(hnand->State == HAL_NAND_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
638 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
639 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
640 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
641
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
642 /* Identify the device address */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
643 if(hnand->Init.NandBank == FMC_NAND_BANK2)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
644 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
645 deviceaddress = NAND_DEVICE1;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
646 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
647 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
648 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
649 deviceaddress = NAND_DEVICE2;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
650 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
651
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
652 /* Update the NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
653 hnand->State = HAL_NAND_STATE_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
654
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
655 /* Save the content of pAddress as it will be modified */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
656 nandaddress.Block = pAddress->Block;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
657 nandaddress.Page = pAddress->Page;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
658 nandaddress.Zone = pAddress->Zone;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
659
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
660 /* Spare area(s) read loop */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
661 while((NumSpareAreaToRead != 0) && (addressstatus == NAND_VALID_ADDRESS))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
662 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
663 /* update the buffer size */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
664 size = (hnand->Info.SpareAreaSize) + ((hnand->Info.SpareAreaSize) * num_spare_area_read);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
665
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
666 /* Get the address offset */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
667 addressoffset = ARRAY_ADDRESS(&nandaddress, hnand);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
668
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
669 /* Send read spare area command sequence */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
670 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_C;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
671
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
672 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
673 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(addressoffset);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
674 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(addressoffset);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
675 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(addressoffset);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
676
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
677 /* for 512 and 1 GB devices, 4th cycle is required */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
678 if(hnand->Info.BlockNbr >= 1024)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
679 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
680 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_4TH_CYCLE(addressoffset);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
681 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
682
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
683 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_TRUE1;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
684
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
685 /* Get Data into Buffer */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
686 for ( ;index < size; index++)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
687 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
688 *(uint8_t *)pBuffer++ = *(uint8_t *)deviceaddress;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
689 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
690
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
691 /* Increment read spare areas number */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
692 num_spare_area_read++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
693
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
694 /* Decrement spare areas to read */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
695 NumSpareAreaToRead--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
696
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
697 /* Increment the NAND address */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
698 addressstatus = HAL_NAND_Address_Inc(hnand, &nandaddress);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
699 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
700
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
701 /* Update the NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
702 hnand->State = HAL_NAND_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
703
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
704 /* Process unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
705 __HAL_UNLOCK(hnand);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
706
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
707 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
708 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
709
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
710 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
711 * @brief Write Spare area(s) to NAND memory
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
712 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
713 * the configuration information for NAND module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
714 * @param pAddress : pointer to NAND address structure
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
715 * @param pBuffer : pointer to source buffer to write
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
716 * @param NumSpareAreaTowrite : number of spare areas to write to block
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
717 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
718 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
719 HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
720 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
721 __IO uint32_t index = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
722 uint32_t tickstart = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
723 uint32_t deviceaddress = 0, size = 0, num_spare_area_written = 0, addressstatus = NAND_VALID_ADDRESS;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
724 NAND_AddressTypeDef nandaddress;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
725 uint32_t addressoffset = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
726
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
727 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
728 __HAL_LOCK(hnand);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
729
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
730 /* Check the NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
731 if(hnand->State == HAL_NAND_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
732 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
733 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
734 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
735
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
736 /* Identify the device address */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
737 if(hnand->Init.NandBank == FMC_NAND_BANK2)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
738 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
739 deviceaddress = NAND_DEVICE1;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
740 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
741 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
742 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
743 deviceaddress = NAND_DEVICE2;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
744 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
745
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
746 /* Update the FMC_NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
747 hnand->State = HAL_NAND_STATE_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
748
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
749 /* Save the content of pAddress as it will be modified */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
750 nandaddress.Block = pAddress->Block;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
751 nandaddress.Page = pAddress->Page;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
752 nandaddress.Zone = pAddress->Zone;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
753
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
754 /* Spare area(s) write loop */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
755 while((NumSpareAreaTowrite != 0) && (addressstatus == NAND_VALID_ADDRESS))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
756 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
757 /* update the buffer size */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
758 size = (hnand->Info.SpareAreaSize) + ((hnand->Info.SpareAreaSize) * num_spare_area_written);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
759
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
760 /* Get the address offset */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
761 addressoffset = ARRAY_ADDRESS(&nandaddress, hnand);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
762
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
763 /* Send write Spare area command sequence */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
764 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_C;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
765 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
766
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
767 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
768 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(addressoffset);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
769 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(addressoffset);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
770 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(addressoffset);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
771
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
772 /* for 512 and 1 GB devices, 4th cycle is required */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
773 if(hnand->Info.BlockNbr >= 1024)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
774 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
775 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_4TH_CYCLE(addressoffset);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
776 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
777
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
778 /* Write data to memory */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
779 for(; index < size; index++)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
780 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
781 *(__IO uint8_t *)deviceaddress = *(uint8_t *)pBuffer++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
782 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
783
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
784 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
785
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
786 /* Get tick */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
787 tickstart = HAL_GetTick();
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
788
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
789 /* Read status until NAND is ready */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
790 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
791 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
792 if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
793 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
794 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
795 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
796 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
797
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
798 /* Increment written spare areas number */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
799 num_spare_area_written++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
800
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
801 /* Decrement spare areas to write */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
802 NumSpareAreaTowrite--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
803
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
804 /* Increment the NAND address */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
805 addressstatus = HAL_NAND_Address_Inc(hnand, &nandaddress);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
806 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
807
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
808 /* Update the NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
809 hnand->State = HAL_NAND_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
810
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
811 /* Process unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
812 __HAL_UNLOCK(hnand);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
813
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
814 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
815 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
816
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
817 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
818 * @brief NAND memory Block erase
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
819 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
820 * the configuration information for NAND module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
821 * @param pAddress : pointer to NAND address structure
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
822 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
823 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
824 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
825 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
826 uint32_t deviceaddress = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
827 uint32_t tickstart = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
828
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
829 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
830 __HAL_LOCK(hnand);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
831
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
832 /* Check the NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
833 if(hnand->State == HAL_NAND_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
834 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
835 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
836 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
837
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
838 /* Identify the device address */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
839 if(hnand->Init.NandBank == FMC_NAND_BANK2)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
840 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
841 deviceaddress = NAND_DEVICE1;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
842 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
843 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
844 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
845 deviceaddress = NAND_DEVICE2;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
846 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
847
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
848 /* Update the NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
849 hnand->State = HAL_NAND_STATE_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
850
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
851 /* Send Erase block command sequence */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
852 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_ERASE0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
853
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
854 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
855 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
856 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
857
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
858 /* for 512 and 1 GB devices, 4th cycle is required */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
859 if(hnand->Info.BlockNbr >= 1024)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
860 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
861 *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_4TH_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
862 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
863
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
864 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_ERASE1;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
865
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
866 /* Update the NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
867 hnand->State = HAL_NAND_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
868
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
869 /* Get tick */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
870 tickstart = HAL_GetTick();
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
871
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
872 /* Read status until NAND is ready */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
873 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
874 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
875 if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
876 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
877 /* Process unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
878 __HAL_UNLOCK(hnand);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
879
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
880 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
881 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
882 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
883
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
884 /* Process unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
885 __HAL_UNLOCK(hnand);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
886
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
887 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
888 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
889
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
890 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
891 * @brief NAND memory read status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
892 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
893 * the configuration information for NAND module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
894 * @retval NAND status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
895 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
896 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
897 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
898 uint32_t data = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
899 uint32_t deviceaddress = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
900
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
901 /* Identify the device address */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
902 if(hnand->Init.NandBank == FMC_NAND_BANK2)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
903 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
904 deviceaddress = NAND_DEVICE1;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
905 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
906 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
907 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
908 deviceaddress = NAND_DEVICE2;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
909 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
910
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
911 /* Send Read status operation command */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
912 *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_STATUS;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
913
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heinrichsweikamp
parents:
diff changeset
914 /* Read status register data */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
915 data = *(__IO uint8_t *)deviceaddress;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
916
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
917 /* Return the status */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
918 if((data & NAND_ERROR) == NAND_ERROR)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
919 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
920 return NAND_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
921 }
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heinrichsweikamp
parents:
diff changeset
922 else if((data & NAND_READY) == NAND_READY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
923 {
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heinrichsweikamp
parents:
diff changeset
924 return NAND_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
925 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
926
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
927 return NAND_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
928 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
929
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
930 /**
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heinrichsweikamp
parents:
diff changeset
931 * @brief Increment the NAND memory address
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
932 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
933 * the configuration information for NAND module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
934 * @param pAddress: pointer to NAND address structure
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
935 * @retval The new status of the increment address operation. It can be:
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
936 * - NAND_VALID_ADDRESS: When the new address is valid address
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
937 * - NAND_INVALID_ADDRESS: When the new address is invalid address
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
938 */
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heinrichsweikamp
parents:
diff changeset
939 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
940 {
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heinrichsweikamp
parents:
diff changeset
941 uint32_t status = NAND_VALID_ADDRESS;
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heinrichsweikamp
parents:
diff changeset
942
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heinrichsweikamp
parents:
diff changeset
943 /* Increment page address */
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heinrichsweikamp
parents:
diff changeset
944 pAddress->Page++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
945
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
946 /* Check NAND address is valid */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
947 if(pAddress->Page == hnand->Info.BlockSize)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
948 {
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heinrichsweikamp
parents:
diff changeset
949 pAddress->Page = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
950 pAddress->Block++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
951
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heinrichsweikamp
parents:
diff changeset
952 if(pAddress->Block == hnand->Info.ZoneSize)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
953 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
954 pAddress->Block = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
955 pAddress->Zone++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
956
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
957 if(pAddress->Zone == (hnand->Info.ZoneSize/ hnand->Info.BlockNbr))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
958 {
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heinrichsweikamp
parents:
diff changeset
959 status = NAND_INVALID_ADDRESS;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
960 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
961 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
962 }
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heinrichsweikamp
parents:
diff changeset
963
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heinrichsweikamp
parents:
diff changeset
964 return (status);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
965 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
966 /**
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heinrichsweikamp
parents:
diff changeset
967 * @}
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
968 */
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heinrichsweikamp
parents:
diff changeset
969
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heinrichsweikamp
parents:
diff changeset
970 /** @defgroup NAND_Exported_Functions_Group3 Peripheral Control functions
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
971 * @brief management functions
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
972 *
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heinrichsweikamp
parents:
diff changeset
973 @verbatim
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
974 ==============================================================================
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
975 ##### NAND Control functions #####
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
976 ==============================================================================
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
977 [..]
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
978 This subsection provides a set of functions allowing to control dynamically
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
979 the NAND interface.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
980
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
981 @endverbatim
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
982 * @{
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
983 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
984
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
985
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
986 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
987 * @brief Enables dynamically NAND ECC feature.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
988 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
989 * the configuration information for NAND module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
990 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
991 */
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heinrichsweikamp
parents:
diff changeset
992 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
993 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
994 /* Check the NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
995 if(hnand->State == HAL_NAND_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
996 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
997 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
998 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
999
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1000 /* Update the NAND state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1001 hnand->State = HAL_NAND_STATE_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1002
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1003 /* Enable ECC feature */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1004 FMC_NAND_ECC_Enable(hnand->Instance, hnand->Init.NandBank);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1005
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1006 /* Update the NAND state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1007 hnand->State = HAL_NAND_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1008
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1009 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1010 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1011
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1012 /**
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heinrichsweikamp
parents:
diff changeset
1013 * @brief Disables dynamically FMC_NAND ECC feature.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1014 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1015 * the configuration information for NAND module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1016 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1017 */
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heinrichsweikamp
parents:
diff changeset
1018 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1019 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1020 /* Check the NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1021 if(hnand->State == HAL_NAND_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1022 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1023 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1024 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1025
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1026 /* Update the NAND state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1027 hnand->State = HAL_NAND_STATE_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1028
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1029 /* Disable ECC feature */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1030 FMC_NAND_ECC_Disable(hnand->Instance, hnand->Init.NandBank);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1031
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1032 /* Update the NAND state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1033 hnand->State = HAL_NAND_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1034
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1035 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1036 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1037
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1038 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1039 * @brief Disables dynamically NAND ECC feature.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1040 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1041 * the configuration information for NAND module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1042 * @param ECCval: pointer to ECC value
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1043 * @param Timeout: maximum timeout to wait
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1044 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1045 */
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heinrichsweikamp
parents:
diff changeset
1046 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1047 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1048 HAL_StatusTypeDef status = HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1049
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1050 /* Check the NAND controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1051 if(hnand->State == HAL_NAND_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1052 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1053 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1054 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1055
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1056 /* Update the NAND state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1057 hnand->State = HAL_NAND_STATE_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1058
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1059 /* Get NAND ECC value */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1060 status = FMC_NAND_GetECC(hnand->Instance, ECCval, hnand->Init.NandBank, Timeout);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1061
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1062 /* Update the NAND state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1063 hnand->State = HAL_NAND_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1064
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1065 return status;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1066 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1067
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1068 /**
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heinrichsweikamp
parents:
diff changeset
1069 * @}
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1070 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1071
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1072
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1073 /** @defgroup NAND_Exported_Functions_Group4 Peripheral State functions
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1074 * @brief Peripheral State functions
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1075 *
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1076 @verbatim
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1077 ==============================================================================
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1078 ##### NAND State functions #####
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1079 ==============================================================================
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1080 [..]
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1081 This subsection permits to get in run-time the status of the NAND controller
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1082 and the data flow.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1083
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1084 @endverbatim
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1085 * @{
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1086 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1087
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1088 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1089 * @brief return the NAND state
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1090 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1091 * the configuration information for NAND module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1092 * @retval HAL state
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1093 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1094 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1095 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1096 return hnand->State;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1097 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1098
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1099 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
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1100 * @}
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1101 */
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1102
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1103 /**
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1104 * @}
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1105 */
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1106
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1107 /**
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1108 * @}
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1109 */
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1110
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1111 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
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1112 #endif /* HAL_NAND_MODULE_ENABLED */
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1113
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1114 /**
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1115 * @}
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1116 */
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1117
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1118 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/