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annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_pwr.h @ 948:abdd72c8b567 Evo_2_23
GNSS sleep mode:
Backup voltage is now enabled during initialization. Power saving interval has been changed to 20 second active in a 60 minutes cycle.
author | Ideenmodellierer |
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date | Sun, 22 Dec 2024 21:15:05 +0100 |
parents | c78bcbd5deda |
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rev | line source |
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_ll_pwr.h |
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4 * @author MCD Application Team |
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5 * @brief Header file of PWR LL module. |
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6 ****************************************************************************** |
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7 * @attention |
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8 * |
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9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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10 * |
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11 * Redistribution and use in source and binary forms, with or without modification, |
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12 * are permitted provided that the following conditions are met: |
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13 * 1. Redistributions of source code must retain the above copyright notice, |
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14 * this list of conditions and the following disclaimer. |
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15 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 * this list of conditions and the following disclaimer in the documentation |
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17 * and/or other materials provided with the distribution. |
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 * may be used to endorse or promote products derived from this software |
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20 * without specific prior written permission. |
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21 * |
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 * |
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33 ****************************************************************************** |
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34 */ |
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35 |
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36 /* Define to prevent recursive inclusion -------------------------------------*/ |
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37 #ifndef __STM32F4xx_LL_PWR_H |
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38 #define __STM32F4xx_LL_PWR_H |
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39 |
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40 #ifdef __cplusplus |
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41 extern "C" { |
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42 #endif |
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43 |
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44 /* Includes ------------------------------------------------------------------*/ |
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45 #include "stm32f4xx.h" |
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46 |
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47 /** @addtogroup STM32F4xx_LL_Driver |
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48 * @{ |
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49 */ |
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50 |
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51 #if defined(PWR) |
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52 |
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53 /** @defgroup PWR_LL PWR |
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54 * @{ |
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55 */ |
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56 |
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57 /* Private types -------------------------------------------------------------*/ |
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58 /* Private variables ---------------------------------------------------------*/ |
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59 /* Private constants ---------------------------------------------------------*/ |
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60 /* Private macros ------------------------------------------------------------*/ |
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61 /* Exported types ------------------------------------------------------------*/ |
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62 /* Exported constants --------------------------------------------------------*/ |
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63 /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants |
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64 * @{ |
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65 */ |
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66 |
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67 /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines |
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68 * @brief Flags defines which can be used with LL_PWR_WriteReg function |
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69 * @{ |
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70 */ |
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71 #define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */ |
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72 #define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */ |
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73 /** |
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74 * @} |
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75 */ |
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76 |
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77 /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines |
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78 * @brief Flags defines which can be used with LL_PWR_ReadReg function |
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79 * @{ |
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80 */ |
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81 #define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */ |
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82 #define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */ |
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83 #define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */ |
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84 #define LL_PWR_CSR_VOS PWR_CSR_VOSRDY /*!< Voltage scaling select flag */ |
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85 #if defined(PWR_CSR_EWUP) |
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86 #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP /*!< Enable WKUP pin */ |
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87 #elif defined(PWR_CSR_EWUP1) |
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88 #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP1 /*!< Enable WKUP pin 1 */ |
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89 #endif /* PWR_CSR_EWUP */ |
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90 #if defined(PWR_CSR_EWUP2) |
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91 #define LL_PWR_CSR_EWUP2 PWR_CSR_EWUP2 /*!< Enable WKUP pin 2 */ |
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92 #endif /* PWR_CSR_EWUP2 */ |
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93 #if defined(PWR_CSR_EWUP3) |
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94 #define LL_PWR_CSR_EWUP3 PWR_CSR_EWUP3 /*!< Enable WKUP pin 3 */ |
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95 #endif /* PWR_CSR_EWUP3 */ |
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96 /** |
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97 * @} |
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98 */ |
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99 |
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100 /** @defgroup PWR_LL_EC_REGU_VOLTAGE Regulator Voltage |
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101 * @{ |
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102 */ |
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103 #if defined(PWR_CR_VOS_0) |
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104 #define LL_PWR_REGU_VOLTAGE_SCALE3 (PWR_CR_VOS_0) |
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105 #define LL_PWR_REGU_VOLTAGE_SCALE2 (PWR_CR_VOS_1) |
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106 #define LL_PWR_REGU_VOLTAGE_SCALE1 (PWR_CR_VOS_0 | PWR_CR_VOS_1) /* The SCALE1 is not available for STM32F401xx devices */ |
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107 #else |
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108 #define LL_PWR_REGU_VOLTAGE_SCALE1 (PWR_CR_VOS) |
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109 #define LL_PWR_REGU_VOLTAGE_SCALE2 0x00000000U |
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110 #endif /* PWR_CR_VOS_0 */ |
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111 /** |
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112 * @} |
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113 */ |
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114 |
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115 /** @defgroup PWR_LL_EC_MODE_PWR Mode Power |
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116 * @{ |
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117 */ |
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118 #define LL_PWR_MODE_STOP_MAINREGU 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */ |
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119 #define LL_PWR_MODE_STOP_LPREGU (PWR_CR_LPDS) /*!< Enter Stop mode (with low power Regulator ON) when the CPU enters deepsleep */ |
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120 #if defined(PWR_CR_MRUDS) && defined(PWR_CR_LPUDS) && defined(PWR_CR_FPDS) |
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121 #define LL_PWR_MODE_STOP_MAINREGU_UNDERDRIVE (PWR_CR_MRUDS | PWR_CR_FPDS) /*!< Enter Stop mode (with main Regulator in under-drive mode) when the CPU enters deepsleep */ |
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122 #define LL_PWR_MODE_STOP_LPREGU_UNDERDRIVE (PWR_CR_LPDS | PWR_CR_LPUDS | PWR_CR_FPDS) /*!< Enter Stop mode (with low power Regulator in under-drive mode) when the CPU enters deepsleep */ |
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123 #endif /* PWR_CR_MRUDS && PWR_CR_LPUDS && PWR_CR_FPDS */ |
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124 #if defined(PWR_CR_MRLVDS) && defined(PWR_CR_LPLVDS) && defined(PWR_CR_FPDS) |
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125 #define LL_PWR_MODE_STOP_MAINREGU_DEEPSLEEP (PWR_CR_MRLVDS | PWR_CR_FPDS) /*!< Enter Stop mode (with main Regulator in Deep Sleep mode) when the CPU enters deepsleep */ |
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126 #define LL_PWR_MODE_STOP_LPREGU_DEEPSLEEP (PWR_CR_LPDS | PWR_CR_LPLVDS | PWR_CR_FPDS) /*!< Enter Stop mode (with low power Regulator in Deep Sleep mode) when the CPU enters deepsleep */ |
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127 #endif /* PWR_CR_MRLVDS && PWR_CR_LPLVDS && PWR_CR_FPDS */ |
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128 #define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */ |
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129 /** |
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130 * @} |
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131 */ |
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132 |
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133 /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode |
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134 * @{ |
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135 */ |
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136 #define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep mode */ |
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137 #define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage Regulator in low-power mode during deepsleep mode */ |
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138 /** |
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139 * @} |
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140 */ |
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141 |
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142 /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level |
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143 * @{ |
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144 */ |
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145 #define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 2.2 V */ |
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146 #define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.3 V */ |
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147 #define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.4 V */ |
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148 #define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */ |
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149 #define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.6 V */ |
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150 #define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.7 V */ |
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151 #define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 2.8 V */ |
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152 #define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< Voltage threshold detected by PVD 2.9 V */ |
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153 /** |
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154 * @} |
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155 */ |
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156 /** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins |
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157 * @{ |
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158 */ |
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159 #if defined(PWR_CSR_EWUP) |
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160 #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP) /*!< WKUP pin : PA0 */ |
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161 #endif /* PWR_CSR_EWUP */ |
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162 #if defined(PWR_CSR_EWUP1) |
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163 #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP1) /*!< WKUP pin 1 : PA0 */ |
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164 #endif /* PWR_CSR_EWUP1 */ |
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165 #if defined(PWR_CSR_EWUP2) |
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166 #define LL_PWR_WAKEUP_PIN2 (PWR_CSR_EWUP2) /*!< WKUP pin 2 : PC0 or PC13 according to device */ |
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167 #endif /* PWR_CSR_EWUP2 */ |
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168 #if defined(PWR_CSR_EWUP3) |
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169 #define LL_PWR_WAKEUP_PIN3 (PWR_CSR_EWUP3) /*!< WKUP pin 3 : PC1 */ |
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170 #endif /* PWR_CSR_EWUP3 */ |
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171 /** |
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172 * @} |
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173 */ |
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174 |
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175 /** |
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176 * @} |
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177 */ |
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178 |
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179 |
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180 /* Exported macro ------------------------------------------------------------*/ |
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181 /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros |
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182 * @{ |
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183 */ |
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184 |
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185 /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros |
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186 * @{ |
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187 */ |
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188 |
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189 /** |
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190 * @brief Write a value in PWR register |
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191 * @param __REG__ Register to be written |
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192 * @param __VALUE__ Value to be written in the register |
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193 * @retval None |
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194 */ |
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195 #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__)) |
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196 |
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197 /** |
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198 * @brief Read a value in PWR register |
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199 * @param __REG__ Register to be read |
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200 * @retval Register value |
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201 */ |
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202 #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__) |
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203 /** |
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204 * @} |
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205 */ |
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206 |
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207 /** |
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208 * @} |
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209 */ |
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210 |
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211 /* Exported functions --------------------------------------------------------*/ |
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212 /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions |
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213 * @{ |
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214 */ |
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215 |
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216 /** @defgroup PWR_LL_EF_Configuration Configuration |
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217 * @{ |
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218 */ |
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219 #if defined(PWR_CR_FISSR) |
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220 /** |
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221 * @brief Enable FLASH interface STOP while system Run is ON |
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222 * @rmtoll CR FISSR LL_PWR_EnableFLASHInterfaceSTOP |
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223 * @note This mode is enabled only with STOP low power mode. |
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224 * @retval None |
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225 */ |
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226 __STATIC_INLINE void LL_PWR_EnableFLASHInterfaceSTOP(void) |
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227 { |
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228 SET_BIT(PWR->CR, PWR_CR_FISSR); |
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229 } |
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230 |
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231 /** |
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232 * @brief Disable FLASH Interface STOP while system Run is ON |
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233 * @rmtoll CR FISSR LL_PWR_DisableFLASHInterfaceSTOP |
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234 * @retval None |
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235 */ |
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236 __STATIC_INLINE void LL_PWR_DisableFLASHInterfaceSTOP(void) |
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237 { |
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238 CLEAR_BIT(PWR->CR, PWR_CR_FISSR); |
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239 } |
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240 |
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241 /** |
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242 * @brief Check if FLASH Interface STOP while system Run feature is enabled |
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243 * @rmtoll CR FISSR LL_PWR_IsEnabledFLASHInterfaceSTOP |
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244 * @retval State of bit (1 or 0). |
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245 */ |
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246 __STATIC_INLINE uint32_t LL_PWR_IsEnabledFLASHInterfaceSTOP(void) |
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247 { |
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248 return (READ_BIT(PWR->CR, PWR_CR_FISSR) == (PWR_CR_FISSR)); |
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249 } |
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250 #endif /* PWR_CR_FISSR */ |
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251 |
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252 #if defined(PWR_CR_FMSSR) |
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253 /** |
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254 * @brief Enable FLASH Memory STOP while system Run is ON |
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255 * @rmtoll CR FMSSR LL_PWR_EnableFLASHMemorySTOP |
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256 * @note This mode is enabled only with STOP low power mode. |
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257 * @retval None |
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258 */ |
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259 __STATIC_INLINE void LL_PWR_EnableFLASHMemorySTOP(void) |
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260 { |
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261 SET_BIT(PWR->CR, PWR_CR_FMSSR); |
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262 } |
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263 |
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264 /** |
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265 * @brief Disable FLASH Memory STOP while system Run is ON |
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266 * @rmtoll CR FMSSR LL_PWR_DisableFLASHMemorySTOP |
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267 * @retval None |
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268 */ |
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269 __STATIC_INLINE void LL_PWR_DisableFLASHMemorySTOP(void) |
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270 { |
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271 CLEAR_BIT(PWR->CR, PWR_CR_FMSSR); |
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272 } |
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273 |
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274 /** |
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275 * @brief Check if FLASH Memory STOP while system Run feature is enabled |
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276 * @rmtoll CR FMSSR LL_PWR_IsEnabledFLASHMemorySTOP |
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277 * @retval State of bit (1 or 0). |
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278 */ |
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279 __STATIC_INLINE uint32_t LL_PWR_IsEnabledFLASHMemorySTOP(void) |
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280 { |
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281 return (READ_BIT(PWR->CR, PWR_CR_FMSSR) == (PWR_CR_FMSSR)); |
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282 } |
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283 #endif /* PWR_CR_FMSSR */ |
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284 #if defined(PWR_CR_UDEN) |
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285 /** |
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286 * @brief Enable Under Drive Mode |
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287 * @rmtoll CR UDEN LL_PWR_EnableUnderDriveMode |
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288 * @note This mode is enabled only with STOP low power mode. |
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289 * In this mode, the 1.2V domain is preserved in reduced leakage mode. This |
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290 * mode is only available when the main Regulator or the low power Regulator |
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291 * is in low voltage mode. |
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292 * @note If the Under-drive mode was enabled, it is automatically disabled after |
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293 * exiting Stop mode. |
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294 * When the voltage Regulator operates in Under-drive mode, an additional |
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295 * startup delay is induced when waking up from Stop mode. |
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296 * @retval None |
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297 */ |
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298 __STATIC_INLINE void LL_PWR_EnableUnderDriveMode(void) |
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299 { |
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300 SET_BIT(PWR->CR, PWR_CR_UDEN); |
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301 } |
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302 |
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303 /** |
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304 * @brief Disable Under Drive Mode |
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305 * @rmtoll CR UDEN LL_PWR_DisableUnderDriveMode |
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306 * @retval None |
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307 */ |
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308 __STATIC_INLINE void LL_PWR_DisableUnderDriveMode(void) |
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309 { |
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310 CLEAR_BIT(PWR->CR, PWR_CR_UDEN); |
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311 } |
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312 |
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313 /** |
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314 * @brief Check if Under Drive Mode is enabled |
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315 * @rmtoll CR UDEN LL_PWR_IsEnabledUnderDriveMode |
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316 * @retval State of bit (1 or 0). |
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317 */ |
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318 __STATIC_INLINE uint32_t LL_PWR_IsEnabledUnderDriveMode(void) |
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319 { |
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320 return (READ_BIT(PWR->CR, PWR_CR_UDEN) == (PWR_CR_UDEN)); |
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321 } |
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322 #endif /* PWR_CR_UDEN */ |
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323 |
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324 #if defined(PWR_CR_ODSWEN) |
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325 /** |
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326 * @brief Enable Over drive switching |
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327 * @rmtoll CR ODSWEN LL_PWR_EnableOverDriveSwitching |
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328 * @retval None |
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329 */ |
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330 __STATIC_INLINE void LL_PWR_EnableOverDriveSwitching(void) |
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331 { |
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332 SET_BIT(PWR->CR, PWR_CR_ODSWEN); |
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333 } |
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334 |
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335 /** |
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336 * @brief Disable Over drive switching |
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337 * @rmtoll CR ODSWEN LL_PWR_DisableOverDriveSwitching |
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338 * @retval None |
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339 */ |
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340 __STATIC_INLINE void LL_PWR_DisableOverDriveSwitching(void) |
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341 { |
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342 CLEAR_BIT(PWR->CR, PWR_CR_ODSWEN); |
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343 } |
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344 |
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345 /** |
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346 * @brief Check if Over drive switching is enabled |
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347 * @rmtoll CR ODSWEN LL_PWR_IsEnabledOverDriveSwitching |
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348 * @retval State of bit (1 or 0). |
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349 */ |
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350 __STATIC_INLINE uint32_t LL_PWR_IsEnabledOverDriveSwitching(void) |
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351 { |
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352 return (READ_BIT(PWR->CR, PWR_CR_ODSWEN) == (PWR_CR_ODSWEN)); |
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353 } |
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354 #endif /* PWR_CR_ODSWEN */ |
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355 #if defined(PWR_CR_ODEN) |
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356 /** |
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357 * @brief Enable Over drive Mode |
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358 * @rmtoll CR ODEN LL_PWR_EnableOverDriveMode |
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359 * @retval None |
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360 */ |
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361 __STATIC_INLINE void LL_PWR_EnableOverDriveMode(void) |
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362 { |
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363 SET_BIT(PWR->CR, PWR_CR_ODEN); |
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364 } |
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365 |
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366 /** |
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367 * @brief Disable Over drive Mode |
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368 * @rmtoll CR ODEN LL_PWR_DisableOverDriveMode |
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369 * @retval None |
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370 */ |
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371 __STATIC_INLINE void LL_PWR_DisableOverDriveMode(void) |
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372 { |
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373 CLEAR_BIT(PWR->CR, PWR_CR_ODEN); |
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374 } |
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375 |
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376 /** |
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377 * @brief Check if Over drive switching is enabled |
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378 * @rmtoll CR ODEN LL_PWR_IsEnabledOverDriveMode |
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379 * @retval State of bit (1 or 0). |
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380 */ |
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381 __STATIC_INLINE uint32_t LL_PWR_IsEnabledOverDriveMode(void) |
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382 { |
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383 return (READ_BIT(PWR->CR, PWR_CR_ODEN) == (PWR_CR_ODEN)); |
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384 } |
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385 #endif /* PWR_CR_ODEN */ |
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386 #if defined(PWR_CR_MRUDS) |
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387 /** |
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388 * @brief Enable Main Regulator in deepsleep under-drive Mode |
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389 * @rmtoll CR MRUDS LL_PWR_EnableMainRegulatorDeepSleepUDMode |
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390 * @retval None |
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391 */ |
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392 __STATIC_INLINE void LL_PWR_EnableMainRegulatorDeepSleepUDMode(void) |
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393 { |
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394 SET_BIT(PWR->CR, PWR_CR_MRUDS); |
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395 } |
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396 |
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397 /** |
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398 * @brief Disable Main Regulator in deepsleep under-drive Mode |
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399 * @rmtoll CR MRUDS LL_PWR_DisableMainRegulatorDeepSleepUDMode |
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400 * @retval None |
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401 */ |
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402 __STATIC_INLINE void LL_PWR_DisableMainRegulatorDeepSleepUDMode(void) |
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403 { |
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404 CLEAR_BIT(PWR->CR, PWR_CR_MRUDS); |
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405 } |
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406 |
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407 /** |
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408 * @brief Check if Main Regulator in deepsleep under-drive Mode is enabled |
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409 * @rmtoll CR MRUDS LL_PWR_IsEnabledMainRegulatorDeepSleepUDMode |
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410 * @retval State of bit (1 or 0). |
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411 */ |
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412 __STATIC_INLINE uint32_t LL_PWR_IsEnabledMainRegulatorDeepSleepUDMode(void) |
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413 { |
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414 return (READ_BIT(PWR->CR, PWR_CR_MRUDS) == (PWR_CR_MRUDS)); |
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415 } |
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416 #endif /* PWR_CR_MRUDS */ |
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417 |
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418 #if defined(PWR_CR_LPUDS) |
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419 /** |
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420 * @brief Enable Low Power Regulator in deepsleep under-drive Mode |
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421 * @rmtoll CR LPUDS LL_PWR_EnableLowPowerRegulatorDeepSleepUDMode |
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422 * @retval None |
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423 */ |
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424 __STATIC_INLINE void LL_PWR_EnableLowPowerRegulatorDeepSleepUDMode(void) |
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425 { |
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426 SET_BIT(PWR->CR, PWR_CR_LPUDS); |
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427 } |
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428 |
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429 /** |
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430 * @brief Disable Low Power Regulator in deepsleep under-drive Mode |
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431 * @rmtoll CR LPUDS LL_PWR_DisableLowPowerRegulatorDeepSleepUDMode |
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432 * @retval None |
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433 */ |
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434 __STATIC_INLINE void LL_PWR_DisableLowPowerRegulatorDeepSleepUDMode(void) |
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435 { |
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436 CLEAR_BIT(PWR->CR, PWR_CR_LPUDS); |
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437 } |
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438 |
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439 /** |
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440 * @brief Check if Low Power Regulator in deepsleep under-drive Mode is enabled |
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441 * @rmtoll CR LPUDS LL_PWR_IsEnabledLowPowerRegulatorDeepSleepUDMode |
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442 * @retval State of bit (1 or 0). |
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443 */ |
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444 __STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRegulatorDeepSleepUDMode(void) |
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445 { |
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446 return (READ_BIT(PWR->CR, PWR_CR_LPUDS) == (PWR_CR_LPUDS)); |
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447 } |
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448 #endif /* PWR_CR_LPUDS */ |
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449 |
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450 #if defined(PWR_CR_MRLVDS) |
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451 /** |
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452 * @brief Enable Main Regulator low voltage Mode |
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453 * @rmtoll CR MRLVDS LL_PWR_EnableMainRegulatorLowVoltageMode |
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454 * @retval None |
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455 */ |
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456 __STATIC_INLINE void LL_PWR_EnableMainRegulatorLowVoltageMode(void) |
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457 { |
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458 SET_BIT(PWR->CR, PWR_CR_MRLVDS); |
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459 } |
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460 |
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461 /** |
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462 * @brief Disable Main Regulator low voltage Mode |
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463 * @rmtoll CR MRLVDS LL_PWR_DisableMainRegulatorLowVoltageMode |
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464 * @retval None |
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465 */ |
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466 __STATIC_INLINE void LL_PWR_DisableMainRegulatorLowVoltageMode(void) |
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467 { |
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468 CLEAR_BIT(PWR->CR, PWR_CR_MRLVDS); |
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469 } |
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470 |
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471 /** |
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472 * @brief Check if Main Regulator low voltage Mode is enabled |
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473 * @rmtoll CR MRLVDS LL_PWR_IsEnabledMainRegulatorLowVoltageMode |
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474 * @retval State of bit (1 or 0). |
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475 */ |
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476 __STATIC_INLINE uint32_t LL_PWR_IsEnabledMainRegulatorLowVoltageMode(void) |
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477 { |
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478 return (READ_BIT(PWR->CR, PWR_CR_MRLVDS) == (PWR_CR_MRLVDS)); |
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479 } |
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480 #endif /* PWR_CR_MRLVDS */ |
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481 |
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482 #if defined(PWR_CR_LPLVDS) |
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483 /** |
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484 * @brief Enable Low Power Regulator low voltage Mode |
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485 * @rmtoll CR LPLVDS LL_PWR_EnableLowPowerRegulatorLowVoltageMode |
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486 * @retval None |
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487 */ |
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488 __STATIC_INLINE void LL_PWR_EnableLowPowerRegulatorLowVoltageMode(void) |
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489 { |
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490 SET_BIT(PWR->CR, PWR_CR_LPLVDS); |
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491 } |
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492 |
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493 /** |
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494 * @brief Disable Low Power Regulator low voltage Mode |
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495 * @rmtoll CR LPLVDS LL_PWR_DisableLowPowerRegulatorLowVoltageMode |
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496 * @retval None |
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497 */ |
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498 __STATIC_INLINE void LL_PWR_DisableLowPowerRegulatorLowVoltageMode(void) |
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499 { |
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500 CLEAR_BIT(PWR->CR, PWR_CR_LPLVDS); |
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501 } |
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502 |
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503 /** |
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504 * @brief Check if Low Power Regulator low voltage Mode is enabled |
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505 * @rmtoll CR LPLVDS LL_PWR_IsEnabledLowPowerRegulatorLowVoltageMode |
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506 * @retval State of bit (1 or 0). |
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507 */ |
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508 __STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRegulatorLowVoltageMode(void) |
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509 { |
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510 return (READ_BIT(PWR->CR, PWR_CR_LPLVDS) == (PWR_CR_LPLVDS)); |
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511 } |
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512 #endif /* PWR_CR_LPLVDS */ |
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513 /** |
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514 * @brief Set the main internal Regulator output voltage |
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515 * @rmtoll CR VOS LL_PWR_SetRegulVoltageScaling |
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516 * @param VoltageScaling This parameter can be one of the following values: |
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517 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 (*) |
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518 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 |
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|
519 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3 |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
520 * (*) LL_PWR_REGU_VOLTAGE_SCALE1 is not available for STM32F401xx devices |
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521 * @retval None |
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Ideenmodellierer
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|
522 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
523 __STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling) |
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|
524 { |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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525 MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
526 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
527 |
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Added current STM32 standandard libraries in version independend folder structure
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|
528 /** |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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529 * @brief Get the main internal Regulator output voltage |
c78bcbd5deda
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Ideenmodellierer
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diff
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|
530 * @rmtoll CR VOS LL_PWR_GetRegulVoltageScaling |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
531 * @retval Returned value can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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|
532 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 (*) |
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533 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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534 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3 |
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535 * (*) LL_PWR_REGU_VOLTAGE_SCALE1 is not available for STM32F401xx devices |
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Added current STM32 standandard libraries in version independend folder structure
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|
536 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
537 __STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void) |
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538 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
539 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS)); |
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Added current STM32 standandard libraries in version independend folder structure
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|
540 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
541 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
542 * @brief Enable the Flash Power Down in Stop Mode |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
543 * @rmtoll CR FPDS LL_PWR_EnableFlashPowerDown |
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|
544 * @retval None |
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|
545 */ |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
546 __STATIC_INLINE void LL_PWR_EnableFlashPowerDown(void) |
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Added current STM32 standandard libraries in version independend folder structure
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|
547 { |
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|
548 SET_BIT(PWR->CR, PWR_CR_FPDS); |
c78bcbd5deda
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|
549 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
550 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
551 /** |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
552 * @brief Disable the Flash Power Down in Stop Mode |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
553 * @rmtoll CR FPDS LL_PWR_DisableFlashPowerDown |
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Added current STM32 standandard libraries in version independend folder structure
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|
554 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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changeset
|
555 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
556 __STATIC_INLINE void LL_PWR_DisableFlashPowerDown(void) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
557 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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558 CLEAR_BIT(PWR->CR, PWR_CR_FPDS); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
559 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
560 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
561 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
562 * @brief Check if the Flash Power Down in Stop Mode is enabled |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
563 * @rmtoll CR FPDS LL_PWR_IsEnabledFlashPowerDown |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
564 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
565 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
566 __STATIC_INLINE uint32_t LL_PWR_IsEnabledFlashPowerDown(void) |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
567 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
568 return (READ_BIT(PWR->CR, PWR_CR_FPDS) == (PWR_CR_FPDS)); |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
569 } |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
570 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
571 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
572 * @brief Enable access to the backup domain |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
573 * @rmtoll CR DBP LL_PWR_EnableBkUpAccess |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
574 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
575 */ |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
576 __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void) |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
577 { |
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Ideenmodellierer
parents:
diff
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|
578 SET_BIT(PWR->CR, PWR_CR_DBP); |
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Added current STM32 standandard libraries in version independend folder structure
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|
579 } |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
580 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
581 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
582 * @brief Disable access to the backup domain |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
583 * @rmtoll CR DBP LL_PWR_DisableBkUpAccess |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
584 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
585 */ |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
586 __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void) |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
587 { |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
588 CLEAR_BIT(PWR->CR, PWR_CR_DBP); |
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Added current STM32 standandard libraries in version independend folder structure
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|
589 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
590 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
591 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
592 * @brief Check if the backup domain is enabled |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
593 * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
594 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
595 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
596 __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
597 { |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
598 return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
599 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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changeset
|
600 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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changeset
|
601 * @brief Enable the backup Regulator |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
602 * @rmtoll CSR BRE LL_PWR_EnableBkUpRegulator |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
603 * @note The BRE bit of the PWR_CSR register is protected against parasitic write access. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
604 * The LL_PWR_EnableBkUpAccess() must be called before using this API. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
605 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
606 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
607 __STATIC_INLINE void LL_PWR_EnableBkUpRegulator(void) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
608 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
609 SET_BIT(PWR->CSR, PWR_CSR_BRE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
610 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
611 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
612 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
613 * @brief Disable the backup Regulator |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
614 * @rmtoll CSR BRE LL_PWR_DisableBkUpRegulator |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
changeset
|
615 * @note The BRE bit of the PWR_CSR register is protected against parasitic write access. |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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616 * The LL_PWR_EnableBkUpAccess() must be called before using this API. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
617 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
618 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
619 __STATIC_INLINE void LL_PWR_DisableBkUpRegulator(void) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
620 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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621 CLEAR_BIT(PWR->CSR, PWR_CSR_BRE); |
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Added current STM32 standandard libraries in version independend folder structure
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changeset
|
622 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
623 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
624 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
625 * @brief Check if the backup Regulator is enabled |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
626 * @rmtoll CSR BRE LL_PWR_IsEnabledBkUpRegulator |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
627 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
628 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
629 __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpRegulator(void) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
630 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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changeset
|
631 return (READ_BIT(PWR->CSR, PWR_CSR_BRE) == (PWR_CSR_BRE)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
632 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
633 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
634 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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changeset
|
635 * @brief Set voltage Regulator mode during deep sleep mode |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
changeset
|
636 * @rmtoll CR LPDS LL_PWR_SetRegulModeDS |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
637 * @param RegulMode This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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638 * @arg @ref LL_PWR_REGU_DSMODE_MAIN |
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Added current STM32 standandard libraries in version independend folder structure
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639 * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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changeset
|
640 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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changeset
|
641 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
642 __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
643 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
644 MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
645 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
changeset
|
646 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
647 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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changeset
|
648 * @brief Get voltage Regulator mode during deep sleep mode |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
changeset
|
649 * @rmtoll CR LPDS LL_PWR_GetRegulModeDS |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
650 * @retval Returned value can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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651 * @arg @ref LL_PWR_REGU_DSMODE_MAIN |
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652 * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER |
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653 */ |
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654 __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void) |
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655 { |
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656 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS)); |
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657 } |
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658 |
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659 /** |
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660 * @brief Set Power Down mode when CPU enters deepsleep |
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661 * @rmtoll CR PDDS LL_PWR_SetPowerMode\n |
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662 * @rmtoll CR MRUDS LL_PWR_SetPowerMode\n |
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663 * @rmtoll CR LPUDS LL_PWR_SetPowerMode\n |
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664 * @rmtoll CR FPDS LL_PWR_SetPowerMode\n |
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665 * @rmtoll CR MRLVDS LL_PWR_SetPowerMode\n |
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666 * @rmtoll CR LPlVDS LL_PWR_SetPowerMode\n |
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667 * @rmtoll CR FPDS LL_PWR_SetPowerMode\n |
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668 * @rmtoll CR LPDS LL_PWR_SetPowerMode |
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669 * @param PDMode This parameter can be one of the following values: |
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670 * @arg @ref LL_PWR_MODE_STOP_MAINREGU |
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671 * @arg @ref LL_PWR_MODE_STOP_LPREGU |
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672 * @arg @ref LL_PWR_MODE_STOP_MAINREGU_UNDERDRIVE (*) |
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673 * @arg @ref LL_PWR_MODE_STOP_LPREGU_UNDERDRIVE (*) |
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674 * @arg @ref LL_PWR_MODE_STOP_MAINREGU_DEEPSLEEP (*) |
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675 * @arg @ref LL_PWR_MODE_STOP_LPREGU_DEEPSLEEP (*) |
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676 * |
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677 * (*) not available on all devices |
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678 * @arg @ref LL_PWR_MODE_STANDBY |
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679 * @retval None |
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680 */ |
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681 __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode) |
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682 { |
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683 #if defined(PWR_CR_MRUDS) && defined(PWR_CR_LPUDS) && defined(PWR_CR_FPDS) |
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684 MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_FPDS | PWR_CR_LPUDS | PWR_CR_MRUDS), PDMode); |
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685 #elif defined(PWR_CR_MRLVDS) && defined(PWR_CR_LPLVDS) && defined(PWR_CR_FPDS) |
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686 MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_FPDS | PWR_CR_LPLVDS | PWR_CR_MRLVDS), PDMode); |
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687 #else |
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688 MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode); |
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689 #endif /* PWR_CR_MRUDS && PWR_CR_LPUDS && PWR_CR_FPDS */ |
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|
690 } |
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|
691 |
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|
692 /** |
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693 * @brief Get Power Down mode when CPU enters deepsleep |
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|
694 * @rmtoll CR PDDS LL_PWR_GetPowerMode\n |
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695 * @rmtoll CR MRUDS LL_PWR_GetPowerMode\n |
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696 * @rmtoll CR LPUDS LL_PWR_GetPowerMode\n |
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697 * @rmtoll CR FPDS LL_PWR_GetPowerMode\n |
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698 * @rmtoll CR MRLVDS LL_PWR_GetPowerMode\n |
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699 * @rmtoll CR LPLVDS LL_PWR_GetPowerMode\n |
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700 * @rmtoll CR FPDS LL_PWR_GetPowerMode\n |
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|
701 * @rmtoll CR LPDS LL_PWR_GetPowerMode |
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|
702 * @retval Returned value can be one of the following values: |
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|
703 * @arg @ref LL_PWR_MODE_STOP_MAINREGU |
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Added current STM32 standandard libraries in version independend folder structure
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704 * @arg @ref LL_PWR_MODE_STOP_LPREGU |
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705 * @arg @ref LL_PWR_MODE_STOP_MAINREGU_UNDERDRIVE (*) |
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706 * @arg @ref LL_PWR_MODE_STOP_LPREGU_UNDERDRIVE (*) |
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|
707 * @arg @ref LL_PWR_MODE_STOP_MAINREGU_DEEPSLEEP (*) |
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|
708 * @arg @ref LL_PWR_MODE_STOP_LPREGU_DEEPSLEEP (*) |
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|
709 * |
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|
710 * (*) not available on all devices |
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Added current STM32 standandard libraries in version independend folder structure
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|
711 * @arg @ref LL_PWR_MODE_STANDBY |
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Added current STM32 standandard libraries in version independend folder structure
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|
712 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
713 __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void) |
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|
714 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
715 #if defined(PWR_CR_MRUDS) && defined(PWR_CR_LPUDS) && defined(PWR_CR_FPDS) |
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|
716 return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_FPDS | PWR_CR_LPUDS | PWR_CR_MRUDS))); |
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Added current STM32 standandard libraries in version independend folder structure
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|
717 #elif defined(PWR_CR_MRLVDS) && defined(PWR_CR_LPLVDS) && defined(PWR_CR_FPDS) |
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Added current STM32 standandard libraries in version independend folder structure
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|
718 return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_FPDS | PWR_CR_LPLVDS | PWR_CR_MRLVDS))); |
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Added current STM32 standandard libraries in version independend folder structure
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|
719 #else |
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Added current STM32 standandard libraries in version independend folder structure
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|
720 return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS))); |
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|
721 #endif /* PWR_CR_MRUDS && PWR_CR_LPUDS && PWR_CR_FPDS */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
722 } |
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|
723 |
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Added current STM32 standandard libraries in version independend folder structure
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|
724 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
725 * @brief Configure the voltage threshold detected by the Power Voltage Detector |
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Added current STM32 standandard libraries in version independend folder structure
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|
726 * @rmtoll CR PLS LL_PWR_SetPVDLevel |
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|
727 * @param PVDLevel This parameter can be one of the following values: |
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|
728 * @arg @ref LL_PWR_PVDLEVEL_0 |
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|
729 * @arg @ref LL_PWR_PVDLEVEL_1 |
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|
730 * @arg @ref LL_PWR_PVDLEVEL_2 |
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|
731 * @arg @ref LL_PWR_PVDLEVEL_3 |
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|
732 * @arg @ref LL_PWR_PVDLEVEL_4 |
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Added current STM32 standandard libraries in version independend folder structure
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|
733 * @arg @ref LL_PWR_PVDLEVEL_5 |
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Added current STM32 standandard libraries in version independend folder structure
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734 * @arg @ref LL_PWR_PVDLEVEL_6 |
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735 * @arg @ref LL_PWR_PVDLEVEL_7 |
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|
736 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
737 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
738 __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel) |
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|
739 { |
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|
740 MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel); |
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|
741 } |
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|
742 |
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|
743 /** |
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744 * @brief Get the voltage threshold detection |
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745 * @rmtoll CR PLS LL_PWR_GetPVDLevel |
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746 * @retval Returned value can be one of the following values: |
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747 * @arg @ref LL_PWR_PVDLEVEL_0 |
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748 * @arg @ref LL_PWR_PVDLEVEL_1 |
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749 * @arg @ref LL_PWR_PVDLEVEL_2 |
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750 * @arg @ref LL_PWR_PVDLEVEL_3 |
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751 * @arg @ref LL_PWR_PVDLEVEL_4 |
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752 * @arg @ref LL_PWR_PVDLEVEL_5 |
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753 * @arg @ref LL_PWR_PVDLEVEL_6 |
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754 * @arg @ref LL_PWR_PVDLEVEL_7 |
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|
755 */ |
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|
756 __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void) |
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|
757 { |
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|
758 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS)); |
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Added current STM32 standandard libraries in version independend folder structure
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|
759 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
760 |
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|
761 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
762 * @brief Enable Power Voltage Detector |
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|
763 * @rmtoll CR PVDE LL_PWR_EnablePVD |
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|
764 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
765 */ |
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|
766 __STATIC_INLINE void LL_PWR_EnablePVD(void) |
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|
767 { |
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|
768 SET_BIT(PWR->CR, PWR_CR_PVDE); |
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|
769 } |
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|
770 |
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|
771 /** |
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|
772 * @brief Disable Power Voltage Detector |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
773 * @rmtoll CR PVDE LL_PWR_DisablePVD |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
774 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
775 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
776 __STATIC_INLINE void LL_PWR_DisablePVD(void) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
777 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
778 CLEAR_BIT(PWR->CR, PWR_CR_PVDE); |
c78bcbd5deda
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Ideenmodellierer
parents:
diff
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|
779 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
780 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
781 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
782 * @brief Check if Power Voltage Detector is enabled |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
783 * @rmtoll CR PVDE LL_PWR_IsEnabledPVD |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
784 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
785 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
786 __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
787 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
788 return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
789 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
790 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
791 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
792 * @brief Enable the WakeUp PINx functionality |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
793 * @rmtoll CSR EWUP LL_PWR_EnableWakeUpPin\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
794 * @rmtoll CSR EWUP1 LL_PWR_EnableWakeUpPin\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
795 * @rmtoll CSR EWUP2 LL_PWR_EnableWakeUpPin\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
796 * @rmtoll CSR EWUP3 LL_PWR_EnableWakeUpPin |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
797 * @param WakeUpPin This parameter can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
798 * @arg @ref LL_PWR_WAKEUP_PIN1 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
799 * @arg @ref LL_PWR_WAKEUP_PIN2 (*) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
800 * @arg @ref LL_PWR_WAKEUP_PIN3 (*) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
801 * |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
802 * (*) not available on all devices |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
803 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
804 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
805 __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
806 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
807 SET_BIT(PWR->CSR, WakeUpPin); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
808 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
809 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
810 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
811 * @brief Disable the WakeUp PINx functionality |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
812 * @rmtoll CSR EWUP LL_PWR_DisableWakeUpPin\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
813 * @rmtoll CSR EWUP1 LL_PWR_DisableWakeUpPin\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
814 * @rmtoll CSR EWUP2 LL_PWR_DisableWakeUpPin\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
815 * @rmtoll CSR EWUP3 LL_PWR_DisableWakeUpPin |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
816 * @param WakeUpPin This parameter can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
817 * @arg @ref LL_PWR_WAKEUP_PIN1 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
818 * @arg @ref LL_PWR_WAKEUP_PIN2 (*) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
819 * @arg @ref LL_PWR_WAKEUP_PIN3 (*) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
820 * |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
821 * (*) not available on all devices |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
822 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
823 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
824 __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
825 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
826 CLEAR_BIT(PWR->CSR, WakeUpPin); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
827 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
828 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
829 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
830 * @brief Check if the WakeUp PINx functionality is enabled |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
831 * @rmtoll CSR EWUP LL_PWR_IsEnabledWakeUpPin\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
832 * @rmtoll CSR EWUP1 LL_PWR_IsEnabledWakeUpPin\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
833 * @rmtoll CSR EWUP2 LL_PWR_IsEnabledWakeUpPin\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
834 * @rmtoll CSR EWUP3 LL_PWR_IsEnabledWakeUpPin |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
835 * @param WakeUpPin This parameter can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
836 * @arg @ref LL_PWR_WAKEUP_PIN1 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
837 * @arg @ref LL_PWR_WAKEUP_PIN2 (*) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
838 * @arg @ref LL_PWR_WAKEUP_PIN3 (*) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
839 * |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
840 * (*) not available on all devices |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
841 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
842 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
843 __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
844 { |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
845 return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
846 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
847 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
848 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
849 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
850 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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|
851 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
852 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
853 /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
854 * @{ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
855 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
856 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
857 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
858 * @brief Get Wake-up Flag |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
859 * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
860 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
861 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
862 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
863 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
864 return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
865 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
866 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
867 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
868 * @brief Get Standby Flag |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
869 * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
870 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
871 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
872 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void) |
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Added current STM32 standandard libraries in version independend folder structure
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|
873 { |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
874 return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
875 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
876 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
877 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
878 * @brief Get Backup Regulator ready Flag |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
879 * @rmtoll CSR BRR LL_PWR_IsActiveFlag_BRR |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
880 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
881 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
882 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_BRR(void) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
883 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
884 return (READ_BIT(PWR->CSR, PWR_CSR_BRR) == (PWR_CSR_BRR)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
885 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
886 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
887 * @brief Indicate whether VDD voltage is below the selected PVD threshold |
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Added current STM32 standandard libraries in version independend folder structure
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|
888 * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
889 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
890 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
891 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
892 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
893 return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
894 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
895 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
896 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
897 * @brief Indicate whether the Regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
898 * @rmtoll CSR VOS LL_PWR_IsActiveFlag_VOS |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
899 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
900 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
901 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOS(void) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
902 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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903 return (READ_BIT(PWR->CSR, LL_PWR_CSR_VOS) == (LL_PWR_CSR_VOS)); |
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904 } |
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905 #if defined(PWR_CR_ODEN) |
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906 /** |
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907 * @brief Indicate whether the Over-Drive mode is ready or not |
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908 * @rmtoll CSR ODRDY LL_PWR_IsActiveFlag_OD |
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909 * @retval State of bit (1 or 0). |
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910 */ |
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911 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_OD(void) |
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912 { |
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913 return (READ_BIT(PWR->CSR, PWR_CSR_ODRDY) == (PWR_CSR_ODRDY)); |
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914 } |
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915 #endif /* PWR_CR_ODEN */ |
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916 |
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917 #if defined(PWR_CR_ODSWEN) |
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918 /** |
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919 * @brief Indicate whether the Over-Drive mode switching is ready or not |
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920 * @rmtoll CSR ODSWRDY LL_PWR_IsActiveFlag_ODSW |
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921 * @retval State of bit (1 or 0). |
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922 */ |
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923 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_ODSW(void) |
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924 { |
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925 return (READ_BIT(PWR->CSR, PWR_CSR_ODSWRDY) == (PWR_CSR_ODSWRDY)); |
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926 } |
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927 #endif /* PWR_CR_ODSWEN */ |
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928 |
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929 #if defined(PWR_CR_UDEN) |
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930 /** |
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931 * @brief Indicate whether the Under-Drive mode is ready or not |
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932 * @rmtoll CSR UDRDY LL_PWR_IsActiveFlag_UD |
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933 * @retval State of bit (1 or 0). |
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934 */ |
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935 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_UD(void) |
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936 { |
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937 return (READ_BIT(PWR->CSR, PWR_CSR_UDRDY) == (PWR_CSR_UDRDY)); |
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938 } |
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939 #endif /* PWR_CR_UDEN */ |
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940 /** |
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941 * @brief Clear Standby Flag |
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942 * @rmtoll CR CSBF LL_PWR_ClearFlag_SB |
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943 * @retval None |
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944 */ |
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945 __STATIC_INLINE void LL_PWR_ClearFlag_SB(void) |
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946 { |
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947 SET_BIT(PWR->CR, PWR_CR_CSBF); |
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948 } |
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|
949 |
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950 /** |
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951 * @brief Clear Wake-up Flags |
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952 * @rmtoll CR CWUF LL_PWR_ClearFlag_WU |
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953 * @retval None |
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|
954 */ |
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955 __STATIC_INLINE void LL_PWR_ClearFlag_WU(void) |
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|
956 { |
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957 SET_BIT(PWR->CR, PWR_CR_CWUF); |
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|
958 } |
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959 #if defined(PWR_CSR_UDRDY) |
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|
960 /** |
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|
961 * @brief Clear Under-Drive ready Flag |
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962 * @rmtoll CSR UDRDY LL_PWR_ClearFlag_UD |
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|
963 * @retval None |
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|
964 */ |
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965 __STATIC_INLINE void LL_PWR_ClearFlag_UD(void) |
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966 { |
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967 WRITE_REG(PWR->CSR, PWR_CSR_UDRDY); |
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968 } |
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969 #endif /* PWR_CSR_UDRDY */ |
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970 |
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|
971 /** |
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972 * @} |
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973 */ |
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|
974 |
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975 #if defined(USE_FULL_LL_DRIVER) |
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976 /** @defgroup PWR_LL_EF_Init De-initialization function |
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977 * @{ |
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|
978 */ |
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979 ErrorStatus LL_PWR_DeInit(void); |
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980 /** |
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981 * @} |
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|
982 */ |
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|
983 #endif /* USE_FULL_LL_DRIVER */ |
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|
984 |
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|
985 /** |
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|
986 * @} |
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|
987 */ |
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|
988 |
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|
989 /** |
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990 * @} |
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|
991 */ |
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|
992 |
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|
993 #endif /* defined(PWR) */ |
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|
994 |
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|
995 /** |
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|
996 * @} |
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|
997 */ |
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|
998 |
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|
999 #ifdef __cplusplus |
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|
1000 } |
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|
1001 #endif |
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|
1002 |
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1003 #endif /* __STM32F4xx_LL_PWR_H */ |
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|
1004 |
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1005 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |