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annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_lptim.h @ 151:a98f91cca107 FlipDisplay
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author | Ideenmodellierer |
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date | Sun, 03 Mar 2019 12:16:54 +0100 |
parents | c78bcbd5deda |
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rev | line source |
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_ll_lptim.h |
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4 * @author MCD Application Team |
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5 * @brief Header file of LPTIM LL module. |
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6 ****************************************************************************** |
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7 * @attention |
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8 * |
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9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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10 * |
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11 * Redistribution and use in source and binary forms, with or without modification, |
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12 * are permitted provided that the following conditions are met: |
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13 * 1. Redistributions of source code must retain the above copyright notice, |
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14 * this list of conditions and the following disclaimer. |
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15 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 * this list of conditions and the following disclaimer in the documentation |
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17 * and/or other materials provided with the distribution. |
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 * may be used to endorse or promote products derived from this software |
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20 * without specific prior written permission. |
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21 * |
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 * |
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33 ****************************************************************************** |
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34 */ |
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35 |
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36 /* Define to prevent recursive inclusion -------------------------------------*/ |
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37 #ifndef __STM32F4xx_LL_LPTIM_H |
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38 #define __STM32F4xx_LL_LPTIM_H |
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39 |
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40 #ifdef __cplusplus |
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41 extern "C" { |
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42 #endif |
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43 |
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44 /* Includes ------------------------------------------------------------------*/ |
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45 #include "stm32f4xx.h" |
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46 |
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47 /** @addtogroup STM32F4xx_LL_Driver |
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48 * @{ |
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49 */ |
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50 #if defined (LPTIM1) |
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51 |
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52 /** @defgroup LPTIM_LL LPTIM |
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53 * @{ |
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54 */ |
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55 |
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56 /* Private types -------------------------------------------------------------*/ |
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57 /* Private variables ---------------------------------------------------------*/ |
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58 |
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59 /* Private constants ---------------------------------------------------------*/ |
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60 |
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61 /* Private macros ------------------------------------------------------------*/ |
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62 #if defined(USE_FULL_LL_DRIVER) |
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63 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros |
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64 * @{ |
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65 */ |
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66 /** |
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67 * @} |
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68 */ |
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69 #endif /*USE_FULL_LL_DRIVER*/ |
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70 |
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71 /* Exported types ------------------------------------------------------------*/ |
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72 #if defined(USE_FULL_LL_DRIVER) |
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73 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure |
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74 * @{ |
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75 */ |
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76 |
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77 /** |
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78 * @brief LPTIM Init structure definition |
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79 */ |
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80 typedef struct |
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81 { |
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82 uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance. |
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83 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE. |
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84 |
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85 This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/ |
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86 |
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87 uint32_t Prescaler; /*!< Specifies the prescaler division ratio. |
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88 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER. |
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89 |
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90 This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/ |
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91 |
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92 uint32_t Waveform; /*!< Specifies the waveform shape. |
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93 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM. |
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94 |
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95 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/ |
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96 |
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97 uint32_t Polarity; /*!< Specifies waveform polarity. |
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98 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY. |
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99 |
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100 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/ |
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101 } LL_LPTIM_InitTypeDef; |
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102 |
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103 /** |
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104 * @} |
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105 */ |
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106 #endif /* USE_FULL_LL_DRIVER */ |
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107 |
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108 /* Exported constants --------------------------------------------------------*/ |
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109 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants |
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110 * @{ |
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111 */ |
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112 |
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113 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines |
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114 * @brief Flags defines which can be used with LL_LPTIM_ReadReg function |
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115 * @{ |
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116 */ |
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117 #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */ |
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118 #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */ |
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119 #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */ |
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120 #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */ |
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121 #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */ |
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122 #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */ |
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123 #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */ |
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124 /** |
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125 * @} |
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126 */ |
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127 |
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128 /** @defgroup LPTIM_LL_EC_IT IT Defines |
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129 * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions |
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130 * @{ |
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131 */ |
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132 #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match Interrupt Enable */ |
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133 #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match Interrupt Enable */ |
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134 #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger valid edge Interrupt Enable */ |
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135 #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK Interrupt Enable */ |
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136 #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK Interrupt Enable */ |
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137 #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Direction change to UP Interrupt Enable */ |
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138 #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Direction change to down Interrupt Enable */ |
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139 /** |
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140 * @} |
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141 */ |
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142 |
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143 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode |
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144 * @{ |
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145 */ |
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146 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/ |
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147 #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/ |
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148 /** |
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149 * @} |
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150 */ |
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151 |
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152 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode |
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153 * @{ |
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154 */ |
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155 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/ |
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156 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/ |
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157 /** |
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158 * @} |
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159 */ |
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160 |
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161 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode |
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162 * @{ |
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163 */ |
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164 #define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/ |
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165 #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/ |
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166 /** |
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167 * @} |
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168 */ |
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169 |
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170 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type |
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171 * @{ |
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172 */ |
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173 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINOUS or SINGLE*/ |
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174 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/ |
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175 /** |
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176 * @} |
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177 */ |
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178 |
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179 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity |
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180 * @{ |
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181 */ |
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182 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/ |
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183 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/ |
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184 /** |
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185 * @} |
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186 */ |
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187 |
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188 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value |
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189 * @{ |
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190 */ |
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191 #define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/ |
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192 #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/ |
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193 #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/ |
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194 #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/ |
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195 #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/ |
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196 #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/ |
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197 #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/ |
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198 #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/ |
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199 /** |
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200 * @} |
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201 */ |
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202 |
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203 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source |
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204 * @{ |
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205 */ |
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206 #define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/ |
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207 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/ |
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208 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/ |
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209 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/ |
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210 #define LL_LPTIM_TRIG_SOURCE_TIM1_TRGO LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to TIM1*/ |
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211 #define LL_LPTIM_TRIG_SOURCE_TIM5_TRGO (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to TIM5*/ |
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212 /** |
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213 * @} |
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214 */ |
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215 |
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216 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter |
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217 * @{ |
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218 */ |
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219 #define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/ |
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220 #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/ |
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221 #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/ |
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222 #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/ |
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223 /** |
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224 * @} |
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225 */ |
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226 |
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227 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity |
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228 * @{ |
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229 */ |
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230 #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/ |
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231 #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/ |
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232 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/ |
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233 /** |
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234 * @} |
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235 */ |
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236 |
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237 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source |
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238 * @{ |
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239 */ |
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240 #define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/ |
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241 #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/ |
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242 /** |
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243 * @} |
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244 */ |
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245 |
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246 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter |
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247 * @{ |
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248 */ |
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249 #define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/ |
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250 #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/ |
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251 #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/ |
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252 #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/ |
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253 /** |
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254 * @} |
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255 */ |
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256 |
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257 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity |
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258 * @{ |
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259 */ |
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260 #define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/ |
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261 #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/ |
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262 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/ |
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263 /** |
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264 * @} |
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265 */ |
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266 |
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267 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode |
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268 * @{ |
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269 */ |
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270 #define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/ |
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271 #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/ |
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272 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/ |
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273 /** |
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274 * @} |
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275 */ |
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276 |
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277 |
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278 /** |
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279 * @} |
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280 */ |
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281 |
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282 /* Exported macro ------------------------------------------------------------*/ |
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283 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros |
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284 * @{ |
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285 */ |
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286 |
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287 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros |
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288 * @{ |
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289 */ |
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290 |
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291 /** |
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292 * @brief Write a value in LPTIM register |
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293 * @param __INSTANCE__ LPTIM Instance |
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294 * @param __REG__ Register to be written |
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295 * @param __VALUE__ Value to be written in the register |
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296 * @retval None |
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297 */ |
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298 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
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299 |
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300 /** |
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301 * @brief Read a value in LPTIM register |
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302 * @param __INSTANCE__ LPTIM Instance |
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303 * @param __REG__ Register to be read |
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304 * @retval Register value |
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305 */ |
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306 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
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307 /** |
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308 * @} |
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309 */ |
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310 |
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311 /** |
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312 * @} |
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313 */ |
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314 |
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315 |
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316 /* Exported functions --------------------------------------------------------*/ |
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317 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions |
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318 * @{ |
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319 */ |
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320 |
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321 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration |
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322 * @{ |
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323 */ |
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324 |
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325 /** |
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326 * @brief Enable the LPTIM instance |
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327 * @note After setting the ENABLE bit, a delay of two counter clock is needed |
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328 * before the LPTIM instance is actually enabled. |
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329 * @rmtoll CR ENABLE LL_LPTIM_Enable |
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330 * @param LPTIMx Low-Power Timer instance |
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331 * @retval None |
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332 */ |
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333 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx) |
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334 { |
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335 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE); |
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336 } |
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337 |
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338 /** |
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339 * @brief Disable the LPTIM instance |
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340 * @rmtoll CR ENABLE LL_LPTIM_Disable |
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341 * @param LPTIMx Low-Power Timer instance |
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342 * @retval None |
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343 */ |
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344 __STATIC_INLINE void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx) |
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345 { |
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346 CLEAR_BIT(LPTIMx->CR, LPTIM_CR_ENABLE); |
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347 } |
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348 |
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349 /** |
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350 * @brief Indicates whether the LPTIM instance is enabled. |
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351 * @rmtoll CR ENABLE LL_LPTIM_IsEnabled |
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352 * @param LPTIMx Low-Power Timer instance |
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353 * @retval State of bit (1 or 0). |
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354 */ |
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355 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx) |
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356 { |
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357 return (READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == (LPTIM_CR_ENABLE)); |
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358 } |
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359 |
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360 /** |
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361 * @brief Starts the LPTIM counter in the desired mode. |
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362 * @note LPTIM instance must be enabled before starting the counter. |
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363 * @note It is possible to change on the fly from One Shot mode to |
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364 * Continuous mode. |
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365 * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n |
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366 * CR SNGSTRT LL_LPTIM_StartCounter |
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367 * @param LPTIMx Low-Power Timer instance |
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368 * @param OperatingMode This parameter can be one of the following values: |
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369 * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS |
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370 * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT |
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371 * @retval None |
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372 */ |
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373 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode) |
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374 { |
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375 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode); |
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376 } |
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377 |
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378 |
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379 /** |
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380 * @brief Set the LPTIM registers update mode (enable/disable register preload) |
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381 * @note This function must be called when the LPTIM instance is disabled. |
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382 * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode |
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383 * @param LPTIMx Low-Power Timer instance |
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384 * @param UpdateMode This parameter can be one of the following values: |
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385 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE |
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386 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD |
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387 * @retval None |
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388 */ |
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389 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode) |
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390 { |
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391 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode); |
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392 } |
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393 |
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394 /** |
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395 * @brief Get the LPTIM registers update mode |
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396 * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode |
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397 * @param LPTIMx Low-Power Timer instance |
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398 * @retval Returned value can be one of the following values: |
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399 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE |
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400 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD |
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401 */ |
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402 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx) |
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403 { |
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404 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD)); |
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405 } |
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406 |
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407 /** |
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408 * @brief Set the auto reload value |
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409 * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled |
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410 * @note After a write to the LPTIMx_ARR register a new write operation to the |
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411 * same register can only be performed when the previous write operation |
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412 * is completed. Any successive write before the ARROK flag be set, will |
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413 * lead to unpredictable results. |
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414 * @note autoreload value be strictly greater than the compare value. |
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415 * @rmtoll ARR ARR LL_LPTIM_SetAutoReload |
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416 * @param LPTIMx Low-Power Timer instance |
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417 * @param AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF |
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418 * @retval None |
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419 */ |
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420 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload) |
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421 { |
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422 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload); |
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423 } |
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424 |
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425 /** |
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426 * @brief Get actual auto reload value |
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427 * @rmtoll ARR ARR LL_LPTIM_GetAutoReload |
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428 * @param LPTIMx Low-Power Timer instance |
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429 * @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF |
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430 */ |
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431 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx) |
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432 { |
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433 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR)); |
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434 } |
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435 |
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436 /** |
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437 * @brief Set the compare value |
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438 * @note After a write to the LPTIMx_CMP register a new write operation to the |
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439 * same register can only be performed when the previous write operation |
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440 * is completed. Any successive write before the CMPOK flag be set, will |
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441 * lead to unpredictable results. |
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442 * @rmtoll CMP CMP LL_LPTIM_SetCompare |
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443 * @param LPTIMx Low-Power Timer instance |
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444 * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF |
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445 * @retval None |
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446 */ |
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447 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue) |
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448 { |
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449 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue); |
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450 } |
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451 |
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452 /** |
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453 * @brief Get actual compare value |
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454 * @rmtoll CMP CMP LL_LPTIM_GetCompare |
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455 * @param LPTIMx Low-Power Timer instance |
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456 * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF |
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457 */ |
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458 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(LPTIM_TypeDef *LPTIMx) |
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459 { |
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460 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP)); |
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461 } |
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462 |
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463 /** |
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464 * @brief Get actual counter value |
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465 * @note When the LPTIM instance is running with an asynchronous clock, reading |
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466 * the LPTIMx_CNT register may return unreliable values. So in this case |
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467 * it is necessary to perform two consecutive read accesses and verify |
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468 * that the two returned values are identical. |
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469 * @rmtoll CNT CNT LL_LPTIM_GetCounter |
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470 * @param LPTIMx Low-Power Timer instance |
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471 * @retval Counter value |
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472 */ |
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473 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx) |
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474 { |
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475 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT)); |
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476 } |
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477 |
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478 /** |
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479 * @brief Set the counter mode (selection of the LPTIM counter clock source). |
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480 * @note The counter mode can be set only when the LPTIM instance is disabled. |
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481 * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode |
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482 * @param LPTIMx Low-Power Timer instance |
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483 * @param CounterMode This parameter can be one of the following values: |
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484 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL |
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485 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL |
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486 * @retval None |
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487 */ |
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488 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode) |
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489 { |
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490 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode); |
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491 } |
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492 |
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493 /** |
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494 * @brief Get the counter mode |
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495 * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode |
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496 * @param LPTIMx Low-Power Timer instance |
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497 * @retval Returned value can be one of the following values: |
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498 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL |
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499 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL |
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500 */ |
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501 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(LPTIM_TypeDef *LPTIMx) |
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502 { |
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503 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE)); |
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504 } |
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505 |
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506 /** |
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507 * @brief Configure the LPTIM instance output (LPTIMx_OUT) |
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508 * @note This function must be called when the LPTIM instance is disabled. |
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509 * @note Regarding the LPTIM output polarity the change takes effect |
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510 * immediately, so the output default value will change immediately after |
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511 * the polarity is re-configured, even before the timer is enabled. |
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512 * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n |
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513 * CFGR WAVPOL LL_LPTIM_ConfigOutput |
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514 * @param LPTIMx Low-Power Timer instance |
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515 * @param Waveform This parameter can be one of the following values: |
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516 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM |
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517 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE |
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518 * @param Polarity This parameter can be one of the following values: |
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519 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR |
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520 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE |
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521 * @retval None |
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522 */ |
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523 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity) |
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524 { |
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525 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity); |
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526 } |
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527 |
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528 /** |
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529 * @brief Set waveform shape |
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530 * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform |
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531 * @param LPTIMx Low-Power Timer instance |
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532 * @param Waveform This parameter can be one of the following values: |
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533 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM |
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534 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE |
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535 * @retval None |
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536 */ |
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537 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform) |
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538 { |
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539 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform); |
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540 } |
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541 |
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542 /** |
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543 * @brief Get actual waveform shape |
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544 * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform |
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545 * @param LPTIMx Low-Power Timer instance |
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546 * @retval Returned value can be one of the following values: |
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547 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM |
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548 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE |
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549 */ |
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550 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(LPTIM_TypeDef *LPTIMx) |
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551 { |
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552 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE)); |
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553 } |
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554 |
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555 /** |
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556 * @brief Set output polarity |
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557 * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity |
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558 * @param LPTIMx Low-Power Timer instance |
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559 * @param Polarity This parameter can be one of the following values: |
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560 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR |
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561 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE |
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562 * @retval None |
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563 */ |
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564 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity) |
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565 { |
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566 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity); |
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567 } |
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568 |
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569 /** |
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570 * @brief Get actual output polarity |
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571 * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity |
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572 * @param LPTIMx Low-Power Timer instance |
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573 * @retval Returned value can be one of the following values: |
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574 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR |
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575 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE |
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576 */ |
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577 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(LPTIM_TypeDef *LPTIMx) |
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578 { |
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579 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL)); |
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580 } |
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581 |
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582 /** |
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583 * @brief Set actual prescaler division ratio. |
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584 * @note This function must be called when the LPTIM instance is disabled. |
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585 * @note When the LPTIM is configured to be clocked by an internal clock source |
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586 * and the LPTIM counter is configured to be updated by active edges |
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587 * detected on the LPTIM external Input1, the internal clock provided to |
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588 * the LPTIM must be not be prescaled. |
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589 * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler |
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590 * @param LPTIMx Low-Power Timer instance |
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591 * @param Prescaler This parameter can be one of the following values: |
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592 * @arg @ref LL_LPTIM_PRESCALER_DIV1 |
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593 * @arg @ref LL_LPTIM_PRESCALER_DIV2 |
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594 * @arg @ref LL_LPTIM_PRESCALER_DIV4 |
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595 * @arg @ref LL_LPTIM_PRESCALER_DIV8 |
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596 * @arg @ref LL_LPTIM_PRESCALER_DIV16 |
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597 * @arg @ref LL_LPTIM_PRESCALER_DIV32 |
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598 * @arg @ref LL_LPTIM_PRESCALER_DIV64 |
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599 * @arg @ref LL_LPTIM_PRESCALER_DIV128 |
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600 * @retval None |
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601 */ |
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602 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler) |
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603 { |
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604 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler); |
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605 } |
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606 |
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607 /** |
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608 * @brief Get actual prescaler division ratio. |
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609 * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler |
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610 * @param LPTIMx Low-Power Timer instance |
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611 * @retval Returned value can be one of the following values: |
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612 * @arg @ref LL_LPTIM_PRESCALER_DIV1 |
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613 * @arg @ref LL_LPTIM_PRESCALER_DIV2 |
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614 * @arg @ref LL_LPTIM_PRESCALER_DIV4 |
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615 * @arg @ref LL_LPTIM_PRESCALER_DIV8 |
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616 * @arg @ref LL_LPTIM_PRESCALER_DIV16 |
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617 * @arg @ref LL_LPTIM_PRESCALER_DIV32 |
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618 * @arg @ref LL_LPTIM_PRESCALER_DIV64 |
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619 * @arg @ref LL_LPTIM_PRESCALER_DIV128 |
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620 */ |
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621 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx) |
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622 { |
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623 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC)); |
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624 } |
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625 |
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626 |
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627 /** |
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628 * @} |
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629 */ |
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630 |
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631 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration |
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632 * @{ |
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633 */ |
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634 |
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635 /** |
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636 * @brief Enable the timeout function |
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637 * @note This function must be called when the LPTIM instance is disabled. |
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638 * @note The first trigger event will start the timer, any successive trigger |
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639 * event will reset the counter and the timer will restart. |
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640 * @note The timeout value corresponds to the compare value; if no trigger |
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641 * occurs within the expected time frame, the MCU is waked-up by the |
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642 * compare match event. |
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643 * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout |
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644 * @param LPTIMx Low-Power Timer instance |
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645 * @retval None |
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646 */ |
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647 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx) |
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648 { |
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649 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT); |
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650 } |
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651 |
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652 /** |
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653 * @brief Disable the timeout function |
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654 * @note This function must be called when the LPTIM instance is disabled. |
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655 * @note A trigger event arriving when the timer is already started will be |
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656 * ignored. |
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657 * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout |
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658 * @param LPTIMx Low-Power Timer instance |
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659 * @retval None |
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660 */ |
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661 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx) |
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662 { |
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663 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT); |
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664 } |
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665 |
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666 /** |
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667 * @brief Indicate whether the timeout function is enabled. |
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668 * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout |
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669 * @param LPTIMx Low-Power Timer instance |
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670 * @retval State of bit (1 or 0). |
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671 */ |
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672 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(LPTIM_TypeDef *LPTIMx) |
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673 { |
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674 return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == (LPTIM_CFGR_TIMOUT)); |
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675 } |
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676 |
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677 /** |
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678 * @brief Start the LPTIM counter |
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679 * @note This function must be called when the LPTIM instance is disabled. |
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680 * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw |
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681 * @param LPTIMx Low-Power Timer instance |
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682 * @retval None |
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683 */ |
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684 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx) |
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685 { |
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686 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN); |
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687 } |
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688 |
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689 /** |
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690 * @brief Configure the external trigger used as a trigger event for the LPTIM. |
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691 * @note This function must be called when the LPTIM instance is disabled. |
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692 * @note An internal clock source must be present when a digital filter is |
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693 * required for the trigger. |
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694 * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n |
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695 * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n |
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696 * CFGR TRIGEN LL_LPTIM_ConfigTrigger |
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697 * @param LPTIMx Low-Power Timer instance |
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698 * @param Source This parameter can be one of the following values: |
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699 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO |
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700 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA |
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701 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB |
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702 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1 |
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703 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO |
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704 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO |
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705 * @param Filter This parameter can be one of the following values: |
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706 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE |
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707 * @arg @ref LL_LPTIM_TRIG_FILTER_2 |
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708 * @arg @ref LL_LPTIM_TRIG_FILTER_4 |
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709 * @arg @ref LL_LPTIM_TRIG_FILTER_8 |
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710 * @param Polarity This parameter can be one of the following values: |
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711 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING |
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712 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING |
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713 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING |
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714 * (*) value not defined in all devices. |
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715 * @retval None |
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716 */ |
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717 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity) |
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718 { |
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719 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity); |
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720 } |
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721 |
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722 /** |
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723 * @brief Get actual external trigger source. |
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724 * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource |
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725 * @param LPTIMx Low-Power Timer instance |
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726 * @retval Returned value can be one of the following values: |
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727 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO |
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728 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA |
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729 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB |
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730 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1 |
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731 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO |
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732 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO |
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733 */ |
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734 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(LPTIM_TypeDef *LPTIMx) |
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735 { |
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736 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL)); |
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737 } |
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738 |
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739 /** |
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740 * @brief Get actual external trigger filter. |
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741 * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter |
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742 * @param LPTIMx Low-Power Timer instance |
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743 * @retval Returned value can be one of the following values: |
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744 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE |
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745 * @arg @ref LL_LPTIM_TRIG_FILTER_2 |
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746 * @arg @ref LL_LPTIM_TRIG_FILTER_4 |
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747 * @arg @ref LL_LPTIM_TRIG_FILTER_8 |
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748 */ |
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749 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(LPTIM_TypeDef *LPTIMx) |
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750 { |
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751 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT)); |
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752 } |
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753 |
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754 /** |
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755 * @brief Get actual external trigger polarity. |
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756 * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity |
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757 * @param LPTIMx Low-Power Timer instance |
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758 * @retval Returned value can be one of the following values: |
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759 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING |
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760 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING |
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761 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING |
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762 */ |
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763 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx) |
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764 { |
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765 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN)); |
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766 } |
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767 |
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768 /** |
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769 * @} |
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770 */ |
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771 |
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772 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration |
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773 * @{ |
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774 */ |
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775 |
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776 /** |
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777 * @brief Set the source of the clock used by the LPTIM instance. |
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778 * @note This function must be called when the LPTIM instance is disabled. |
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779 * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource |
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780 * @param LPTIMx Low-Power Timer instance |
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781 * @param ClockSource This parameter can be one of the following values: |
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782 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL |
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783 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL |
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784 * @retval None |
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785 */ |
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786 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource) |
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787 { |
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788 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource); |
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789 } |
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|
790 |
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|
791 /** |
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792 * @brief Get actual LPTIM instance clock source. |
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793 * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource |
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794 * @param LPTIMx Low-Power Timer instance |
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795 * @retval Returned value can be one of the following values: |
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796 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL |
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797 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL |
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798 */ |
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799 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx) |
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800 { |
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801 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL)); |
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802 } |
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|
803 |
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804 /** |
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805 * @brief Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source. |
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806 * @note This function must be called when the LPTIM instance is disabled. |
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807 * @note When both external clock signal edges are considered active ones, |
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808 * the LPTIM must also be clocked by an internal clock source with a |
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809 * frequency equal to at least four times the external clock frequency. |
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810 * @note An internal clock source must be present when a digital filter is |
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811 * required for external clock. |
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812 * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n |
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813 * CFGR CKPOL LL_LPTIM_ConfigClock |
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814 * @param LPTIMx Low-Power Timer instance |
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815 * @param ClockFilter This parameter can be one of the following values: |
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816 * @arg @ref LL_LPTIM_CLK_FILTER_NONE |
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817 * @arg @ref LL_LPTIM_CLK_FILTER_2 |
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818 * @arg @ref LL_LPTIM_CLK_FILTER_4 |
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819 * @arg @ref LL_LPTIM_CLK_FILTER_8 |
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820 * @param ClockPolarity This parameter can be one of the following values: |
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821 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING |
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822 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING |
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823 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING |
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824 * @retval None |
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825 */ |
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826 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity) |
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827 { |
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828 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity); |
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829 } |
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|
830 |
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831 /** |
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832 * @brief Get actual clock polarity |
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833 * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity |
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834 * @param LPTIMx Low-Power Timer instance |
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835 * @retval Returned value can be one of the following values: |
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836 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING |
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837 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING |
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838 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING |
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839 */ |
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840 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(LPTIM_TypeDef *LPTIMx) |
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841 { |
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842 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL)); |
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843 } |
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844 |
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845 /** |
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846 * @brief Get actual clock digital filter |
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847 * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter |
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848 * @param LPTIMx Low-Power Timer instance |
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849 * @retval Returned value can be one of the following values: |
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850 * @arg @ref LL_LPTIM_CLK_FILTER_NONE |
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851 * @arg @ref LL_LPTIM_CLK_FILTER_2 |
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852 * @arg @ref LL_LPTIM_CLK_FILTER_4 |
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853 * @arg @ref LL_LPTIM_CLK_FILTER_8 |
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854 */ |
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855 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx) |
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856 { |
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857 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT)); |
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858 } |
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859 |
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860 /** |
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861 * @} |
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862 */ |
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863 |
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864 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode |
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865 * @{ |
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866 */ |
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867 |
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868 /** |
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869 * @brief Configure the encoder mode. |
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870 * @note This function must be called when the LPTIM instance is disabled. |
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871 * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode |
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872 * @param LPTIMx Low-Power Timer instance |
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873 * @param EncoderMode This parameter can be one of the following values: |
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874 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING |
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875 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING |
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876 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING |
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877 * @retval None |
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878 */ |
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879 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode) |
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880 { |
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881 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode); |
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882 } |
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883 |
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884 /** |
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885 * @brief Get actual encoder mode. |
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886 * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode |
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887 * @param LPTIMx Low-Power Timer instance |
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888 * @retval Returned value can be one of the following values: |
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889 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING |
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890 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING |
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891 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING |
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892 */ |
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893 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(LPTIM_TypeDef *LPTIMx) |
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|
894 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
895 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL)); |
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Added current STM32 standandard libraries in version independend folder structure
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|
896 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
897 |
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|
898 /** |
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|
899 * @brief Enable the encoder mode |
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Added current STM32 standandard libraries in version independend folder structure
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|
900 * @note This function must be called when the LPTIM instance is disabled. |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
901 * @note In this mode the LPTIM instance must be clocked by an internal clock |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
902 * source. Also, the prescaler division ratio must be equal to 1. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
903 * @note LPTIM instance must be configured in continuous mode prior enabling |
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Added current STM32 standandard libraries in version independend folder structure
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|
904 * the encoder mode. |
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Added current STM32 standandard libraries in version independend folder structure
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|
905 * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
906 * @param LPTIMx Low-Power Timer instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
907 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
908 */ |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
909 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx) |
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Added current STM32 standandard libraries in version independend folder structure
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|
910 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
911 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC); |
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Added current STM32 standandard libraries in version independend folder structure
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|
912 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
913 |
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Added current STM32 standandard libraries in version independend folder structure
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|
914 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
915 * @brief Disable the encoder mode |
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Added current STM32 standandard libraries in version independend folder structure
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|
916 * @note This function must be called when the LPTIM instance is disabled. |
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Added current STM32 standandard libraries in version independend folder structure
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|
917 * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
918 * @param LPTIMx Low-Power Timer instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
919 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
920 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
921 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx) |
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Added current STM32 standandard libraries in version independend folder structure
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|
922 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
923 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC); |
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|
924 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
925 |
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Added current STM32 standandard libraries in version independend folder structure
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|
926 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
927 * @brief Indicates whether the LPTIM operates in encoder mode. |
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Added current STM32 standandard libraries in version independend folder structure
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|
928 * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode |
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Added current STM32 standandard libraries in version independend folder structure
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|
929 * @param LPTIMx Low-Power Timer instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
930 * @retval State of bit (1 or 0). |
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Added current STM32 standandard libraries in version independend folder structure
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|
931 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
932 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx) |
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Added current STM32 standandard libraries in version independend folder structure
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|
933 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
934 return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == (LPTIM_CFGR_ENC)); |
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|
935 } |
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|
936 |
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Added current STM32 standandard libraries in version independend folder structure
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|
937 /** |
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|
938 * @} |
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|
939 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
940 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
941 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management |
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Added current STM32 standandard libraries in version independend folder structure
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|
942 * @{ |
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|
943 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
944 |
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|
945 /** |
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|
946 * @brief Clear the compare match flag (CMPMCF) |
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Added current STM32 standandard libraries in version independend folder structure
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|
947 * @rmtoll ICR CMPMCF LL_LPTIM_ClearFLAG_CMPM |
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Added current STM32 standandard libraries in version independend folder structure
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|
948 * @param LPTIMx Low-Power Timer instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
949 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
950 */ |
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|
951 __STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx) |
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Added current STM32 standandard libraries in version independend folder structure
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|
952 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
953 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF); |
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|
954 } |
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|
955 |
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|
956 /** |
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|
957 * @brief Inform application whether a compare match interrupt has occurred. |
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|
958 * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM |
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|
959 * @param LPTIMx Low-Power Timer instance |
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|
960 * @retval State of bit (1 or 0). |
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|
961 */ |
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|
962 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(LPTIM_TypeDef *LPTIMx) |
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|
963 { |
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|
964 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == (LPTIM_ISR_CMPM)); |
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|
965 } |
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|
966 |
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|
967 /** |
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|
968 * @brief Clear the autoreload match flag (ARRMCF) |
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|
969 * @rmtoll ICR ARRMCF LL_LPTIM_ClearFLAG_ARRM |
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|
970 * @param LPTIMx Low-Power Timer instance |
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|
971 * @retval None |
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|
972 */ |
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|
973 __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx) |
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|
974 { |
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975 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF); |
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|
976 } |
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|
977 |
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|
978 /** |
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979 * @brief Inform application whether a autoreload match interrupt has occured. |
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980 * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM |
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981 * @param LPTIMx Low-Power Timer instance |
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982 * @retval State of bit (1 or 0). |
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|
983 */ |
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984 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx) |
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|
985 { |
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|
986 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == (LPTIM_ISR_ARRM)); |
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|
987 } |
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|
988 |
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|
989 /** |
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990 * @brief Clear the external trigger valid edge flag(EXTTRIGCF). |
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991 * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG |
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992 * @param LPTIMx Low-Power Timer instance |
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|
993 * @retval None |
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|
994 */ |
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995 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx) |
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996 { |
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997 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF); |
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|
998 } |
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|
999 |
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1000 /** |
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1001 * @brief Inform application whether a valid edge on the selected external trigger input has occurred. |
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1002 * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG |
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1003 * @param LPTIMx Low-Power Timer instance |
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1004 * @retval State of bit (1 or 0). |
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|
1005 */ |
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1006 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx) |
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1007 { |
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|
1008 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == (LPTIM_ISR_EXTTRIG)); |
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|
1009 } |
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|
1010 |
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|
1011 /** |
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1012 * @brief Clear the compare register update interrupt flag (CMPOKCF). |
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1013 * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK |
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1014 * @param LPTIMx Low-Power Timer instance |
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1015 * @retval None |
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|
1016 */ |
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1017 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx) |
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1018 { |
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1019 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF); |
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|
1020 } |
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1021 |
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|
1022 /** |
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|
1023 * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed; If so, a new one can be initiated. |
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Added current STM32 standandard libraries in version independend folder structure
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1024 * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK |
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1025 * @param LPTIMx Low-Power Timer instance |
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|
1026 * @retval State of bit (1 or 0). |
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|
1027 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1028 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(LPTIM_TypeDef *LPTIMx) |
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|
1029 { |
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|
1030 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == (LPTIM_ISR_CMPOK)); |
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|
1031 } |
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|
1032 |
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|
1033 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
1034 * @brief Clear the autoreload register update interrupt flag (ARROKCF). |
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Added current STM32 standandard libraries in version independend folder structure
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1035 * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK |
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|
1036 * @param LPTIMx Low-Power Timer instance |
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|
1037 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
1038 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1039 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx) |
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Added current STM32 standandard libraries in version independend folder structure
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|
1040 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
1041 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF); |
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|
1042 } |
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|
1043 |
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|
1044 /** |
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|
1045 * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed; If so, a new one can be initiated. |
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Added current STM32 standandard libraries in version independend folder structure
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1046 * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK |
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1047 * @param LPTIMx Low-Power Timer instance |
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1048 * @retval State of bit (1 or 0). |
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Added current STM32 standandard libraries in version independend folder structure
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|
1049 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1050 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(LPTIM_TypeDef *LPTIMx) |
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|
1051 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
1052 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == (LPTIM_ISR_ARROK)); |
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|
1053 } |
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|
1054 |
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|
1055 /** |
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|
1056 * @brief Clear the counter direction change to up interrupt flag (UPCF). |
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1057 * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP |
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1058 * @param LPTIMx Low-Power Timer instance |
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1059 * @retval None |
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|
1060 */ |
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|
1061 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx) |
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|
1062 { |
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|
1063 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF); |
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|
1064 } |
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|
1065 |
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|
1066 /** |
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|
1067 * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode). |
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1068 * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP |
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1069 * @param LPTIMx Low-Power Timer instance |
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1070 * @retval State of bit (1 or 0). |
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|
1071 */ |
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|
1072 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(LPTIM_TypeDef *LPTIMx) |
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|
1073 { |
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|
1074 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == (LPTIM_ISR_UP)); |
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|
1075 } |
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|
1076 |
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|
1077 /** |
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|
1078 * @brief Clear the counter direction change to down interrupt flag (DOWNCF). |
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1079 * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN |
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|
1080 * @param LPTIMx Low-Power Timer instance |
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|
1081 * @retval None |
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|
1082 */ |
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|
1083 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx) |
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1084 { |
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1085 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF); |
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|
1086 } |
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|
1087 |
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|
1088 /** |
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|
1089 * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode). |
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1090 * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN |
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1091 * @param LPTIMx Low-Power Timer instance |
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1092 * @retval State of bit (1 or 0). |
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|
1093 */ |
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|
1094 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx) |
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|
1095 { |
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|
1096 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == (LPTIM_ISR_DOWN)); |
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|
1097 } |
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|
1098 |
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|
1099 /** |
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|
1100 * @} |
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|
1101 */ |
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|
1102 |
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1103 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management |
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1104 * @{ |
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|
1105 */ |
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1106 |
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1107 /** |
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1108 * @brief Enable compare match interrupt (CMPMIE). |
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1109 * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM |
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1110 * @param LPTIMx Low-Power Timer instance |
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|
1111 * @retval None |
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|
1112 */ |
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1113 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx) |
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1114 { |
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1115 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE); |
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1116 } |
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1117 |
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1118 /** |
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1119 * @brief Disable compare match interrupt (CMPMIE). |
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1120 * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM |
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1121 * @param LPTIMx Low-Power Timer instance |
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1122 * @retval None |
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1123 */ |
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1124 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx) |
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1125 { |
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1126 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE); |
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1127 } |
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1128 |
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1129 /** |
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1130 * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled. |
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1131 * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM |
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1132 * @param LPTIMx Low-Power Timer instance |
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1133 * @retval State of bit (1 or 0). |
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1134 */ |
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1135 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(LPTIM_TypeDef *LPTIMx) |
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1136 { |
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1137 return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == (LPTIM_IER_CMPMIE)); |
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1138 } |
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1139 |
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1140 /** |
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1141 * @brief Enable autoreload match interrupt (ARRMIE). |
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1142 * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM |
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1143 * @param LPTIMx Low-Power Timer instance |
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1144 * @retval None |
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1145 */ |
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1146 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx) |
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1147 { |
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|
1148 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1149 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1150 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1151 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1152 * @brief Disable autoreload match interrupt (ARRMIE). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1153 * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1154 * @param LPTIMx Low-Power Timer instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1155 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1156 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1157 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1158 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1159 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1160 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1161 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1162 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1163 * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1164 * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1165 * @param LPTIMx Low-Power Timer instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1166 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1167 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1168 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1169 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1170 return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == (LPTIM_IER_ARRMIE)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1171 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1172 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1173 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1174 * @brief Enable external trigger valid edge interrupt (EXTTRIGIE). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1175 * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1176 * @param LPTIMx Low-Power Timer instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1177 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1178 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1179 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1180 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1181 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1182 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1183 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1184 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1185 * @brief Disable external trigger valid edge interrupt (EXTTRIGIE). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1186 * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1187 * @param LPTIMx Low-Power Timer instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1188 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1189 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1190 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1191 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1192 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1193 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1194 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1195 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1196 * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1197 * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1198 * @param LPTIMx Low-Power Timer instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1199 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1200 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1201 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(LPTIM_TypeDef *LPTIMx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1202 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1203 return (READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == (LPTIM_IER_EXTTRIGIE)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1204 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1205 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1206 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1207 * @brief Enable compare register write completed interrupt (CMPOKIE). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1208 * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1209 * @param LPTIMx Low-Power Timer instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1210 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1211 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1212 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1213 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1214 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1215 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1216 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1217 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1218 * @brief Disable compare register write completed interrupt (CMPOKIE). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1219 * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1220 * @param LPTIMx Low-Power Timer instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1221 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1222 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1223 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1224 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1225 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1226 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1227 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1228 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1229 * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1230 * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1231 * @param LPTIMx Low-Power Timer instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1232 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1233 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1234 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(LPTIM_TypeDef *LPTIMx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1235 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1236 return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == (LPTIM_IER_CMPOKIE)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1237 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1238 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1239 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1240 * @brief Enable autoreload register write completed interrupt (ARROKIE). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1241 * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1242 * @param LPTIMx Low-Power Timer instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1243 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1244 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1245 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1246 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1247 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1248 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1249 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1250 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1251 * @brief Disable autoreload register write completed interrupt (ARROKIE). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1252 * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1253 * @param LPTIMx Low-Power Timer instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1254 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1255 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1256 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1257 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1258 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1259 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1260 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1261 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1262 * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1263 * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1264 * @param LPTIMx Low-Power Timer instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1265 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1266 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1267 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(LPTIM_TypeDef *LPTIMx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1268 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1269 return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == (LPTIM_IER_ARROKIE)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1270 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1271 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1272 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1273 * @brief Enable direction change to up interrupt (UPIE). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1274 * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1275 * @param LPTIMx Low-Power Timer instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1276 * @retval None |
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1277 */ |
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1278 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx) |
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1279 { |
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1280 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE); |
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1281 } |
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1282 |
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1283 /** |
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1284 * @brief Disable direction change to up interrupt (UPIE). |
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1285 * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP |
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1286 * @param LPTIMx Low-Power Timer instance |
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1287 * @retval None |
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1288 */ |
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1289 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx) |
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1290 { |
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1291 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE); |
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1292 } |
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1293 |
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1294 /** |
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1295 * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled. |
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1296 * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP |
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1297 * @param LPTIMx Low-Power Timer instance |
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1298 * @retval State of bit (1 or 0). |
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1299 */ |
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1300 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(LPTIM_TypeDef *LPTIMx) |
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1301 { |
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1302 return (READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == (LPTIM_IER_UPIE)); |
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1303 } |
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1304 |
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1305 /** |
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1306 * @brief Enable direction change to down interrupt (DOWNIE). |
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1307 * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN |
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1308 * @param LPTIMx Low-Power Timer instance |
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1309 * @retval None |
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1310 */ |
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1311 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx) |
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1312 { |
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1313 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE); |
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1314 } |
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1315 |
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1316 /** |
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1317 * @brief Disable direction change to down interrupt (DOWNIE). |
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1318 * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN |
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1319 * @param LPTIMx Low-Power Timer instance |
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1320 * @retval None |
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1321 */ |
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1322 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx) |
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1323 { |
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1324 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE); |
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1325 } |
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1326 |
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1327 /** |
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1328 * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled. |
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1329 * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN |
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1330 * @param LPTIMx Low-Power Timer instance |
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1331 * @retval State of bit (1 or 0). |
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1332 */ |
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1333 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx) |
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1334 { |
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1335 return (READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == (LPTIM_IER_DOWNIE)); |
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1336 } |
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1337 |
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1338 /** |
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1339 * @} |
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1340 */ |
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1341 |
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1342 #if defined(USE_FULL_LL_DRIVER) |
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1343 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions |
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1344 * @{ |
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1345 */ |
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1346 |
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1347 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx); |
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1348 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct); |
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1349 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct); |
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1350 /** |
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1351 * @} |
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1352 */ |
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1353 #endif /* USE_FULL_LL_DRIVER */ |
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1354 |
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1355 /** |
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1356 * @} |
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|
1357 */ |
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|
1358 |
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1359 /** |
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1360 * @} |
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1361 */ |
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1362 |
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1363 #endif /* LPTIM1 */ |
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1364 |
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1365 /** |
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1366 * @} |
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|
1367 */ |
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|
1368 |
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|
1369 #ifdef __cplusplus |
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|
1370 } |
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|
1371 #endif |
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|
1372 |
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1373 #endif /* __STM32F4xx_LL_LPTIM_H */ |
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1374 |
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1375 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |