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annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_iwdg.h @ 265:a91d99265884 IPC_Sync_Improvment_2

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Increase SPI com timeout for cold start and wake up There are use cases which cause the startup at Main to be longer than 300ms. In that case error reaction on RTE side would take place even if not needed. On the other hand having an longer timeout delays timeout detection and therefor the time till connection is reestablished => Added function to separate startup from common operation use case
author ideenmodellierer
date Sun, 14 Apr 2019 14:22:41 +0200
parents c78bcbd5deda
children
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128
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_iwdg.h
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4 * @author MCD Application Team
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5 * @brief Header file of IWDG HAL module.
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6 ******************************************************************************
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7 * @attention
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8 *
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9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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10 *
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11 * Redistribution and use in source and binary forms, with or without modification,
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12 * are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright notice,
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16 * this list of conditions and the following disclaimer in the documentation
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17 * and/or other materials provided with the distribution.
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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19 * may be used to endorse or promote products derived from this software
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20 * without specific prior written permission.
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21 *
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 *
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33 ******************************************************************************
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34 */
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35
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36 /* Define to prevent recursive inclusion -------------------------------------*/
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37 #ifndef __STM32F4xx_HAL_IWDG_H
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38 #define __STM32F4xx_HAL_IWDG_H
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39
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40 #ifdef __cplusplus
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41 extern "C" {
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42 #endif
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43
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44 /* Includes ------------------------------------------------------------------*/
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45 #include "stm32f4xx_hal_def.h"
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46
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47 /** @addtogroup STM32F4xx_HAL_Driver
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48 * @{
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49 */
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50
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51 /** @addtogroup IWDG
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52 * @{
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53 */
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54
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55 /* Exported types ------------------------------------------------------------*/
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56 /** @defgroup IWDG_Exported_Types IWDG Exported Types
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57 * @{
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58 */
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59
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60 /**
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61 * @brief IWDG Init structure definition
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62 */
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63 typedef struct
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64 {
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65 uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
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66 This parameter can be a value of @ref IWDG_Prescaler */
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67
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68 uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
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69 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
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70
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71 } IWDG_InitTypeDef;
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72
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73 /**
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74 * @brief IWDG Handle Structure definition
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75 */
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76 typedef struct
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77 {
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78 IWDG_TypeDef *Instance; /*!< Register base address */
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79
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80 IWDG_InitTypeDef Init; /*!< IWDG required parameters */
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81
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82 }IWDG_HandleTypeDef;
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83
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84 /**
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85 * @}
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86 */
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87
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88 /* Exported constants --------------------------------------------------------*/
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89 /** @defgroup IWDG_Exported_Constants IWDG Exported Constants
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90 * @{
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91 */
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92
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93 /** @defgroup IWDG_Prescaler IWDG Prescaler
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94 * @{
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95 */
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96 #define IWDG_PRESCALER_4 0x00000000U /*!< IWDG prescaler set to 4 */
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97 #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
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98 #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
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99 #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
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100 #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
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101 #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
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102 #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
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103 /**
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104 * @}
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105 */
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106
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107 /**
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108 * @}
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109 */
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110
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111 /* Exported macros -----------------------------------------------------------*/
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112 /** @defgroup IWDG_Exported_Macros IWDG Exported Macros
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113 * @{
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114 */
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115
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116 /**
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117 * @brief Enable the IWDG peripheral.
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118 * @param __HANDLE__ IWDG handle
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119 * @retval None
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120 */
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121 #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
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122
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123 /**
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124 * @brief Reload IWDG counter with value defined in the reload register
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125 * (write access to IWDG_PR & IWDG_RLR registers disabled).
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126 * @param __HANDLE__ IWDG handle
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127 * @retval None
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128 */
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129 #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
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130
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131 /**
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132 * @}
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133 */
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134
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135 /* Exported functions --------------------------------------------------------*/
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136 /** @defgroup IWDG_Exported_Functions IWDG Exported Functions
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137 * @{
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138 */
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139
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140 /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
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141 * @{
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142 */
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143 /* Initialization/Start functions ********************************************/
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144 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
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145 /**
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146 * @}
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147 */
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148
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149 /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
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150 * @{
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151 */
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152 /* I/O operation functions ****************************************************/
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153 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
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154 /**
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155 * @}
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156 */
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157
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158 /**
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159 * @}
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160 */
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161
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162 /* Private constants ---------------------------------------------------------*/
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163 /** @defgroup IWDG_Private_Constants IWDG Private Constants
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164 * @{
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165 */
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166
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167 /**
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168 * @brief IWDG Key Register BitMask
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169 */
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170 #define IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */
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171 #define IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */
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172 #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */
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173 #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */
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174
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175 /**
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176 * @}
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177 */
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178
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179 /* Private macros ------------------------------------------------------------*/
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180 /** @defgroup IWDG_Private_Macros IWDG Private Macros
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181 * @{
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182 */
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183
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184 /**
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185 * @brief Enable write access to IWDG_PR and IWDG_RLR registers.
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186 * @param __HANDLE__ IWDG handle
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187 * @retval None
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188 */
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189 #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
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190
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191 /**
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192 * @brief Disable write access to IWDG_PR and IWDG_RLR registers.
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193 * @param __HANDLE__ IWDG handle
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194 * @retval None
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195 */
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196 #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
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197
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198 /**
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199 * @brief Check IWDG prescaler value.
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200 * @param __PRESCALER__ IWDG prescaler value
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201 * @retval None
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202 */
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203 #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
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204 ((__PRESCALER__) == IWDG_PRESCALER_8) || \
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205 ((__PRESCALER__) == IWDG_PRESCALER_16) || \
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206 ((__PRESCALER__) == IWDG_PRESCALER_32) || \
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207 ((__PRESCALER__) == IWDG_PRESCALER_64) || \
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208 ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
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209 ((__PRESCALER__) == IWDG_PRESCALER_256))
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210
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211 /**
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212 * @brief Check IWDG reload value.
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213 * @param __RELOAD__ IWDG reload value
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214 * @retval None
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215 */
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216 #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
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217
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218 /**
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219 * @}
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220 */
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221
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222 /**
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223 * @}
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224 */
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225
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226 /**
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227 * @}
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228 */
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229
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230
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231 #ifdef __cplusplus
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232 }
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233 #endif
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234
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235 #endif /* __STM32F4xx_HAL_IWDG_H */
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236
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237 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/