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38
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal.c
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4 * @author MCD Application Team
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5 * @version V1.2.0
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6 * @date 26-December-2014
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7 * @brief HAL module driver.
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8 * This is the common part of the HAL initialization
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9 *
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10 @verbatim
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11 ==============================================================================
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12 ##### How to use this driver #####
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13 ==============================================================================
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14 [..]
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15 The common HAL driver contains a set of generic and common APIs that can be
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16 used by the PPP peripheral drivers and the user to start using the HAL.
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17 [..]
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18 The HAL contains two APIs' categories:
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19 (+) Common HAL APIs
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20 (+) Services HAL APIs
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21
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22 @endverbatim
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23 ******************************************************************************
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24 * @attention
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25 *
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26 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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27 *
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28 * Redistribution and use in source and binary forms, with or without modification,
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29 * are permitted provided that the following conditions are met:
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30 * 1. Redistributions of source code must retain the above copyright notice,
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31 * this list of conditions and the following disclaimer.
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32 * 2. Redistributions in binary form must reproduce the above copyright notice,
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33 * this list of conditions and the following disclaimer in the documentation
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34 * and/or other materials provided with the distribution.
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35 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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36 * may be used to endorse or promote products derived from this software
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37 * without specific prior written permission.
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38 *
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39 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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40 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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41 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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42 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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43 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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44 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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45 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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46 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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47 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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48 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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49 *
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50 ******************************************************************************
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51 */
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52
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53 /* Includes ------------------------------------------------------------------*/
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54 #include "stm32f4xx_hal.h"
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55
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56 /** @addtogroup STM32F4xx_HAL_Driver
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57 * @{
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58 */
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59
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60 /** @defgroup HAL HAL
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61 * @brief HAL module driver.
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62 * @{
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63 */
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64
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65 /* Private typedef -----------------------------------------------------------*/
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66 /* Private define ------------------------------------------------------------*/
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67 /** @addtogroup HAL_Private_Constants
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68 * @{
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69 */
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70 /**
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71 * @brief STM32F4xx HAL Driver version number V1.2.0
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72 */
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73 #define __STM32F4xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */
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74 #define __STM32F4xx_HAL_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
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75 #define __STM32F4xx_HAL_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
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76 #define __STM32F4xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */
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77 #define __STM32F4xx_HAL_VERSION ((__STM32F4xx_HAL_VERSION_MAIN << 24)\
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78 |(__STM32F4xx_HAL_VERSION_SUB1 << 16)\
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79 |(__STM32F4xx_HAL_VERSION_SUB2 << 8 )\
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80 |(__STM32F4xx_HAL_VERSION_RC))
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81
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82 #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF)
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83
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84 /* ------------ RCC registers bit address in the alias region ----------- */
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85 #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
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86 /* --- MEMRMP Register ---*/
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87 /* Alias word address of UFB_MODE bit */
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88 #define MEMRMP_OFFSET SYSCFG_OFFSET
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89 #define UFB_MODE_BIT_NUMBER POSITION_VAL(SYSCFG_MEMRMP_UFB_MODE)
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90 #define UFB_MODE_BB (PERIPH_BB_BASE + (MEMRMP_OFFSET * 32) + (UFB_MODE_BIT_NUMBER * 4))
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91
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92 /* --- CMPCR Register ---*/
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93 /* Alias word address of CMP_PD bit */
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94 #define CMPCR_OFFSET (SYSCFG_OFFSET + 0x20)
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95 #define CMP_PD_BIT_NUMBER POSITION_VAL(SYSCFG_CMPCR_CMP_PD)
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96 #define CMPCR_CMP_PD_BB (PERIPH_BB_BASE + (CMPCR_OFFSET * 32) + (CMP_PD_BIT_NUMBER * 4))
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97 /**
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98 * @}
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99 */
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100
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101 /* Private macro -------------------------------------------------------------*/
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102 /* Private variables ---------------------------------------------------------*/
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103 /** @addtogroup HAL_Private_Variables
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104 * @{
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105 */
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106 static __IO uint32_t uwTick;
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107 /**
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108 * @}
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109 */
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110 /* Private function prototypes -----------------------------------------------*/
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111 /* Private functions ---------------------------------------------------------*/
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112
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113 /** @defgroup HAL_Exported_Functions HAL Exported Functions
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114 * @{
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115 */
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116
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117 /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions
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118 * @brief Initialization and de-initialization functions
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119 *
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120 @verbatim
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121 ===============================================================================
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122 ##### Initialization and de-initialization functions #####
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123 ===============================================================================
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124 [..] This section provides functions allowing to:
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125 (+) Initializes the Flash interface the NVIC allocation and initial clock
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126 configuration. It initializes the systick also when timeout is needed
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127 and the backup domain when enabled.
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128 (+) de-Initializes common part of the HAL
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129 (+) Configure The time base source to have 1ms time base with a dedicated
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130 Tick interrupt priority.
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131 (++) Systick timer is used by default as source of time base, but user
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132 can eventually implement his proper time base source (a general purpose
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133 timer for example or other time source), keeping in mind that Time base
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134 duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
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135 handled in milliseconds basis.
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136 (++) Time base configuration function (HAL_InitTick ()) is called automatically
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137 at the beginning of the program after reset by HAL_Init() or at any time
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138 when clock is configured, by HAL_RCC_ClockConfig().
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139 (++) Source of time base is configured to generate interrupts at regular
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140 time intervals. Care must be taken if HAL_Delay() is called from a
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141 peripheral ISR process, the Tick interrupt line must have higher priority
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142 (numerically lower) than the peripheral interrupt. Otherwise the caller
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143 ISR process will be blocked.
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144 (++) functions affecting time base configurations are declared as __weak
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145 to make override possible in case of other implementations in user file.
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146 @endverbatim
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147 * @{
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148 */
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149
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150 /**
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151 * @brief This function is used to initialize the HAL Library; it must be the first
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152 * instruction to be executed in the main program (before to call any other
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153 * HAL function), it performs the following:
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154 * Configure the Flash prefetch, instruction and Data caches.
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155 * Configures the SysTick to generate an interrupt each 1 millisecond,
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156 * which is clocked by the HSI (at this stage, the clock is not yet
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157 * configured and thus the system is running from the internal HSI at 16 MHz).
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158 * Set NVIC Group Priority to 4.
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159 * Calls the HAL_MspInit() callback function defined in user file
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160 * "stm32f4xx_hal_msp.c" to do the global low level hardware initialization
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161 *
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162 * @note SysTick is used as time base for the HAL_Delay() function, the application
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163 * need to ensure that the SysTick time base is always set to 1 millisecond
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164 * to have correct HAL operation.
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165 * @retval HAL status
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166 */
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167 HAL_StatusTypeDef HAL_Init(void)
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168 {
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169 /* Configure Flash prefetch, Instruction cache, Data cache */
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170 #if (INSTRUCTION_CACHE_ENABLE != 0)
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171 __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
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172 #endif /* INSTRUCTION_CACHE_ENABLE */
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173
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174 #if (DATA_CACHE_ENABLE != 0)
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175 __HAL_FLASH_DATA_CACHE_ENABLE();
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176 #endif /* DATA_CACHE_ENABLE */
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177
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178 #if (PREFETCH_ENABLE != 0)
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179 __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
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180 #endif /* PREFETCH_ENABLE */
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181
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182 /* Set Interrupt Group Priority */
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183 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
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184
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185 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
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186 HAL_InitTick(TICK_INT_PRIORITY);
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187
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188 /* Init the low level hardware */
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189 HAL_MspInit();
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190
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191 /* Return function status */
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192 return HAL_OK;
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193 }
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194
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195 /**
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196 * @brief This function de-Initializes common part of the HAL and stops the systick.
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197 * This function is optional.
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198 * @retval HAL status
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199 */
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200 HAL_StatusTypeDef HAL_DeInit(void)
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201 {
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202 /* Reset of all peripherals */
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203 __HAL_RCC_APB1_FORCE_RESET();
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204 __HAL_RCC_APB1_RELEASE_RESET();
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205
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206 __HAL_RCC_APB2_FORCE_RESET();
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207 __HAL_RCC_APB2_RELEASE_RESET();
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208
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209 __HAL_RCC_AHB1_FORCE_RESET();
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210 __HAL_RCC_AHB1_RELEASE_RESET();
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211
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212 __HAL_RCC_AHB2_FORCE_RESET();
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213 __HAL_RCC_AHB2_RELEASE_RESET();
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214
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215 __HAL_RCC_AHB3_FORCE_RESET();
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216 __HAL_RCC_AHB3_RELEASE_RESET();
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217
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218 /* De-Init the low level hardware */
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219 HAL_MspDeInit();
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220
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221 /* Return function status */
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222 return HAL_OK;
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223 }
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224
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225 /**
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226 * @brief Initializes the MSP.
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227 * @retval None
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228 */
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229 __weak void HAL_MspInit(void)
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230 {
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231 /* NOTE : This function Should not be modified, when the callback is needed,
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232 the HAL_MspInit could be implemented in the user file
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233 */
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234 }
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235
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236 /**
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237 * @brief DeInitializes the MSP.
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238 * @retval None
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239 */
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240 __weak void HAL_MspDeInit(void)
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241 {
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242 /* NOTE : This function Should not be modified, when the callback is needed,
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243 the HAL_MspDeInit could be implemented in the user file
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244 */
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245 }
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246
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247 /**
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248 * @brief This function configures the source of the time base.
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249 * The time source is configured to have 1ms time base with a dedicated
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250 * Tick interrupt priority.
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251 * @note This function is called automatically at the beginning of program after
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252 * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig().
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253 * @note In the default implementation, SysTick timer is the source of time base.
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254 * It is used to generate interrupts at regular time intervals.
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255 * Care must be taken if HAL_Delay() is called from a peripheral ISR process,
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256 * The the SysTick interrupt must have higher priority (numerically lower)
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257 * than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
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258 * The function is declared as __weak to be overwritten in case of other
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259 * implementation in user file.
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260 * @param TickPriority: Tick interrupt priority.
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261 * @retval HAL status
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262 */
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263 __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
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264 {
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265 /*Configure the SysTick to have interrupt in 1ms time basis*/
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266 HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
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267
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268 /*Configure the SysTick IRQ priority */
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269 HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0);
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270
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271 /* Return function status */
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272 return HAL_OK;
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273 }
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274
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275 /**
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276 * @}
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277 */
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278
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279 /** @defgroup HAL_Exported_Functions_Group2 HAL Control functions
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280 * @brief HAL Control functions
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281 *
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282 @verbatim
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283 ===============================================================================
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284 ##### HAL Control functions #####
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285 ===============================================================================
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286 [..] This section provides functions allowing to:
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287 (+) Provide a tick value in millisecond
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288 (+) Provide a blocking delay in millisecond
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289 (+) Suspend the time base source interrupt
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290 (+) Resume the time base source interrupt
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291 (+) Get the HAL API driver version
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292 (+) Get the device identifier
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293 (+) Get the device revision identifier
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294 (+) Enable/Disable Debug module during SLEEP mode
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295 (+) Enable/Disable Debug module during STOP mode
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296 (+) Enable/Disable Debug module during STANDBY mode
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297
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298 @endverbatim
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299 * @{
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300 */
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301
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302 /**
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303 * @brief This function is called to increment a global variable "uwTick"
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304 * used as application time base.
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305 * @note In the default implementation, this variable is incremented each 1ms
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306 * in Systick ISR.
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307 * @note This function is declared as __weak to be overwritten in case of other
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308 * implementations in user file.
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309 * @retval None
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310 */
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311 __weak void HAL_IncTick(void)
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312 {
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313 uwTick++;
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314 }
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315
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316 /**
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317 * @brief Provides a tick value in millisecond.
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318 * @note This function is declared as __weak to be overwritten in case of other
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319 * implementations in user file.
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320 * @retval tick value
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321 */
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322 __weak uint32_t HAL_GetTick(void)
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323 {
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324 return uwTick;
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325 }
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326
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327 /**
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328 * @brief This function provides accurate delay (in milliseconds) based
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329 * on variable incremented.
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330 * @note In the default implementation , SysTick timer is the source of time base.
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331 * It is used to generate interrupts at regular time intervals where uwTick
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332 * is incremented.
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333 * @note This function is declared as __weak to be overwritten in case of other
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334 * implementations in user file.
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335 * @param Delay: specifies the delay time length, in milliseconds.
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336 * @retval None
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337 */
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338 __weak void HAL_Delay(__IO uint32_t Delay)
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339 {
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340 uint32_t tickstart = 0;
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341 tickstart = HAL_GetTick();
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342 while((HAL_GetTick() - tickstart) < Delay)
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343 {
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344 }
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345 }
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346
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347 /**
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348 * @brief Suspend Tick increment.
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349 * @note In the default implementation , SysTick timer is the source of time base. It is
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350 * used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
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351 * is called, the SysTick interrupt will be disabled and so Tick increment
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352 * is suspended.
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353 * @note This function is declared as __weak to be overwritten in case of other
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354 * implementations in user file.
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355 * @retval None
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356 */
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357 __weak void HAL_SuspendTick(void)
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358 {
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359 /* Disable SysTick Interrupt */
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360 SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
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361 }
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362
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363 /**
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364 * @brief Resume Tick increment.
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365 * @note In the default implementation , SysTick timer is the source of time base. It is
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366 * used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
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367 * is called, the SysTick interrupt will be enabled and so Tick increment
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368 * is resumed.
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369 * @note This function is declared as __weak to be overwritten in case of other
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370 * implementations in user file.
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371 * @retval None
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372 */
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373 __weak void HAL_ResumeTick(void)
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374 {
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375 /* Enable SysTick Interrupt */
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376 SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;
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377 }
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378
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379 /**
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380 * @brief Returns the HAL revision
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381 * @retval version : 0xXYZR (8bits for each decimal, R for RC)
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382 */
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383 uint32_t HAL_GetHalVersion(void)
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384 {
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385 return __STM32F4xx_HAL_VERSION;
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386 }
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387
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388 /**
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389 * @brief Returns the device revision identifier.
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390 * @retval Device revision identifier
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391 */
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392 uint32_t HAL_GetREVID(void)
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393 {
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394 return((DBGMCU->IDCODE) >> 16);
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395 }
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396
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397 /**
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398 * @brief Returns the device identifier.
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399 * @retval Device identifier
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400 */
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401 uint32_t HAL_GetDEVID(void)
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402 {
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403 return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK);
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404 }
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405
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406 /**
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407 * @brief Enable the Debug Module during SLEEP mode
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408 * @retval None
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409 */
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410 void HAL_DBGMCU_EnableDBGSleepMode(void)
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411 {
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412 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
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413 }
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414
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415 /**
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416 * @brief Disable the Debug Module during SLEEP mode
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417 * @retval None
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418 */
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419 void HAL_DBGMCU_DisableDBGSleepMode(void)
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420 {
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421 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
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422 }
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423
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424 /**
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425 * @brief Enable the Debug Module during STOP mode
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426 * @retval None
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427 */
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428 void HAL_DBGMCU_EnableDBGStopMode(void)
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429 {
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430 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
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431 }
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432
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433 /**
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434 * @brief Disable the Debug Module during STOP mode
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435 * @retval None
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436 */
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437 void HAL_DBGMCU_DisableDBGStopMode(void)
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438 {
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439 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
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440 }
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441
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442 /**
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443 * @brief Enable the Debug Module during STANDBY mode
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444 * @retval None
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445 */
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446 void HAL_DBGMCU_EnableDBGStandbyMode(void)
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447 {
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448 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
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449 }
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450
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451 /**
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452 * @brief Disable the Debug Module during STANDBY mode
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453 * @retval None
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454 */
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455 void HAL_DBGMCU_DisableDBGStandbyMode(void)
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456 {
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457 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
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458 }
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459
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460 /**
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461 * @brief Enables the I/O Compensation Cell.
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462 * @note The I/O compensation cell can be used only when the device supply
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463 * voltage ranges from 2.4 to 3.6 V.
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464 * @retval None
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465 */
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466 void HAL_EnableCompensationCell(void)
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467 {
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468 *(__IO uint32_t *)CMPCR_CMP_PD_BB = (uint32_t)ENABLE;
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469 }
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470
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471 /**
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472 * @brief Power-down the I/O Compensation Cell.
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473 * @note The I/O compensation cell can be used only when the device supply
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474 * voltage ranges from 2.4 to 3.6 V.
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475 * @retval None
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476 */
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477 void HAL_DisableCompensationCell(void)
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478 {
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479 *(__IO uint32_t *)CMPCR_CMP_PD_BB = (uint32_t)DISABLE;
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480 }
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481
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482 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
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483 /**
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484 * @brief Enables the Internal FLASH Bank Swapping.
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485 *
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486 * @note This function can be used only for STM32F42xxx/43xxx devices.
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487 *
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488 * @note Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000)
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489 * and Flash Bank1 mapped at 0x08100000 (and aliased at 0x00100000)
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490 *
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491 * @retval None
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492 */
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493 void HAL_EnableMemorySwappingBank(void)
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494 {
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495 *(__IO uint32_t *)UFB_MODE_BB = (uint32_t)ENABLE;
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496 }
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497
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498 /**
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499 * @brief Disables the Internal FLASH Bank Swapping.
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500 *
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501 * @note This function can be used only for STM32F42xxx/43xxx devices.
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502 *
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503 * @note The default state : Flash Bank1 mapped at 0x08000000 (and aliased @0x0000 0000)
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504 * and Flash Bank2 mapped at 0x08100000 (and aliased at 0x00100000)
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505 *
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506 * @retval None
|
|
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507 */
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508 void HAL_DisableMemorySwappingBank(void)
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|
509 {
|
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510
|
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511 *(__IO uint32_t *)UFB_MODE_BB = (uint32_t)DISABLE;
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512 }
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513 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
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514
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515 /**
|
|
|
516 * @}
|
|
|
517 */
|
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518
|
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519 /**
|
|
|
520 * @}
|
|
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521 */
|
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522
|
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523 /**
|
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|
524 * @}
|
|
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525 */
|
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526
|
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527 /**
|
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|
528 * @}
|
|
|
529 */
|
|
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530
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531 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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