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annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c @ 911:a2523e19f59a Evo_2_23

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author Ideenmodellierer
date Tue, 15 Oct 2024 20:00:37 +0200
parents c78bcbd5deda
children
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal.c
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4 * @author MCD Application Team
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5 * @brief HAL module driver.
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6 * This is the common part of the HAL initialization
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7 *
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8 @verbatim
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9 ==============================================================================
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10 ##### How to use this driver #####
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11 ==============================================================================
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12 [..]
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13 The common HAL driver contains a set of generic and common APIs that can be
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14 used by the PPP peripheral drivers and the user to start using the HAL.
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15 [..]
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16 The HAL contains two APIs' categories:
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17 (+) Common HAL APIs
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18 (+) Services HAL APIs
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19
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20 @endverbatim
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21 ******************************************************************************
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22 * @attention
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23 *
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24 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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25 *
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26 * Redistribution and use in source and binary forms, with or without modification,
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27 * are permitted provided that the following conditions are met:
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28 * 1. Redistributions of source code must retain the above copyright notice,
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29 * this list of conditions and the following disclaimer.
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30 * 2. Redistributions in binary form must reproduce the above copyright notice,
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31 * this list of conditions and the following disclaimer in the documentation
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32 * and/or other materials provided with the distribution.
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33 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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34 * may be used to endorse or promote products derived from this software
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35 * without specific prior written permission.
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36 *
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37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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38 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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39 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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40 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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41 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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42 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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43 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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44 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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45 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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46 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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47 *
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48 ******************************************************************************
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49 */
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50
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51 /* Includes ------------------------------------------------------------------*/
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52 #include "stm32f4xx_hal.h"
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53
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54 /** @addtogroup STM32F4xx_HAL_Driver
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55 * @{
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56 */
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57
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58 /** @defgroup HAL HAL
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59 * @brief HAL module driver.
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60 * @{
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61 */
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62
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63 /* Private typedef -----------------------------------------------------------*/
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64 /* Private define ------------------------------------------------------------*/
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65 /** @addtogroup HAL_Private_Constants
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66 * @{
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67 */
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68 /**
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69 * @brief STM32F4xx HAL Driver version number V1.7.4
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70 */
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71 #define __STM32F4xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
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72 #define __STM32F4xx_HAL_VERSION_SUB1 (0x07U) /*!< [23:16] sub1 version */
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73 #define __STM32F4xx_HAL_VERSION_SUB2 (0x04U) /*!< [15:8] sub2 version */
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74 #define __STM32F4xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
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75 #define __STM32F4xx_HAL_VERSION ((__STM32F4xx_HAL_VERSION_MAIN << 24U)\
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76 |(__STM32F4xx_HAL_VERSION_SUB1 << 16U)\
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77 |(__STM32F4xx_HAL_VERSION_SUB2 << 8U )\
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78 |(__STM32F4xx_HAL_VERSION_RC))
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79
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80 #define IDCODE_DEVID_MASK 0x00000FFFU
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81
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82 /* ------------ RCC registers bit address in the alias region ----------- */
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83 #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
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84 /* --- MEMRMP Register ---*/
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85 /* Alias word address of UFB_MODE bit */
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86 #define MEMRMP_OFFSET SYSCFG_OFFSET
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87 #define UFB_MODE_BIT_NUMBER SYSCFG_MEMRMP_UFB_MODE_Pos
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88 #define UFB_MODE_BB (uint32_t)(PERIPH_BB_BASE + (MEMRMP_OFFSET * 32U) + (UFB_MODE_BIT_NUMBER * 4U))
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89
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90 /* --- CMPCR Register ---*/
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91 /* Alias word address of CMP_PD bit */
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92 #define CMPCR_OFFSET (SYSCFG_OFFSET + 0x20U)
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93 #define CMP_PD_BIT_NUMBER SYSCFG_CMPCR_CMP_PD_Pos
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94 #define CMPCR_CMP_PD_BB (uint32_t)(PERIPH_BB_BASE + (CMPCR_OFFSET * 32U) + (CMP_PD_BIT_NUMBER * 4U))
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95
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96 /* --- MCHDLYCR Register ---*/
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97 /* Alias word address of BSCKSEL bit */
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98 #define MCHDLYCR_OFFSET (SYSCFG_OFFSET + 0x30U)
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99 #define BSCKSEL_BIT_NUMBER SYSCFG_MCHDLYCR_BSCKSEL_Pos
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100 #define MCHDLYCR_BSCKSEL_BB (uint32_t)(PERIPH_BB_BASE + (MCHDLYCR_OFFSET * 32U) + (BSCKSEL_BIT_NUMBER * 4U))
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101 /**
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102 * @}
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103 */
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104
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105 /* Private macro -------------------------------------------------------------*/
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106 /* Private variables ---------------------------------------------------------*/
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107 /** @addtogroup HAL_Private_Variables
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108 * @{
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109 */
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110 __IO uint32_t uwTick;
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111 uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid PRIO */
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112 HAL_TickFreqTypeDef uwTickFreq = HAL_TICK_FREQ_DEFAULT; /* 1KHz */
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113 /**
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114 * @}
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115 */
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116 /* Private function prototypes -----------------------------------------------*/
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117 /* Private functions ---------------------------------------------------------*/
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118
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119 /** @defgroup HAL_Exported_Functions HAL Exported Functions
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120 * @{
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121 */
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122
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123 /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions
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124 * @brief Initialization and de-initialization functions
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125 *
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126 @verbatim
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127 ===============================================================================
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128 ##### Initialization and Configuration functions #####
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129 ===============================================================================
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130 [..] This section provides functions allowing to:
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131 (+) Initializes the Flash interface the NVIC allocation and initial clock
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132 configuration. It initializes the systick also when timeout is needed
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133 and the backup domain when enabled.
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134 (+) De-Initializes common part of the HAL.
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135 (+) Configure the time base source to have 1ms time base with a dedicated
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136 Tick interrupt priority.
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137 (++) SysTick timer is used by default as source of time base, but user
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138 can eventually implement his proper time base source (a general purpose
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139 timer for example or other time source), keeping in mind that Time base
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140 duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
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141 handled in milliseconds basis.
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142 (++) Time base configuration function (HAL_InitTick ()) is called automatically
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143 at the beginning of the program after reset by HAL_Init() or at any time
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144 when clock is configured, by HAL_RCC_ClockConfig().
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145 (++) Source of time base is configured to generate interrupts at regular
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146 time intervals. Care must be taken if HAL_Delay() is called from a
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147 peripheral ISR process, the Tick interrupt line must have higher priority
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148 (numerically lower) than the peripheral interrupt. Otherwise the caller
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149 ISR process will be blocked.
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150 (++) functions affecting time base configurations are declared as __weak
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151 to make override possible in case of other implementations in user file.
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152 @endverbatim
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153 * @{
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154 */
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155
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156 /**
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157 * @brief This function is used to initialize the HAL Library; it must be the first
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158 * instruction to be executed in the main program (before to call any other
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159 * HAL function), it performs the following:
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160 * Configure the Flash prefetch, instruction and Data caches.
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161 * Configures the SysTick to generate an interrupt each 1 millisecond,
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162 * which is clocked by the HSI (at this stage, the clock is not yet
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163 * configured and thus the system is running from the internal HSI at 16 MHz).
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164 * Set NVIC Group Priority to 4.
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165 * Calls the HAL_MspInit() callback function defined in user file
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166 * "stm32f4xx_hal_msp.c" to do the global low level hardware initialization
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167 *
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168 * @note SysTick is used as time base for the HAL_Delay() function, the application
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169 * need to ensure that the SysTick time base is always set to 1 millisecond
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170 * to have correct HAL operation.
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171 * @retval HAL status
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172 */
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173 HAL_StatusTypeDef HAL_Init(void)
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174 {
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175 /* Configure Flash prefetch, Instruction cache, Data cache */
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176 #if (INSTRUCTION_CACHE_ENABLE != 0U)
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177 __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
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178 #endif /* INSTRUCTION_CACHE_ENABLE */
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179
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180 #if (DATA_CACHE_ENABLE != 0U)
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181 __HAL_FLASH_DATA_CACHE_ENABLE();
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182 #endif /* DATA_CACHE_ENABLE */
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183
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184 #if (PREFETCH_ENABLE != 0U)
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185 __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
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186 #endif /* PREFETCH_ENABLE */
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187
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188 /* Set Interrupt Group Priority */
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189 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
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190
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191 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
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192 HAL_InitTick(TICK_INT_PRIORITY);
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193
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194 /* Init the low level hardware */
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195 HAL_MspInit();
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196
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197 /* Return function status */
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198 return HAL_OK;
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199 }
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200
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201 /**
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202 * @brief This function de-Initializes common part of the HAL and stops the systick.
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203 * This function is optional.
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204 * @retval HAL status
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205 */
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206 HAL_StatusTypeDef HAL_DeInit(void)
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207 {
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208 /* Reset of all peripherals */
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209 __HAL_RCC_APB1_FORCE_RESET();
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210 __HAL_RCC_APB1_RELEASE_RESET();
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211
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212 __HAL_RCC_APB2_FORCE_RESET();
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213 __HAL_RCC_APB2_RELEASE_RESET();
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214
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215 __HAL_RCC_AHB1_FORCE_RESET();
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216 __HAL_RCC_AHB1_RELEASE_RESET();
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217
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218 __HAL_RCC_AHB2_FORCE_RESET();
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219 __HAL_RCC_AHB2_RELEASE_RESET();
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220
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221 __HAL_RCC_AHB3_FORCE_RESET();
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222 __HAL_RCC_AHB3_RELEASE_RESET();
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223
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224 /* De-Init the low level hardware */
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225 HAL_MspDeInit();
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226
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227 /* Return function status */
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228 return HAL_OK;
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229 }
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230
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231 /**
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232 * @brief Initialize the MSP.
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233 * @retval None
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234 */
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235 __weak void HAL_MspInit(void)
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236 {
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237 /* NOTE : This function should not be modified, when the callback is needed,
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238 the HAL_MspInit could be implemented in the user file
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239 */
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240 }
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241
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242 /**
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243 * @brief DeInitializes the MSP.
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244 * @retval None
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245 */
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246 __weak void HAL_MspDeInit(void)
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247 {
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248 /* NOTE : This function should not be modified, when the callback is needed,
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249 the HAL_MspDeInit could be implemented in the user file
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250 */
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251 }
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252
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253 /**
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254 * @brief This function configures the source of the time base.
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255 * The time source is configured to have 1ms time base with a dedicated
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256 * Tick interrupt priority.
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257 * @note This function is called automatically at the beginning of program after
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258 * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig().
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259 * @note In the default implementation, SysTick timer is the source of time base.
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260 * It is used to generate interrupts at regular time intervals.
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261 * Care must be taken if HAL_Delay() is called from a peripheral ISR process,
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262 * The SysTick interrupt must have higher priority (numerically lower)
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263 * than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
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264 * The function is declared as __weak to be overwritten in case of other
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265 * implementation in user file.
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266 * @param TickPriority Tick interrupt priority.
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267 * @retval HAL status
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268 */
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269 __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
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270 {
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271 /* Configure the SysTick to have interrupt in 1ms time basis*/
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272 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
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273 {
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274 return HAL_ERROR;
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275 }
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276
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277 /* Configure the SysTick IRQ priority */
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278 if (TickPriority < (1UL << __NVIC_PRIO_BITS))
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279 {
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280 HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
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281 uwTickPrio = TickPriority;
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282 }
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283 else
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284 {
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285 return HAL_ERROR;
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286 }
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287
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288 /* Return function status */
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289 return HAL_OK;
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290 }
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291
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292 /**
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293 * @}
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294 */
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295
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296 /** @defgroup HAL_Exported_Functions_Group2 HAL Control functions
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297 * @brief HAL Control functions
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298 *
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299 @verbatim
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300 ===============================================================================
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301 ##### HAL Control functions #####
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302 ===============================================================================
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303 [..] This section provides functions allowing to:
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304 (+) Provide a tick value in millisecond
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305 (+) Provide a blocking delay in millisecond
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306 (+) Suspend the time base source interrupt
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307 (+) Resume the time base source interrupt
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308 (+) Get the HAL API driver version
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309 (+) Get the device identifier
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310 (+) Get the device revision identifier
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311 (+) Enable/Disable Debug module during SLEEP mode
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312 (+) Enable/Disable Debug module during STOP mode
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313 (+) Enable/Disable Debug module during STANDBY mode
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314
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315 @endverbatim
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316 * @{
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317 */
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318
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319 /**
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320 * @brief This function is called to increment a global variable "uwTick"
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321 * used as application time base.
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322 * @note In the default implementation, this variable is incremented each 1ms
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323 * in SysTick ISR.
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324 * @note This function is declared as __weak to be overwritten in case of other
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325 * implementations in user file.
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326 * @retval None
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327 */
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328 __weak void HAL_IncTick(void)
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329 {
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330 uwTick += uwTickFreq;
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331 }
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332
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333 /**
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334 * @brief Provides a tick value in millisecond.
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335 * @note This function is declared as __weak to be overwritten in case of other
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336 * implementations in user file.
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337 * @retval tick value
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338 */
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339 __weak uint32_t HAL_GetTick(void)
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340 {
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341 return uwTick;
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342 }
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343
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344 /**
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345 * @brief This function returns a tick priority.
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346 * @retval tick priority
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347 */
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348 uint32_t HAL_GetTickPrio(void)
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349 {
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350 return uwTickPrio;
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351 }
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352
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353 /**
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354 * @brief Set new tick Freq.
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355 * @retval Status
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356 */
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357 HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq)
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358 {
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359 HAL_StatusTypeDef status = HAL_OK;
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360 assert_param(IS_TICKFREQ(Freq));
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361
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362 if (uwTickFreq != Freq)
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363 {
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364 uwTickFreq = Freq;
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365
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366 /* Apply the new tick Freq */
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367 status = HAL_InitTick(uwTickPrio);
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368 }
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369
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370 return status;
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371 }
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372
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373 /**
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374 * @brief Return tick frequency.
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375 * @retval tick period in Hz
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376 */
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377 HAL_TickFreqTypeDef HAL_GetTickFreq(void)
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378 {
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379 return uwTickFreq;
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380 }
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381
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382 /**
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383 * @brief This function provides minimum delay (in milliseconds) based
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384 * on variable incremented.
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385 * @note In the default implementation , SysTick timer is the source of time base.
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386 * It is used to generate interrupts at regular time intervals where uwTick
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387 * is incremented.
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388 * @note This function is declared as __weak to be overwritten in case of other
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389 * implementations in user file.
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390 * @param Delay specifies the delay time length, in milliseconds.
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391 * @retval None
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392 */
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393 __weak void HAL_Delay(uint32_t Delay)
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394 {
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395 uint32_t tickstart = HAL_GetTick();
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396 uint32_t wait = Delay;
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397
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398 /* Add a freq to guarantee minimum wait */
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399 if (wait < HAL_MAX_DELAY)
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400 {
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401 wait += (uint32_t)(uwTickFreq);
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402 }
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403
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404 while((HAL_GetTick() - tickstart) < wait)
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405 {
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406 }
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407 }
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408
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409 /**
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410 * @brief Suspend Tick increment.
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411 * @note In the default implementation , SysTick timer is the source of time base. It is
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412 * used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
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413 * is called, the SysTick interrupt will be disabled and so Tick increment
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414 * is suspended.
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415 * @note This function is declared as __weak to be overwritten in case of other
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416 * implementations in user file.
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417 * @retval None
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418 */
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419 __weak void HAL_SuspendTick(void)
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420 {
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421 /* Disable SysTick Interrupt */
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422 SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
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423 }
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424
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425 /**
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426 * @brief Resume Tick increment.
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427 * @note In the default implementation , SysTick timer is the source of time base. It is
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428 * used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
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429 * is called, the SysTick interrupt will be enabled and so Tick increment
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430 * is resumed.
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431 * @note This function is declared as __weak to be overwritten in case of other
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432 * implementations in user file.
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433 * @retval None
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434 */
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435 __weak void HAL_ResumeTick(void)
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436 {
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437 /* Enable SysTick Interrupt */
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438 SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;
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439 }
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440
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441 /**
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442 * @brief Returns the HAL revision
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443 * @retval version : 0xXYZR (8bits for each decimal, R for RC)
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444 */
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445 uint32_t HAL_GetHalVersion(void)
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446 {
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447 return __STM32F4xx_HAL_VERSION;
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448 }
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449
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450 /**
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451 * @brief Returns the device revision identifier.
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452 * @retval Device revision identifier
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453 */
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454 uint32_t HAL_GetREVID(void)
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455 {
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456 return((DBGMCU->IDCODE) >> 16U);
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457 }
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458
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459 /**
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460 * @brief Returns the device identifier.
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461 * @retval Device identifier
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462 */
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463 uint32_t HAL_GetDEVID(void)
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464 {
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465 return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK);
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466 }
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467
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468 /**
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469 * @brief Enable the Debug Module during SLEEP mode
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470 * @retval None
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471 */
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472 void HAL_DBGMCU_EnableDBGSleepMode(void)
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473 {
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474 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
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475 }
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476
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477 /**
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478 * @brief Disable the Debug Module during SLEEP mode
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479 * @retval None
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480 */
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481 void HAL_DBGMCU_DisableDBGSleepMode(void)
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482 {
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483 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
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484 }
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485
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486 /**
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487 * @brief Enable the Debug Module during STOP mode
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488 * @retval None
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489 */
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490 void HAL_DBGMCU_EnableDBGStopMode(void)
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491 {
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492 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
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493 }
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494
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495 /**
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496 * @brief Disable the Debug Module during STOP mode
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497 * @retval None
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498 */
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499 void HAL_DBGMCU_DisableDBGStopMode(void)
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500 {
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501 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
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502 }
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503
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504 /**
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505 * @brief Enable the Debug Module during STANDBY mode
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506 * @retval None
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507 */
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508 void HAL_DBGMCU_EnableDBGStandbyMode(void)
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509 {
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510 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
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511 }
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512
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513 /**
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514 * @brief Disable the Debug Module during STANDBY mode
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515 * @retval None
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516 */
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517 void HAL_DBGMCU_DisableDBGStandbyMode(void)
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518 {
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519 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
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520 }
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521
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522 /**
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523 * @brief Enables the I/O Compensation Cell.
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524 * @note The I/O compensation cell can be used only when the device supply
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525 * voltage ranges from 2.4 to 3.6 V.
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526 * @retval None
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527 */
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528 void HAL_EnableCompensationCell(void)
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529 {
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530 *(__IO uint32_t *)CMPCR_CMP_PD_BB = (uint32_t)ENABLE;
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531 }
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532
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533 /**
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534 * @brief Power-down the I/O Compensation Cell.
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535 * @note The I/O compensation cell can be used only when the device supply
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536 * voltage ranges from 2.4 to 3.6 V.
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537 * @retval None
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538 */
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539 void HAL_DisableCompensationCell(void)
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540 {
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541 *(__IO uint32_t *)CMPCR_CMP_PD_BB = (uint32_t)DISABLE;
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542 }
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543
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544 /**
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545 * @brief Return the unique device identifier (UID based on 96 bits)
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546 * @param UID pointer to 3 words array.
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547 * @retval Device identifier
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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548 */
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549 void HAL_GetUID(uint32_t *UID)
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550 {
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551 UID[0] = (uint32_t)(READ_REG(*((uint32_t *)UID_BASE)));
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552 UID[1] = (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE + 4U))));
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553 UID[2] = (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE + 8U))));
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554 }
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555
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556 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
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557 defined(STM32F469xx) || defined(STM32F479xx)
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558 /**
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559 * @brief Enables the Internal FLASH Bank Swapping.
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560 *
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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561 * @note This function can be used only for STM32F42xxx/43xxx devices.
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562 *
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563 * @note Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000)
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564 * and Flash Bank1 mapped at 0x08100000 (and aliased at 0x00100000)
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565 *
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566 * @retval None
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567 */
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568 void HAL_EnableMemorySwappingBank(void)
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569 {
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570 *(__IO uint32_t *)UFB_MODE_BB = (uint32_t)ENABLE;
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571 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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572
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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573 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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574 * @brief Disables the Internal FLASH Bank Swapping.
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575 *
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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576 * @note This function can be used only for STM32F42xxx/43xxx devices.
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577 *
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578 * @note The default state : Flash Bank1 mapped at 0x08000000 (and aliased @0x00000000)
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579 * and Flash Bank2 mapped at 0x08100000 (and aliased at 0x00100000)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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580 *
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581 * @retval None
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582 */
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583 void HAL_DisableMemorySwappingBank(void)
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584 {
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585 *(__IO uint32_t *)UFB_MODE_BB = (uint32_t)DISABLE;
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586 }
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587 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
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588 /**
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589 * @}
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590 */
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591
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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592 /**
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593 * @}
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594 */
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595
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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596 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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597 * @}
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598 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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599
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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600 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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601 * @}
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602 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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603
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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604 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/