Mercurial > public > ostc4
annotate Small_CPU/Src/spi.c @ 184:8117802894a4 Cleanup_Compass_Wireless
Cleanup compiler warnings
| author | ideenmodellierer |
|---|---|
| date | Thu, 14 Mar 2019 20:44:23 +0100 |
| parents | ee744c7160ce |
| children | 9fc06e1e0f66 |
| rev | line source |
|---|---|
| 38 | 1 /** |
| 89 | 2 ****************************************************************************** |
| 3 * @file spi.c | |
| 4 * @author heinrichs weikamp gmbh | |
| 5 * @version V0.0.1 | |
| 6 * @date 16-Sept-2014 | |
| 7 * @brief Source code for spi control | |
| 8 * | |
| 9 @verbatim | |
| 10 ============================================================================== | |
| 11 ##### How to use ##### | |
| 12 ============================================================================== | |
| 13 @endverbatim | |
| 14 ****************************************************************************** | |
| 15 * @attention | |
| 16 * | |
| 17 * <h2><center>© COPYRIGHT(c) 2014 heinrichs weikamp</center></h2> | |
| 18 * | |
| 19 ****************************************************************************** | |
| 20 */ | |
| 38 | 21 |
| 22 /* Includes ------------------------------------------------------------------*/ | |
| 143 | 23 |
| 24 #include "global_constants.h" | |
| 38 | 25 #include "spi.h" |
| 120 | 26 #include "dma.h" |
| 143 | 27 |
| 38 | 28 //#include "gpio.h" |
| 29 | |
| 30 /* USER CODE BEGIN 0 */ | |
| 31 #include "scheduler.h" | |
| 32 | |
| 120 | 33 #ifdef DEBUG_GPIO |
| 38 | 34 extern void GPIO_new_DEBUG_LOW(void); |
| 35 extern void GPIO_new_DEBUG_HIGH(void); | |
| 120 | 36 #endif |
| 38 | 37 |
| 143 | 38 // SPI header by index used for synchronization check (package sequence counter) |
| 39 #define SPI_HEADER_INDEX_MASTER 1 | |
| 40 #define SPI_HEADER_INDEX_SLAVE 2 | |
| 41 | |
| 89 | 42 uint8_t data_error = 0; |
| 43 uint32_t data_error_time = 0; | |
| 143 | 44 uint8_t SPIDataRX = 0; /* Flag to signal that SPI RX callback has been triggered */ |
| 38 | 45 |
| 143 | 46 extern void HardSyncToSPI(void); |
| 38 | 47 static void SPI_Error_Handler(void); |
| 48 | |
| 49 /* USER CODE END 0 */ | |
| 50 | |
| 51 static uint8_t SPI_check_header_and_footer_ok(void); | |
| 143 | 52 static uint8_t DataEX_check_header_and_footer_shifted(void); |
| 38 | 53 |
| 54 SPI_HandleTypeDef hspi1; | |
| 55 SPI_HandleTypeDef hspi3; | |
| 56 | |
| 57 DMA_HandleTypeDef hdma_tx; | |
| 58 DMA_HandleTypeDef hdma_rx; | |
| 59 | |
| 60 // SPI3 init function | |
| 89 | 61 void MX_SPI3_Init(void) { |
| 62 hspi3.Instance = SPI3; | |
| 63 hspi3.Init.Mode = SPI_MODE_MASTER; | |
| 64 hspi3.Init.Direction = SPI_DIRECTION_2LINES; | |
| 65 hspi3.Init.DataSize = SPI_DATASIZE_8BIT; | |
| 66 hspi3.Init.CLKPolarity = SPI_POLARITY_HIGH; | |
| 67 hspi3.Init.CLKPhase = SPI_PHASE_1EDGE; | |
| 68 hspi3.Init.NSS = SPI_NSS_SOFT; | |
| 69 hspi3.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; | |
| 70 hspi3.Init.FirstBit = SPI_FIRSTBIT_MSB; | |
| 71 hspi3.Init.TIMode = SPI_TIMODE_DISABLED; | |
| 72 hspi3.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED; | |
| 73 hspi3.Init.CRCPolynomial = 7; | |
| 74 HAL_SPI_Init(&hspi3); | |
| 38 | 75 } |
| 76 | |
| 89 | 77 void MX_SPI3_DeInit(void) { |
| 78 HAL_SPI_DeInit(&hspi3); | |
| 38 | 79 } |
| 80 | |
| 89 | 81 uint8_t SPI3_ButtonAdjust(uint8_t *arrayInput, uint8_t *arrayOutput) { |
| 38 | 82 HAL_StatusTypeDef status; |
| 83 uint8_t answer[10]; | |
| 84 uint8_t rework[10]; | |
| 85 | |
| 86 rework[0] = 0xFF; | |
| 89 | 87 for (int i = 0; i < 3; i++) { |
| 38 | 88 // limiter |
| 89 | 89 if (arrayInput[i] == 0xFF) |
| 38 | 90 arrayInput[i] = 0xFE; |
| 89 | 91 if (arrayInput[i] >= 15) { |
| 82 | 92 // copy - ausl�se-schwelle |
| 89 | 93 rework[i + 1] = arrayInput[i]; |
| 38 | 94 // wieder-scharf-schalte-schwelle |
| 89 | 95 rework[i + 3 + 1] = arrayInput[i] - 10; |
| 96 } else if (arrayInput[i] >= 10) { | |
| 82 | 97 // copy - ausl�se-schwelle |
| 89 | 98 rework[i + 1] = arrayInput[i]; |
| 38 | 99 // wieder-scharf-schalte-schwelle |
| 89 | 100 rework[i + 3 + 1] = arrayInput[i] - 5; |
| 101 } else { | |
| 82 | 102 // copy - ausl�se-schwelle |
| 89 | 103 rework[i + 1] = 7; |
| 38 | 104 // wieder-scharf-schalte-schwelle |
| 89 | 105 rework[i + 3 + 1] = 6; |
| 38 | 106 } |
| 107 } | |
| 108 | |
| 109 status = HAL_OK; /* = 0 */ | |
| 89 | 110 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_SET); |
| 111 for (int i = 0; i < 7; i++) { | |
| 112 HAL_Delay(10); | |
| 113 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_RESET); | |
| 63 | 114 HAL_Delay(10); |
| 89 | 115 status += HAL_SPI_TransmitReceive(&hspi3, &rework[i], &answer[i], 1, |
| 116 20); | |
| 63 | 117 HAL_Delay(10); |
| 89 | 118 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_SET); |
| 38 | 119 } |
| 89 | 120 |
| 121 if (status == HAL_OK) { | |
| 122 for (int i = 0; i < 3; i++) { | |
| 123 arrayOutput[i] = answer[i + 2]; // first not, return of 0xFF not | |
| 124 } | |
| 38 | 125 return 1; |
| 89 | 126 } else |
| 127 | |
| 38 | 128 return 0; |
| 129 } | |
| 130 | |
| 131 // SPI5 init function | |
| 89 | 132 void MX_SPI1_Init(void) { |
| 133 hspi1.Instance = SPI1; | |
| 134 hspi1.Init.Mode = SPI_MODE_SLAVE; | |
| 135 hspi1.Init.Direction = SPI_DIRECTION_2LINES; | |
| 136 hspi1.Init.DataSize = SPI_DATASIZE_8BIT; | |
| 137 hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; | |
| 138 hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; | |
| 139 hspi1.Init.NSS = SPI_NSS_HARD_INPUT; //SPI_NSS_SOFT; | |
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140 hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128; |
| 89 | 141 hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; |
| 142 hspi1.Init.TIMode = SPI_TIMODE_DISABLED; | |
| 143 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED; //_DISABLED; _ENABLED; | |
| 144 hspi1.Init.CRCPolynomial = 7; | |
| 145 HAL_SPI_Init(&hspi1); | |
| 38 | 146 } |
| 147 | |
| 89 | 148 void MX_SPI_DeInit(void) { |
| 149 HAL_SPI_DeInit(&hspi1); | |
| 38 | 150 } |
| 151 | |
| 89 | 152 void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) { |
| 38 | 153 |
| 89 | 154 GPIO_InitTypeDef GPIO_InitStruct; |
| 38 | 155 |
| 89 | 156 if (hspi->Instance == SPI1) { |
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157 SPIDataRX = 0; |
| 89 | 158 // Peripheral clock enable |
| 159 __SPI1_CLK_ENABLE(); | |
| 160 __GPIOA_CLK_ENABLE(); | |
| 38 | 161 //SPI1 GPIO Configuration |
| 162 //PA4 ------> SPI1_CS | |
| 163 //PA5 ------> SPI1_SCK | |
| 164 //PA6 ------> SPI1_MISO | |
| 165 //PA7 ------> SPI1_MOSI | |
| 89 | 166 |
| 167 GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7; | |
| 38 | 168 // GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; |
| 89 | 169 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; |
| 170 GPIO_InitStruct.Pull = GPIO_PULLUP; | |
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171 GPIO_InitStruct.Speed = GPIO_SPEED_FAST; /* Decision is based on errata which recommends FAST for GPIO at 90Mhz */ |
| 89 | 172 GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; |
| 173 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); | |
| 38 | 174 |
| 175 //##-3- Configure the DMA streams ########################################## | |
| 176 // Configure the DMA handler for Transmission process | |
| 89 | 177 hdma_tx.Instance = DMA2_Stream3; |
| 178 hdma_tx.Init.Channel = DMA_CHANNEL_3; | |
| 179 hdma_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; | |
| 180 hdma_tx.Init.PeriphInc = DMA_PINC_DISABLE; | |
| 181 hdma_tx.Init.MemInc = DMA_MINC_ENABLE; | |
| 38 | 182 hdma_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; |
| 89 | 183 hdma_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; |
| 184 hdma_tx.Init.Mode = DMA_NORMAL; | |
| 185 hdma_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH; | |
| 186 hdma_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
| 187 hdma_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; | |
| 188 hdma_tx.Init.MemBurst = DMA_MBURST_INC4; | |
| 189 hdma_tx.Init.PeriphBurst = DMA_PBURST_INC4; | |
| 190 | |
| 191 HAL_DMA_Init(&hdma_tx); | |
| 192 | |
| 38 | 193 // Associate the initialized DMA handle to the the SPI handle |
| 194 __HAL_LINKDMA(hspi, hdmatx, hdma_tx); | |
| 89 | 195 |
| 38 | 196 // Configure the DMA handler for Transmission process |
| 89 | 197 hdma_rx.Instance = DMA2_Stream0; |
| 198 hdma_rx.Init.Channel = DMA_CHANNEL_3; | |
| 199 hdma_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; | |
| 200 hdma_rx.Init.PeriphInc = DMA_PINC_DISABLE; | |
| 201 hdma_rx.Init.MemInc = DMA_MINC_ENABLE; | |
| 38 | 202 hdma_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; |
| 89 | 203 hdma_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; |
| 204 hdma_rx.Init.Mode = DMA_NORMAL; | |
| 205 hdma_rx.Init.Priority = DMA_PRIORITY_HIGH; | |
| 206 hdma_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
| 207 hdma_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; | |
| 208 hdma_rx.Init.MemBurst = DMA_MBURST_INC4; | |
| 209 hdma_rx.Init.PeriphBurst = DMA_PBURST_INC4; | |
| 38 | 210 |
| 211 HAL_DMA_Init(&hdma_rx); | |
| 89 | 212 |
| 213 // Associate the initialized DMA handle to the the SPI handle | |
| 214 __HAL_LINKDMA(hspi, hdmarx, hdma_rx); | |
| 38 | 215 |
| 89 | 216 //##-4- Configure the NVIC for DMA ######################################### |
| 217 //NVIC configuration for DMA transfer complete interrupt (SPI3_RX) | |
| 218 HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 1, 0); | |
| 219 HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); | |
| 220 | |
| 221 // NVIC configuration for DMA transfer complete interrupt (SPI1_TX) | |
| 222 HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 1, 1); | |
| 223 HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn); | |
| 224 } else if (hspi->Instance == SPI3) { | |
| 225 __GPIOC_CLK_ENABLE(); | |
| 226 __SPI3_CLK_ENABLE(); | |
| 38 | 227 |
| 228 //SPI1 GPIO Configuration | |
| 229 //PC10 ------> SPI3_SCK | |
| 230 //PC11 ------> SPI3_MISO | |
| 231 //PC12 ------> SPI3_MOSI | |
| 232 //PA15 ------> SPI3_NSS (official) | |
| 233 //PC9 ------> SPI3_NSS (hw) | |
| 89 | 234 |
| 235 GPIO_InitStruct.Pin = GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12; | |
| 236 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 237 GPIO_InitStruct.Pull = GPIO_PULLUP; | |
| 238 GPIO_InitStruct.Speed = GPIO_SPEED_FAST; | |
| 239 GPIO_InitStruct.Alternate = GPIO_AF6_SPI3; | |
| 240 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); | |
| 38 | 241 |
| 242 GPIO_InitStruct.Pin = GPIO_PIN_9; | |
| 243 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; | |
| 244 GPIO_InitStruct.Pull = GPIO_PULLUP; | |
| 245 GPIO_InitStruct.Speed = GPIO_SPEED_LOW; | |
| 89 | 246 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); |
| 38 | 247 |
| 89 | 248 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_SET); |
| 38 | 249 } |
| 250 } | |
| 251 | |
| 89 | 252 void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) { |
| 253 if (hspi->Instance == SPI1) { | |
| 38 | 254 __SPI1_FORCE_RESET(); |
| 255 __SPI1_RELEASE_RESET(); | |
| 256 | |
| 257 //SPI1 GPIO Configuration | |
| 258 //PA5 ------> SPI1_SCK | |
| 259 //PA6 ------> SPI1_MISO | |
| 260 //PA7 ------> SPI1_MOSI | |
| 89 | 261 |
| 262 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7); | |
| 38 | 263 |
| 264 HAL_DMA_DeInit(&hdma_tx); | |
| 265 HAL_DMA_DeInit(&hdma_rx); | |
| 89 | 266 |
| 38 | 267 HAL_NVIC_DisableIRQ(DMA2_Stream3_IRQn); |
| 268 HAL_NVIC_DisableIRQ(DMA2_Stream0_IRQn); | |
| 89 | 269 } else if (hspi->Instance == SPI3) { |
| 38 | 270 __SPI3_FORCE_RESET(); |
| 271 __SPI3_RELEASE_RESET(); | |
| 272 | |
| 273 //SPI1 GPIO Configuration | |
| 274 //PC10 ------> SPI3_SCK | |
| 275 //PC11 ------> SPI3_MISO | |
| 276 //PC12 ------> SPI3_MOSI | |
| 277 //PA15 ------> SPI3_NSS (official) | |
| 278 //PC9 ------> SPI3_NSS (hw) | |
| 89 | 279 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12); |
| 38 | 280 } |
| 281 } | |
| 282 | |
| 89 | 283 void SPI_synchronize_with_Master(void) { |
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284 #ifdef USE_OLD_SYNC_METHOD |
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285 GPIO_InitTypeDef GPIO_InitStruct; |
| 89 | 286 // |
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287 __GPIOA_CLK_ENABLE(); |
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288 /**SPI1 GPIO Configuration |
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289 PA5 ------> SPI1_SCK |
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290 */ |
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291 GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5; |
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292 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; |
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293 GPIO_InitStruct.Pull = GPIO_PULLUP; |
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294 GPIO_InitStruct.Speed = GPIO_SPEED_FAST; |
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295 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); |
| 89 | 296 // |
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297 HAL_Delay(10); |
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298 while (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_4) == 0); |
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299 HAL_Delay(10); |
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300 while (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_5) == 1); |
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301 HAL_Delay(50); |
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302 #endif |
| 38 | 303 } |
| 304 | |
| 89 | 305 void SPI_Start_single_TxRx_with_Master(void) { |
| 38 | 306 uint8_t * pOutput; |
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307 HAL_StatusTypeDef retval; |
| 38 | 308 |
| 89 | 309 if (global.dataSendToSlave.getDeviceDataNow) { |
| 38 | 310 global.dataSendToSlave.getDeviceDataNow = 0; |
| 89 | 311 pOutput = (uint8_t*) &(global.deviceDataSendToMaster); |
| 312 } else { | |
| 313 pOutput = (uint8_t*) &(global.dataSendToMaster); | |
| 38 | 314 } |
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315 retval = HAL_SPI_TransmitReceive_DMA(&hspi1, pOutput,(uint8_t*) &(global.dataSendToSlave), EXCHANGE_BUFFERSIZE); |
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316 if ( retval!= HAL_OK) { |
| 38 | 317 SPI_Error_Handler(); |
| 318 } | |
| 319 } | |
| 320 | |
| 89 | 321 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi) { |
| 322 /* restart SPI */ | |
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323 if (hspi == &hspi1) |
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324 { |
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325 HardSyncToSPI(); |
| 143 | 326 SPIDataRX = 1; |
| 327 | |
| 89 | 328 global.check_sync_not_running = 0; |
| 329 /* stop data exchange? */ | |
| 330 if (global.mode == MODE_SHUTDOWN) { | |
| 331 global.mode = MODE_SLEEP; | |
| 332 global.dataSendToSlavePending = 0; | |
| 333 global.dataSendToSlaveIsValid = 1; | |
| 334 global.dataSendToSlaveIsNotValidCount = 0; | |
| 335 } | |
| 143 | 336 } |
| 337 } | |
| 82 | 338 |
| 143 | 339 void SPI_Evaluate_RX_Data() |
| 340 { | |
| 341 if ((global.mode != MODE_SHUTDOWN) && ( global.mode != MODE_SLEEP) && (SPIDataRX)) | |
| 342 { | |
| 343 SPIDataRX = 0; | |
| 89 | 344 /* data consistent? */ |
| 345 if (SPI_check_header_and_footer_ok()) { | |
| 143 | 346 // GPIO_new_DEBUG_HIGH(); //For debug. |
| 89 | 347 global.dataSendToSlaveIsValid = 1; |
| 348 global.dataSendToSlaveIsNotValidCount = 0; | |
| 143 | 349 /* use sequence index from master to indicate correct reception */ |
| 350 if(global.dataSendToSlave.header.checkCode[SPI_HEADER_INDEX_SLAVE] > 0x7F) | |
| 351 { | |
| 352 HAL_SPI_Abort_IT(&hspi1); | |
| 353 global.dataSendToMaster.header.checkCode[SPI_HEADER_INDEX_SLAVE] = global.dataSendToSlave.header.checkCode[SPI_HEADER_INDEX_MASTER]; | |
| 354 global.dataSendToSlave.header.checkCode[SPI_HEADER_INDEX_SLAVE] = 0; | |
| 355 } | |
| 356 else | |
| 357 { | |
| 358 global.dataSendToMaster.header.checkCode[SPI_HEADER_INDEX_SLAVE] = global.dataSendToSlave.header.checkCode[SPI_HEADER_INDEX_MASTER]; | |
| 359 } | |
| 89 | 360 } else { |
| 143 | 361 // GPIO_new_DEBUG_LOW(); //For debug. |
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362 global.dataSendToSlaveIsValid = 0; |
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363 global.dataSendToSlaveIsNotValidCount++; |
| 143 | 364 if(DataEX_check_header_and_footer_shifted()) |
| 365 { | |
| 366 if (global.dataSendToSlaveIsNotValidCount == 1) | |
| 367 { | |
| 368 HAL_SPI_Abort_IT(&hspi1); /* reset DMA only once */ | |
| 369 } | |
| 370 } | |
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371 } |
| 143 | 372 |
| 89 | 373 global.dataSendToMaster.power_on_reset = 0; |
| 374 global.deviceDataSendToMaster.power_on_reset = 0; | |
| 375 | |
| 143 | 376 //TODO:REMOVE |
| 377 // if ( !global.dataSendToSlaveStopEval ) { | |
| 378 // scheduleSpecial_Evaluate_DataSendToSlave(); | |
| 379 // } | |
| 380 scheduleSpecial_Evaluate_DataSendToSlave(); | |
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381 |
| 143 | 382 SPI_Start_single_TxRx_with_Master(); //Send data always. |
| 383 } | |
| 38 | 384 } |
| 385 | |
| 89 | 386 static uint8_t SPI_check_header_and_footer_ok(void) { |
| 387 if (global.dataSendToSlave.header.checkCode[0] != 0xBB) | |
| 38 | 388 return 0; |
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Use SPI TX callback to synchronize to main CPU
Ideenmodellierer
parents:
143
diff
changeset
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389 #ifdef USE_OLD_HEADER_FORMAT |
| 89 | 390 if (global.dataSendToSlave.header.checkCode[1] != 0x01) |
| 38 | 391 return 0; |
| 89 | 392 if (global.dataSendToSlave.header.checkCode[2] != 0x01) |
| 38 | 393 return 0; |
| 143 | 394 #endif |
| 89 | 395 if (global.dataSendToSlave.header.checkCode[3] != 0xBB) |
| 38 | 396 return 0; |
| 89 | 397 if (global.dataSendToSlave.footer.checkCode[0] != 0xF4) |
| 38 | 398 return 0; |
| 89 | 399 if (global.dataSendToSlave.footer.checkCode[1] != 0xF3) |
| 38 | 400 return 0; |
| 89 | 401 if (global.dataSendToSlave.footer.checkCode[2] != 0xF2) |
| 38 | 402 return 0; |
| 89 | 403 if (global.dataSendToSlave.footer.checkCode[3] != 0xF1) |
| 38 | 404 return 0; |
| 405 | |
| 406 return 1; | |
| 407 } | |
| 408 | |
| 143 | 409 |
| 410 /* Check if there is an empty frame providec by RTE (all 0) or even no data provided by RTE (all 0xFF) | |
| 411 * If that is not the case the DMA is somehow not in sync | |
| 412 */ | |
| 413 uint8_t DataEX_check_header_and_footer_shifted() | |
| 414 { | |
| 415 uint8_t ret = 1; | |
| 416 if((global.dataSendToSlave.footer.checkCode[0] == 0x00) | |
| 417 && (global.dataSendToSlave.footer.checkCode[1] == 0x00) | |
| 418 && (global.dataSendToSlave.footer.checkCode[2] == 0x00) | |
| 419 && (global.dataSendToSlave.footer.checkCode[3] == 0x00)) { ret = 0; } | |
| 420 | |
| 421 if((global.dataSendToSlave.footer.checkCode[0] == 0xff) | |
| 422 && (global.dataSendToSlave.footer.checkCode[1] == 0xff) | |
| 423 && (global.dataSendToSlave.footer.checkCode[2] == 0xff) | |
| 424 && (global.dataSendToSlave.footer.checkCode[3] == 0xff)) { ret = 0; } | |
| 425 | |
| 426 return ret; | |
| 427 } | |
| 428 | |
| 89 | 429 static void SPI_Error_Handler(void) { |
| 82 | 430 //The device is locks. Hard to recover. |
| 431 // while(1) | |
| 432 // { | |
| 433 // } | |
| 38 | 434 } |
| 435 | |
| 436 /** | |
| 89 | 437 * @} |
| 438 */ | |
| 38 | 439 |
| 440 /** | |
| 89 | 441 * @} |
| 442 */ | |
| 38 | 443 |
| 444 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |