annotate Common/Drivers/STM32F4xx_HAL_DRIVER_v120/Inc/stm32f4xx_hal_i2s.h @ 163:9c77cfe8c2b2 linux-build

Add Linux pack script and a README to explain a little. Signed-off-by: Jan Mulder <jlmulder@xs4all.nl>
author Jan Mulder <jlmulder@xs4all.nl>
date Thu, 21 Feb 2019 16:56:08 +0100
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_i2s.h
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4 * @author MCD Application Team
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5 * @version V1.2.0
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6 * @date 26-December-2014
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7 * @brief Header file of I2S HAL module.
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8 ******************************************************************************
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9 * @attention
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10 *
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11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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12 *
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13 * Redistribution and use in source and binary forms, with or without modification,
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14 * are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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17 * 2. Redistributions in binary form must reproduce the above copyright notice,
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18 * this list of conditions and the following disclaimer in the documentation
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19 * and/or other materials provided with the distribution.
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20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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21 * may be used to endorse or promote products derived from this software
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22 * without specific prior written permission.
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23 *
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24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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34 *
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35 ******************************************************************************
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36 */
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37
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38 /* Define to prevent recursive inclusion -------------------------------------*/
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39 #ifndef __STM32F4xx_HAL_I2S_H
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40 #define __STM32F4xx_HAL_I2S_H
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41
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42 #ifdef __cplusplus
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43 extern "C" {
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44 #endif
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45
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46 /* Includes ------------------------------------------------------------------*/
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47 #include "stm32f4xx_hal_def.h"
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48
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49 /** @addtogroup STM32F4xx_HAL_Driver
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50 * @{
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51 */
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52
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53 /** @addtogroup I2S
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54 * @{
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55 */
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56
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57 /* Exported types ------------------------------------------------------------*/
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58 /** @defgroup I2S_Exported_Types I2S Exported Types
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59 * @{
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60 */
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61
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62 /**
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63 * @brief I2S Init structure definition
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64 */
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65 typedef struct
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66 {
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67 uint32_t Mode; /*!< Specifies the I2S operating mode.
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68 This parameter can be a value of @ref I2S_Mode */
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69
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70 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
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71 This parameter can be a value of @ref I2S_Standard */
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72
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73 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
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74 This parameter can be a value of @ref I2S_Data_Format */
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75
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76 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
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77 This parameter can be a value of @ref I2S_MCLK_Output */
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78
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79 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
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80 This parameter can be a value of @ref I2S_Audio_Frequency */
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81
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82 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
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83 This parameter can be a value of @ref I2S_Clock_Polarity */
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84
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85 uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
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86 This parameter can be a value of @ref I2S_Clock_Source */
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87
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88 uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode.
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89 This parameter can be a value of @ref I2S_FullDuplex_Mode */
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90
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91 }I2S_InitTypeDef;
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92
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93 /**
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94 * @brief HAL State structures definition
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95 */
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96 typedef enum
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97 {
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98 HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */
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99 HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */
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100 HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */
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101 HAL_I2S_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
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102 HAL_I2S_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
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103 HAL_I2S_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
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104 HAL_I2S_STATE_TIMEOUT = 0x03, /*!< I2S timeout state */
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105 HAL_I2S_STATE_ERROR = 0x04 /*!< I2S error state */
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106
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107 }HAL_I2S_StateTypeDef;
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108
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109 /**
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110 * @brief I2S handle Structure definition
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111 */
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112 typedef struct
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113 {
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114 SPI_TypeDef *Instance; /* I2S registers base address */
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115
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116 I2S_InitTypeDef Init; /* I2S communication parameters */
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117
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118 uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */
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119
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120 __IO uint16_t TxXferSize; /* I2S Tx transfer size */
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121
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122 __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */
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123
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124 uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */
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125
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126 __IO uint16_t RxXferSize; /* I2S Rx transfer size */
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127
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128 __IO uint16_t RxXferCount; /* I2S Rx transfer counter */
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129
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130 DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */
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131
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132 DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */
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133
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134 __IO HAL_LockTypeDef Lock; /* I2S locking object */
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135
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136 __IO HAL_I2S_StateTypeDef State; /* I2S communication state */
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137
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138 __IO uint32_t ErrorCode; /* I2S Error code */
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139
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140 }I2S_HandleTypeDef;
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141 /**
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142 * @}
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143 */
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144
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145 /* Exported constants --------------------------------------------------------*/
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146 /** @defgroup I2S_Exported_Constants I2S Exported Constants
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147 * @{
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148 */
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149
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150 /** @defgroup I2S_Error_Code I2S Error Code
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151 * @brief I2S Error Code
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152 * @{
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153 */
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154 #define HAL_I2S_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
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155 #define HAL_I2S_ERROR_UDR ((uint32_t)0x00000001) /*!< I2S Underrun error */
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156 #define HAL_I2S_ERROR_OVR ((uint32_t)0x00000002) /*!< I2S Overrun error */
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157 #define HAL_I2SEX_ERROR_UDR ((uint32_t)0x00000004) /*!< I2S extended Underrun error */
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158 #define HAL_I2SEX_ERROR_OVR ((uint32_t)0x00000008) /*!< I2S extended Overrun error */
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159 #define HAL_I2S_ERROR_FRE ((uint32_t)0x00000010) /*!< I2S Frame format error */
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160 #define HAL_I2S_ERROR_DMA ((uint32_t)0x00000020) /*!< DMA transfer error */
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161 /**
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162 * @}
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163 */
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164
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165 /** @defgroup I2S_Clock_Source I2S Clock Source
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166 * @{
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167 */
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168 #define I2S_CLOCK_PLL ((uint32_t)0x00000000)
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169 #define I2S_CLOCK_EXTERNAL ((uint32_t)0x00000001)
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170 /**
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171 * @}
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172 */
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173
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174 /** @defgroup I2S_Mode I2S Mode
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175 * @{
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176 */
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177 #define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000)
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178 #define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100)
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179 #define I2S_MODE_MASTER_TX ((uint32_t)0x00000200)
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180 #define I2S_MODE_MASTER_RX ((uint32_t)0x00000300)
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181 /**
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182 * @}
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183 */
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184
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185 /** @defgroup I2S_Standard I2S Standard
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186 * @{
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187 */
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188 #define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000)
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189 #define I2S_STANDARD_MSB ((uint32_t)0x00000010)
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190 #define I2S_STANDARD_LSB ((uint32_t)0x00000020)
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191 #define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030)
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192 #define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0)
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193 /**
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194 * @}
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195 */
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196
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197 /** @defgroup I2S_Data_Format I2S Data Format
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198 * @{
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199 */
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200 #define I2S_DATAFORMAT_16B ((uint32_t)0x00000000)
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201 #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001)
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202 #define I2S_DATAFORMAT_24B ((uint32_t)0x00000003)
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203 #define I2S_DATAFORMAT_32B ((uint32_t)0x00000005)
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204 /**
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205 * @}
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206 */
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207
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208 /** @defgroup I2S_MCLK_Output I2S Mclk Output
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209 * @{
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210 */
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211 #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE)
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212 #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000)
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213 /**
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214 * @}
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215 */
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216
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217 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
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218 * @{
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219 */
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220 #define I2S_AUDIOFREQ_192K ((uint32_t)192000)
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221 #define I2S_AUDIOFREQ_96K ((uint32_t)96000)
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222 #define I2S_AUDIOFREQ_48K ((uint32_t)48000)
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223 #define I2S_AUDIOFREQ_44K ((uint32_t)44100)
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224 #define I2S_AUDIOFREQ_32K ((uint32_t)32000)
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225 #define I2S_AUDIOFREQ_22K ((uint32_t)22050)
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226 #define I2S_AUDIOFREQ_16K ((uint32_t)16000)
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227 #define I2S_AUDIOFREQ_11K ((uint32_t)11025)
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228 #define I2S_AUDIOFREQ_8K ((uint32_t)8000)
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229 #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2)
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230 /**
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231 * @}
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232 */
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233
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234 /** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode
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235 * @{
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236 */
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237 #define I2S_FULLDUPLEXMODE_DISABLE ((uint32_t)0x00000000)
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238 #define I2S_FULLDUPLEXMODE_ENABLE ((uint32_t)0x00000001)
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239 /**
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240 * @}
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241 */
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242
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243 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity
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244 * @{
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245 */
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246 #define I2S_CPOL_LOW ((uint32_t)0x00000000)
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247 #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL)
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248 /**
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249 * @}
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250 */
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251
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252 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
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253 * @{
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254 */
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255 #define I2S_IT_TXE SPI_CR2_TXEIE
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256 #define I2S_IT_RXNE SPI_CR2_RXNEIE
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257 #define I2S_IT_ERR SPI_CR2_ERRIE
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258 /**
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259 * @}
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260 */
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261
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262 /** @defgroup I2S_Flags_Definition I2S Flags Definition
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263 * @{
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264 */
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265 #define I2S_FLAG_TXE SPI_SR_TXE
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266 #define I2S_FLAG_RXNE SPI_SR_RXNE
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267
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268 #define I2S_FLAG_UDR SPI_SR_UDR
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269 #define I2S_FLAG_OVR SPI_SR_OVR
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270 #define I2S_FLAG_FRE SPI_SR_FRE
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271
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272 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
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273 #define I2S_FLAG_BSY SPI_SR_BSY
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274 /**
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275 * @}
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276 */
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277
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278 /**
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279 * @}
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280 */
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281
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282 /* Exported macro ------------------------------------------------------------*/
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283 /** @defgroup I2S_Exported_Macros I2S Exported Macros
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284 * @{
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285 */
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286
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287 /** @brief Reset I2S handle state
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288 * @param __HANDLE__: specifies the I2S Handle.
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289 * @retval None
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290 */
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291 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
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292
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293 /** @brief Enable or disable the specified SPI peripheral (in I2S mode).
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294 * @param __HANDLE__: specifies the I2S Handle.
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295 * @retval None
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296 */
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297 #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
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298 #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= ~SPI_I2SCFGR_I2SE)
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299
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300 /** @brief Enable or disable the specified I2S interrupts.
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301 * @param __HANDLE__: specifies the I2S Handle.
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302 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
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303 * This parameter can be one of the following values:
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304 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
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305 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
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306 * @arg I2S_IT_ERR: Error interrupt enable
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307 * @retval None
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308 */
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309 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
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310 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__))
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311
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312 /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
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313 * @param __HANDLE__: specifies the I2S Handle.
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314 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
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315 * @param __INTERRUPT__: specifies the I2S interrupt source to check.
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316 * This parameter can be one of the following values:
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317 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
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318 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
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319 * @arg I2S_IT_ERR: Error interrupt enable
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320 * @retval The new state of __IT__ (TRUE or FALSE).
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321 */
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322 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
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323
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324 /** @brief Checks whether the specified I2S flag is set or not.
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325 * @param __HANDLE__: specifies the I2S Handle.
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326 * @param __FLAG__: specifies the flag to check.
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327 * This parameter can be one of the following values:
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328 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
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329 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
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330 * @arg I2S_FLAG_UDR: Underrun flag
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331 * @arg I2S_FLAG_OVR: Overrun flag
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332 * @arg I2S_FLAG_FRE: Frame error flag
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333 * @arg I2S_FLAG_CHSIDE: Channel Side flag
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334 * @arg I2S_FLAG_BSY: Busy flag
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335 * @retval The new state of __FLAG__ (TRUE or FALSE).
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336 */
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337 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
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338
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339 /** @brief Clears the I2S OVR pending flag.
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340 * @param __HANDLE__: specifies the I2S Handle.
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341 * @retval None
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342 */
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343 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \
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344 do{ \
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345 __IO uint32_t tmpreg; \
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346 tmpreg = (__HANDLE__)->Instance->DR; \
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347 tmpreg = (__HANDLE__)->Instance->SR; \
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348 UNUSED(tmpreg); \
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349 } while(0)
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350
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351 /** @brief Clears the I2S UDR pending flag.
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352 * @param __HANDLE__: specifies the I2S Handle.
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353 * @retval None
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354 */
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355 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \
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356 do{ \
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357 __IO uint32_t tmpreg; \
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358 tmpreg = (__HANDLE__)->Instance->SR; \
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359 UNUSED(tmpreg); \
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360 } while(0)
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361 /**
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362 * @}
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363 */
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364
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365 /* Include I2S Extension module */
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366 #include "stm32f4xx_hal_i2s_ex.h"
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367
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368 /* Exported functions --------------------------------------------------------*/
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369 /** @addtogroup I2S_Exported_Functions
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370 * @{
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371 */
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372
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373 /** @addtogroup I2S_Exported_Functions_Group1
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374 * @{
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375 */
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376 /* Initialization/de-initialization functions **********************************/
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377 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
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378 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
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379 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
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380 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
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381 /**
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382 * @}
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383 */
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384
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385 /** @addtogroup I2S_Exported_Functions_Group2
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386 * @{
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387 */
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388 /* I/O operation functions *****************************************************/
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389 /* Blocking mode: Polling */
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390 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
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391 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
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392
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393 /* Non-Blocking mode: Interrupt */
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394 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
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395 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
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396 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
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397
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398 /* Non-Blocking mode: DMA */
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399 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
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400 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
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401
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402 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
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403 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
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404 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
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405
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406 /* Peripheral Control and State functions **************************************/
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407 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
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408 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
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409
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410 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
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411 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
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412 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
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413 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
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414 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
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415 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
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416 /**
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417 * @}
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418 */
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419
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420 /**
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421 * @}
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422 */
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423
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424 /* Private types -------------------------------------------------------------*/
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425 /* Private variables ---------------------------------------------------------*/
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426 /* Private constants ---------------------------------------------------------*/
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427 /** @defgroup I2S_Private_Constants I2S Private Constants
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428 * @{
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429 */
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430
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431 /**
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432 * @}
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433 */
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434
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435 /* Private macros ------------------------------------------------------------*/
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436 /** @defgroup I2S_Private_Macros I2S Private Macros
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437 * @{
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438 */
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439 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \
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440 ((CLOCK) == I2S_CLOCK_PLL))
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441
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442 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
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443 ((MODE) == I2S_MODE_SLAVE_RX) || \
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444 ((MODE) == I2S_MODE_MASTER_TX) || \
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445 ((MODE) == I2S_MODE_MASTER_RX))
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446
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447 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
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448 ((STANDARD) == I2S_STANDARD_MSB) || \
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449 ((STANDARD) == I2S_STANDARD_LSB) || \
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450 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
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451 ((STANDARD) == I2S_STANDARD_PCM_LONG))
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452
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453 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
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454 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
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455 ((FORMAT) == I2S_DATAFORMAT_24B) || \
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456 ((FORMAT) == I2S_DATAFORMAT_32B))
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457
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458 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
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459 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
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460
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461 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
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462 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
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463 ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
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464
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465 #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
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466 ((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
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467
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468 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
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469 ((CPOL) == I2S_CPOL_HIGH))
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470
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471 #define I2SxEXT(__INSTANCE__) ((__INSTANCE__) == (SPI2)? (SPI_TypeDef *)(I2S2ext_BASE): (SPI_TypeDef *)(I2S3ext_BASE))
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472 /**
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473 * @}
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474 */
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475
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476 /* Private functions ---------------------------------------------------------*/
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477 /** @defgroup I2S_Private_Functions I2S Private Functions
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478 * @{
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479 */
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480 void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
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481 void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
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482 void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
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483 void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
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484 void I2S_DMAError(DMA_HandleTypeDef *hdma);
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485 HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout);
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486 /**
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487 * @}
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488 */
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489
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490 /**
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491 * @}
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492 */
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493
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494 /**
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495 * @}
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496 */
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497
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498 #ifdef __cplusplus
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499 }
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500 #endif
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501
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502
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503 #endif /* __STM32F4xx_HAL_I2S_H */
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504
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505 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/