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annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_gpio.c @ 928:9b7859554beb Evo_2_23 tip
Cleanup Internal Uart:
The compile switches have been updated to allow GNSS data flow if new GPIO config is available or if GNSS is enabled for the external UART.
author | Ideenmodellierer |
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date | Tue, 26 Nov 2024 21:30:06 +0100 |
parents | c78bcbd5deda |
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rev | line source |
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_ll_gpio.c |
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4 * @author MCD Application Team |
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5 * @brief GPIO LL module driver. |
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6 ****************************************************************************** |
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7 * @attention |
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8 * |
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9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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10 * |
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11 * Redistribution and use in source and binary forms, with or without modification, |
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12 * are permitted provided that the following conditions are met: |
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13 * 1. Redistributions of source code must retain the above copyright notice, |
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14 * this list of conditions and the following disclaimer. |
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15 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 * this list of conditions and the following disclaimer in the documentation |
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17 * and/or other materials provided with the distribution. |
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 * may be used to endorse or promote products derived from this software |
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20 * without specific prior written permission. |
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21 * |
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 * |
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33 ****************************************************************************** |
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34 */ |
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35 #if defined(USE_FULL_LL_DRIVER) |
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36 |
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37 /* Includes ------------------------------------------------------------------*/ |
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38 #include "stm32f4xx_ll_gpio.h" |
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39 #include "stm32f4xx_ll_bus.h" |
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40 #ifdef USE_FULL_ASSERT |
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41 #include "stm32_assert.h" |
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42 #else |
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43 #define assert_param(expr) ((void)0U) |
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44 #endif |
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45 |
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46 /** @addtogroup STM32F4xx_LL_Driver |
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47 * @{ |
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48 */ |
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49 |
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50 #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) || defined (GPIOI) || defined (GPIOJ) || defined (GPIOK) |
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51 |
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52 /** @addtogroup GPIO_LL |
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53 * @{ |
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54 */ |
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55 |
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56 /* Private types -------------------------------------------------------------*/ |
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57 /* Private variables ---------------------------------------------------------*/ |
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58 /* Private constants ---------------------------------------------------------*/ |
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59 /* Private macros ------------------------------------------------------------*/ |
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60 /** @addtogroup GPIO_LL_Private_Macros |
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61 * @{ |
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62 */ |
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63 #define IS_LL_GPIO_PIN(__VALUE__) (((0x00000000U) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN_ALL))) |
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64 |
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65 #define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_INPUT) ||\ |
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66 ((__VALUE__) == LL_GPIO_MODE_OUTPUT) ||\ |
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67 ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) ||\ |
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68 ((__VALUE__) == LL_GPIO_MODE_ANALOG)) |
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69 |
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70 #define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) ||\ |
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71 ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN)) |
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72 |
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73 #define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) ||\ |
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74 ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) ||\ |
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75 ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH) ||\ |
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76 ((__VALUE__) == LL_GPIO_SPEED_FREQ_VERY_HIGH)) |
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77 |
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78 #define IS_LL_GPIO_PULL(__VALUE__) (((__VALUE__) == LL_GPIO_PULL_NO) ||\ |
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79 ((__VALUE__) == LL_GPIO_PULL_UP) ||\ |
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80 ((__VALUE__) == LL_GPIO_PULL_DOWN)) |
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81 |
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82 #define IS_LL_GPIO_ALTERNATE(__VALUE__) (((__VALUE__) == LL_GPIO_AF_0 ) ||\ |
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83 ((__VALUE__) == LL_GPIO_AF_1 ) ||\ |
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84 ((__VALUE__) == LL_GPIO_AF_2 ) ||\ |
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85 ((__VALUE__) == LL_GPIO_AF_3 ) ||\ |
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86 ((__VALUE__) == LL_GPIO_AF_4 ) ||\ |
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87 ((__VALUE__) == LL_GPIO_AF_5 ) ||\ |
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88 ((__VALUE__) == LL_GPIO_AF_6 ) ||\ |
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89 ((__VALUE__) == LL_GPIO_AF_7 ) ||\ |
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90 ((__VALUE__) == LL_GPIO_AF_8 ) ||\ |
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91 ((__VALUE__) == LL_GPIO_AF_9 ) ||\ |
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92 ((__VALUE__) == LL_GPIO_AF_10 ) ||\ |
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93 ((__VALUE__) == LL_GPIO_AF_11 ) ||\ |
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94 ((__VALUE__) == LL_GPIO_AF_12 ) ||\ |
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95 ((__VALUE__) == LL_GPIO_AF_13 ) ||\ |
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96 ((__VALUE__) == LL_GPIO_AF_14 ) ||\ |
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97 ((__VALUE__) == LL_GPIO_AF_15 )) |
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98 /** |
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99 * @} |
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100 */ |
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101 |
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102 /* Private function prototypes -----------------------------------------------*/ |
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103 |
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104 /* Exported functions --------------------------------------------------------*/ |
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105 /** @addtogroup GPIO_LL_Exported_Functions |
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106 * @{ |
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107 */ |
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108 |
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109 /** @addtogroup GPIO_LL_EF_Init |
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110 * @{ |
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111 */ |
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112 |
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113 /** |
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114 * @brief De-initialize GPIO registers (Registers restored to their default values). |
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115 * @param GPIOx GPIO Port |
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116 * @retval An ErrorStatus enumeration value: |
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117 * - SUCCESS: GPIO registers are de-initialized |
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118 * - ERROR: Wrong GPIO Port |
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119 */ |
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120 ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx) |
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121 { |
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122 ErrorStatus status = SUCCESS; |
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123 |
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124 /* Check the parameters */ |
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125 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); |
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126 |
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127 /* Force and Release reset on clock of GPIOx Port */ |
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128 if (GPIOx == GPIOA) |
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129 { |
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130 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOA); |
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131 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOA); |
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132 } |
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133 else if (GPIOx == GPIOB) |
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134 { |
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135 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOB); |
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136 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOB); |
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137 } |
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138 else if (GPIOx == GPIOC) |
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139 { |
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140 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOC); |
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141 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOC); |
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142 } |
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143 #if defined(GPIOD) |
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144 else if (GPIOx == GPIOD) |
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145 { |
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146 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOD); |
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147 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOD); |
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148 } |
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149 #endif /* GPIOD */ |
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150 #if defined(GPIOE) |
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151 else if (GPIOx == GPIOE) |
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152 { |
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153 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOE); |
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154 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOE); |
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155 } |
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156 #endif /* GPIOE */ |
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157 #if defined(GPIOF) |
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158 else if (GPIOx == GPIOF) |
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159 { |
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160 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOF); |
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161 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOF); |
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162 } |
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163 #endif /* GPIOF */ |
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164 #if defined(GPIOG) |
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165 else if (GPIOx == GPIOG) |
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166 { |
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167 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOG); |
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168 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOG); |
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169 } |
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170 #endif /* GPIOG */ |
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171 #if defined(GPIOH) |
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172 else if (GPIOx == GPIOH) |
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173 { |
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174 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOH); |
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175 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOH); |
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176 } |
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177 #endif /* GPIOH */ |
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178 #if defined(GPIOI) |
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179 else if (GPIOx == GPIOI) |
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180 { |
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181 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOI); |
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182 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOI); |
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183 } |
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184 #endif /* GPIOI */ |
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185 #if defined(GPIOJ) |
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186 else if (GPIOx == GPIOJ) |
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187 { |
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188 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOJ); |
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189 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOJ); |
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190 } |
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191 #endif /* GPIOJ */ |
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192 #if defined(GPIOK) |
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193 else if (GPIOx == GPIOK) |
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194 { |
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195 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOK); |
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196 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOK); |
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197 } |
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198 #endif /* GPIOK */ |
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199 else |
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200 { |
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201 status = ERROR; |
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202 } |
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203 |
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204 return (status); |
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205 } |
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206 |
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207 /** |
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208 * @brief Initialize GPIO registers according to the specified parameters in GPIO_InitStruct. |
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209 * @param GPIOx GPIO Port |
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210 * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure |
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211 * that contains the configuration information for the specified GPIO peripheral. |
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212 * @retval An ErrorStatus enumeration value: |
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213 * - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content |
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214 * - ERROR: Not applicable |
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215 */ |
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216 ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct) |
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217 { |
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218 uint32_t pinpos = 0x00000000U; |
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219 uint32_t currentpin = 0x00000000U; |
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220 |
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221 /* Check the parameters */ |
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222 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); |
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223 assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin)); |
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224 assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode)); |
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225 assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull)); |
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226 |
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227 /* ------------------------- Configure the port pins ---------------- */ |
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228 /* Initialize pinpos on first pin set */ |
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229 pinpos = POSITION_VAL(GPIO_InitStruct->Pin); |
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230 |
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231 /* Configure the port pins */ |
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232 while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00000000U) |
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233 { |
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234 /* Get current io position */ |
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235 currentpin = (GPIO_InitStruct->Pin) & (0x00000001U << pinpos); |
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236 |
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237 if (currentpin) |
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238 { |
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239 /* Pin Mode configuration */ |
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240 LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode); |
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241 |
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242 if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)) |
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243 { |
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244 /* Check Speed mode parameters */ |
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245 assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed)); |
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246 |
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247 /* Speed mode configuration */ |
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248 LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed); |
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249 } |
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250 |
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251 /* Pull-up Pull down resistor configuration*/ |
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252 LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull); |
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253 |
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254 if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE) |
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255 { |
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256 /* Check Alternate parameter */ |
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257 assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate)); |
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258 |
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259 /* Speed mode configuration */ |
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260 if (POSITION_VAL(currentpin) < 0x00000008U) |
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261 { |
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262 LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate); |
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263 } |
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264 else |
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265 { |
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266 LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate); |
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267 } |
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268 } |
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269 } |
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270 pinpos++; |
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271 } |
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272 |
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273 if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)) |
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274 { |
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275 /* Check Output mode parameters */ |
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276 assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType)); |
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277 |
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278 /* Output mode configuration*/ |
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279 LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType); |
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280 |
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281 } |
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282 return (SUCCESS); |
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283 } |
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284 |
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285 /** |
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286 * @brief Set each @ref LL_GPIO_InitTypeDef field to default value. |
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287 * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure |
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288 * whose fields will be set to default values. |
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289 * @retval None |
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290 */ |
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291 |
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292 void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct) |
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293 { |
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294 /* Reset GPIO init structure parameters values */ |
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295 GPIO_InitStruct->Pin = LL_GPIO_PIN_ALL; |
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296 GPIO_InitStruct->Mode = LL_GPIO_MODE_ANALOG; |
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297 GPIO_InitStruct->Speed = LL_GPIO_SPEED_FREQ_LOW; |
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298 GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_PUSHPULL; |
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299 GPIO_InitStruct->Pull = LL_GPIO_PULL_NO; |
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300 GPIO_InitStruct->Alternate = LL_GPIO_AF_0; |
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301 } |
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302 |
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303 /** |
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304 * @} |
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305 */ |
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306 |
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307 /** |
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308 * @} |
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309 */ |
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310 |
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311 /** |
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312 * @} |
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313 */ |
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314 |
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315 #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) || defined (GPIOI) || defined (GPIOJ) || defined (GPIOK) */ |
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316 |
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317 /** |
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318 * @} |
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319 */ |
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320 |
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321 #endif /* USE_FULL_LL_DRIVER */ |
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322 |
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323 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |