annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.c @ 928:9b7859554beb Evo_2_23 tip

Cleanup Internal Uart: The compile switches have been updated to allow GNSS data flow if new GPIO config is available or if GNSS is enabled for the external UART.
author Ideenmodellierer
date Tue, 26 Nov 2024 21:30:06 +0100
parents c78bcbd5deda
children
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_nor.c
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4 * @author MCD Application Team
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5 * @brief NOR HAL module driver.
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6 * This file provides a generic firmware to drive NOR memories mounted
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7 * as external device.
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8 *
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9 @verbatim
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10 ==============================================================================
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11 ##### How to use this driver #####
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12 ==============================================================================
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13 [..]
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14 This driver is a generic layered driver which contains a set of APIs used to
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15 control NOR flash memories. It uses the FMC/FSMC layer functions to interface
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16 with NOR devices. This driver is used as follows:
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17
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18 (+) NOR flash memory configuration sequence using the function HAL_NOR_Init()
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19 with control and timing parameters for both normal and extended mode.
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20
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21 (+) Read NOR flash memory manufacturer code and device IDs using the function
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22 HAL_NOR_Read_ID(). The read information is stored in the NOR_ID_TypeDef
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23 structure declared by the function caller.
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24
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25 (+) Access NOR flash memory by read/write data unit operations using the functions
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26 HAL_NOR_Read(), HAL_NOR_Program().
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27
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28 (+) Perform NOR flash erase block/chip operations using the functions
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29 HAL_NOR_Erase_Block() and HAL_NOR_Erase_Chip().
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30
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31 (+) Read the NOR flash CFI (common flash interface) IDs using the function
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32 HAL_NOR_Read_CFI(). The read information is stored in the NOR_CFI_TypeDef
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33 structure declared by the function caller.
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34
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35 (+) You can also control the NOR device by calling the control APIs HAL_NOR_WriteOperation_Enable()/
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36 HAL_NOR_WriteOperation_Disable() to respectively enable/disable the NOR write operation
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37
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38 (+) You can monitor the NOR device HAL state by calling the function
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39 HAL_NOR_GetState()
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40 [..]
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41 (@) This driver is a set of generic APIs which handle standard NOR flash operations.
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42 If a NOR flash device contains different operations and/or implementations,
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43 it should be implemented separately.
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44
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45 *** NOR HAL driver macros list ***
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46 =============================================
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47 [..]
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48 Below the list of most used macros in NOR HAL driver.
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49
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50 (+) NOR_WRITE : NOR memory write data to specified address
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51
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52 @endverbatim
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53 ******************************************************************************
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54 * @attention
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55 *
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56 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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57 *
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58 * Redistribution and use in source and binary forms, with or without modification,
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59 * are permitted provided that the following conditions are met:
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60 * 1. Redistributions of source code must retain the above copyright notice,
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61 * this list of conditions and the following disclaimer.
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62 * 2. Redistributions in binary form must reproduce the above copyright notice,
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63 * this list of conditions and the following disclaimer in the documentation
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64 * and/or other materials provided with the distribution.
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65 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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66 * may be used to endorse or promote products derived from this software
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67 * without specific prior written permission.
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68 *
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69 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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70 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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71 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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72 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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73 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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74 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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75 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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76 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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77 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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78 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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79 *
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80 ******************************************************************************
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81 */
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82
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83 /* Includes ------------------------------------------------------------------*/
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84 #include "stm32f4xx_hal.h"
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85
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86 /** @addtogroup STM32F4xx_HAL_Driver
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87 * @{
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88 */
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89
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90 /** @defgroup NOR NOR
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91 * @brief NOR driver modules
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92 * @{
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93 */
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94 #ifdef HAL_NOR_MODULE_ENABLED
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95 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
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96 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
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97 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
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98 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx)
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99 /* Private typedef -----------------------------------------------------------*/
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100 /* Private define ------------------------------------------------------------*/
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101
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102 /** @defgroup NOR_Private_Defines NOR Private Defines
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103 * @{
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104 */
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105
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106 /* Constants to define address to set to write a command */
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107 #define NOR_CMD_ADDRESS_FIRST (uint16_t)0x0555
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108 #define NOR_CMD_ADDRESS_FIRST_CFI (uint16_t)0x0055
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109 #define NOR_CMD_ADDRESS_SECOND (uint16_t)0x02AA
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110 #define NOR_CMD_ADDRESS_THIRD (uint16_t)0x0555
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111 #define NOR_CMD_ADDRESS_FOURTH (uint16_t)0x0555
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112 #define NOR_CMD_ADDRESS_FIFTH (uint16_t)0x02AA
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113 #define NOR_CMD_ADDRESS_SIXTH (uint16_t)0x0555
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114
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115 /* Constants to define data to program a command */
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116 #define NOR_CMD_DATA_READ_RESET (uint16_t)0x00F0
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117 #define NOR_CMD_DATA_FIRST (uint16_t)0x00AA
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118 #define NOR_CMD_DATA_SECOND (uint16_t)0x0055
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119 #define NOR_CMD_DATA_AUTO_SELECT (uint16_t)0x0090
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120 #define NOR_CMD_DATA_PROGRAM (uint16_t)0x00A0
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121 #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD (uint16_t)0x0080
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122 #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH (uint16_t)0x00AA
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123 #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH (uint16_t)0x0055
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124 #define NOR_CMD_DATA_CHIP_ERASE (uint16_t)0x0010
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125 #define NOR_CMD_DATA_CFI (uint16_t)0x0098
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126
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127 #define NOR_CMD_DATA_BUFFER_AND_PROG (uint8_t)0x25
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128 #define NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM (uint8_t)0x29
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129 #define NOR_CMD_DATA_BLOCK_ERASE (uint8_t)0x30
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130
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131 /* Mask on NOR STATUS REGISTER */
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132 #define NOR_MASK_STATUS_DQ5 (uint16_t)0x0020
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133 #define NOR_MASK_STATUS_DQ6 (uint16_t)0x0040
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134
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135 /**
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136 * @}
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137 */
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138
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139 /* Private macro -------------------------------------------------------------*/
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140 /* Private variables ---------------------------------------------------------*/
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141 /** @defgroup NOR_Private_Variables NOR Private Variables
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142 * @{
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143 */
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144
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145 static uint32_t uwNORMemoryDataWidth = NOR_MEMORY_8B;
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146
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147 /**
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148 * @}
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149 */
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150
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151 /* Private functions ---------------------------------------------------------*/
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152 /* Exported functions --------------------------------------------------------*/
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153 /** @defgroup NOR_Exported_Functions NOR Exported Functions
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154 * @{
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155 */
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156
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157 /** @defgroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
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158 * @brief Initialization and Configuration functions
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159 *
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160 @verbatim
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161 ==============================================================================
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162 ##### NOR Initialization and de_initialization functions #####
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163 ==============================================================================
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164 [..]
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165 This section provides functions allowing to initialize/de-initialize
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166 the NOR memory
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167
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168 @endverbatim
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169 * @{
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170 */
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171
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172 /**
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173 * @brief Perform the NOR memory Initialization sequence
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174 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
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175 * the configuration information for NOR module.
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176 * @param Timing pointer to NOR control timing structure
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177 * @param ExtTiming pointer to NOR extended mode timing structure
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178 * @retval HAL status
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179 */
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180 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
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181 {
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182 /* Check the NOR handle parameter */
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183 if(hnor == NULL)
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184 {
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185 return HAL_ERROR;
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186 }
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187
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188 if(hnor->State == HAL_NOR_STATE_RESET)
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189 {
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190 /* Allocate lock resource and initialize it */
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191 hnor->Lock = HAL_UNLOCKED;
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192 /* Initialize the low level hardware (MSP) */
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193 HAL_NOR_MspInit(hnor);
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194 }
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195
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196 /* Initialize NOR control Interface */
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197 FMC_NORSRAM_Init(hnor->Instance, &(hnor->Init));
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198
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199 /* Initialize NOR timing Interface */
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200 FMC_NORSRAM_Timing_Init(hnor->Instance, Timing, hnor->Init.NSBank);
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201
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202 /* Initialize NOR extended mode timing Interface */
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203 FMC_NORSRAM_Extended_Timing_Init(hnor->Extended, ExtTiming, hnor->Init.NSBank, hnor->Init.ExtendedMode);
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204
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205 /* Enable the NORSRAM device */
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206 __FMC_NORSRAM_ENABLE(hnor->Instance, hnor->Init.NSBank);
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207
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208 /* Initialize NOR Memory Data Width*/
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209 if (hnor->Init.MemoryDataWidth == FMC_NORSRAM_MEM_BUS_WIDTH_8)
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210 {
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211 uwNORMemoryDataWidth = NOR_MEMORY_8B;
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212 }
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213 else
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214 {
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215 uwNORMemoryDataWidth = NOR_MEMORY_16B;
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216 }
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217
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218 /* Check the NOR controller state */
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219 hnor->State = HAL_NOR_STATE_READY;
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220
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221 return HAL_OK;
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222 }
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223
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224 /**
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225 * @brief Perform NOR memory De-Initialization sequence
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226 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
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227 * the configuration information for NOR module.
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228 * @retval HAL status
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229 */
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230 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor)
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231 {
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232 /* De-Initialize the low level hardware (MSP) */
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233 HAL_NOR_MspDeInit(hnor);
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234
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235 /* Configure the NOR registers with their reset values */
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236 FMC_NORSRAM_DeInit(hnor->Instance, hnor->Extended, hnor->Init.NSBank);
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237
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238 /* Update the NOR controller state */
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239 hnor->State = HAL_NOR_STATE_RESET;
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240
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241 /* Release Lock */
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242 __HAL_UNLOCK(hnor);
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243
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244 return HAL_OK;
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245 }
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246
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247 /**
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248 * @brief NOR MSP Init
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249 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
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250 * the configuration information for NOR module.
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251 * @retval None
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252 */
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253 __weak void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor)
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254 {
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255 /* Prevent unused argument(s) compilation warning */
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256 UNUSED(hnor);
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257 /* NOTE : This function Should not be modified, when the callback is needed,
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258 the HAL_NOR_MspInit could be implemented in the user file
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259 */
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260 }
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261
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262 /**
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263 * @brief NOR MSP DeInit
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264 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
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265 * the configuration information for NOR module.
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266 * @retval None
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267 */
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268 __weak void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor)
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269 {
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270 /* Prevent unused argument(s) compilation warning */
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271 UNUSED(hnor);
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272 /* NOTE : This function Should not be modified, when the callback is needed,
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273 the HAL_NOR_MspDeInit could be implemented in the user file
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274 */
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275 }
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276
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277 /**
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278 * @brief NOR MSP Wait for Ready/Busy signal
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279 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
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280 * the configuration information for NOR module.
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281 * @param Timeout Maximum timeout value
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282 * @retval None
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283 */
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284 __weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout)
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285 {
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286 /* Prevent unused argument(s) compilation warning */
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287 UNUSED(hnor);
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288 UNUSED(Timeout);
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289
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290 /* NOTE : This function Should not be modified, when the callback is needed,
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291 the HAL_NOR_MspWait could be implemented in the user file
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292 */
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293 }
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294
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295 /**
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296 * @}
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297 */
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298
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299 /** @defgroup NOR_Exported_Functions_Group2 Input and Output functions
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300 * @brief Input Output and memory control functions
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301 *
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302 @verbatim
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303 ==============================================================================
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304 ##### NOR Input and Output functions #####
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305 ==============================================================================
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306 [..]
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307 This section provides functions allowing to use and control the NOR memory
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308
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309 @endverbatim
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310 * @{
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311 */
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312
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313 /**
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314 * @brief Read NOR flash IDs
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315 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
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316 * the configuration information for NOR module.
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317 * @param pNOR_ID pointer to NOR ID structure
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318 * @retval HAL status
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319 */
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320 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID)
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321 {
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322 uint32_t deviceaddress = 0U;
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323
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324 /* Process Locked */
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325 __HAL_LOCK(hnor);
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326
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327 /* Check the NOR controller state */
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328 if(hnor->State == HAL_NOR_STATE_BUSY)
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329 {
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330 return HAL_BUSY;
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331 }
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332
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333 /* Select the NOR device address */
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334 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
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335 {
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336 deviceaddress = NOR_MEMORY_ADRESS1;
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337 }
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338 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
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339 {
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340 deviceaddress = NOR_MEMORY_ADRESS2;
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341 }
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342 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
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343 {
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344 deviceaddress = NOR_MEMORY_ADRESS3;
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345 }
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346 else /* FMC_NORSRAM_BANK4 */
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347 {
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348 deviceaddress = NOR_MEMORY_ADRESS4;
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349 }
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350
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351 /* Update the NOR controller state */
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352 hnor->State = HAL_NOR_STATE_BUSY;
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353
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354 /* Send read ID command */
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355 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
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356 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
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357 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_AUTO_SELECT);
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358
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359 /* Read the NOR IDs */
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360 pNOR_ID->Manufacturer_Code = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, MC_ADDRESS);
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361 pNOR_ID->Device_Code1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, DEVICE_CODE1_ADDR);
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362 pNOR_ID->Device_Code2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, DEVICE_CODE2_ADDR);
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363 pNOR_ID->Device_Code3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, DEVICE_CODE3_ADDR);
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364
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365 /* Check the NOR controller state */
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366 hnor->State = HAL_NOR_STATE_READY;
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367
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368 /* Process unlocked */
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369 __HAL_UNLOCK(hnor);
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370
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371 return HAL_OK;
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372 }
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373
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374 /**
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375 * @brief Returns the NOR memory to Read mode.
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376 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
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377 * the configuration information for NOR module.
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378 * @retval HAL status
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379 */
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380 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor)
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381 {
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382 uint32_t deviceaddress = 0U;
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383
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384 /* Process Locked */
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385 __HAL_LOCK(hnor);
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386
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387 /* Check the NOR controller state */
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388 if(hnor->State == HAL_NOR_STATE_BUSY)
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389 {
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390 return HAL_BUSY;
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391 }
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392
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393 /* Select the NOR device address */
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394 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
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395 {
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396 deviceaddress = NOR_MEMORY_ADRESS1;
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397 }
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398 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
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399 {
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400 deviceaddress = NOR_MEMORY_ADRESS2;
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401 }
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402 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
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403 {
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404 deviceaddress = NOR_MEMORY_ADRESS3;
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405 }
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406 else /* FMC_NORSRAM_BANK4 */
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407 {
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408 deviceaddress = NOR_MEMORY_ADRESS4;
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409 }
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410
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411 NOR_WRITE(deviceaddress, NOR_CMD_DATA_READ_RESET);
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412
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413 /* Check the NOR controller state */
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414 hnor->State = HAL_NOR_STATE_READY;
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415
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416 /* Process unlocked */
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417 __HAL_UNLOCK(hnor);
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418
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419 return HAL_OK;
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420 }
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421
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422 /**
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423 * @brief Read data from NOR memory
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424 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
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425 * the configuration information for NOR module.
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426 * @param pAddress pointer to Device address
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427 * @param pData pointer to read data
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428 * @retval HAL status
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429 */
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430 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
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431 {
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432 uint32_t deviceaddress = 0U;
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433
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434 /* Process Locked */
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435 __HAL_LOCK(hnor);
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436
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437 /* Check the NOR controller state */
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438 if(hnor->State == HAL_NOR_STATE_BUSY)
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439 {
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440 return HAL_BUSY;
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441 }
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442
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443 /* Select the NOR device address */
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444 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
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445 {
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446 deviceaddress = NOR_MEMORY_ADRESS1;
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447 }
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448 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
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449 {
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450 deviceaddress = NOR_MEMORY_ADRESS2;
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451 }
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452 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
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453 {
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454 deviceaddress = NOR_MEMORY_ADRESS3;
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455 }
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456 else /* FMC_NORSRAM_BANK4 */
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457 {
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458 deviceaddress = NOR_MEMORY_ADRESS4;
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459 }
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460
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461 /* Update the NOR controller state */
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462 hnor->State = HAL_NOR_STATE_BUSY;
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463
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diff changeset
464 /* Send read data command */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
465 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
466 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
467 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
468
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
469 /* Read the data */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
470 *pData = *(__IO uint32_t *)(uint32_t)pAddress;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
471
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
472 /* Check the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
473 hnor->State = HAL_NOR_STATE_READY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
474
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
475 /* Process unlocked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
476 __HAL_UNLOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
477
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
478 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
479 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
480
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
481 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
482 * @brief Program data to NOR memory
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
483 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
484 * the configuration information for NOR module.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
485 * @param pAddress Device address
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
486 * @param pData pointer to the data to write
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
487 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
488 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
489 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
490 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
491 uint32_t deviceaddress = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
492
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
493 /* Process Locked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
494 __HAL_LOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
495
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
496 /* Check the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
497 if(hnor->State == HAL_NOR_STATE_BUSY)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
498 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
499 return HAL_BUSY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
500 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
501
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
502 /* Select the NOR device address */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
503 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
504 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
505 deviceaddress = NOR_MEMORY_ADRESS1;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
506 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
507 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
508 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
509 deviceaddress = NOR_MEMORY_ADRESS2;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
510 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
511 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
512 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
513 deviceaddress = NOR_MEMORY_ADRESS3;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
514 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
515 else /* FMC_NORSRAM_BANK4 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
516 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
517 deviceaddress = NOR_MEMORY_ADRESS4;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
518 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
519
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
520 /* Update the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
521 hnor->State = HAL_NOR_STATE_BUSY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
522
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
523 /* Send program data command */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
524 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
525 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
526 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_PROGRAM);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
527
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
528 /* Write the data */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
529 NOR_WRITE(pAddress, *pData);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
530
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
531 /* Check the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
532 hnor->State = HAL_NOR_STATE_READY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
533
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
534 /* Process unlocked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
535 __HAL_UNLOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
536
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
537 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
538 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
539
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
540 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
541 * @brief Reads a half-word buffer from the NOR memory.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
542 * @param hnor pointer to the NOR handle
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
543 * @param uwAddress NOR memory internal address to read from.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
544 * @param pData pointer to the buffer that receives the data read from the
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
545 * NOR memory.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
546 * @param uwBufferSize number of Half word to read.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
547 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
548 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
549 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
550 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
551 uint32_t deviceaddress = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
552
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
553 /* Process Locked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
554 __HAL_LOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
555
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
556 /* Check the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
557 if(hnor->State == HAL_NOR_STATE_BUSY)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
558 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
559 return HAL_BUSY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
560 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
561
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
562 /* Select the NOR device address */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
563 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
564 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
565 deviceaddress = NOR_MEMORY_ADRESS1;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
566 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
567 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
568 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
569 deviceaddress = NOR_MEMORY_ADRESS2;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
570 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
571 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
572 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
573 deviceaddress = NOR_MEMORY_ADRESS3;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
574 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
575 else /* FMC_NORSRAM_BANK4 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
576 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
577 deviceaddress = NOR_MEMORY_ADRESS4;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
578 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
579
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
580 /* Update the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
581 hnor->State = HAL_NOR_STATE_BUSY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
582
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
583 /* Send read data command */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
584 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
585 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
586 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
587
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
588 /* Read buffer */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
589 while( uwBufferSize > 0U)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
590 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
591 *pData++ = *(__IO uint16_t *)uwAddress;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
592 uwAddress += 2U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
593 uwBufferSize--;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
594 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
595
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
596 /* Check the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
597 hnor->State = HAL_NOR_STATE_READY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
598
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
599 /* Process unlocked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
600 __HAL_UNLOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
601
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
602 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
603 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
604
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
605 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
606 * @brief Writes a half-word buffer to the NOR memory. This function must be used
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
607 only with S29GL128P NOR memory.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
608 * @param hnor pointer to the NOR handle
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
609 * @param uwAddress NOR memory internal start write address
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
610 * @param pData pointer to source data buffer.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
611 * @param uwBufferSize Size of the buffer to write
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
612 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
613 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
614 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
615 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
616 uint16_t * p_currentaddress = (uint16_t *)NULL;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
617 uint16_t * p_endaddress = (uint16_t *)NULL;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
618 uint32_t lastloadedaddress = 0U, deviceaddress = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
619
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
620 /* Process Locked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
621 __HAL_LOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
622
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
623 /* Check the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
624 if(hnor->State == HAL_NOR_STATE_BUSY)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
625 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
626 return HAL_BUSY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
627 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
628
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
629 /* Select the NOR device address */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
630 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
631 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
632 deviceaddress = NOR_MEMORY_ADRESS1;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
633 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
634 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
635 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
636 deviceaddress = NOR_MEMORY_ADRESS2;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
637 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
638 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
639 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
640 deviceaddress = NOR_MEMORY_ADRESS3;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
641 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
642 else /* FMC_NORSRAM_BANK4 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
643 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
644 deviceaddress = NOR_MEMORY_ADRESS4;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
645 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
646
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
647 /* Update the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
648 hnor->State = HAL_NOR_STATE_BUSY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
649
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
650 /* Initialize variables */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
651 p_currentaddress = (uint16_t*)((uint32_t)(uwAddress));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
652 p_endaddress = p_currentaddress + (uwBufferSize-1U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
653 lastloadedaddress = (uint32_t)(uwAddress);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
654
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
655 /* Issue unlock command sequence */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
656 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
657 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
658
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
659 /* Write Buffer Load Command */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
660 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, uwAddress), NOR_CMD_DATA_BUFFER_AND_PROG);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
661 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, uwAddress), (uwBufferSize - 1U));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
662
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
663 /* Load Data into NOR Buffer */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
664 while(p_currentaddress <= p_endaddress)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
665 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
666 /* Store last loaded address & data value (for polling) */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
667 lastloadedaddress = (uint32_t)p_currentaddress;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
668
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
669 NOR_WRITE(p_currentaddress, *pData++);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
670
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
671 p_currentaddress ++;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
672 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
673
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
674 NOR_WRITE((uint32_t)(lastloadedaddress), NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
675
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
676 /* Check the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
677 hnor->State = HAL_NOR_STATE_READY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
678
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
679 /* Process unlocked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
680 __HAL_UNLOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
681
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
682 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
683
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
684 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
685
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
686 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
687 * @brief Erase the specified block of the NOR memory
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
688 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
689 * the configuration information for NOR module.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
690 * @param BlockAddress Block to erase address
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
691 * @param Address Device address
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
692 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
693 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
694 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
695 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
696 uint32_t deviceaddress = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
697
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
698 /* Process Locked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
699 __HAL_LOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
700
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
701 /* Check the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
702 if(hnor->State == HAL_NOR_STATE_BUSY)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
703 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
704 return HAL_BUSY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
705 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
706
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
707 /* Select the NOR device address */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
708 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
709 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
710 deviceaddress = NOR_MEMORY_ADRESS1;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
711 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
712 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
713 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
714 deviceaddress = NOR_MEMORY_ADRESS2;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
715 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
716 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
717 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
718 deviceaddress = NOR_MEMORY_ADRESS3;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
719 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
720 else /* FMC_NORSRAM_BANK4 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
721 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
722 deviceaddress = NOR_MEMORY_ADRESS4;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
723 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
724
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
725 /* Update the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
726 hnor->State = HAL_NOR_STATE_BUSY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
727
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
728 /* Send block erase command sequence */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
729 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
730 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
731 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
732 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
733 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
734 NOR_WRITE((uint32_t)(BlockAddress + Address), NOR_CMD_DATA_BLOCK_ERASE);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
735
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
736 /* Check the NOR memory status and update the controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
737 hnor->State = HAL_NOR_STATE_READY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
738
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
739 /* Process unlocked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
740 __HAL_UNLOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
741
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
742 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
743
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
744 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
745
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
746 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
747 * @brief Erase the entire NOR chip.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
748 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
749 * the configuration information for NOR module.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
750 * @param Address Device address
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
751 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
752 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
753 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
754 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
755 uint32_t deviceaddress = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
756
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
757 /* Prevent unused argument(s) compilation warning */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
758 UNUSED(Address);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
759
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
760 /* Process Locked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
761 __HAL_LOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
762
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
763 /* Check the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
764 if(hnor->State == HAL_NOR_STATE_BUSY)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
765 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
766 return HAL_BUSY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
767 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
768
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
769 /* Select the NOR device address */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
770 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
771 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
772 deviceaddress = NOR_MEMORY_ADRESS1;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
773 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
774 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
775 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
776 deviceaddress = NOR_MEMORY_ADRESS2;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
777 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
778 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
779 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
780 deviceaddress = NOR_MEMORY_ADRESS3;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
781 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
782 else /* FMC_NORSRAM_BANK4 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
783 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
784 deviceaddress = NOR_MEMORY_ADRESS4;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
785 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
786
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
787 /* Update the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
788 hnor->State = HAL_NOR_STATE_BUSY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
789
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
790 /* Send NOR chip erase command sequence */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
791 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
792 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
793 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
794 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
795 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
796 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SIXTH), NOR_CMD_DATA_CHIP_ERASE);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
797
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
798 /* Check the NOR memory status and update the controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
799 hnor->State = HAL_NOR_STATE_READY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
800
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
801 /* Process unlocked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
802 __HAL_UNLOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
803
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
804 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
805 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
806
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
807 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
808 * @brief Read NOR flash CFI IDs
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
809 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
810 * the configuration information for NOR module.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
811 * @param pNOR_CFI pointer to NOR CFI IDs structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
812 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
813 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
814 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
815 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
816 uint32_t deviceaddress = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
817
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
818 /* Process Locked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
819 __HAL_LOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
820
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
821 /* Check the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
822 if(hnor->State == HAL_NOR_STATE_BUSY)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
823 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
824 return HAL_BUSY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
825 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
826
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
827 /* Select the NOR device address */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
828 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
829 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
830 deviceaddress = NOR_MEMORY_ADRESS1;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
831 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
832 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
833 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
834 deviceaddress = NOR_MEMORY_ADRESS2;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
835 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
836 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
837 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
838 deviceaddress = NOR_MEMORY_ADRESS3;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
839 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
840 else /* FMC_NORSRAM_BANK4 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
841 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
842 deviceaddress = NOR_MEMORY_ADRESS4;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
843 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
844
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
845 /* Update the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
846 hnor->State = HAL_NOR_STATE_BUSY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
847
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
848 /* Send read CFI query command */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
849 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
850
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
851 /* read the NOR CFI information */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
852 pNOR_CFI->CFI_1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI1_ADDRESS);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
853 pNOR_CFI->CFI_2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI2_ADDRESS);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
854 pNOR_CFI->CFI_3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI3_ADDRESS);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
855 pNOR_CFI->CFI_4 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI4_ADDRESS);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
856
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
857 /* Check the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
858 hnor->State = HAL_NOR_STATE_READY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
859
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
860 /* Process unlocked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
861 __HAL_UNLOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
862
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
863 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
864 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
865
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
866 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
867 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
868 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
869
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
870 /** @defgroup NOR_Exported_Functions_Group3 NOR Control functions
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
871 * @brief management functions
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
872 *
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
873 @verbatim
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
874 ==============================================================================
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
875 ##### NOR Control functions #####
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
876 ==============================================================================
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
877 [..]
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
878 This subsection provides a set of functions allowing to control dynamically
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
879 the NOR interface.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
880
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
881 @endverbatim
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
882 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
883 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
884
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
885 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
886 * @brief Enables dynamically NOR write operation.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
887 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
888 * the configuration information for NOR module.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
889 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
890 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
891 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
892 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
893 /* Process Locked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
894 __HAL_LOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
895
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
896 /* Enable write operation */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
897 FMC_NORSRAM_WriteOperation_Enable(hnor->Instance, hnor->Init.NSBank);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
898
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
899 /* Update the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
900 hnor->State = HAL_NOR_STATE_READY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
901
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
902 /* Process unlocked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
903 __HAL_UNLOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
904
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
905 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
906 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
907
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
908 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
909 * @brief Disables dynamically NOR write operation.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
910 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
911 * the configuration information for NOR module.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
912 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
913 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
914 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
915 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
916 /* Process Locked */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
917 __HAL_LOCK(hnor);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
918
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
919 /* Update the SRAM controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
920 hnor->State = HAL_NOR_STATE_BUSY;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
921
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
922 /* Disable write operation */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
923 FMC_NORSRAM_WriteOperation_Disable(hnor->Instance, hnor->Init.NSBank);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
924
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
925 /* Update the NOR controller state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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926 hnor->State = HAL_NOR_STATE_PROTECTED;
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927
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928 /* Process unlocked */
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929 __HAL_UNLOCK(hnor);
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930
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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931 return HAL_OK;
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932 }
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933
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934 /**
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935 * @}
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936 */
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937
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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938 /** @defgroup NOR_Exported_Functions_Group4 NOR State functions
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939 * @brief Peripheral State functions
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940 *
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941 @verbatim
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942 ==============================================================================
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943 ##### NOR State functions #####
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944 ==============================================================================
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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945 [..]
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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946 This subsection permits to get in run-time the status of the NOR controller
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947 and the data flow.
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948
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949 @endverbatim
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950 * @{
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951 */
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952
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953 /**
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954 * @brief return the NOR controller state
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955 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
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956 * the configuration information for NOR module.
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957 * @retval NOR controller state
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958 */
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959 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor)
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960 {
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961 return hnor->State;
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962 }
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963
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964 /**
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965 * @brief Returns the NOR operation status.
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966 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
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967 * the configuration information for NOR module.
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968 * @param Address Device address
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969 * @param Timeout NOR programming Timeout
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970 * @retval NOR_Status: The returned value can be: HAL_NOR_STATUS_SUCCESS, HAL_NOR_STATUS_ERROR
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971 * or HAL_NOR_STATUS_TIMEOUT
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972 */
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973 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout)
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974 {
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975 HAL_NOR_StatusTypeDef status = HAL_NOR_STATUS_ONGOING;
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976 uint16_t tmpSR1 = 0, tmpSR2 = 0;
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977 uint32_t tickstart = 0U;
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978
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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979 /* Poll on NOR memory Ready/Busy signal ------------------------------------*/
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980 HAL_NOR_MspWait(hnor, Timeout);
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981
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982 /* Get the NOR memory operation status -------------------------------------*/
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983
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984 /* Get tick */
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985 tickstart = HAL_GetTick();
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986 while((status != HAL_NOR_STATUS_SUCCESS ) && (status != HAL_NOR_STATUS_TIMEOUT))
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987 {
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988 /* Check for the Timeout */
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989 if(Timeout != HAL_MAX_DELAY)
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990 {
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991 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
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992 {
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993 status = HAL_NOR_STATUS_TIMEOUT;
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994 }
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995 }
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996
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997 /* Read NOR status register (DQ6 and DQ5) */
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998 tmpSR1 = *(__IO uint16_t *)Address;
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999 tmpSR2 = *(__IO uint16_t *)Address;
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1000
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1001 /* If DQ6 did not toggle between the two reads then return HAL_NOR_STATUS_SUCCESS */
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1002 if((tmpSR1 & NOR_MASK_STATUS_DQ6) == (tmpSR2 & NOR_MASK_STATUS_DQ6))
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1003 {
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1004 return HAL_NOR_STATUS_SUCCESS ;
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1005 }
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1006
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1007 if((tmpSR1 & NOR_MASK_STATUS_DQ5) == NOR_MASK_STATUS_DQ5)
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1008 {
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1009 status = HAL_NOR_STATUS_ONGOING;
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1010 }
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1011
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1012 tmpSR1 = *(__IO uint16_t *)Address;
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1013 tmpSR2 = *(__IO uint16_t *)Address;
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1014
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1015 /* If DQ6 did not toggle between the two reads then return HAL_NOR_STATUS_SUCCESS */
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1016 if((tmpSR1 & NOR_MASK_STATUS_DQ6) == (tmpSR2 & NOR_MASK_STATUS_DQ6))
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1017 {
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1018 return HAL_NOR_STATUS_SUCCESS;
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1019 }
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1020 if((tmpSR1 & NOR_MASK_STATUS_DQ5) == NOR_MASK_STATUS_DQ5)
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1021 {
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1022 return HAL_NOR_STATUS_ERROR;
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1023 }
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1024 }
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1025
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1026 /* Return the operation status */
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1027 return status;
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1028 }
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1029
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1030 /**
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1031 * @}
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1032 */
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1033
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1034 /**
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1035 * @}
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1036 */
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1037 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx ||\
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1038 STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
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1039 STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx ||\
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1040 STM32F423xx */
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1041 #endif /* HAL_NOR_MODULE_ENABLED */
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1042 /**
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1043 * @}
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1044 */
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1045
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1046 /**
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1047 * @}
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1048 */
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1049
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1050 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/