annotate Common/Drivers/STM32F4xx_HAL_DRIVER_v120/Src/stm32f4xx_hal_spi.c @ 60:96026ba1834f

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date Fri, 10 Aug 2018 19:40:55 +0200
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_spi.c
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4 * @author MCD Application Team
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5 * @version V1.2.0
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6 * @date 26-December-2014
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7 * @brief SPI HAL module driver.
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8 *
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9 * This file provides firmware functions to manage the following
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10 * functionalities of the Serial Peripheral Interface (SPI) peripheral:
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11 * + Initialization and de-initialization functions
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12 * + IO operation functions
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13 * + Peripheral Control functions
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14 * + Peripheral State functions
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15 @verbatim
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16 ==============================================================================
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17 ##### How to use this driver #####
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18 ==============================================================================
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19 [..]
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20 The SPI HAL driver can be used as follows:
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21
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22 (#) Declare a SPI_HandleTypeDef handle structure, for example:
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23 SPI_HandleTypeDef hspi;
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24
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25 (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit ()API:
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26 (##) Enable the SPIx interface clock
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27 (##) SPI pins configuration
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28 (+++) Enable the clock for the SPI GPIOs
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29 (+++) Configure these SPI pins as alternate function push-pull
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30 (##) NVIC configuration if you need to use interrupt process
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31 (+++) Configure the SPIx interrupt priority
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32 (+++) Enable the NVIC SPI IRQ handle
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33 (##) DMA Configuration if you need to use DMA process
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34 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
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35 (+++) Enable the DMAx interface clock using
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36 (+++) Configure the DMA handle parameters
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37 (+++) Configure the DMA Tx or Rx Stream
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38 (+++) Associate the initialized hdma_tx handle to the hspi DMA Tx or Rx handle
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39 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream
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40
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41 (#) Program the Mode, Direction , Data size, Baudrate Prescaler, NSS
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42 management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
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43
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44 (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
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45 (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
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46 by calling the customized HAL_SPI_MspInit() API.
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47 [..]
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48 Circular mode restriction:
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49 (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
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50 (##) Master 2Lines RxOnly
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51 (##) Master 1Line Rx
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52 (#) The CRC feature is not managed when the DMA circular mode is enabled
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53 (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
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54 the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
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55
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56
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57
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58 @endverbatim
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59 ******************************************************************************
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60 * @attention
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61 *
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62 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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63 *
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64 * Redistribution and use in source and binary forms, with or without modification,
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65 * are permitted provided that the following conditions are met:
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66 * 1. Redistributions of source code must retain the above copyright notice,
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67 * this list of conditions and the following disclaimer.
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68 * 2. Redistributions in binary form must reproduce the above copyright notice,
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69 * this list of conditions and the following disclaimer in the documentation
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70 * and/or other materials provided with the distribution.
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71 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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72 * may be used to endorse or promote products derived from this software
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73 * without specific prior written permission.
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74 *
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75 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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76 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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77 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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78 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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79 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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80 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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81 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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82 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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83 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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84 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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85 *
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86 ******************************************************************************
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87 */
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88
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89 /* Includes ------------------------------------------------------------------*/
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90 #include "stm32f4xx_hal.h"
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91
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92 /** @addtogroup STM32F4xx_HAL_Driver
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93 * @{
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94 */
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95
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96 /** @defgroup SPI SPI
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97 * @brief SPI HAL module driver
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98 * @{
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99 */
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100
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101 #ifdef HAL_SPI_MODULE_ENABLED
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102
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103 /* Private typedef -----------------------------------------------------------*/
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104 /* Private define ------------------------------------------------------------*/
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105 #define SPI_TIMEOUT_VALUE 10
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106 /* Private macro -------------------------------------------------------------*/
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107 /* Private variables ---------------------------------------------------------*/
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108 /* Private function prototypes -----------------------------------------------*/
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109 /** @addtogroup SPI_Private_Functions
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110 * @{
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111 */
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112 static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi);
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113 static void SPI_TxISR(SPI_HandleTypeDef *hspi);
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114 static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi);
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115 static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi);
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116 static void SPI_RxISR(SPI_HandleTypeDef *hspi);
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117 static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
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118 static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
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119 static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
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120 static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma);
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121 static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma);
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122 static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma);
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123 static void SPI_DMAError(DMA_HandleTypeDef *hdma);
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124 static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
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125 /**
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126 * @}
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127 */
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128
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129 /* Exported functions --------------------------------------------------------*/
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130 /** @defgroup SPI_Exported_Functions SPI Exported Functions
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131 * @{
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132 */
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133
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134 /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
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135 * @brief Initialization and Configuration functions
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136 *
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137 @verbatim
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138 ===============================================================================
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139 ##### Initialization and de-initialization functions #####
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140 ===============================================================================
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141 [..] This subsection provides a set of functions allowing to initialize and
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142 de-initialize the SPIx peripheral:
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143
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144 (+) User must implement HAL_SPI_MspInit() function in which he configures
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145 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
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146
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147 (+) Call the function HAL_SPI_Init() to configure the selected device with
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148 the selected configuration:
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149 (++) Mode
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150 (++) Direction
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151 (++) Data Size
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152 (++) Clock Polarity and Phase
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153 (++) NSS Management
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154 (++) BaudRate Prescaler
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155 (++) FirstBit
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156 (++) TIMode
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157 (++) CRC Calculation
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158 (++) CRC Polynomial if CRC enabled
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159
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160 (+) Call the function HAL_SPI_DeInit() to restore the default configuration
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161 of the selected SPIx peripheral.
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162
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163 @endverbatim
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164 * @{
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165 */
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166
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167 /**
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168 * @brief Initializes the SPI according to the specified parameters
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169 * in the SPI_InitTypeDef and create the associated handle.
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170 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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171 * the configuration information for SPI module.
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172 * @retval HAL status
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173 */
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174 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
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175 {
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176 /* Check the SPI handle allocation */
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177 if(hspi == NULL)
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178 {
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179 return HAL_ERROR;
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180 }
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181
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182 /* Check the parameters */
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183 assert_param(IS_SPI_MODE(hspi->Init.Mode));
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184 assert_param(IS_SPI_DIRECTION_MODE(hspi->Init.Direction));
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185 assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
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186 assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
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187 assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
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188 assert_param(IS_SPI_NSS(hspi->Init.NSS));
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189 assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
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190 assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
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191 assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
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192 assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
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193 assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
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194
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195 if(hspi->State == HAL_SPI_STATE_RESET)
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196 {
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197 /* Init the low level hardware : GPIO, CLOCK, NVIC... */
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198 HAL_SPI_MspInit(hspi);
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199 }
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200
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201 hspi->State = HAL_SPI_STATE_BUSY;
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202
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203 /* Disable the selected SPI peripheral */
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204 __HAL_SPI_DISABLE(hspi);
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205
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206 /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
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207 /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
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208 Communication speed, First bit and CRC calculation state */
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209 hspi->Instance->CR1 = (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
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210 hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
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211 hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation);
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212
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213 /* Configure : NSS management */
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214 hspi->Instance->CR2 = (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode);
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215
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216 /*---------------------------- SPIx CRCPOLY Configuration ------------------*/
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217 /* Configure : CRC Polynomial */
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218 hspi->Instance->CRCPR = hspi->Init.CRCPolynomial;
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219
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220 /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
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221 hspi->Instance->I2SCFGR &= (uint32_t)(~SPI_I2SCFGR_I2SMOD);
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222
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223 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
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224 hspi->State = HAL_SPI_STATE_READY;
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225
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226 return HAL_OK;
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227 }
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228
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229 /**
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230 * @brief DeInitializes the SPI peripheral
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231 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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232 * the configuration information for SPI module.
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233 * @retval HAL status
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234 */
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235 HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
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236 {
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237 /* Check the SPI handle allocation */
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238 if(hspi == NULL)
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239 {
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240 return HAL_ERROR;
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241 }
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242
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243 /* Disable the SPI Peripheral Clock */
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244 __HAL_SPI_DISABLE(hspi);
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245
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246 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
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247 HAL_SPI_MspDeInit(hspi);
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248
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249 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
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250 hspi->State = HAL_SPI_STATE_RESET;
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251
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252 /* Release Lock */
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253 __HAL_UNLOCK(hspi);
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254
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255 return HAL_OK;
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256 }
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257
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258 /**
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259 * @brief SPI MSP Init
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260 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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261 * the configuration information for SPI module.
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262 * @retval None
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263 */
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264 __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
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265 {
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266 /* NOTE : This function Should not be modified, when the callback is needed,
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267 the HAL_SPI_MspInit could be implemented in the user file
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268 */
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269 }
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270
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271 /**
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272 * @brief SPI MSP DeInit
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273 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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274 * the configuration information for SPI module.
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275 * @retval None
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276 */
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277 __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
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278 {
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279 /* NOTE : This function Should not be modified, when the callback is needed,
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280 the HAL_SPI_MspDeInit could be implemented in the user file
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281 */
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282 }
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283
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284 /**
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285 * @}
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286 */
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287
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288 /** @defgroup SPI_Exported_Functions_Group2 IO operation functions
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289 * @brief Data transfers functions
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290 *
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291 @verbatim
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292 ==============================================================================
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293 ##### IO operation functions #####
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294 ===============================================================================
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295 This subsection provides a set of functions allowing to manage the SPI
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296 data transfers.
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297
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298 [..] The SPI supports master and slave mode :
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299
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300 (#) There are two modes of transfer:
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301 (++) Blocking mode: The communication is performed in polling mode.
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302 The HAL status of all data processing is returned by the same function
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303 after finishing transfer.
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304 (++) No-Blocking mode: The communication is performed using Interrupts
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305 or DMA, These APIs return the HAL status.
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306 The end of the data processing will be indicated through the
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307 dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
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308 using DMA mode.
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309 The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
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310 will be executed respectively at the end of the transmit or Receive process
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311 The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
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312
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313 (#) Blocking mode APIs are :
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314 (++) HAL_SPI_Transmit()in 1Line (simplex) and 2Lines (full duplex) mode
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315 (++) HAL_SPI_Receive() in 1Line (simplex) and 2Lines (full duplex) mode
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316 (++) HAL_SPI_TransmitReceive() in full duplex mode
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317
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318 (#) Non Blocking mode API's with Interrupt are :
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319 (++) HAL_SPI_Transmit_IT()in 1Line (simplex) and 2Lines (full duplex) mode
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320 (++) HAL_SPI_Receive_IT() in 1Line (simplex) and 2Lines (full duplex) mode
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321 (++) HAL_SPI_TransmitReceive_IT()in full duplex mode
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322 (++) HAL_SPI_IRQHandler()
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323
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324 (#) Non Blocking mode functions with DMA are :
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325 (++) HAL_SPI_Transmit_DMA()in 1Line (simplex) and 2Lines (full duplex) mode
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326 (++) HAL_SPI_Receive_DMA() in 1Line (simplex) and 2Lines (full duplex) mode
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327 (++) HAL_SPI_TransmitReceie_DMA() in full duplex mode
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328
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329 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
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330 (++) HAL_SPI_TxCpltCallback()
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331 (++) HAL_SPI_RxCpltCallback()
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332 (++) HAL_SPI_ErrorCallback()
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333 (++) HAL_SPI_TxRxCpltCallback()
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334
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335 @endverbatim
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336 * @{
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337 */
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338
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339 /**
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340 * @brief Transmit an amount of data in blocking mode
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341 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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342 * the configuration information for SPI module.
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343 * @param pData: pointer to data buffer
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344 * @param Size: amount of data to be sent
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345 * @param Timeout: Timeout duration
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346 * @retval HAL status
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347 */
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348 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
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349 {
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350
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351 if(hspi->State == HAL_SPI_STATE_READY)
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352 {
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353 if((pData == NULL ) || (Size == 0))
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354 {
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355 return HAL_ERROR;
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356 }
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357
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358 /* Check the parameters */
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359 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
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360
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361 /* Process Locked */
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362 __HAL_LOCK(hspi);
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363
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364 /* Configure communication */
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365 hspi->State = HAL_SPI_STATE_BUSY_TX;
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366 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
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367
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368 hspi->pTxBuffPtr = pData;
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369 hspi->TxXferSize = Size;
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370 hspi->TxXferCount = Size;
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371
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372 /*Init field not used in handle to zero */
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373 hspi->TxISR = 0;
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374 hspi->RxISR = 0;
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375 hspi->RxXferSize = 0;
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376 hspi->RxXferCount = 0;
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377
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378 /* Reset CRC Calculation */
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379 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
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380 {
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381 SPI_RESET_CRC(hspi);
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382 }
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383
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384 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
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385 {
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386 /* Configure communication direction : 1Line */
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387 SPI_1LINE_TX(hspi);
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388 }
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389
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390 /* Check if the SPI is already enabled */
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391 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
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392 {
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393 /* Enable SPI peripheral */
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394 __HAL_SPI_ENABLE(hspi);
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395 }
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396
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397 /* Transmit data in 8 Bit mode */
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398 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
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399 {
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400 if((hspi->Init.Mode == SPI_MODE_SLAVE)|| (hspi->TxXferCount == 0x01))
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401 {
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402 hspi->Instance->DR = (*hspi->pTxBuffPtr++);
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403 hspi->TxXferCount--;
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404 }
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405 while(hspi->TxXferCount > 0)
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406 {
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407 /* Wait until TXE flag is set to send data */
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408 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
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409 {
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410 return HAL_TIMEOUT;
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411 }
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412 hspi->Instance->DR = (*hspi->pTxBuffPtr++);
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413 hspi->TxXferCount--;
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414 }
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415 /* Enable CRC Transmission */
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416 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
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417 {
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418 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
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419 }
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420 }
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421 /* Transmit data in 16 Bit mode */
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422 else
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423 {
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424 if((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01))
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425 {
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426 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
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427 hspi->pTxBuffPtr+=2;
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428 hspi->TxXferCount--;
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429 }
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430 while(hspi->TxXferCount > 0)
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431 {
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432 /* Wait until TXE flag is set to send data */
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433 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
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434 {
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435 return HAL_TIMEOUT;
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436 }
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437 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
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438 hspi->pTxBuffPtr+=2;
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439 hspi->TxXferCount--;
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440 }
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441 /* Enable CRC Transmission */
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442 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
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443 {
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444 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
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445 }
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446 }
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447
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448 /* Wait until TXE flag is set to send data */
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449 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
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450 {
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451 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
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452 return HAL_TIMEOUT;
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453 }
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454
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455 /* Wait until Busy flag is reset before disabling SPI */
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456 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
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457 {
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458 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
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459 return HAL_TIMEOUT;
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460 }
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461
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462 /* Clear OVERRUN flag in 2 Lines communication mode because received is not read */
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463 if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
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464 {
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465 __HAL_SPI_CLEAR_OVRFLAG(hspi);
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466 }
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467
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468 hspi->State = HAL_SPI_STATE_READY;
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469
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470 /* Process Unlocked */
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471 __HAL_UNLOCK(hspi);
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472
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473 return HAL_OK;
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474 }
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475 else
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476 {
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477 return HAL_BUSY;
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478 }
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479 }
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480
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481 /**
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482 * @brief Receive an amount of data in blocking mode
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483 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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484 * the configuration information for SPI module.
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485 * @param pData: pointer to data buffer
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486 * @param Size: amount of data to be sent
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487 * @param Timeout: Timeout duration
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488 * @retval HAL status
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489 */
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490 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
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491 {
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492 __IO uint16_t tmpreg;
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493 uint32_t tmp = 0;
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494
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495 if(hspi->State == HAL_SPI_STATE_READY)
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heinrichsweikamp
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496 {
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497 if((pData == NULL ) || (Size == 0))
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498 {
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499 return HAL_ERROR;
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500 }
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501
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parents:
diff changeset
502 /* Process Locked */
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503 __HAL_LOCK(hspi);
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504
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heinrichsweikamp
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505 /* Configure communication */
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506 hspi->State = HAL_SPI_STATE_BUSY_RX;
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507 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
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508
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509 hspi->pRxBuffPtr = pData;
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diff changeset
510 hspi->RxXferSize = Size;
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511 hspi->RxXferCount = Size;
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512
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diff changeset
513 /*Init field not used in handle to zero */
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parents:
diff changeset
514 hspi->RxISR = 0;
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515 hspi->TxISR = 0;
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516 hspi->TxXferSize = 0;
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517 hspi->TxXferCount = 0;
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parents:
diff changeset
518
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diff changeset
519 /* Configure communication direction : 1Line */
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heinrichsweikamp
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520 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
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heinrichsweikamp
parents:
diff changeset
521 {
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parents:
diff changeset
522 SPI_1LINE_RX(hspi);
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523 }
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heinrichsweikamp
parents:
diff changeset
524
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heinrichsweikamp
parents:
diff changeset
525 /* Reset CRC Calculation */
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526 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
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heinrichsweikamp
parents:
diff changeset
527 {
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heinrichsweikamp
parents:
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528 SPI_RESET_CRC(hspi);
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heinrichsweikamp
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529 }
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heinrichsweikamp
parents:
diff changeset
530
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heinrichsweikamp
parents:
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531 if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
532 {
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heinrichsweikamp
parents:
diff changeset
533 /* Process Unlocked */
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parents:
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534 __HAL_UNLOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
535
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heinrichsweikamp
parents:
diff changeset
536 /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
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heinrichsweikamp
parents:
diff changeset
537 return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
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heinrichsweikamp
parents:
diff changeset
538 }
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heinrichsweikamp
parents:
diff changeset
539
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
540 /* Check if the SPI is already enabled */
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heinrichsweikamp
parents:
diff changeset
541 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
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heinrichsweikamp
parents:
diff changeset
542 {
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heinrichsweikamp
parents:
diff changeset
543 /* Enable SPI peripheral */
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heinrichsweikamp
parents:
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544 __HAL_SPI_ENABLE(hspi);
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heinrichsweikamp
parents:
diff changeset
545 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
546
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
547 /* Receive data in 8 Bit mode */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
548 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
549 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
550 while(hspi->RxXferCount > 1)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
551 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
552 /* Wait until RXNE flag is set */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
553 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
554 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
555 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
556 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
557
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
558 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
559 hspi->RxXferCount--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
560 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
561 /* Enable CRC Transmission */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
562 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
563 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
564 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
565 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
566 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
567 /* Receive data in 16 Bit mode */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
568 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
569 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
570 while(hspi->RxXferCount > 1)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
571 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
572 /* Wait until RXNE flag is set to read data */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
573 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
574 {
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heinrichsweikamp
parents:
diff changeset
575 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
576 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
577
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
578 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
579 hspi->pRxBuffPtr+=2;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
580 hspi->RxXferCount--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
581 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
582 /* Enable CRC Transmission */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
583 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
584 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
585 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
586 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
587 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
588
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
589 /* Wait until RXNE flag is set */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
590 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
591 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
592 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
593 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
594
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
595 /* Receive last data in 8 Bit mode */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
596 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
597 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
598 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
599 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
600 /* Receive last data in 16 Bit mode */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
601 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
602 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
603 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
604 hspi->pRxBuffPtr+=2;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
605 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
606 hspi->RxXferCount--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
607
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
608 /* Wait until RXNE flag is set: CRC Received */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
609 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
610 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
611 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
612 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
613 hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
614 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
615 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
616
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
617 /* Read CRC to Flush RXNE flag */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
618 tmpreg = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
619 UNUSED(tmpreg);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
620 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
621
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
622 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
623 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
624 /* Disable SPI peripheral */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
625 __HAL_SPI_DISABLE(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
626 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
627
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
628 hspi->State = HAL_SPI_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
629
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
630 tmp = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
631 /* Check if CRC error occurred */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
632 if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (tmp != RESET))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
633 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
634 hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
635
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
636 /* Reset CRC Calculation */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
637 SPI_RESET_CRC(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
638
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
639 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
640 __HAL_UNLOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
641
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
642 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
643 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
644
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
645 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
646 __HAL_UNLOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
647
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
648 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
649 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
650 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
651 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
652 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
653 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
654 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
655
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
656 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
657 * @brief Transmit and Receive an amount of data in blocking mode
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
658 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
659 * the configuration information for SPI module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
660 * @param pTxData: pointer to transmission data buffer
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
661 * @param pRxData: pointer to reception data buffer to be
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
662 * @param Size: amount of data to be sent
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
663 * @param Timeout: Timeout duration
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
664 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
665 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
666 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
667 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
668 __IO uint16_t tmpreg;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
669 uint32_t tmpstate = 0, tmp = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
670
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
671 tmpstate = hspi->State;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
672 if((tmpstate == HAL_SPI_STATE_READY) || (tmpstate == HAL_SPI_STATE_BUSY_RX))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
673 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
674 if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
675 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
676 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
677 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
678
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
679 /* Check the parameters */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
680 assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
681
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
682 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
683 __HAL_LOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
684
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
685 /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
686 if(hspi->State == HAL_SPI_STATE_READY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
687 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
688 hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
689 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
690
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
691 /* Configure communication */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
692 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
693
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
694 hspi->pRxBuffPtr = pRxData;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
695 hspi->RxXferSize = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
696 hspi->RxXferCount = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
697
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
698 hspi->pTxBuffPtr = pTxData;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
699 hspi->TxXferSize = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
700 hspi->TxXferCount = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
701
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
702 /*Init field not used in handle to zero */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
703 hspi->RxISR = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
704 hspi->TxISR = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
705
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
706 /* Reset CRC Calculation */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
707 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
708 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
709 SPI_RESET_CRC(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
710 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
711
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
712 /* Check if the SPI is already enabled */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
713 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
714 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
715 /* Enable SPI peripheral */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
716 __HAL_SPI_ENABLE(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
717 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
718
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
719 /* Transmit and Receive data in 16 Bit mode */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
720 if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
721 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
722 if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
723 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
724 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
725 hspi->pTxBuffPtr+=2;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
726 hspi->TxXferCount--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
727 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
728 if(hspi->TxXferCount == 0)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
729 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
730 /* Enable CRC Transmission */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
731 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
732 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
733 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
734 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
735
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
736 /* Wait until RXNE flag is set */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
737 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
738 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
739 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
740 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
741
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
742 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
743 hspi->pRxBuffPtr+=2;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
744 hspi->RxXferCount--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
745 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
746 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
747 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
748 while(hspi->TxXferCount > 0)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
749 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
750 /* Wait until TXE flag is set to send data */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
751 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
752 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
753 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
754 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
755
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
756 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
757 hspi->pTxBuffPtr+=2;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
758 hspi->TxXferCount--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
759
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
760 /* Enable CRC Transmission */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
761 if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
762 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
763 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
764 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
765
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
766 /* Wait until RXNE flag is set */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
767 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
768 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
769 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
770 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
771
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
772 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
773 hspi->pRxBuffPtr+=2;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
774 hspi->RxXferCount--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
775 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
776 /* Receive the last byte */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
777 if(hspi->Init.Mode == SPI_MODE_SLAVE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
778 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
779 /* Wait until RXNE flag is set */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
780 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
781 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
782 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
783 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
784
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
785 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
786 hspi->pRxBuffPtr+=2;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
787 hspi->RxXferCount--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
788 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
789 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
790 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
791 /* Transmit and Receive data in 8 Bit mode */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
792 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
793 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
794 if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
795 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
796 hspi->Instance->DR = (*hspi->pTxBuffPtr++);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
797 hspi->TxXferCount--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
798 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
799 if(hspi->TxXferCount == 0)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
800 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
801 /* Enable CRC Transmission */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
802 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
803 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
804 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
805 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
806
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
807 /* Wait until RXNE flag is set */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
808 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
809 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
810 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
811 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
812
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
813 (*hspi->pRxBuffPtr) = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
814 hspi->RxXferCount--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
815 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
816 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
817 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
818 while(hspi->TxXferCount > 0)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
819 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
820 /* Wait until TXE flag is set to send data */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
821 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
822 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
823 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
824 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
825
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
826 hspi->Instance->DR = (*hspi->pTxBuffPtr++);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
827 hspi->TxXferCount--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
828
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
829 /* Enable CRC Transmission */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
830 if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
831 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
832 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
833 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
834
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
835 /* Wait until RXNE flag is set */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
836 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
837 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
838 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
839 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
840
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
841 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
842 hspi->RxXferCount--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
843 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
844 if(hspi->Init.Mode == SPI_MODE_SLAVE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
845 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
846 /* Wait until RXNE flag is set */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
847 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
848 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
849 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
850 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
851
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
852 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
853 hspi->RxXferCount--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
854 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
855 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
856 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
857
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
858 /* Read CRC from DR to close CRC calculation process */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
859 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
860 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
861 /* Wait until RXNE flag is set */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
862 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
863 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
864 hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
865 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
866 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
867 /* Read CRC */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
868 tmpreg = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
869 UNUSED(tmpreg);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
870 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
871
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
872 /* Wait until Busy flag is reset before disabling SPI */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
873 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
874 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
875 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
876 return HAL_TIMEOUT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
877 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
878
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
879 hspi->State = HAL_SPI_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
880
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
881 tmp = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
882 /* Check if CRC error occurred */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
883 if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (tmp != RESET))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
884 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
885 hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
886
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
887 /* Reset CRC Calculation */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
888 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
889 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
890 SPI_RESET_CRC(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
891 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
892
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
893 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
894 __HAL_UNLOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
895
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
896 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
897 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
898
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
899 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
900 __HAL_UNLOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
901
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
902 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
903 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
904 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
905 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
906 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
907 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
908 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
909
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
910 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
911 * @brief Transmit an amount of data in no-blocking mode with Interrupt
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
912 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
913 * the configuration information for SPI module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
914 * @param pData: pointer to data buffer
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
915 * @param Size: amount of data to be sent
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
916 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
917 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
918 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
919 {
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heinrichsweikamp
parents:
diff changeset
920 if(hspi->State == HAL_SPI_STATE_READY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
921 {
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heinrichsweikamp
parents:
diff changeset
922 if((pData == NULL) || (Size == 0))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
923 {
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heinrichsweikamp
parents:
diff changeset
924 return HAL_ERROR;
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heinrichsweikamp
parents:
diff changeset
925 }
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heinrichsweikamp
parents:
diff changeset
926
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heinrichsweikamp
parents:
diff changeset
927 /* Check the parameters */
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heinrichsweikamp
parents:
diff changeset
928 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
929
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heinrichsweikamp
parents:
diff changeset
930 /* Process Locked */
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heinrichsweikamp
parents:
diff changeset
931 __HAL_LOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
932
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heinrichsweikamp
parents:
diff changeset
933 /* Configure communication */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
934 hspi->State = HAL_SPI_STATE_BUSY_TX;
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heinrichsweikamp
parents:
diff changeset
935 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
936
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heinrichsweikamp
parents:
diff changeset
937 hspi->TxISR = &SPI_TxISR;
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heinrichsweikamp
parents:
diff changeset
938 hspi->pTxBuffPtr = pData;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
939 hspi->TxXferSize = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
940 hspi->TxXferCount = Size;
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heinrichsweikamp
parents:
diff changeset
941
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heinrichsweikamp
parents:
diff changeset
942 /*Init field not used in handle to zero */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
943 hspi->RxISR = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
944 hspi->RxXferSize = 0;
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heinrichsweikamp
parents:
diff changeset
945 hspi->RxXferCount = 0;
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heinrichsweikamp
parents:
diff changeset
946
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heinrichsweikamp
parents:
diff changeset
947 /* Configure communication direction : 1Line */
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heinrichsweikamp
parents:
diff changeset
948 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
949 {
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heinrichsweikamp
parents:
diff changeset
950 SPI_1LINE_TX(hspi);
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heinrichsweikamp
parents:
diff changeset
951 }
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heinrichsweikamp
parents:
diff changeset
952
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heinrichsweikamp
parents:
diff changeset
953 /* Reset CRC Calculation */
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heinrichsweikamp
parents:
diff changeset
954 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
955 {
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heinrichsweikamp
parents:
diff changeset
956 SPI_RESET_CRC(hspi);
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heinrichsweikamp
parents:
diff changeset
957 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
958
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
959 if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
960 {
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heinrichsweikamp
parents:
diff changeset
961 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE));
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heinrichsweikamp
parents:
diff changeset
962 }else
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heinrichsweikamp
parents:
diff changeset
963 {
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heinrichsweikamp
parents:
diff changeset
964 /* Enable TXE and ERR interrupt */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
965 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
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heinrichsweikamp
parents:
diff changeset
966 }
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heinrichsweikamp
parents:
diff changeset
967 /* Process Unlocked */
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heinrichsweikamp
parents:
diff changeset
968 __HAL_UNLOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
969
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heinrichsweikamp
parents:
diff changeset
970 /* Check if the SPI is already enabled */
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heinrichsweikamp
parents:
diff changeset
971 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
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heinrichsweikamp
parents:
diff changeset
972 {
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heinrichsweikamp
parents:
diff changeset
973 /* Enable SPI peripheral */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
974 __HAL_SPI_ENABLE(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
975 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
976
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heinrichsweikamp
parents:
diff changeset
977 return HAL_OK;
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heinrichsweikamp
parents:
diff changeset
978 }
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heinrichsweikamp
parents:
diff changeset
979 else
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heinrichsweikamp
parents:
diff changeset
980 {
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heinrichsweikamp
parents:
diff changeset
981 return HAL_BUSY;
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heinrichsweikamp
parents:
diff changeset
982 }
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heinrichsweikamp
parents:
diff changeset
983 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
984
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
985 /**
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heinrichsweikamp
parents:
diff changeset
986 * @brief Receive an amount of data in no-blocking mode with Interrupt
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
987 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
988 * the configuration information for SPI module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
989 * @param pData: pointer to data buffer
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heinrichsweikamp
parents:
diff changeset
990 * @param Size: amount of data to be sent
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
991 * @retval HAL status
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heinrichsweikamp
parents:
diff changeset
992 */
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heinrichsweikamp
parents:
diff changeset
993 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
994 {
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heinrichsweikamp
parents:
diff changeset
995 if(hspi->State == HAL_SPI_STATE_READY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
996 {
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heinrichsweikamp
parents:
diff changeset
997 if((pData == NULL) || (Size == 0))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
998 {
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heinrichsweikamp
parents:
diff changeset
999 return HAL_ERROR;
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heinrichsweikamp
parents:
diff changeset
1000 }
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heinrichsweikamp
parents:
diff changeset
1001
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heinrichsweikamp
parents:
diff changeset
1002 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1003 __HAL_LOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1004
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heinrichsweikamp
parents:
diff changeset
1005 /* Configure communication */
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heinrichsweikamp
parents:
diff changeset
1006 hspi->State = HAL_SPI_STATE_BUSY_RX;
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heinrichsweikamp
parents:
diff changeset
1007 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
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heinrichsweikamp
parents:
diff changeset
1008
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heinrichsweikamp
parents:
diff changeset
1009 hspi->RxISR = &SPI_RxISR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1010 hspi->pRxBuffPtr = pData;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1011 hspi->RxXferSize = Size;
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heinrichsweikamp
parents:
diff changeset
1012 hspi->RxXferCount = Size ;
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heinrichsweikamp
parents:
diff changeset
1013
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heinrichsweikamp
parents:
diff changeset
1014 /*Init field not used in handle to zero */
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heinrichsweikamp
parents:
diff changeset
1015 hspi->TxISR = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1016 hspi->TxXferSize = 0;
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heinrichsweikamp
parents:
diff changeset
1017 hspi->TxXferCount = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1018
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heinrichsweikamp
parents:
diff changeset
1019 /* Configure communication direction : 1Line */
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heinrichsweikamp
parents:
diff changeset
1020 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1021 {
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heinrichsweikamp
parents:
diff changeset
1022 SPI_1LINE_RX(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1023 }
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heinrichsweikamp
parents:
diff changeset
1024 else if((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1025 {
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heinrichsweikamp
parents:
diff changeset
1026 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1027 __HAL_UNLOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1028
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heinrichsweikamp
parents:
diff changeset
1029 /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
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heinrichsweikamp
parents:
diff changeset
1030 return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
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heinrichsweikamp
parents:
diff changeset
1031 }
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heinrichsweikamp
parents:
diff changeset
1032
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heinrichsweikamp
parents:
diff changeset
1033 /* Reset CRC Calculation */
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heinrichsweikamp
parents:
diff changeset
1034 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1035 {
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heinrichsweikamp
parents:
diff changeset
1036 SPI_RESET_CRC(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1037 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1038
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heinrichsweikamp
parents:
diff changeset
1039 /* Enable TXE and ERR interrupt */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1040 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1041
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heinrichsweikamp
parents:
diff changeset
1042 /* Process Unlocked */
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heinrichsweikamp
parents:
diff changeset
1043 __HAL_UNLOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1044
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heinrichsweikamp
parents:
diff changeset
1045 /* Note : The SPI must be enabled after unlocking current process
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1046 to avoid the risk of SPI interrupt handle execution before current
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1047 process unlock */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1048
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heinrichsweikamp
parents:
diff changeset
1049 /* Check if the SPI is already enabled */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1050 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1051 {
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heinrichsweikamp
parents:
diff changeset
1052 /* Enable SPI peripheral */
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heinrichsweikamp
parents:
diff changeset
1053 __HAL_SPI_ENABLE(hspi);
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heinrichsweikamp
parents:
diff changeset
1054 }
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heinrichsweikamp
parents:
diff changeset
1055
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heinrichsweikamp
parents:
diff changeset
1056 return HAL_OK;
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heinrichsweikamp
parents:
diff changeset
1057 }
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heinrichsweikamp
parents:
diff changeset
1058 else
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heinrichsweikamp
parents:
diff changeset
1059 {
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heinrichsweikamp
parents:
diff changeset
1060 return HAL_BUSY;
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heinrichsweikamp
parents:
diff changeset
1061 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1062 }
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heinrichsweikamp
parents:
diff changeset
1063
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heinrichsweikamp
parents:
diff changeset
1064 /**
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heinrichsweikamp
parents:
diff changeset
1065 * @brief Transmit and Receive an amount of data in no-blocking mode with Interrupt
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1066 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1067 * the configuration information for SPI module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1068 * @param pTxData: pointer to transmission data buffer
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1069 * @param pRxData: pointer to reception data buffer to be
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1070 * @param Size: amount of data to be sent
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1071 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1072 */
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heinrichsweikamp
parents:
diff changeset
1073 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1074 {
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heinrichsweikamp
parents:
diff changeset
1075 uint32_t tmpstate = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1076
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heinrichsweikamp
parents:
diff changeset
1077 tmpstate = hspi->State;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1078 if((tmpstate == HAL_SPI_STATE_READY) || \
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1079 ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmpstate == HAL_SPI_STATE_BUSY_RX)))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1080 {
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heinrichsweikamp
parents:
diff changeset
1081 if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1082 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1083 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1084 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1085
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1086 /* Check the parameters */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1087 assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1088
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1089 /* Process locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1090 __HAL_LOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1091
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1092 /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1093 if(hspi->State != HAL_SPI_STATE_BUSY_RX)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1094 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1095 hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1096 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1097
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1098 /* Configure communication */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1099 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1100
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heinrichsweikamp
parents:
diff changeset
1101 hspi->TxISR = &SPI_TxISR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1102 hspi->pTxBuffPtr = pTxData;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1103 hspi->TxXferSize = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1104 hspi->TxXferCount = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1105
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1106 hspi->RxISR = &SPI_2LinesRxISR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1107 hspi->pRxBuffPtr = pRxData;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1108 hspi->RxXferSize = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1109 hspi->RxXferCount = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1110
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1111 /* Reset CRC Calculation */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1112 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1113 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1114 SPI_RESET_CRC(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1115 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1116
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heinrichsweikamp
parents:
diff changeset
1117 /* Enable TXE, RXNE and ERR interrupt */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1118 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1119
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heinrichsweikamp
parents:
diff changeset
1120 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1121 __HAL_UNLOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1122
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heinrichsweikamp
parents:
diff changeset
1123 /* Check if the SPI is already enabled */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1124 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1125 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1126 /* Enable SPI peripheral */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1127 __HAL_SPI_ENABLE(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1128 }
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heinrichsweikamp
parents:
diff changeset
1129
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heinrichsweikamp
parents:
diff changeset
1130 return HAL_OK;
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heinrichsweikamp
parents:
diff changeset
1131 }
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heinrichsweikamp
parents:
diff changeset
1132 else
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heinrichsweikamp
parents:
diff changeset
1133 {
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heinrichsweikamp
parents:
diff changeset
1134 return HAL_BUSY;
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heinrichsweikamp
parents:
diff changeset
1135 }
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heinrichsweikamp
parents:
diff changeset
1136 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1137
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heinrichsweikamp
parents:
diff changeset
1138 /**
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heinrichsweikamp
parents:
diff changeset
1139 * @brief Transmit an amount of data in no-blocking mode with DMA
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1140 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1141 * the configuration information for SPI module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1142 * @param pData: pointer to data buffer
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1143 * @param Size: amount of data to be sent
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1144 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1145 */
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heinrichsweikamp
parents:
diff changeset
1146 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1147 {
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heinrichsweikamp
parents:
diff changeset
1148 if(hspi->State == HAL_SPI_STATE_READY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1149 {
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heinrichsweikamp
parents:
diff changeset
1150 if((pData == NULL) || (Size == 0))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1151 {
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heinrichsweikamp
parents:
diff changeset
1152 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1153 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1154
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1155 /* Check the parameters */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1156 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1157
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heinrichsweikamp
parents:
diff changeset
1158 /* Process Locked */
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heinrichsweikamp
parents:
diff changeset
1159 __HAL_LOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1160
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1161 /* Configure communication */
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heinrichsweikamp
parents:
diff changeset
1162 hspi->State = HAL_SPI_STATE_BUSY_TX;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1163 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1164
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heinrichsweikamp
parents:
diff changeset
1165 hspi->pTxBuffPtr = pData;
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heinrichsweikamp
parents:
diff changeset
1166 hspi->TxXferSize = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1167 hspi->TxXferCount = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1168
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heinrichsweikamp
parents:
diff changeset
1169 /*Init field not used in handle to zero */
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heinrichsweikamp
parents:
diff changeset
1170 hspi->TxISR = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1171 hspi->RxISR = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1172 hspi->RxXferSize = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1173 hspi->RxXferCount = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1174
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heinrichsweikamp
parents:
diff changeset
1175 /* Configure communication direction : 1Line */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1176 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1177 {
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heinrichsweikamp
parents:
diff changeset
1178 SPI_1LINE_TX(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1179 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1180
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1181 /* Reset CRC Calculation */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1182 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1183 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1184 SPI_RESET_CRC(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1185 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1186
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1187 /* Set the SPI TxDMA Half transfer complete callback */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1188 hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1189
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1190 /* Set the SPI TxDMA transfer complete callback */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1191 hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1192
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1193 /* Set the DMA error callback */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1194 hspi->hdmatx->XferErrorCallback = SPI_DMAError;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1195
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heinrichsweikamp
parents:
diff changeset
1196 /* Enable the Tx DMA Stream */
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heinrichsweikamp
parents:
diff changeset
1197 HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1198
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heinrichsweikamp
parents:
diff changeset
1199 /* Enable Tx DMA Request */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1200 hspi->Instance->CR2 |= SPI_CR2_TXDMAEN;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1201
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heinrichsweikamp
parents:
diff changeset
1202 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1203 __HAL_UNLOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1204
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heinrichsweikamp
parents:
diff changeset
1205 /* Check if the SPI is already enabled */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1206 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1207 {
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heinrichsweikamp
parents:
diff changeset
1208 /* Enable SPI peripheral */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1209 __HAL_SPI_ENABLE(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1210 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1211
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heinrichsweikamp
parents:
diff changeset
1212 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1213 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1214 else
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heinrichsweikamp
parents:
diff changeset
1215 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1216 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1217 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1218 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1219
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1220 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1221 * @brief Receive an amount of data in no-blocking mode with DMA
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1222 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1223 * the configuration information for SPI module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1224 * @param pData: pointer to data buffer
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1225 * @note When the CRC feature is enabled the pData Length must be Size + 1.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1226 * @param Size: amount of data to be sent
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1227 * @retval HAL status
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heinrichsweikamp
parents:
diff changeset
1228 */
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heinrichsweikamp
parents:
diff changeset
1229 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1230 {
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heinrichsweikamp
parents:
diff changeset
1231 if(hspi->State == HAL_SPI_STATE_READY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1232 {
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heinrichsweikamp
parents:
diff changeset
1233 if((pData == NULL) || (Size == 0))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1234 {
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heinrichsweikamp
parents:
diff changeset
1235 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1236 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1237
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1238 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1239 __HAL_LOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1240
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1241 /* Configure communication */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1242 hspi->State = HAL_SPI_STATE_BUSY_RX;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1243 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1244
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heinrichsweikamp
parents:
diff changeset
1245 hspi->pRxBuffPtr = pData;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1246 hspi->RxXferSize = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1247 hspi->RxXferCount = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1248
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1249 /*Init field not used in handle to zero */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1250 hspi->RxISR = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1251 hspi->TxISR = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1252 hspi->TxXferSize = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1253 hspi->TxXferCount = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1254
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1255 /* Configure communication direction : 1Line */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1256 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1257 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1258 SPI_1LINE_RX(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1259 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1260 else if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1261 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1262 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1263 __HAL_UNLOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1264
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1265 /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1266 return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1267 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1268
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1269 /* Reset CRC Calculation */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1270 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1271 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1272 SPI_RESET_CRC(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1273 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1274
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1275 /* Set the SPI RxDMA Half transfer complete callback */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1276 hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1277
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1278 /* Set the SPI Rx DMA transfer complete callback */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1279 hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1280
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1281 /* Set the DMA error callback */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1282 hspi->hdmarx->XferErrorCallback = SPI_DMAError;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1283
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1284 /* Enable the Rx DMA Stream */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1285 HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1286
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1287 /* Enable Rx DMA Request */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1288 hspi->Instance->CR2 |= SPI_CR2_RXDMAEN;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1289
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1290 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1291 __HAL_UNLOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1292
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1293 /* Check if the SPI is already enabled */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1294 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1295 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1296 /* Enable SPI peripheral */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1297 __HAL_SPI_ENABLE(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1298 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1299
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heinrichsweikamp
parents:
diff changeset
1300 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1301 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1302 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1303 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1304 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1305 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1306 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1307
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1308 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1309 * @brief Transmit and Receive an amount of data in no-blocking mode with DMA
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1310 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1311 * the configuration information for SPI module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1312 * @param pTxData: pointer to transmission data buffer
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1313 * @param pRxData: pointer to reception data buffer
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1314 * @note When the CRC feature is enabled the pRxData Length must be Size + 1
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1315 * @param Size: amount of data to be sent
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1316 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1317 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1318 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1319 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1320 uint32_t tmpstate = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1321 tmpstate = hspi->State;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1322 if((tmpstate == HAL_SPI_STATE_READY) || ((hspi->Init.Mode == SPI_MODE_MASTER) && \
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1323 (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmpstate == HAL_SPI_STATE_BUSY_RX)))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1324 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1325 if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1326 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1327 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1328 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1329
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1330 /* Check the parameters */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1331 assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1332
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1333 /* Process locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1334 __HAL_LOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1335
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1336 /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1337 if(hspi->State != HAL_SPI_STATE_BUSY_RX)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1338 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1339 hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1340 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1341
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1342 /* Configure communication */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1343 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1344
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1345 hspi->pTxBuffPtr = (uint8_t*)pTxData;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1346 hspi->TxXferSize = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1347 hspi->TxXferCount = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1348
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heinrichsweikamp
parents:
diff changeset
1349 hspi->pRxBuffPtr = (uint8_t*)pRxData;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1350 hspi->RxXferSize = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1351 hspi->RxXferCount = Size;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1352
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1353 /*Init field not used in handle to zero */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1354 hspi->RxISR = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1355 hspi->TxISR = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1356
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1357 /* Reset CRC Calculation */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1358 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1359 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1360 SPI_RESET_CRC(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1361 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1362
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1363 /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1364 if(hspi->State == HAL_SPI_STATE_BUSY_RX)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1365 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1366 /* Set the SPI Rx DMA Half transfer complete callback */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1367 hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1368
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heinrichsweikamp
parents:
diff changeset
1369 hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1370 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1371 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1372 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1373 /* Set the SPI Tx/Rx DMA Half transfer complete callback */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1374 hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1375
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1376 hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1377 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1378
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1379 /* Set the DMA error callback */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1380 hspi->hdmarx->XferErrorCallback = SPI_DMAError;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1381
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1382 /* Enable the Rx DMA Stream */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1383 HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1384
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1385 /* Enable Rx DMA Request */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1386 hspi->Instance->CR2 |= SPI_CR2_RXDMAEN;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1387
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1388 /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1389 is performed in DMA reception complete callback */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1390 hspi->hdmatx->XferCpltCallback = NULL;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1391
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1392 if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1393 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1394 /* Set the DMA error callback */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1395 hspi->hdmatx->XferErrorCallback = SPI_DMAError;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1396 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1397 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1398 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1399 hspi->hdmatx->XferErrorCallback = NULL;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1400 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1401
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1402 /* Enable the Tx DMA Stream */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1403 HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1404
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1405 /* Check if the SPI is already enabled */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1406 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1407 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1408 /* Enable SPI peripheral */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1409 __HAL_SPI_ENABLE(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1410 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1411
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1412 /* Enable Tx DMA Request */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1413 hspi->Instance->CR2 |= SPI_CR2_TXDMAEN;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1414
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1415 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1416 __HAL_UNLOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1417 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1418 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1419 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1420 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1421 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1422 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1423 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1424
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1425 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1426 * @brief Pauses the DMA Transfer.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1427 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1428 * the configuration information for the specified SPI module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1429 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1430 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1431 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1432 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1433 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1434 __HAL_LOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1435
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1436 /* Disable the SPI DMA Tx & Rx requests */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1437 hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1438 hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1439
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1440 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1441 __HAL_UNLOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1442
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1443 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1444 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1445
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1446 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1447 * @brief Resumes the DMA Transfer.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1448 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1449 * the configuration information for the specified SPI module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1450 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1451 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1452 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1453 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1454 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1455 __HAL_LOCK(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1456
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1457 /* Enable the SPI DMA Tx & Rx requests */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1458 hspi->Instance->CR2 |= SPI_CR2_TXDMAEN;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1459 hspi->Instance->CR2 |= SPI_CR2_RXDMAEN;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1460
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parents:
diff changeset
1461 /* Process Unlocked */
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parents:
diff changeset
1462 __HAL_UNLOCK(hspi);
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diff changeset
1463
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diff changeset
1464 return HAL_OK;
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diff changeset
1465 }
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parents:
diff changeset
1466
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parents:
diff changeset
1467 /**
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parents:
diff changeset
1468 * @brief Stops the DMA Transfer.
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parents:
diff changeset
1469 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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parents:
diff changeset
1470 * the configuration information for the specified SPI module.
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diff changeset
1471 * @retval HAL status
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parents:
diff changeset
1472 */
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parents:
diff changeset
1473 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
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parents:
diff changeset
1474 {
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parents:
diff changeset
1475 /* The Lock is not implemented on this API to allow the user application
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parents:
diff changeset
1476 to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
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parents:
diff changeset
1477 when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
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diff changeset
1478 and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
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diff changeset
1479 */
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diff changeset
1480
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parents:
diff changeset
1481 /* Abort the SPI DMA tx Stream */
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diff changeset
1482 if(hspi->hdmatx != NULL)
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diff changeset
1483 {
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diff changeset
1484 HAL_DMA_Abort(hspi->hdmatx);
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diff changeset
1485 }
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parents:
diff changeset
1486 /* Abort the SPI DMA rx Stream */
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diff changeset
1487 if(hspi->hdmarx != NULL)
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diff changeset
1488 {
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diff changeset
1489 HAL_DMA_Abort(hspi->hdmarx);
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diff changeset
1490 }
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diff changeset
1491
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parents:
diff changeset
1492 /* Disable the SPI DMA Tx & Rx requests */
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diff changeset
1493 hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
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diff changeset
1494 hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
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diff changeset
1495
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diff changeset
1496 hspi->State = HAL_SPI_STATE_READY;
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diff changeset
1497
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1498 return HAL_OK;
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diff changeset
1499 }
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diff changeset
1500
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diff changeset
1501 /**
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diff changeset
1502 * @brief This function handles SPI interrupt request.
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diff changeset
1503 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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diff changeset
1504 * the configuration information for SPI module.
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diff changeset
1505 * @retval HAL status
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diff changeset
1506 */
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diff changeset
1507 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
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1508 {
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diff changeset
1509 uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
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diff changeset
1510
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diff changeset
1511 tmp1 = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE);
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diff changeset
1512 tmp2 = __HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE);
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diff changeset
1513 tmp3 = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR);
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diff changeset
1514 /* SPI in mode Receiver and Overrun not occurred ---------------------------*/
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diff changeset
1515 if((tmp1 != RESET) && (tmp2 != RESET) && (tmp3 == RESET))
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diff changeset
1516 {
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diff changeset
1517 hspi->RxISR(hspi);
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diff changeset
1518 return;
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diff changeset
1519 }
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diff changeset
1520
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diff changeset
1521 tmp1 = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE);
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diff changeset
1522 tmp2 = __HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE);
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parents:
diff changeset
1523 /* SPI in mode Transmitter ---------------------------------------------------*/
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diff changeset
1524 if((tmp1 != RESET) && (tmp2 != RESET))
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diff changeset
1525 {
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diff changeset
1526 hspi->TxISR(hspi);
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diff changeset
1527 return;
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diff changeset
1528 }
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heinrichsweikamp
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diff changeset
1529
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diff changeset
1530 if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_ERR) != RESET)
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diff changeset
1531 {
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diff changeset
1532 /* SPI CRC error interrupt occurred ---------------------------------------*/
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diff changeset
1533 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
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parents:
diff changeset
1534 {
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diff changeset
1535 hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
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diff changeset
1536 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
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diff changeset
1537 }
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heinrichsweikamp
parents:
diff changeset
1538 /* SPI Mode Fault error interrupt occurred --------------------------------*/
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diff changeset
1539 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_MODF) != RESET)
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parents:
diff changeset
1540 {
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diff changeset
1541 hspi->ErrorCode |= HAL_SPI_ERROR_MODF;
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diff changeset
1542 __HAL_SPI_CLEAR_MODFFLAG(hspi);
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diff changeset
1543 }
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diff changeset
1544
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parents:
diff changeset
1545 /* SPI Overrun error interrupt occurred -----------------------------------*/
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diff changeset
1546 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) != RESET)
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parents:
diff changeset
1547 {
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diff changeset
1548 if(hspi->State != HAL_SPI_STATE_BUSY_TX)
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parents:
diff changeset
1549 {
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diff changeset
1550 hspi->ErrorCode |= HAL_SPI_ERROR_OVR;
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diff changeset
1551 __HAL_SPI_CLEAR_OVRFLAG(hspi);
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diff changeset
1552 }
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diff changeset
1553 }
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parents:
diff changeset
1554
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parents:
diff changeset
1555 /* SPI Frame error interrupt occurred -------------------------------------*/
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parents:
diff changeset
1556 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_FRE) != RESET)
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parents:
diff changeset
1557 {
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diff changeset
1558 hspi->ErrorCode |= HAL_SPI_ERROR_FRE;
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parents:
diff changeset
1559 __HAL_SPI_CLEAR_FREFLAG(hspi);
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diff changeset
1560 }
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parents:
diff changeset
1561
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parents:
diff changeset
1562 /* Call the Error call Back in case of Errors */
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parents:
diff changeset
1563 if(hspi->ErrorCode!=HAL_SPI_ERROR_NONE)
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parents:
diff changeset
1564 {
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diff changeset
1565 hspi->State = HAL_SPI_STATE_READY;
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parents:
diff changeset
1566 HAL_SPI_ErrorCallback(hspi);
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diff changeset
1567 }
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heinrichsweikamp
parents:
diff changeset
1568 }
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heinrichsweikamp
parents:
diff changeset
1569 }
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heinrichsweikamp
parents:
diff changeset
1570
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parents:
diff changeset
1571 /**
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parents:
diff changeset
1572 * @brief Tx Transfer completed callbacks
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parents:
diff changeset
1573 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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parents:
diff changeset
1574 * the configuration information for SPI module.
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heinrichsweikamp
parents:
diff changeset
1575 * @retval None
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heinrichsweikamp
parents:
diff changeset
1576 */
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parents:
diff changeset
1577 __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
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parents:
diff changeset
1578 {
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parents:
diff changeset
1579 /* NOTE : This function Should not be modified, when the callback is needed,
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heinrichsweikamp
parents:
diff changeset
1580 the HAL_SPI_TxCpltCallback could be implemented in the user file
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heinrichsweikamp
parents:
diff changeset
1581 */
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parents:
diff changeset
1582 }
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heinrichsweikamp
parents:
diff changeset
1583
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parents:
diff changeset
1584 /**
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heinrichsweikamp
parents:
diff changeset
1585 * @brief Rx Transfer completed callbacks
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heinrichsweikamp
parents:
diff changeset
1586 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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parents:
diff changeset
1587 * the configuration information for SPI module.
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heinrichsweikamp
parents:
diff changeset
1588 * @retval None
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heinrichsweikamp
parents:
diff changeset
1589 */
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parents:
diff changeset
1590 __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
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heinrichsweikamp
parents:
diff changeset
1591 {
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diff changeset
1592 /* NOTE : This function Should not be modified, when the callback is needed,
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heinrichsweikamp
parents:
diff changeset
1593 the HAL_SPI_RxCpltCallback() could be implemented in the user file
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heinrichsweikamp
parents:
diff changeset
1594 */
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heinrichsweikamp
parents:
diff changeset
1595 }
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heinrichsweikamp
parents:
diff changeset
1596
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parents:
diff changeset
1597 /**
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heinrichsweikamp
parents:
diff changeset
1598 * @brief Tx and Rx Transfer completed callbacks
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heinrichsweikamp
parents:
diff changeset
1599 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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heinrichsweikamp
parents:
diff changeset
1600 * the configuration information for SPI module.
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heinrichsweikamp
parents:
diff changeset
1601 * @retval None
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heinrichsweikamp
parents:
diff changeset
1602 */
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parents:
diff changeset
1603 __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
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heinrichsweikamp
parents:
diff changeset
1604 {
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parents:
diff changeset
1605 /* NOTE : This function Should not be modified, when the callback is needed,
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1606 the HAL_SPI_TxRxCpltCallback() could be implemented in the user file
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heinrichsweikamp
parents:
diff changeset
1607 */
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heinrichsweikamp
parents:
diff changeset
1608 }
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heinrichsweikamp
parents:
diff changeset
1609
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parents:
diff changeset
1610 /**
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heinrichsweikamp
parents:
diff changeset
1611 * @brief Tx Half Transfer completed callbacks
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heinrichsweikamp
parents:
diff changeset
1612 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1613 * the configuration information for SPI module.
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heinrichsweikamp
parents:
diff changeset
1614 * @retval None
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heinrichsweikamp
parents:
diff changeset
1615 */
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parents:
diff changeset
1616 __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
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heinrichsweikamp
parents:
diff changeset
1617 {
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heinrichsweikamp
parents:
diff changeset
1618 /* NOTE : This function Should not be modified, when the callback is needed,
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1619 the HAL_SPI_TxHalfCpltCallback could be implemented in the user file
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heinrichsweikamp
parents:
diff changeset
1620 */
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heinrichsweikamp
parents:
diff changeset
1621 }
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heinrichsweikamp
parents:
diff changeset
1622
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heinrichsweikamp
parents:
diff changeset
1623 /**
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heinrichsweikamp
parents:
diff changeset
1624 * @brief Rx Half Transfer completed callbacks
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heinrichsweikamp
parents:
diff changeset
1625 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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heinrichsweikamp
parents:
diff changeset
1626 * the configuration information for SPI module.
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heinrichsweikamp
parents:
diff changeset
1627 * @retval None
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heinrichsweikamp
parents:
diff changeset
1628 */
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heinrichsweikamp
parents:
diff changeset
1629 __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
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heinrichsweikamp
parents:
diff changeset
1630 {
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heinrichsweikamp
parents:
diff changeset
1631 /* NOTE : This function Should not be modified, when the callback is needed,
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heinrichsweikamp
parents:
diff changeset
1632 the HAL_SPI_RxHalfCpltCallback() could be implemented in the user file
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heinrichsweikamp
parents:
diff changeset
1633 */
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heinrichsweikamp
parents:
diff changeset
1634 }
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heinrichsweikamp
parents:
diff changeset
1635
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heinrichsweikamp
parents:
diff changeset
1636 /**
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heinrichsweikamp
parents:
diff changeset
1637 * @brief Tx and Rx Transfer completed callbacks
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heinrichsweikamp
parents:
diff changeset
1638 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1639 * the configuration information for SPI module.
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heinrichsweikamp
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diff changeset
1640 * @retval None
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parents:
diff changeset
1641 */
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parents:
diff changeset
1642 __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
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parents:
diff changeset
1643 {
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parents:
diff changeset
1644 /* NOTE : This function Should not be modified, when the callback is needed,
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heinrichsweikamp
parents:
diff changeset
1645 the HAL_SPI_TxRxHalfCpltCallback() could be implemented in the user file
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heinrichsweikamp
parents:
diff changeset
1646 */
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parents:
diff changeset
1647 }
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heinrichsweikamp
parents:
diff changeset
1648
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heinrichsweikamp
parents:
diff changeset
1649 /**
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heinrichsweikamp
parents:
diff changeset
1650 * @brief SPI error callbacks
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parents:
diff changeset
1651 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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parents:
diff changeset
1652 * the configuration information for SPI module.
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parents:
diff changeset
1653 * @retval None
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parents:
diff changeset
1654 */
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parents:
diff changeset
1655 __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
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parents:
diff changeset
1656 {
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parents:
diff changeset
1657 /* NOTE : - This function Should not be modified, when the callback is needed,
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heinrichsweikamp
parents:
diff changeset
1658 the HAL_SPI_ErrorCallback() could be implemented in the user file.
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heinrichsweikamp
parents:
diff changeset
1659 - The ErrorCode parameter in the hspi handle is updated by the SPI processes
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parents:
diff changeset
1660 and user can use HAL_SPI_GetError() API to check the latest error occurred.
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parents:
diff changeset
1661 */
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parents:
diff changeset
1662 }
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parents:
diff changeset
1663
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parents:
diff changeset
1664 /**
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heinrichsweikamp
parents:
diff changeset
1665 * @}
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parents:
diff changeset
1666 */
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diff changeset
1667
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parents:
diff changeset
1668 /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
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parents:
diff changeset
1669 * @brief SPI control functions
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parents:
diff changeset
1670 *
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heinrichsweikamp
parents:
diff changeset
1671 @verbatim
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parents:
diff changeset
1672 ===============================================================================
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parents:
diff changeset
1673 ##### Peripheral State and Errors functions #####
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parents:
diff changeset
1674 ===============================================================================
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parents:
diff changeset
1675 [..]
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parents:
diff changeset
1676 This subsection provides a set of functions allowing to control the SPI.
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parents:
diff changeset
1677 (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
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parents:
diff changeset
1678 (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
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parents:
diff changeset
1679 @endverbatim
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parents:
diff changeset
1680 * @{
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diff changeset
1681 */
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parents:
diff changeset
1682
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parents:
diff changeset
1683 /**
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parents:
diff changeset
1684 * @brief Return the SPI state
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parents:
diff changeset
1685 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
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parents:
diff changeset
1686 * the configuration information for SPI module.
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parents:
diff changeset
1687 * @retval HAL state
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parents:
diff changeset
1688 */
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parents:
diff changeset
1689 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
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parents:
diff changeset
1690 {
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diff changeset
1691 return hspi->State;
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parents:
diff changeset
1692 }
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heinrichsweikamp
parents:
diff changeset
1693
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parents:
diff changeset
1694 /**
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parents:
diff changeset
1695 * @brief Return the SPI error code
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parents:
diff changeset
1696 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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parents:
diff changeset
1697 * the configuration information for SPI module.
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parents:
diff changeset
1698 * @retval SPI Error Code
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parents:
diff changeset
1699 */
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parents:
diff changeset
1700 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
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parents:
diff changeset
1701 {
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diff changeset
1702 return hspi->ErrorCode;
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parents:
diff changeset
1703 }
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heinrichsweikamp
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diff changeset
1704
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parents:
diff changeset
1705 /**
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heinrichsweikamp
parents:
diff changeset
1706 * @}
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parents:
diff changeset
1707 */
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diff changeset
1708
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parents:
diff changeset
1709 /**
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parents:
diff changeset
1710 * @brief Interrupt Handler to close Tx transfer
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parents:
diff changeset
1711 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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parents:
diff changeset
1712 * the configuration information for SPI module.
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parents:
diff changeset
1713 * @retval void
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parents:
diff changeset
1714 */
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parents:
diff changeset
1715 static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi)
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parents:
diff changeset
1716 {
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parents:
diff changeset
1717 /* Wait until TXE flag is set to send data */
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parents:
diff changeset
1718 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
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parents:
diff changeset
1719 {
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diff changeset
1720 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
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parents:
diff changeset
1721 }
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parents:
diff changeset
1722
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parents:
diff changeset
1723 /* Disable TXE interrupt */
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parents:
diff changeset
1724 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE ));
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parents:
diff changeset
1725
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parents:
diff changeset
1726 /* Disable ERR interrupt if Receive process is finished */
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diff changeset
1727 if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) == RESET)
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parents:
diff changeset
1728 {
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diff changeset
1729 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
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parents:
diff changeset
1730
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parents:
diff changeset
1731 /* Wait until Busy flag is reset before disabling SPI */
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parents:
diff changeset
1732 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
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diff changeset
1733 {
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diff changeset
1734 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
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parents:
diff changeset
1735 }
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parents:
diff changeset
1736
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parents:
diff changeset
1737 /* Clear OVERRUN flag in 2 Lines communication mode because received is not read */
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parents:
diff changeset
1738 if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
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parents:
diff changeset
1739 {
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parents:
diff changeset
1740 __HAL_SPI_CLEAR_OVRFLAG(hspi);
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parents:
diff changeset
1741 }
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parents:
diff changeset
1742
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parents:
diff changeset
1743 /* Check if Errors has been detected during transfer */
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parents:
diff changeset
1744 if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
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parents:
diff changeset
1745 {
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parents:
diff changeset
1746 /* Check if we are in Tx or in Rx/Tx Mode */
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parents:
diff changeset
1747 if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
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parents:
diff changeset
1748 {
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parents:
diff changeset
1749 /* Set state to READY before run the Callback Complete */
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parents:
diff changeset
1750 hspi->State = HAL_SPI_STATE_READY;
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parents:
diff changeset
1751 HAL_SPI_TxRxCpltCallback(hspi);
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parents:
diff changeset
1752 }
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heinrichsweikamp
parents:
diff changeset
1753 else
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heinrichsweikamp
parents:
diff changeset
1754 {
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parents:
diff changeset
1755 /* Set state to READY before run the Callback Complete */
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parents:
diff changeset
1756 hspi->State = HAL_SPI_STATE_READY;
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parents:
diff changeset
1757 HAL_SPI_TxCpltCallback(hspi);
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parents:
diff changeset
1758 }
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heinrichsweikamp
parents:
diff changeset
1759 }
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heinrichsweikamp
parents:
diff changeset
1760 else
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heinrichsweikamp
parents:
diff changeset
1761 {
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heinrichsweikamp
parents:
diff changeset
1762 /* Set state to READY before run the Callback Complete */
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parents:
diff changeset
1763 hspi->State = HAL_SPI_STATE_READY;
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parents:
diff changeset
1764 /* Call Error call back in case of Error */
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parents:
diff changeset
1765 HAL_SPI_ErrorCallback(hspi);
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parents:
diff changeset
1766 }
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parents:
diff changeset
1767 }
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heinrichsweikamp
parents:
diff changeset
1768 }
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heinrichsweikamp
parents:
diff changeset
1769
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parents:
diff changeset
1770 /**
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parents:
diff changeset
1771 * @brief Interrupt Handler to transmit amount of data in no-blocking mode
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parents:
diff changeset
1772 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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parents:
diff changeset
1773 * the configuration information for SPI module.
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heinrichsweikamp
parents:
diff changeset
1774 * @retval void
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parents:
diff changeset
1775 */
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parents:
diff changeset
1776 static void SPI_TxISR(SPI_HandleTypeDef *hspi)
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parents:
diff changeset
1777 {
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parents:
diff changeset
1778 /* Transmit data in 8 Bit mode */
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parents:
diff changeset
1779 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
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parents:
diff changeset
1780 {
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parents:
diff changeset
1781 hspi->Instance->DR = (*hspi->pTxBuffPtr++);
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parents:
diff changeset
1782 }
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heinrichsweikamp
parents:
diff changeset
1783 /* Transmit data in 16 Bit mode */
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heinrichsweikamp
parents:
diff changeset
1784 else
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parents:
diff changeset
1785 {
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parents:
diff changeset
1786 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
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parents:
diff changeset
1787 hspi->pTxBuffPtr+=2;
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parents:
diff changeset
1788 }
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heinrichsweikamp
parents:
diff changeset
1789 hspi->TxXferCount--;
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heinrichsweikamp
parents:
diff changeset
1790
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heinrichsweikamp
parents:
diff changeset
1791 if(hspi->TxXferCount == 0)
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heinrichsweikamp
parents:
diff changeset
1792 {
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parents:
diff changeset
1793 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
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heinrichsweikamp
parents:
diff changeset
1794 {
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parents:
diff changeset
1795 /* calculate and transfer CRC on Tx line */
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parents:
diff changeset
1796 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
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parents:
diff changeset
1797 }
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heinrichsweikamp
parents:
diff changeset
1798 SPI_TxCloseIRQHandler(hspi);
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heinrichsweikamp
parents:
diff changeset
1799 }
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heinrichsweikamp
parents:
diff changeset
1800 }
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heinrichsweikamp
parents:
diff changeset
1801
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heinrichsweikamp
parents:
diff changeset
1802 /**
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heinrichsweikamp
parents:
diff changeset
1803 * @brief Interrupt Handler to close Rx transfer
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1804 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1805 * the configuration information for SPI module.
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heinrichsweikamp
parents:
diff changeset
1806 * @retval void
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heinrichsweikamp
parents:
diff changeset
1807 */
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heinrichsweikamp
parents:
diff changeset
1808 static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi)
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heinrichsweikamp
parents:
diff changeset
1809 {
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heinrichsweikamp
parents:
diff changeset
1810 __IO uint16_t tmpreg;
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heinrichsweikamp
parents:
diff changeset
1811
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heinrichsweikamp
parents:
diff changeset
1812 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
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heinrichsweikamp
parents:
diff changeset
1813 {
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heinrichsweikamp
parents:
diff changeset
1814 /* Wait until RXNE flag is set to send data */
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heinrichsweikamp
parents:
diff changeset
1815 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
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heinrichsweikamp
parents:
diff changeset
1816 {
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heinrichsweikamp
parents:
diff changeset
1817 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
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heinrichsweikamp
parents:
diff changeset
1818 }
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heinrichsweikamp
parents:
diff changeset
1819
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heinrichsweikamp
parents:
diff changeset
1820 /* Read CRC to reset RXNE flag */
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heinrichsweikamp
parents:
diff changeset
1821 tmpreg = hspi->Instance->DR;
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heinrichsweikamp
parents:
diff changeset
1822 UNUSED(tmpreg);
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heinrichsweikamp
parents:
diff changeset
1823
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1824 /* Wait until RXNE flag is set to send data */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1825 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1826 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1827 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1828 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1829
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1830 /* Check if CRC error occurred */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1831 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1832 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1833 hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1834
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1835 /* Reset CRC Calculation */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1836 SPI_RESET_CRC(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1837 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1838 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1839
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1840 /* Disable RXNE and ERR interrupt */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1841 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE));
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1842
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1843 /* if Transmit process is finished */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1844 if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) == RESET)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1845 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1846 /* Disable ERR interrupt */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1847 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1848
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heinrichsweikamp
parents:
diff changeset
1849 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1850 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1851 /* Disable SPI peripheral */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1852 __HAL_SPI_DISABLE(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1853 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1854
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1855 /* Check if Errors has been detected during transfer */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1856 if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1857 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1858 /* Check if we are in Rx or in Rx/Tx Mode */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1859 if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1860 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1861 /* Set state to READY before run the Callback Complete */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1862 hspi->State = HAL_SPI_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1863 HAL_SPI_TxRxCpltCallback(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1864 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1865 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1866 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1867 /* Set state to READY before run the Callback Complete */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1868 hspi->State = HAL_SPI_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1869 HAL_SPI_RxCpltCallback(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1870 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1871 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1872 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1873 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1874 /* Set state to READY before run the Callback Complete */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1875 hspi->State = HAL_SPI_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1876 /* Call Error call back in case of Error */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1877 HAL_SPI_ErrorCallback(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1878 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1879 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1880 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1881
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1882 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1883 * @brief Interrupt Handler to receive amount of data in 2Lines mode
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1884 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1885 * the configuration information for SPI module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1886 * @retval void
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1887 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1888 static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1889 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1890 /* Receive data in 8 Bit mode */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1891 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1892 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1893 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1894 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1895 /* Receive data in 16 Bit mode */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1896 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1897 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1898 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1899 hspi->pRxBuffPtr+=2;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1900 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1901 hspi->RxXferCount--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1902
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1903 if(hspi->RxXferCount==0)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1904 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1905 SPI_RxCloseIRQHandler(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1906 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1907 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1908
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1909 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1910 * @brief Interrupt Handler to receive amount of data in no-blocking mode
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1911 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1912 * the configuration information for SPI module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1913 * @retval void
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1914 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1915 static void SPI_RxISR(SPI_HandleTypeDef *hspi)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1916 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1917 /* Receive data in 8 Bit mode */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1918 if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1919 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1920 (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1921 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1922 /* Receive data in 16 Bit mode */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1923 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1924 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1925 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1926 hspi->pRxBuffPtr+=2;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1927 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1928 hspi->RxXferCount--;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1929
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1930 /* Enable CRC Transmission */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1931 if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1932 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1933 /* Set CRC Next to calculate CRC on Rx side */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1934 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1935 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1936
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1937 if(hspi->RxXferCount == 0)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1938 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1939 SPI_RxCloseIRQHandler(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1940 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1941 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1942
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1943 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1944 * @brief DMA SPI transmit process complete callback
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1945 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1946 * the configuration information for the specified DMA module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1947 * @retval None
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1948 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1949 static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1950 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1951 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1952
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1953 /* DMA Normal Mode */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1954 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1955 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1956 /* Wait until TXE flag is set to send data */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1957 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1958 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1959 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1960 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1961 /* Disable Tx DMA Request */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1962 hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1963
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1964 /* Wait until Busy flag is reset before disabling SPI */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1965 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1966 {
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heinrichsweikamp
parents:
diff changeset
1967 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1968 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1969
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1970 hspi->TxXferCount = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1971
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1972 hspi->State = HAL_SPI_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1973 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1974
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1975 /* Clear OVERRUN flag in 2 Lines communication mode because received is not read */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1976 if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1977 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1978 __HAL_SPI_CLEAR_OVRFLAG(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1979 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1980
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1981 /* Check if Errors has been detected during transfer */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1982 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1983 {
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heinrichsweikamp
parents:
diff changeset
1984 HAL_SPI_ErrorCallback(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1985 }
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heinrichsweikamp
parents:
diff changeset
1986 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1987 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1988 HAL_SPI_TxCpltCallback(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1989 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1990 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1991
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1992 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1993 * @brief DMA SPI receive process complete callback
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1994 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1995 * the configuration information for the specified DMA module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1996 * @retval None
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1997 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1998 static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1999 {
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heinrichsweikamp
parents:
diff changeset
2000 __IO uint16_t tmpreg;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2001
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2002 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2003 /* DMA Normal mode */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2004 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2005 {
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heinrichsweikamp
parents:
diff changeset
2006 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2007 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2008 /* Disable SPI peripheral */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2009 __HAL_SPI_DISABLE(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2010 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2011
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2012 /* Disable Rx DMA Request */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2013 hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2014 /* Disable Tx DMA Request (done by default to handle the case Master RX direction 2 lines) */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2015 hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2016
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2017 hspi->RxXferCount = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2018 hspi->State = HAL_SPI_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2019
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2020 /* Reset CRC Calculation */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2021 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2022 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2023 /* Wait until RXNE flag is set to send data */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2024 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2025 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2026 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2027 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2028
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2029 /* Read CRC */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2030 tmpreg = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2031 UNUSED(tmpreg);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2032
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2033 /* Wait until RXNE flag is set */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2034 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2035 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2036 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2037 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2038
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2039 /* Check if CRC error occurred */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2040 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2041 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2042 hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2043 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2044 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2045 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2046
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2047 /* Check if Errors has been detected during transfer */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2048 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2049 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2050 HAL_SPI_ErrorCallback(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2051 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2052 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2053 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2054 HAL_SPI_RxCpltCallback(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2055 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2056 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2057 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2058 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2059 HAL_SPI_RxCpltCallback(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2060 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2061 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2062
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2063 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2064 * @brief DMA SPI transmit receive process complete callback
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2065 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2066 * the configuration information for the specified DMA module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2067 * @retval None
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2068 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2069 static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2070 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2071 __IO uint16_t tmpreg;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2072
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2073 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2074 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2075 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2076 /* Reset CRC Calculation */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2077 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2078 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2079 /* Check if CRC is done on going (RXNE flag set) */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2080 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2081 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2082 /* Wait until RXNE flag is set to send data */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2083 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2084 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2085 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2086 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2087 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2088 /* Read CRC */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2089 tmpreg = hspi->Instance->DR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2090 UNUSED(tmpreg);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2091
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2092 /* Check if CRC error occurred */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2093 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2094 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2095 hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2096 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2097 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2098 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2099
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2100 /* Wait until TXE flag is set to send data */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2101 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2102 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2103 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2104 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2105 /* Disable Tx DMA Request */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2106 hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2107
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2108 /* Wait until Busy flag is reset before disabling SPI */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2109 if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2110 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2111 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2112 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2113
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2114 /* Disable Rx DMA Request */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2115 hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2116
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2117 hspi->TxXferCount = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2118 hspi->RxXferCount = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2119
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2120 hspi->State = HAL_SPI_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2121
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2122
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2123 /* Check if Errors has been detected during transfer */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2124 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2125 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2126 HAL_SPI_ErrorCallback(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2127 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2128 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2129 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2130 HAL_SPI_TxRxCpltCallback(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2131 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2132 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2133 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2134 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2135 HAL_SPI_TxRxCpltCallback(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2136 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2137 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2138
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2139 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2140 * @brief DMA SPI half transmit process complete callback
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2141 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2142 * the configuration information for the specified DMA module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2143 * @retval None
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2144 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2145 static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2146 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2147 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2148
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2149 HAL_SPI_TxHalfCpltCallback(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2150 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2151
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2152 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2153 * @brief DMA SPI half receive process complete callback
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2154 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2155 * the configuration information for the specified DMA module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2156 * @retval None
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2157 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2158 static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2159 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2160 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2161
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2162 HAL_SPI_RxHalfCpltCallback(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2163 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2164
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2165 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2166 * @brief DMA SPI Half transmit receive process complete callback
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2167 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2168 * the configuration information for the specified DMA module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2169 * @retval None
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2170 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2171 static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2172 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2173 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2174
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2175 HAL_SPI_TxRxHalfCpltCallback(hspi);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2176 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2177
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2178 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2179 * @brief DMA SPI communication error callback
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2180 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2181 * the configuration information for the specified DMA module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2182 * @retval None
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2183 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2184 static void SPI_DMAError(DMA_HandleTypeDef *hdma)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2185 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2186 SPI_HandleTypeDef* hspi = (SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
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2187 hspi->TxXferCount = 0;
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2188 hspi->RxXferCount = 0;
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2189 hspi->State= HAL_SPI_STATE_READY;
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2190 hspi->ErrorCode |= HAL_SPI_ERROR_DMA;
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2191 HAL_SPI_ErrorCallback(hspi);
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2192 }
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2193
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2194 /**
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2195 * @brief This function handles SPI Communication Timeout.
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2196 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
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2197 * the configuration information for SPI module.
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2198 * @param Flag: SPI flag to check
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2199 * @param Status: Flag status to check: RESET or set
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2200 * @param Timeout: Timeout duration
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2201 * @retval HAL status
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2202 */
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2203 static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
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2204 {
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2205 uint32_t tickstart = 0;
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2206
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2207 /* Get tick */
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2208 tickstart = HAL_GetTick();
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2209
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2210 /* Wait until flag is set */
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2211 if(Status == RESET)
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2212 {
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2213 while(__HAL_SPI_GET_FLAG(hspi, Flag) == RESET)
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2214 {
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2215 if(Timeout != HAL_MAX_DELAY)
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2216 {
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2217 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
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2218 {
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2219 /* Disable the SPI and reset the CRC: the CRC value should be cleared
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2220 on both master and slave sides in order to resynchronize the master
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2221 and slave for their respective CRC calculation */
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2222
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2223 /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
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2224 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
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2225
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2226 /* Disable SPI peripheral */
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2227 __HAL_SPI_DISABLE(hspi);
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2228
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2229 /* Reset CRC Calculation */
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2230 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
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2231 {
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2232 SPI_RESET_CRC(hspi);
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2233 }
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2234
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2235 hspi->State= HAL_SPI_STATE_READY;
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2236
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2237 /* Process Unlocked */
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2238 __HAL_UNLOCK(hspi);
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2239
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2240 return HAL_TIMEOUT;
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2241 }
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2242 }
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2243 }
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2244 }
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2245 else
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2246 {
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2247 while(__HAL_SPI_GET_FLAG(hspi, Flag) != RESET)
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2248 {
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2249 if(Timeout != HAL_MAX_DELAY)
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2250 {
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2251 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
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2252 {
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2253 /* Disable the SPI and reset the CRC: the CRC value should be cleared
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2254 on both master and slave sides in order to resynchronize the master
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2255 and slave for their respective CRC calculation */
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2256
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2257 /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
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2258 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
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2259
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2260 /* Disable SPI peripheral */
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2261 __HAL_SPI_DISABLE(hspi);
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2262
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2263 /* Reset CRC Calculation */
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2264 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
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2265 {
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2266 SPI_RESET_CRC(hspi);
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2267 }
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2268
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2269 hspi->State= HAL_SPI_STATE_READY;
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2270
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2271 /* Process Unlocked */
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2272 __HAL_UNLOCK(hspi);
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2273
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2274 return HAL_TIMEOUT;
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2275 }
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2276 }
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2277 }
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2278 }
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2279 return HAL_OK;
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2280 }
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2281
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2282
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2283 /**
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2284 * @}
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2285 */
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2286
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2287 #endif /* HAL_SPI_MODULE_ENABLED */
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2288 /**
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2289 * @}
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2290 */
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2291
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2292 /**
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2293 * @}
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2294 */
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2295
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2296 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/