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38
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_can.h
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4 * @author MCD Application Team
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5 * @version V1.2.0
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6 * @date 26-December-2014
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7 * @brief Header file of CAN HAL module.
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8 ******************************************************************************
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9 * @attention
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10 *
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11 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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12 *
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13 * Redistribution and use in source and binary forms, with or without modification,
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14 * are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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17 * 2. Redistributions in binary form must reproduce the above copyright notice,
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18 * this list of conditions and the following disclaimer in the documentation
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19 * and/or other materials provided with the distribution.
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20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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21 * may be used to endorse or promote products derived from this software
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22 * without specific prior written permission.
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23 *
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24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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34 *
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35 ******************************************************************************
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36 */
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37
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38 /* Define to prevent recursive inclusion -------------------------------------*/
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39 #ifndef __STM32F4xx_HAL_CAN_H
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40 #define __STM32F4xx_HAL_CAN_H
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41
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42 #ifdef __cplusplus
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43 extern "C" {
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44 #endif
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45
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46 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
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47 /* Includes ------------------------------------------------------------------*/
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48 #include "stm32f4xx_hal_def.h"
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49
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50 /** @addtogroup STM32F4xx_HAL_Driver
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51 * @{
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52 */
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53
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54 /** @addtogroup CAN
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55 * @{
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56 */
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57
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58 /* Exported types ------------------------------------------------------------*/
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59 /** @defgroup CAN_Exported_Types CAN Exported Types
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60 * @{
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61 */
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62
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63 /**
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64 * @brief HAL State structures definition
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65 */
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66 typedef enum
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67 {
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68 HAL_CAN_STATE_RESET = 0x00, /*!< CAN not yet initialized or disabled */
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69 HAL_CAN_STATE_READY = 0x01, /*!< CAN initialized and ready for use */
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70 HAL_CAN_STATE_BUSY = 0x02, /*!< CAN process is ongoing */
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71 HAL_CAN_STATE_BUSY_TX = 0x12, /*!< CAN process is ongoing */
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72 HAL_CAN_STATE_BUSY_RX = 0x22, /*!< CAN process is ongoing */
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73 HAL_CAN_STATE_BUSY_TX_RX = 0x32, /*!< CAN process is ongoing */
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74 HAL_CAN_STATE_TIMEOUT = 0x03, /*!< Timeout state */
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75 HAL_CAN_STATE_ERROR = 0x04 /*!< CAN error state */
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76
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77 }HAL_CAN_StateTypeDef;
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78
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79 /**
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80 * @brief CAN init structure definition
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81 */
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82 typedef struct
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83 {
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84 uint32_t Prescaler; /*!< Specifies the length of a time quantum.
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85 This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
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86
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87 uint32_t Mode; /*!< Specifies the CAN operating mode.
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88 This parameter can be a value of @ref CAN_operating_mode */
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89
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90 uint32_t SJW; /*!< Specifies the maximum number of time quanta
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91 the CAN hardware is allowed to lengthen or
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92 shorten a bit to perform resynchronization.
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93 This parameter can be a value of @ref CAN_synchronisation_jump_width */
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94
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95 uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1.
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96 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
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97
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98 uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2.
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99 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
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100
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101 uint32_t TTCM; /*!< Enable or disable the time triggered communication mode.
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102 This parameter can be set to ENABLE or DISABLE. */
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103
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104 uint32_t ABOM; /*!< Enable or disable the automatic bus-off management.
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105 This parameter can be set to ENABLE or DISABLE */
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106
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107 uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode.
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108 This parameter can be set to ENABLE or DISABLE */
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109
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110 uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode.
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111 This parameter can be set to ENABLE or DISABLE */
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112
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113 uint32_t RFLM; /*!< Enable or disable the receive FIFO Locked mode.
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114 This parameter can be set to ENABLE or DISABLE */
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115
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116 uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority.
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117 This parameter can be set to ENABLE or DISABLE */
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118 }CAN_InitTypeDef;
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119
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120 /**
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121 * @brief CAN filter configuration structure definition
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122 */
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123 typedef struct
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124 {
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125 uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
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126 configuration, first one for a 16-bit configuration).
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127 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
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128
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129 uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
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130 configuration, second one for a 16-bit configuration).
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131 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
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132
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133 uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
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134 according to the mode (MSBs for a 32-bit configuration,
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135 first one for a 16-bit configuration).
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136 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
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137
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138 uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
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139 according to the mode (LSBs for a 32-bit configuration,
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140 second one for a 16-bit configuration).
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141 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
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142
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143 uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
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144 This parameter can be a value of @ref CAN_filter_FIFO */
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145
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146 uint32_t FilterNumber; /*!< Specifies the filter which will be initialized.
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147 This parameter must be a number between Min_Data = 0 and Max_Data = 27 */
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148
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149 uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
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150 This parameter can be a value of @ref CAN_filter_mode */
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151
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152 uint32_t FilterScale; /*!< Specifies the filter scale.
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153 This parameter can be a value of @ref CAN_filter_scale */
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154
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155 uint32_t FilterActivation; /*!< Enable or disable the filter.
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156 This parameter can be set to ENABLE or DISABLE. */
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157
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158 uint32_t BankNumber; /*!< Select the start slave bank filter.
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159 This parameter must be a number between Min_Data = 0 and Max_Data = 28 */
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160
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161 }CAN_FilterConfTypeDef;
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162
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163 /**
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164 * @brief CAN Tx message structure definition
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165 */
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166 typedef struct
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167 {
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168 uint32_t StdId; /*!< Specifies the standard identifier.
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169 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
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170
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171 uint32_t ExtId; /*!< Specifies the extended identifier.
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172 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
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173
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174 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
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175 This parameter can be a value of @ref CAN_Identifier_Type */
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176
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177 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
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178 This parameter can be a value of @ref CAN_remote_transmission_request */
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179
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180 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
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181 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
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182
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183 uint32_t Data[8]; /*!< Contains the data to be transmitted.
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184 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
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185
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186 }CanTxMsgTypeDef;
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187
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188 /**
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189 * @brief CAN Rx message structure definition
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190 */
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191 typedef struct
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192 {
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193 uint32_t StdId; /*!< Specifies the standard identifier.
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194 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
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195
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196 uint32_t ExtId; /*!< Specifies the extended identifier.
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197 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
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198
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199 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received.
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200 This parameter can be a value of @ref CAN_Identifier_Type */
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201
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202 uint32_t RTR; /*!< Specifies the type of frame for the received message.
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203 This parameter can be a value of @ref CAN_remote_transmission_request */
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204
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205 uint32_t DLC; /*!< Specifies the length of the frame that will be received.
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206 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
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207
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208 uint32_t Data[8]; /*!< Contains the data to be received.
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209 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
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210
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211 uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through.
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212 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
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213
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214 uint32_t FIFONumber; /*!< Specifies the receive FIFO number.
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215 This parameter can be CAN_FIFO0 or CAN_FIFO1 */
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216
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217 }CanRxMsgTypeDef;
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218
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219 /**
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220 * @brief CAN handle Structure definition
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221 */
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222 typedef struct
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223 {
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224 CAN_TypeDef *Instance; /*!< Register base address */
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225
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226 CAN_InitTypeDef Init; /*!< CAN required parameters */
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227
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228 CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */
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229
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230 CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure */
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231
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232 __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */
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233
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234 HAL_LockTypeDef Lock; /*!< CAN locking object */
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235
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236 __IO uint32_t ErrorCode; /*!< CAN Error code */
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237
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238 }CAN_HandleTypeDef;
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239
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240 /**
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241 * @}
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242 */
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243
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244 /* Exported constants --------------------------------------------------------*/
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245 /** @defgroup CAN_Exported_Constants CAN Exported Constants
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246 * @{
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247 */
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248
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249 /** @defgroup HAL_CAN_Error_Code HAL CAN Error Code
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250 * @{
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251 */
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252 #define HAL_CAN_ERROR_NONE 0x00 /*!< No error */
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253 #define HAL_CAN_ERROR_EWG 0x01 /*!< EWG error */
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254 #define HAL_CAN_ERROR_EPV 0x02 /*!< EPV error */
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255 #define HAL_CAN_ERROR_BOF 0x04 /*!< BOF error */
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256 #define HAL_CAN_ERROR_STF 0x08 /*!< Stuff error */
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257 #define HAL_CAN_ERROR_FOR 0x10 /*!< Form error */
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258 #define HAL_CAN_ERROR_ACK 0x20 /*!< Acknowledgment error */
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259 #define HAL_CAN_ERROR_BR 0x40 /*!< Bit recessive */
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260 #define HAL_CAN_ERROR_BD 0x80 /*!< LEC dominant */
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261 #define HAL_CAN_ERROR_CRC 0x100 /*!< LEC transfer error */
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262 /**
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263 * @}
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264 */
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265
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266 /** @defgroup CAN_InitStatus CAN InitStatus
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267 * @{
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268 */
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269 #define CAN_INITSTATUS_FAILED ((uint8_t)0x00) /*!< CAN initialization failed */
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270 #define CAN_INITSTATUS_SUCCESS ((uint8_t)0x01) /*!< CAN initialization OK */
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271 /**
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272 * @}
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273 */
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274
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275 /** @defgroup CAN_operating_mode CAN Operating Mode
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276 * @{
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277 */
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278 #define CAN_MODE_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */
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279 #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
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280 #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
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281 #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
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282 /**
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283 * @}
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284 */
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285
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286 /** @defgroup CAN_synchronisation_jump_width CAN Synchronisation Jump Width
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287 * @{
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288 */
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289 #define CAN_SJW_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
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290 #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */
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291 #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */
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292 #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */
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293 /**
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294 * @}
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295 */
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296
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297 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in bit segment 1
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298 * @{
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299 */
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300 #define CAN_BS1_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
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301 #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */
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302 #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */
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303 #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */
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304 #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */
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305 #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */
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306 #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */
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307 #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */
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308 #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */
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309 #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */
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310 #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */
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311 #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */
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312 #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */
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313 #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */
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314 #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */
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315 #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
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316 /**
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317 * @}
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318 */
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319
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320 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in bit segment 2
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321 * @{
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322 */
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323 #define CAN_BS2_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
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324 #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */
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325 #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */
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326 #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */
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327 #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */
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328 #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */
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329 #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */
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330 #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */
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331 /**
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332 * @}
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333 */
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334
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335 /** @defgroup CAN_filter_mode CAN Filter Mode
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336 * @{
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337 */
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338 #define CAN_FILTERMODE_IDMASK ((uint8_t)0x00) /*!< Identifier mask mode */
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339 #define CAN_FILTERMODE_IDLIST ((uint8_t)0x01) /*!< Identifier list mode */
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340 /**
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341 * @}
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342 */
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343
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344 /** @defgroup CAN_filter_scale CAN Filter Scale
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345 * @{
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346 */
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347 #define CAN_FILTERSCALE_16BIT ((uint8_t)0x00) /*!< Two 16-bit filters */
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348 #define CAN_FILTERSCALE_32BIT ((uint8_t)0x01) /*!< One 32-bit filter */
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349 /**
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350 * @}
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351 */
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352
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353 /** @defgroup CAN_filter_FIFO CAN Filter FIFO
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354 * @{
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355 */
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356 #define CAN_FILTER_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */
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357 #define CAN_FILTER_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */
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358 /**
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359 * @}
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360 */
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361
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362 /** @defgroup CAN_Identifier_Type CAN Identifier Type
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363 * @{
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364 */
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365 #define CAN_ID_STD ((uint32_t)0x00000000) /*!< Standard Id */
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366 #define CAN_ID_EXT ((uint32_t)0x00000004) /*!< Extended Id */
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367 /**
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368 * @}
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369 */
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370
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371 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
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372 * @{
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373 */
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374 #define CAN_RTR_DATA ((uint32_t)0x00000000) /*!< Data frame */
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375 #define CAN_RTR_REMOTE ((uint32_t)0x00000002) /*!< Remote frame */
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376 /**
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377 * @}
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378 */
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379
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380 /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number Constants
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381 * @{
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382 */
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383 #define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */
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384 #define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */
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385 /**
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386 * @}
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387 */
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388
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389 /** @defgroup CAN_flags CAN Flags
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390 * @{
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391 */
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392 /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
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393 and CAN_ClearFlag() functions. */
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394 /* If the flag is 0x1XXXXXXX, it means that it can only be used with
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395 CAN_GetFlagStatus() function. */
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396
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397 /* Transmit Flags */
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398 #define CAN_FLAG_RQCP0 ((uint32_t)0x00000500) /*!< Request MailBox0 flag */
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399 #define CAN_FLAG_RQCP1 ((uint32_t)0x00000508) /*!< Request MailBox1 flag */
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400 #define CAN_FLAG_RQCP2 ((uint32_t)0x00000510) /*!< Request MailBox2 flag */
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401 #define CAN_FLAG_TXOK0 ((uint32_t)0x00000501) /*!< Transmission OK MailBox0 flag */
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402 #define CAN_FLAG_TXOK1 ((uint32_t)0x00000509) /*!< Transmission OK MailBox1 flag */
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403 #define CAN_FLAG_TXOK2 ((uint32_t)0x00000511) /*!< Transmission OK MailBox2 flag */
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404 #define CAN_FLAG_TME0 ((uint32_t)0x0000051A) /*!< Transmit mailbox 0 empty flag */
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405 #define CAN_FLAG_TME1 ((uint32_t)0x0000051B) /*!< Transmit mailbox 0 empty flag */
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406 #define CAN_FLAG_TME2 ((uint32_t)0x0000051C) /*!< Transmit mailbox 0 empty flag */
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407
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408 /* Receive Flags */
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409 #define CAN_FLAG_FF0 ((uint32_t)0x00000203) /*!< FIFO 0 Full flag */
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410 #define CAN_FLAG_FOV0 ((uint32_t)0x00000204) /*!< FIFO 0 Overrun flag */
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411
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412 #define CAN_FLAG_FF1 ((uint32_t)0x00000403) /*!< FIFO 1 Full flag */
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413 #define CAN_FLAG_FOV1 ((uint32_t)0x00000404) /*!< FIFO 1 Overrun flag */
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414
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415 /* Operating Mode Flags */
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416 #define CAN_FLAG_WKU ((uint32_t)0x00000103) /*!< Wake up flag */
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417 #define CAN_FLAG_SLAK ((uint32_t)0x00000101) /*!< Sleep acknowledge flag */
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418 #define CAN_FLAG_SLAKI ((uint32_t)0x00000104) /*!< Sleep acknowledge flag */
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419 /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
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420 In this case the SLAK bit can be polled.*/
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421
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422 /* Error Flags */
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423 #define CAN_FLAG_EWG ((uint32_t)0x00000300) /*!< Error warning flag */
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424 #define CAN_FLAG_EPV ((uint32_t)0x00000301) /*!< Error passive flag */
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425 #define CAN_FLAG_BOF ((uint32_t)0x00000302) /*!< Bus-Off flag */
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426 /**
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427 * @}
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428 */
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429
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430 /** @defgroup CAN_Interrupts CAN Interrupts
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431 * @{
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432 */
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433 #define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */
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434
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435 /* Receive Interrupts */
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436 #define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */
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437 #define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */
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438 #define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */
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439 #define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */
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440 #define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */
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441 #define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */
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442
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443 /* Operating Mode Interrupts */
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444 #define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */
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445 #define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */
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446
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447 /* Error Interrupts */
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448 #define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */
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449 #define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */
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450 #define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */
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451 #define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
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452 #define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */
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453 /**
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454 * @}
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455 */
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456
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457 /** @defgroup CAN_Mailboxes_Definition CAN Mailboxes Definition
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458 * @{
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459 */
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460 #define CAN_TXMAILBOX_0 ((uint8_t)0x00)
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461 #define CAN_TXMAILBOX_1 ((uint8_t)0x01)
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462 #define CAN_TXMAILBOX_2 ((uint8_t)0x02)
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463 /**
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464 * @}
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465 */
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466
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467 /**
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468 * @}
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469 */
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470
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471 /* Exported macro ------------------------------------------------------------*/
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472 /** @defgroup CAN_Exported_Macros CAN Exported Macros
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473 * @{
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474 */
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475
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476 /** @brief Reset CAN handle state
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477 * @param __HANDLE__: specifies the CAN Handle.
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478 * @retval None
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479 */
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480 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
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481
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482 /**
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483 * @brief Enable the specified CAN interrupts.
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484 * @param __HANDLE__: CAN handle
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485 * @param __INTERRUPT__: CAN Interrupt
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486 * @retval None
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487 */
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488 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
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489
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490 /**
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491 * @brief Disable the specified CAN interrupts.
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492 * @param __HANDLE__: CAN handle
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493 * @param __INTERRUPT__: CAN Interrupt
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494 * @retval None
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495 */
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496 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
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497
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498 /**
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499 * @brief Return the number of pending received messages.
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500 * @param __HANDLE__: CAN handle
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501 * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
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502 * @retval The number of pending message.
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503 */
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504 #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
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505 ((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03)))
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506
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507 /** @brief Check whether the specified CAN flag is set or not.
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508 * @param __HANDLE__: CAN Handle
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509 * @param __FLAG__: specifies the flag to check.
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510 * This parameter can be one of the following values:
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511 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
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512 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
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513 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
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514 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
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515 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
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516 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
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517 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
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518 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
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519 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
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520 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
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521 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
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522 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
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523 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
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524 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
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|
525 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
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526 * @arg CAN_FLAG_WKU: Wake up Flag
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527 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
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528 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
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529 * @arg CAN_FLAG_EWG: Error Warning Flag
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530 * @arg CAN_FLAG_EPV: Error Passive Flag
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531 * @arg CAN_FLAG_BOF: Bus-Off Flag
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|
532 * @retval The new state of __FLAG__ (TRUE or FALSE).
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|
|
533 */
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|
534 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
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|
|
535 ((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
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536 (((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
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|
537 (((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
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538 (((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
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|
539 ((((__HANDLE__)->Instance->ESR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))))
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|
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540
|
|
|
541 /** @brief Clear the specified CAN pending flag.
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|
542 * @param __HANDLE__: CAN Handle.
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|
543 * @param __FLAG__: specifies the flag to check.
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|
|
544 * This parameter can be one of the following values:
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|
545 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
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|
|
546 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
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|
|
547 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
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|
|
548 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
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|
|
549 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
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|
|
550 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
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|
|
551 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
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|
|
552 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
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|
|
553 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
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|
|
554 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
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|
|
555 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
|
|
|
556 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
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|
|
557 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
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|
|
558 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
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|
|
559 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
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|
|
560 * @arg CAN_FLAG_WKU: Wake up Flag
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|
|
561 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
|
|
|
562 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
|
|
|
563 * @arg CAN_FLAG_EWG: Error Warning Flag
|
|
|
564 * @arg CAN_FLAG_EPV: Error Passive Flag
|
|
|
565 * @arg CAN_FLAG_BOF: Bus-Off Flag
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|
|
566 * @retval The new state of __FLAG__ (TRUE or FALSE).
|
|
|
567 */
|
|
|
568 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
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|
|
569 ((((__FLAG__) >> 8) == 5)? (((__HANDLE__)->Instance->TSR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
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|
|
570 (((__FLAG__) >> 8) == 2)? (((__HANDLE__)->Instance->RF0R) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
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|
|
571 (((__FLAG__) >> 8) == 4)? (((__HANDLE__)->Instance->RF1R) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
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|
|
572 (((__FLAG__) >> 8) == 1)? (((__HANDLE__)->Instance->MSR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
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|
|
573 (((__HANDLE__)->Instance->ESR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))))
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|
|
574
|
|
|
575 /** @brief Check if the specified CAN interrupt source is enabled or disabled.
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|
|
576 * @param __HANDLE__: CAN Handle
|
|
|
577 * @param __INTERRUPT__: specifies the CAN interrupt source to check.
|
|
|
578 * This parameter can be one of the following values:
|
|
|
579 * @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
|
|
|
580 * @arg CAN_IT_FMP0: FIFO0 message pending interrupt enable
|
|
|
581 * @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
|
|
|
582 * @retval The new state of __IT__ (TRUE or FALSE).
|
|
|
583 */
|
|
|
584 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
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|
|
585
|
|
|
586 /**
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|
|
587 * @brief Check the transmission status of a CAN Frame.
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|
|
588 * @param __HANDLE__: CAN Handle
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|
|
589 * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
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|
|
590 * @retval The new status of transmission (TRUE or FALSE).
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|
|
591 */
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|
|
592 #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
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|
|
593 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
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|
|
594 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
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|
|
595 ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
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|
|
596
|
|
|
597 /**
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|
|
598 * @brief Release the specified receive FIFO.
|
|
|
599 * @param __HANDLE__: CAN handle
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|
|
600 * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
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|
|
601 * @retval None
|
|
|
602 */
|
|
|
603 #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
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|
|
604 ((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1))
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|
|
605
|
|
|
606 /**
|
|
|
607 * @brief Cancel a transmit request.
|
|
|
608 * @param __HANDLE__: CAN Handle
|
|
|
609 * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
|
|
|
610 * @retval None
|
|
|
611 */
|
|
|
612 #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
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|
|
613 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\
|
|
|
614 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\
|
|
|
615 ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2))
|
|
|
616
|
|
|
617 /**
|
|
|
618 * @brief Enable or disable the DBG Freeze for CAN.
|
|
|
619 * @param __HANDLE__: CAN Handle
|
|
|
620 * @param __NEWSTATE__: new state of the CAN peripheral.
|
|
|
621 * This parameter can be: ENABLE (CAN reception/transmission is frozen
|
|
|
622 * during debug. Reception FIFOs can still be accessed/controlled normally)
|
|
|
623 * or DISABLE (CAN is working during debug).
|
|
|
624 * @retval None
|
|
|
625 */
|
|
|
626 #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
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|
|
627 ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
|
|
|
628
|
|
|
629 /**
|
|
|
630 * @}
|
|
|
631 */
|
|
|
632
|
|
|
633 /* Exported functions --------------------------------------------------------*/
|
|
|
634 /** @addtogroup CAN_Exported_Functions
|
|
|
635 * @{
|
|
|
636 */
|
|
|
637
|
|
|
638 /** @addtogroup CAN_Exported_Functions_Group1
|
|
|
639 * @{
|
|
|
640 */
|
|
|
641 /* Initialization/de-initialization functions ***********************************/
|
|
|
642 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
|
|
|
643 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
|
|
|
644 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
|
|
|
645 void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
|
|
|
646 void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
|
|
|
647 /**
|
|
|
648 * @}
|
|
|
649 */
|
|
|
650
|
|
|
651 /** @addtogroup CAN_Exported_Functions_Group2
|
|
|
652 * @{
|
|
|
653 */
|
|
|
654 /* I/O operation functions ******************************************************/
|
|
|
655 HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
|
|
|
656 HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
|
|
|
657 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
|
|
|
658 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
|
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659 HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
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660 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
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661 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
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662 void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
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663 void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
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664 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
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665 /**
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666 * @}
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667 */
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668
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669 /** @addtogroup CAN_Exported_Functions_Group3
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670 * @{
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671 */
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672 /* Peripheral State functions ***************************************************/
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673 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
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674 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
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675 /**
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676 * @}
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677 */
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678
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679 /**
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680 * @}
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681 */
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682
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683 /* Private types -------------------------------------------------------------*/
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684 /** @defgroup CAN_Private_Types CAN Private Types
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685 * @{
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686 */
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687
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688 /**
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689 * @}
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690 */
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691
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692 /* Private variables ---------------------------------------------------------*/
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693 /** @defgroup CAN_Private_Variables CAN Private Variables
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694 * @{
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695 */
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696
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697 /**
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698 * @}
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699 */
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700
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701 /* Private constants ---------------------------------------------------------*/
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702 /** @defgroup CAN_Private_Constants CAN Private Constants
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703 * @{
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704 */
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705 #define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
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706 #define CAN_FLAG_MASK ((uint32_t)0x000000FF)
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707 /**
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708 * @}
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709 */
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710
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711 /* Private macros ------------------------------------------------------------*/
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712 /** @defgroup CAN_Private_Macros CAN Private Macros
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713 * @{
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714 */
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715 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
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716 ((MODE) == CAN_MODE_LOOPBACK)|| \
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717 ((MODE) == CAN_MODE_SILENT) || \
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718 ((MODE) == CAN_MODE_SILENT_LOOPBACK))
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719 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
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720 ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
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721 #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
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722 #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
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723 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
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724 #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27)
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725 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
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726 ((MODE) == CAN_FILTERMODE_IDLIST))
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727 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
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728 ((SCALE) == CAN_FILTERSCALE_32BIT))
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729 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
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730 ((FIFO) == CAN_FILTER_FIFO1))
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731 #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28)
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732
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733 #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
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734 #define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF))
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735 #define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF))
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736 #define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08))
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737
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738 #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
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739 ((IDTYPE) == CAN_ID_EXT))
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740 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
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741 #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
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742
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743 /**
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744 * @}
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745 */
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746
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747 /* Private functions ---------------------------------------------------------*/
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748 /** @defgroup CAN_Private_Functions CAN Private Functions
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749 * @{
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750 */
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751
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752 /**
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753 * @}
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754 */
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755
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756 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
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757
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758 /**
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759 * @}
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760 */
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761
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762 /**
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763 * @}
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764 */
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765
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766 #ifdef __cplusplus
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767 }
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768 #endif
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769
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770 #endif /* __STM32F4xx_CAN_H */
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771
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772
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773 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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