annotate Small_CPU/CPU2-RTE.ld @ 619:8fa2de4414a8

Added t3 quick menu for marker synchronisation: By selecting the "Check" optin of the quickmenu available in the T3_Profile view only, the live profile data may be syncronised with the marker data stored in the log profile. The implementation does not mentain a history storage. In case all markes have been checked the next check will cause the live data to be shown. another check will then map the profile again to the first marker. To support this functionality menu infra structures have been added to the menu handling functions.
author Ideenmodellierer
date Wed, 27 Jan 2021 22:10:11 +0100 (2021-01-27)
parents aa286a4926c2
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1 /* ---------------------------------------------------------------------------- */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2 /* Em::Blocks embedded development Support */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
3 /* ---------------------------------------------------------------------------- */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
4 /* Copyright (c) 2014, EmBlocks */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
5 /* */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
6 /* All rights reserved. */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
7 /* */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
8 /* Redistribution and use in source and binary forms, with or without */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
9 /* modification, are permitted provided that the following condition is met: */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
10 /* */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
11 /* - Redistributions of source code must retain the above copyright notice, */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
12 /* this list of conditions and the disclaimer below. */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
13 /* */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
14 /* EmBlocks's name may not be used to endorse or promote products derived from */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
15 /* this software without specific prior written permission. */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
16 /* */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
17 /* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY EBLOCKS "AS IS" AND ANY EXPRESS OR */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
18 /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
19 /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
20 /* DISCLAIMED. IN NO EVENT SHALL EMBLOCKS BE LIABLE FOR ANY DIRECT, INDIRECT, */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
21 /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
22 /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
23 /* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
24 /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
25 /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
26 /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
27 /* ---------------------------------------------------------------------------- */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
28
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
29 /*------------------------------------------------------------------------------
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
30 * Linker script for running in internal FLASH on the STM32F401RE
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
31 *----------------------------------------------------------------------------*/
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
32
54
321df89d5710 Added missing ENTRY point
Ideenmodellierer
parents: 40
diff changeset
33 /* Entry Point */
321df89d5710 Added missing ENTRY point
Ideenmodellierer
parents: 40
diff changeset
34 ENTRY(Reset_Handler)
321df89d5710 Added missing ENTRY point
Ideenmodellierer
parents: 40
diff changeset
35
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
36 OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
37 OUTPUT_ARCH(arm)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
38 SEARCH_DIR(.)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
39
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
40 /* Memory Spaces Definitions */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
41 MEMORY
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
42 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
43 ROM (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* 80000 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
44 RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 96K
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
45 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
46 /* Linker script to place sections and symbol values. Should be used together
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
47 * with other linker script that defines memory regions FLASH and RAM.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
48 * It references following symbols, which must be defined in code:
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
49 * Reset_Handler : Entry of reset handler
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
50 *
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
51 * It defines following symbols, which code can use without definition:
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
52 * __exidx_start
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
53 * __exidx_end
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
54 * __etext
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
55 * __data_start__
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
56 * __preinit_array_start
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
57 * __preinit_array_end
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
58 * __init_array_start
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
59 * __init_array_end
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
60 * __fini_array_start
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
61 * __fini_array_end
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
62 * __data_end__
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
63 * __bss_start__
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
64 * __bss_end__
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
65 * __end__
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
66 * end
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
67 * __HeapLimit
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
68 * __StackLimit
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
69 * __StackTop
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
70 * __stack
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
71 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
72
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
73
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
74 SECTIONS
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
75 {
40
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
76 .isr_vector 0x08000000 :
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
77 {
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
78 . = ALIGN(4);
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
79 KEEP( *(.isr_vector) )
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
80 KEEP(*(.init))
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
81 KEEP(*(.fini))
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
82 } >ROM
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
83
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
84 /* Place FirmwareData at absolute address */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
85 .firmware_data 0x08005000:
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
86 {
40
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
87 cpu2_FirmwareData = 0;
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
88 KEEP( *(.firmware_data) )
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
89 } > ROM
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
90
40
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
91 .text 0x08005100 :
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
92 {
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
93 . = ALIGN(4);
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
94 *(.text) /* .text sections (code) */
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
95 *(.text*)
40
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
96 *(.eh_frame*)
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
97 . = ALIGN(4);
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
98
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
99 } > ROM
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
100
40
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
101 /********************** Constant data into ROM memory *********************/
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
102 .rodata :
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
103 {
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
104 . = ALIGN(4);
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
105 *(.rodata) /* .rodata sections (constants, strings, etc.) */
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
106 *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
107 . = ALIGN(4);
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
108 } >ROM
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
109
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
110 .ARM.extab :
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
111 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
112 *(.ARM.extab* .gnu.linkonce.armextab.*)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
113 } > ROM
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
114
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
115 __exidx_start = .;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
116 .ARM.exidx :
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
117 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
118 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
119 } > ROM
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
120 __exidx_end = .;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
121
40
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
122 .preinit_array :
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
123 {
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
124 . = ALIGN(4);
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
125 PROVIDE_HIDDEN( __preinit_array_start = . );
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
126 KEEP( *(.preinit_array*) )
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
127 PROVIDE_HIDDEN( __preinit_array_end = . );
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
128 . = ALIGN(4);
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
129 } >ROM
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
130
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
131 .init_array :
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
132 {
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
133 . = ALIGN(4);
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
134 PROVIDE_HIDDEN( __init_array_start = . );
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
135 KEEP( *(SORT(.init_array.*)) )
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
136 KEEP( *(.init_array*) )
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
137 PROVIDE_HIDDEN( __init_array_end = . );
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
138 . = ALIGN(4);
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
139 } >ROM
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
140
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
141 .fini_array :
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
142 {
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
143 . = ALIGN(4);
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
144 PROVIDE_HIDDEN( __fini_array_start = . );
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
145 KEEP( *(SORT(.fini_array.*)) )
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
146 KEEP( *(.fini_array*) )
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
147 PROVIDE_HIDDEN( __fini_array_end = . );
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
148 . = ALIGN(4);
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
149
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
150 __etext = .; /* define a global symbols at end of code */
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
151 } >ROM
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
152
40
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
153 /* Used by the startup to initialize data */
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
154 _sidata = LOADADDR(.data);
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
155
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
156 .data :
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
157 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
158 . = ALIGN(4);
40
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
159 __data_start__ = .;
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
160 _sdata = .; /* create a global symbol at data start */
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
161 *(.data) /* .data sections */
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
162 *(.data*)
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
163 *(vtable)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
164 . = ALIGN(4);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
165 /* All data end */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
166 __data_end__ = .;
40
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
167 } >RAM AT>ROM
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
168
40
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
169 .bss :
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
170 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
171 __bss_start__ = .;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
172 *(.bss*)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
173 *(COMMON)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
174 __bss_end__ = .;
40
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
175 } >RAM
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
176
40
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
177 .heap :
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
178 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
179 __end__ = .;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
180 end = __end__;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
181 *(.heap*)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
182 __HeapLimit = .;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
183 } > RAM
433
aa286a4926c2 Detect startup after power off:
ideenmodellierer
parents: 54
diff changeset
184
aa286a4926c2 Detect startup after power off:
ideenmodellierer
parents: 54
diff changeset
185 /* .noinit section contains data which will not be change during startup */
aa286a4926c2 Detect startup after power off:
ideenmodellierer
parents: 54
diff changeset
186 .noinit :
aa286a4926c2 Detect startup after power off:
ideenmodellierer
parents: 54
diff changeset
187 {
aa286a4926c2 Detect startup after power off:
ideenmodellierer
parents: 54
diff changeset
188 . = ALIGN(4);
aa286a4926c2 Detect startup after power off:
ideenmodellierer
parents: 54
diff changeset
189 *(.noinit*)
aa286a4926c2 Detect startup after power off:
ideenmodellierer
parents: 54
diff changeset
190 _end = . ;
aa286a4926c2 Detect startup after power off:
ideenmodellierer
parents: 54
diff changeset
191 } > RAM
aa286a4926c2 Detect startup after power off:
ideenmodellierer
parents: 54
diff changeset
192
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
193 /* .stack_dummy section doesn't contains any symbols. It is only
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
194 * used for linker to calculate size of stack sections, and assign
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
195 * values to stack symbols later */
40
da86a7adc4fa Aligned structure with CPU1 linker file
Ideenmodellierer
parents: 38
diff changeset
196 .stack_dummy :
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
197 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
198 *(.stack)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
199 } > RAM
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
200
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
201 /* Set stack top to end of RAM, and stack limit move down by
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
202 * size of stack_dummy section */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
203 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
204 __StackLimit = __StackTop - SIZEOF(.stack_dummy);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
205 PROVIDE(__stack = __StackTop);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
206
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
207 /* Check if data + heap + stack exceeds RAM limit */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
208 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
209 }