annotate Small_CPU/CPU2-RTE.ld @ 51:8f8ea3a32e82

Resolved warnings pointing to possible invalid memory access
author Ideenmodellierer
date Tue, 31 Jul 2018 22:28:21 +0200
parents da86a7adc4fa
children 321df89d5710
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1 /* ---------------------------------------------------------------------------- */
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2 /* Em::Blocks embedded development Support */
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3 /* ---------------------------------------------------------------------------- */
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4 /* Copyright (c) 2014, EmBlocks */
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5 /* */
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6 /* All rights reserved. */
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7 /* */
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8 /* Redistribution and use in source and binary forms, with or without */
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9 /* modification, are permitted provided that the following condition is met: */
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10 /* */
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11 /* - Redistributions of source code must retain the above copyright notice, */
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12 /* this list of conditions and the disclaimer below. */
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13 /* */
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14 /* EmBlocks's name may not be used to endorse or promote products derived from */
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15 /* this software without specific prior written permission. */
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16 /* */
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17 /* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY EBLOCKS "AS IS" AND ANY EXPRESS OR */
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18 /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
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19 /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
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20 /* DISCLAIMED. IN NO EVENT SHALL EMBLOCKS BE LIABLE FOR ANY DIRECT, INDIRECT, */
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21 /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
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22 /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
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23 /* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
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24 /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
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25 /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
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26 /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
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27 /* ---------------------------------------------------------------------------- */
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28
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29 /*------------------------------------------------------------------------------
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30 * Linker script for running in internal FLASH on the STM32F401RE
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31 *----------------------------------------------------------------------------*/
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32
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33 OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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34 OUTPUT_ARCH(arm)
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35 SEARCH_DIR(.)
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36
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37 /* Memory Spaces Definitions */
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38 MEMORY
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39 {
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40 ROM (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* 80000 */
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41 RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 96K
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42 }
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43 /* Linker script to place sections and symbol values. Should be used together
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44 * with other linker script that defines memory regions FLASH and RAM.
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45 * It references following symbols, which must be defined in code:
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46 * Reset_Handler : Entry of reset handler
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47 *
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48 * It defines following symbols, which code can use without definition:
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49 * __exidx_start
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50 * __exidx_end
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51 * __etext
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52 * __data_start__
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53 * __preinit_array_start
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54 * __preinit_array_end
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55 * __init_array_start
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56 * __init_array_end
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57 * __fini_array_start
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58 * __fini_array_end
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59 * __data_end__
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60 * __bss_start__
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61 * __bss_end__
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62 * __end__
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63 * end
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64 * __HeapLimit
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65 * __StackLimit
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66 * __StackTop
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67 * __stack
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68 */
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69
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70
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71 SECTIONS
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72 {
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73 .isr_vector 0x08000000 :
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74 {
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75 . = ALIGN(4);
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76 KEEP( *(.isr_vector) )
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77 KEEP(*(.init))
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78 KEEP(*(.fini))
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79 } >ROM
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80
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81 /* Place FirmwareData at absolute address */
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82 .firmware_data 0x08005000:
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83 {
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84 cpu2_FirmwareData = 0;
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85 KEEP( *(.firmware_data) )
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86 } > ROM
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87
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88 .text 0x08005100 :
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89 {
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90 . = ALIGN(4);
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91 *(.text) /* .text sections (code) */
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92 *(.text*)
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93 *(.eh_frame*)
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94 . = ALIGN(4);
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95
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96 } > ROM
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97
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98 /********************** Constant data into ROM memory *********************/
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99 .rodata :
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100 {
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101 . = ALIGN(4);
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102 *(.rodata) /* .rodata sections (constants, strings, etc.) */
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103 *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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104 . = ALIGN(4);
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105 } >ROM
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106
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107 .ARM.extab :
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108 {
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109 *(.ARM.extab* .gnu.linkonce.armextab.*)
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110 } > ROM
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111
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112 __exidx_start = .;
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113 .ARM.exidx :
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114 {
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115 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
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116 } > ROM
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117 __exidx_end = .;
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118
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119 .preinit_array :
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120 {
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121 . = ALIGN(4);
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122 PROVIDE_HIDDEN( __preinit_array_start = . );
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123 KEEP( *(.preinit_array*) )
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124 PROVIDE_HIDDEN( __preinit_array_end = . );
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125 . = ALIGN(4);
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126 } >ROM
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127
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128 .init_array :
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129 {
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130 . = ALIGN(4);
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131 PROVIDE_HIDDEN( __init_array_start = . );
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132 KEEP( *(SORT(.init_array.*)) )
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133 KEEP( *(.init_array*) )
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134 PROVIDE_HIDDEN( __init_array_end = . );
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135 . = ALIGN(4);
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136 } >ROM
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137
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138 .fini_array :
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139 {
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140 . = ALIGN(4);
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141 PROVIDE_HIDDEN( __fini_array_start = . );
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142 KEEP( *(SORT(.fini_array.*)) )
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143 KEEP( *(.fini_array*) )
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144 PROVIDE_HIDDEN( __fini_array_end = . );
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145 . = ALIGN(4);
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146
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147 __etext = .; /* define a global symbols at end of code */
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148 } >ROM
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149
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150 /* Used by the startup to initialize data */
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151 _sidata = LOADADDR(.data);
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152
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153 .data :
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154 {
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155 . = ALIGN(4);
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156 __data_start__ = .;
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157 _sdata = .; /* create a global symbol at data start */
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158 *(.data) /* .data sections */
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159 *(.data*)
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160 *(vtable)
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161 . = ALIGN(4);
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162 /* All data end */
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163 __data_end__ = .;
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164 } >RAM AT>ROM
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165
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166 .bss :
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167 {
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168 __bss_start__ = .;
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169 *(.bss*)
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170 *(COMMON)
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171 __bss_end__ = .;
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172 } >RAM
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173
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174 .heap :
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175 {
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176 __end__ = .;
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177 end = __end__;
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178 *(.heap*)
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179 __HeapLimit = .;
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180 } > RAM
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181
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182 /* .stack_dummy section doesn't contains any symbols. It is only
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183 * used for linker to calculate size of stack sections, and assign
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184 * values to stack symbols later */
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da86a7adc4fa Aligned structure with CPU1 linker file
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185 .stack_dummy :
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186 {
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187 *(.stack)
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188 } > RAM
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189
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190 /* Set stack top to end of RAM, and stack limit move down by
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191 * size of stack_dummy section */
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192 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
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193 __StackLimit = __StackTop - SIZEOF(.stack_dummy);
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194 PROVIDE(__stack = __StackTop);
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195
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196 /* Check if data + heap + stack exceeds RAM limit */
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197 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
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198 }