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annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dac.h @ 726:8f3a8c85a6c4

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Bugfix data synchronization after RTE start: In previous version invalid data may be transferred in case the communication is corrupted directly after RTE startup. Root cause was that the data was evaluated without caring if a communication error was reported. In the new version the startup condition and evaluation of data is only done if valid data has been received by the RTE => SPI communication is up and runnig.
author Ideenmodellierer
date Sat, 14 Jan 2023 20:35:40 +0100
parents c78bcbd5deda
children
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128
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_dac.h
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4 * @author MCD Application Team
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5 * @brief Header file of DAC HAL module.
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6 ******************************************************************************
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7 * @attention
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8 *
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9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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10 *
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11 * Redistribution and use in source and binary forms, with or without modification,
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12 * are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright notice,
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16 * this list of conditions and the following disclaimer in the documentation
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17 * and/or other materials provided with the distribution.
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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19 * may be used to endorse or promote products derived from this software
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20 * without specific prior written permission.
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21 *
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 *
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33 ******************************************************************************
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34 */
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35
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36 /* Define to prevent recursive inclusion -------------------------------------*/
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37 #ifndef __STM32F4xx_HAL_DAC_H
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38 #define __STM32F4xx_HAL_DAC_H
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39
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40 #ifdef __cplusplus
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41 extern "C" {
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42 #endif
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43
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44 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
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45 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
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46 defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) ||\
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47 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || defined(STM32F423xx)
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48
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49 /* Includes ------------------------------------------------------------------*/
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50 #include "stm32f4xx_hal_def.h"
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51
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52 /** @addtogroup STM32F4xx_HAL_Driver
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53 * @{
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54 */
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55
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56 /** @addtogroup DAC
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57 * @{
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58 */
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59
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60 /* Exported types ------------------------------------------------------------*/
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61 /** @defgroup DAC_Exported_Types DAC Exported Types
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62 * @{
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63 */
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64
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65 /**
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66 * @brief HAL State structures definition
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67 */
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68 typedef enum
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69 {
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70 HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */
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71 HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */
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72 HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */
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73 HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */
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74 HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */
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75 }HAL_DAC_StateTypeDef;
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76
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77 /**
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78 * @brief DAC handle Structure definition
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79 */
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80 typedef struct
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81 {
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82 DAC_TypeDef *Instance; /*!< Register base address */
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83
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84 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
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85
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86 HAL_LockTypeDef Lock; /*!< DAC locking object */
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87
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88 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
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89
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90 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
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91
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92 __IO uint32_t ErrorCode; /*!< DAC Error code */
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93
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94 }DAC_HandleTypeDef;
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95
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96 /**
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97 * @brief DAC Configuration regular Channel structure definition
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98 */
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99 typedef struct
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100 {
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101 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
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102 This parameter can be a value of @ref DAC_trigger_selection */
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103
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104 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
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105 This parameter can be a value of @ref DAC_output_buffer */
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106 }DAC_ChannelConfTypeDef;
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107 /**
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108 * @}
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109 */
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110
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111 /* Exported constants --------------------------------------------------------*/
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112 /** @defgroup DAC_Exported_Constants DAC Exported Constants
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113 * @{
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114 */
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115
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116 /** @defgroup DAC_Error_Code DAC Error Code
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117 * @{
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118 */
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119 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */
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120 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DAM underrun error */
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121 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DAM underrun error */
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122 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */
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123 /**
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124 * @}
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125 */
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126
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127 /** @defgroup DAC_trigger_selection DAC Trigger Selection
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128 * @{
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129 */
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130
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131 #define DAC_TRIGGER_NONE 0x00000000U /*!< Conversion is automatic once the DAC1_DHRxxxx register
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132 has been loaded, and not by external trigger */
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133 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
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134 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
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135 #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
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136 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
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137 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
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138 #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
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139
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140 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
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141 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
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142 /**
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143 * @}
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144 */
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145
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146 /** @defgroup DAC_output_buffer DAC Output Buffer
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147 * @{
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148 */
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149 #define DAC_OUTPUTBUFFER_ENABLE 0x00000000U
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150 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1)
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151 /**
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152 * @}
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153 */
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154
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155 /** @defgroup DAC_Channel_selection DAC Channel Selection
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156 * @{
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157 */
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158 #define DAC_CHANNEL_1 0x00000000U
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159 #define DAC_CHANNEL_2 0x00000010U
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160 /**
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161 * @}
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162 */
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163
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164 /** @defgroup DAC_data_alignment DAC Data Alignment
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165 * @{
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166 */
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167 #define DAC_ALIGN_12B_R 0x00000000U
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168 #define DAC_ALIGN_12B_L 0x00000004U
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169 #define DAC_ALIGN_8B_R 0x00000008U
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170 /**
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171 * @}
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172 */
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173
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174 /** @defgroup DAC_flags_definition DAC Flags Definition
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175 * @{
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176 */
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177 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
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178 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
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179 /**
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180 * @}
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181 */
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182
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183 /** @defgroup DAC_IT_definition DAC IT Definition
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184 * @{
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185 */
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186 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
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187 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
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188 /**
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189 * @}
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190 */
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191
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192 /**
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193 * @}
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194 */
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195
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196 /* Exported macro ------------------------------------------------------------*/
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197 /** @defgroup DAC_Exported_Macros DAC Exported Macros
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198 * @{
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199 */
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200
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201 /** @brief Reset DAC handle state
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202 * @param __HANDLE__ specifies the DAC handle.
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203 * @retval None
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204 */
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205 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
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206
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207 /** @brief Enable the DAC channel
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208 * @param __HANDLE__ specifies the DAC handle.
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209 * @param __DAC_Channel__ specifies the DAC channel
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210 * @retval None
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211 */
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212 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__)))
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213
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214 /** @brief Disable the DAC channel
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215 * @param __HANDLE__ specifies the DAC handle
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216 * @param __DAC_Channel__ specifies the DAC channel.
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217 * @retval None
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218 */
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219 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__)))
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220
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221 /** @brief Enable the DAC interrupt
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222 * @param __HANDLE__ specifies the DAC handle
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223 * @param __INTERRUPT__ specifies the DAC interrupt.
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224 * @retval None
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225 */
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226 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
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227
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228 /** @brief Disable the DAC interrupt
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229 * @param __HANDLE__ specifies the DAC handle
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230 * @param __INTERRUPT__ specifies the DAC interrupt.
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231 * @retval None
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232 */
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233 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
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234
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235 /** @brief Checks if the specified DAC interrupt source is enabled or disabled.
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236 * @param __HANDLE__ DAC handle
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237 * @param __INTERRUPT__ DAC interrupt source to check
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238 * This parameter can be any combination of the following values:
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239 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
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240 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
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241 * @retval State of interruption (SET or RESET)
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242 */
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243 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
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244
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245 /** @brief Get the selected DAC's flag status.
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246 * @param __HANDLE__ specifies the DAC handle.
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247 * @param __FLAG__ specifies the flag to clear.
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248 * This parameter can be any combination of the following values:
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249 * @arg DAC_FLAG_DMAUDR1: DMA underrun 1 flag
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250 * @arg DAC_FLAG_DMAUDR2: DMA underrun 2 flag
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251 * @retval None
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252 */
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253 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
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254
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255 /** @brief Clear the DAC's flag.
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256 * @param __HANDLE__ specifies the DAC handle.
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257 * @param __FLAG__ specifies the flag to clear.
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258 * This parameter can be any combination of the following values:
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259 * @arg DAC_FLAG_DMAUDR1: DMA underrun 1 flag
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260 * @arg DAC_FLAG_DMAUDR2: DMA underrun 2 flag
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261 * @retval None
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262 */
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263 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
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264 /**
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265 * @}
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266 */
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267
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268 /* Include DAC HAL Extension module */
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269 #include "stm32f4xx_hal_dac_ex.h"
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270
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271 /* Exported functions --------------------------------------------------------*/
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272 /** @addtogroup DAC_Exported_Functions
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273 * @{
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274 */
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275
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276 /** @addtogroup DAC_Exported_Functions_Group1
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277 * @{
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278 */
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279 /* Initialization/de-initialization functions *********************************/
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280 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
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281 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
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282 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
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283 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
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284 /**
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285 * @}
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286 */
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287
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288 /** @addtogroup DAC_Exported_Functions_Group2
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289 * @{
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290 */
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291 /* I/O operation functions ****************************************************/
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292 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
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293 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
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294 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
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295 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
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296 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
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297 /**
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298 * @}
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299 */
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300
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301 /** @addtogroup DAC_Exported_Functions_Group3
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302 * @{
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303 */
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304 /* Peripheral Control functions ***********************************************/
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305 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
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306 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
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307 /**
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308 * @}
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309 */
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310
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311 /** @addtogroup DAC_Exported_Functions_Group4
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312 * @{
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313 */
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314 /* Peripheral State functions *************************************************/
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315 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
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316 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
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317 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
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318
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319 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
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320 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
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321 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
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322 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
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323 /**
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324 * @}
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325 */
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326
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327 /**
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328 * @}
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329 */
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330 /* Private types -------------------------------------------------------------*/
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331 /* Private variables ---------------------------------------------------------*/
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332 /* Private constants ---------------------------------------------------------*/
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333 /** @defgroup DAC_Private_Constants DAC Private Constants
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334 * @{
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335 */
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336
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337 /**
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338 * @}
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339 */
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340
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341 /* Private macros ------------------------------------------------------------*/
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342 /** @defgroup DAC_Private_Macros DAC Private Macros
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343 * @{
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344 */
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345 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U)
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346 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
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347 ((ALIGN) == DAC_ALIGN_12B_L) || \
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348 ((ALIGN) == DAC_ALIGN_8B_R))
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349 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
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350 ((CHANNEL) == DAC_CHANNEL_2))
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351 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
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352 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
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353
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354 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
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355 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
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356 ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \
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357 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
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358 ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \
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359 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
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360 ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
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361 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
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362 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
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363
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364 /** @brief Set DHR12R1 alignment
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365 * @param __ALIGNMENT__ specifies the DAC alignment
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366 * @retval None
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367 */
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368 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008U + (__ALIGNMENT__))
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369
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370 /** @brief Set DHR12R2 alignment
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371 * @param __ALIGNMENT__ specifies the DAC alignment
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372 * @retval None
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373 */
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374 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014U) + (__ALIGNMENT__))
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375
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376 /** @brief Set DHR12RD alignment
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377 * @param __ALIGNMENT__ specifies the DAC alignment
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378 * @retval None
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379 */
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380 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020U + (__ALIGNMENT__))
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381
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382 /**
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383 * @}
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384 */
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385
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386 /* Private functions ---------------------------------------------------------*/
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387 /** @defgroup DAC_Private_Functions DAC Private Functions
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388 * @{
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389 */
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390 /**
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391 * @}
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392 */
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393 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
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394 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
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395 STM32F410xx || STM32F446xx || STM32F469xx || STM32F479xx ||\
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396 STM32F413xx || STM32F423xx */
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397
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398 /**
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399 * @}
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400 */
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401
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402 /**
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403 * @}
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404 */
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405
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406 #ifdef __cplusplus
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407 }
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408 #endif
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409
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410 #endif /*__STM32F4xx_HAL_DAC_H */
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411
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412 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/