annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_tim.c @ 926:875933272056 Evo_2_23

Bugfix sensor de-/activation handling: In the previous version a CO2 sensor could cause a not used analog channel to be displayed. Rootcause was that all sensor type, not only o2 sensors, were used for o2 sensor deactivation evaluation. The deactivation state is the criteria if a value is displayed or not. In the new version only o2 sensor type are used for handling of sensor de-/activation state. In addition the cursor will now be set to the first valid sensor entry in case sensor slot 0 is empty.
author Ideenmodellierer
date Thu, 14 Nov 2024 20:13:18 +0100
parents c78bcbd5deda
children
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_ll_tim.c
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4 * @author MCD Application Team
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5 * @brief TIM LL module driver.
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6 ******************************************************************************
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7 * @attention
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8 *
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9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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10 *
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11 * Redistribution and use in source and binary forms, with or without modification,
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12 * are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright notice,
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16 * this list of conditions and the following disclaimer in the documentation
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17 * and/or other materials provided with the distribution.
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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19 * may be used to endorse or promote products derived from this software
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20 * without specific prior written permission.
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21 *
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 *
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33 ******************************************************************************
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34 */
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35 #if defined(USE_FULL_LL_DRIVER)
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36
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37 /* Includes ------------------------------------------------------------------*/
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38 #include "stm32f4xx_ll_tim.h"
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39 #include "stm32f4xx_ll_bus.h"
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40
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41 #ifdef USE_FULL_ASSERT
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42 #include "stm32_assert.h"
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43 #else
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44 #define assert_param(expr) ((void)0U)
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45 #endif
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46
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47 /** @addtogroup STM32F4xx_LL_Driver
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48 * @{
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49 */
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50
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51 #if defined (TIM1) || defined (TIM2) || defined (TIM3) || defined (TIM4) || defined (TIM5) || defined (TIM6) || defined (TIM7) || defined (TIM8) || defined (TIM9) || defined (TIM10) || defined (TIM11) || defined (TIM12) || defined (TIM13) || defined (TIM14)
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52
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53 /** @addtogroup TIM_LL
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54 * @{
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55 */
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56
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57 /* Private types -------------------------------------------------------------*/
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58 /* Private variables ---------------------------------------------------------*/
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59 /* Private constants ---------------------------------------------------------*/
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60 /* Private macros ------------------------------------------------------------*/
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61 /** @addtogroup TIM_LL_Private_Macros
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62 * @{
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63 */
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64 #define IS_LL_TIM_COUNTERMODE(__VALUE__) (((__VALUE__) == LL_TIM_COUNTERMODE_UP) \
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65 || ((__VALUE__) == LL_TIM_COUNTERMODE_DOWN) \
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66 || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP) \
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67 || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_DOWN) \
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68 || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP_DOWN))
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69
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70 #define IS_LL_TIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV1) \
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71 || ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV2) \
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72 || ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV4))
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73
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74 #define IS_LL_TIM_OCMODE(__VALUE__) (((__VALUE__) == LL_TIM_OCMODE_FROZEN) \
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75 || ((__VALUE__) == LL_TIM_OCMODE_ACTIVE) \
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76 || ((__VALUE__) == LL_TIM_OCMODE_INACTIVE) \
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77 || ((__VALUE__) == LL_TIM_OCMODE_TOGGLE) \
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78 || ((__VALUE__) == LL_TIM_OCMODE_FORCED_INACTIVE) \
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79 || ((__VALUE__) == LL_TIM_OCMODE_FORCED_ACTIVE) \
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80 || ((__VALUE__) == LL_TIM_OCMODE_PWM1) \
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81 || ((__VALUE__) == LL_TIM_OCMODE_PWM2))
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82
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83 #define IS_LL_TIM_OCSTATE(__VALUE__) (((__VALUE__) == LL_TIM_OCSTATE_DISABLE) \
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84 || ((__VALUE__) == LL_TIM_OCSTATE_ENABLE))
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85
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86 #define IS_LL_TIM_OCPOLARITY(__VALUE__) (((__VALUE__) == LL_TIM_OCPOLARITY_HIGH) \
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87 || ((__VALUE__) == LL_TIM_OCPOLARITY_LOW))
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88
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89 #define IS_LL_TIM_OCIDLESTATE(__VALUE__) (((__VALUE__) == LL_TIM_OCIDLESTATE_LOW) \
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90 || ((__VALUE__) == LL_TIM_OCIDLESTATE_HIGH))
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91
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92 #define IS_LL_TIM_ACTIVEINPUT(__VALUE__) (((__VALUE__) == LL_TIM_ACTIVEINPUT_DIRECTTI) \
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93 || ((__VALUE__) == LL_TIM_ACTIVEINPUT_INDIRECTTI) \
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94 || ((__VALUE__) == LL_TIM_ACTIVEINPUT_TRC))
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95
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96 #define IS_LL_TIM_ICPSC(__VALUE__) (((__VALUE__) == LL_TIM_ICPSC_DIV1) \
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97 || ((__VALUE__) == LL_TIM_ICPSC_DIV2) \
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98 || ((__VALUE__) == LL_TIM_ICPSC_DIV4) \
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99 || ((__VALUE__) == LL_TIM_ICPSC_DIV8))
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100
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101 #define IS_LL_TIM_IC_FILTER(__VALUE__) (((__VALUE__) == LL_TIM_IC_FILTER_FDIV1) \
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102 || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N2) \
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103 || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N4) \
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104 || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N8) \
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105 || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N6) \
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106 || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N8) \
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107 || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N6) \
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108 || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N8) \
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109 || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N6) \
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110 || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N8) \
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111 || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N5) \
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112 || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N6) \
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113 || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N8) \
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114 || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N5) \
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115 || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N6) \
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116 || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N8))
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117
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118 #define IS_LL_TIM_IC_POLARITY(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \
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119 || ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING) \
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120 || ((__VALUE__) == LL_TIM_IC_POLARITY_BOTHEDGE))
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121
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122 #define IS_LL_TIM_ENCODERMODE(__VALUE__) (((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI1) \
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123 || ((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI2) \
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124 || ((__VALUE__) == LL_TIM_ENCODERMODE_X4_TI12))
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125
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126 #define IS_LL_TIM_IC_POLARITY_ENCODER(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \
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127 || ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING))
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128
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129 #define IS_LL_TIM_OSSR_STATE(__VALUE__) (((__VALUE__) == LL_TIM_OSSR_DISABLE) \
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130 || ((__VALUE__) == LL_TIM_OSSR_ENABLE))
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131
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132 #define IS_LL_TIM_OSSI_STATE(__VALUE__) (((__VALUE__) == LL_TIM_OSSI_DISABLE) \
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133 || ((__VALUE__) == LL_TIM_OSSI_ENABLE))
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134
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135 #define IS_LL_TIM_LOCK_LEVEL(__VALUE__) (((__VALUE__) == LL_TIM_LOCKLEVEL_OFF) \
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136 || ((__VALUE__) == LL_TIM_LOCKLEVEL_1) \
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137 || ((__VALUE__) == LL_TIM_LOCKLEVEL_2) \
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138 || ((__VALUE__) == LL_TIM_LOCKLEVEL_3))
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139
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140 #define IS_LL_TIM_BREAK_STATE(__VALUE__) (((__VALUE__) == LL_TIM_BREAK_DISABLE) \
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141 || ((__VALUE__) == LL_TIM_BREAK_ENABLE))
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142
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143 #define IS_LL_TIM_BREAK_POLARITY(__VALUE__) (((__VALUE__) == LL_TIM_BREAK_POLARITY_LOW) \
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144 || ((__VALUE__) == LL_TIM_BREAK_POLARITY_HIGH))
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145
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146 #define IS_LL_TIM_AUTOMATIC_OUTPUT_STATE(__VALUE__) (((__VALUE__) == LL_TIM_AUTOMATICOUTPUT_DISABLE) \
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147 || ((__VALUE__) == LL_TIM_AUTOMATICOUTPUT_ENABLE))
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148 /**
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149 * @}
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150 */
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151
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152
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153 /* Private function prototypes -----------------------------------------------*/
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154 /** @defgroup TIM_LL_Private_Functions TIM Private Functions
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155 * @{
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156 */
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157 static ErrorStatus OC1Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
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158 static ErrorStatus OC2Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
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159 static ErrorStatus OC3Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
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160 static ErrorStatus OC4Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
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161 static ErrorStatus IC1Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
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162 static ErrorStatus IC2Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
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163 static ErrorStatus IC3Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
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164 static ErrorStatus IC4Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
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165 /**
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166 * @}
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167 */
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168
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169 /* Exported functions --------------------------------------------------------*/
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170 /** @addtogroup TIM_LL_Exported_Functions
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171 * @{
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172 */
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173
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174 /** @addtogroup TIM_LL_EF_Init
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175 * @{
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176 */
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177
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178 /**
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179 * @brief Set TIMx registers to their reset values.
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180 * @param TIMx Timer instance
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181 * @retval An ErrorStatus enumeration value:
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182 * - SUCCESS: TIMx registers are de-initialized
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183 * - ERROR: invalid TIMx instance
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184 */
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185 ErrorStatus LL_TIM_DeInit(TIM_TypeDef *TIMx)
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186 {
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187 ErrorStatus result = SUCCESS;
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188
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189 /* Check the parameters */
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190 assert_param(IS_TIM_INSTANCE(TIMx));
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191
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192 if (TIMx == TIM1)
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193 {
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194 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM1);
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195 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM1);
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196 }
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197 #if defined(TIM2)
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198 else if (TIMx == TIM2)
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199 {
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200 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM2);
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201 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM2);
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202 }
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203 #endif
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204 #if defined(TIM3)
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205 else if (TIMx == TIM3)
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206 {
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207 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM3);
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208 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM3);
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209 }
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210 #endif
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211 #if defined(TIM4)
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212 else if (TIMx == TIM4)
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213 {
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214 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM4);
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215 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM4);
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216 }
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217 #endif
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218 #if defined(TIM5)
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219 else if (TIMx == TIM5)
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220 {
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221 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM5);
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222 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM5);
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223 }
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224 #endif
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225 #if defined(TIM6)
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226 else if (TIMx == TIM6)
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227 {
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228 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM6);
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229 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM6);
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230 }
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231 #endif
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232 #if defined (TIM7)
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233 else if (TIMx == TIM7)
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234 {
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235 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM7);
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236 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM7);
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237 }
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238 #endif
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239 #if defined(TIM8)
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240 else if (TIMx == TIM8)
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241 {
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242 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM8);
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243 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM8);
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244 }
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245 #endif
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246 #if defined(TIM9)
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247 else if (TIMx == TIM9)
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248 {
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249 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM9);
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250 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM9);
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251 }
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252 #endif
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253 #if defined(TIM10)
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254 else if (TIMx == TIM10)
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255 {
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256 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM10);
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257 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM10);
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258 }
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259 #endif
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260 #if defined(TIM11)
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261 else if (TIMx == TIM11)
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262 {
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263 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM11);
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264 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM11);
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265 }
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266 #endif
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267 #if defined(TIM12)
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268 else if (TIMx == TIM12)
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269 {
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270 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM12);
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271 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM12);
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272 }
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273 #endif
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274 #if defined(TIM13)
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275 else if (TIMx == TIM13)
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276 {
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277 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM13);
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278 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM13);
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279 }
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280 #endif
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281 #if defined(TIM14)
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282 else if (TIMx == TIM14)
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283 {
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284 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM14);
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285 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM14);
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286 }
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287 #endif
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288 else
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289 {
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290 result = ERROR;
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291 }
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292
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293 return result;
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294 }
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295
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296 /**
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297 * @brief Set the fields of the time base unit configuration data structure
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298 * to their default values.
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299 * @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (time base unit configuration data structure)
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300 * @retval None
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301 */
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302 void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct)
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303 {
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304 /* Set the default configuration */
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305 TIM_InitStruct->Prescaler = (uint16_t)0x0000U;
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306 TIM_InitStruct->CounterMode = LL_TIM_COUNTERMODE_UP;
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307 TIM_InitStruct->Autoreload = 0xFFFFFFFFU;
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308 TIM_InitStruct->ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
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309 TIM_InitStruct->RepetitionCounter = (uint8_t)0x00U;
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310 }
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311
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312 /**
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313 * @brief Configure the TIMx time base unit.
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314 * @param TIMx Timer Instance
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315 * @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (TIMx time base unit configuration data structure)
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316 * @retval An ErrorStatus enumeration value:
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317 * - SUCCESS: TIMx registers are de-initialized
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318 * - ERROR: not applicable
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319 */
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320 ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct)
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321 {
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322 uint32_t tmpcr1 = 0U;
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323
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324 /* Check the parameters */
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325 assert_param(IS_TIM_INSTANCE(TIMx));
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326 assert_param(IS_LL_TIM_COUNTERMODE(TIM_InitStruct->CounterMode));
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327 assert_param(IS_LL_TIM_CLOCKDIVISION(TIM_InitStruct->ClockDivision));
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328
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329 tmpcr1 = LL_TIM_ReadReg(TIMx, CR1);
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330
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331 if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
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332 {
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333 /* Select the Counter Mode */
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334 MODIFY_REG(tmpcr1, (TIM_CR1_DIR | TIM_CR1_CMS), TIM_InitStruct->CounterMode);
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335 }
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336
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337 if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
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338 {
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339 /* Set the clock division */
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340 MODIFY_REG(tmpcr1, TIM_CR1_CKD, TIM_InitStruct->ClockDivision);
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341 }
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342
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343 /* Write to TIMx CR1 */
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344 LL_TIM_WriteReg(TIMx, CR1, tmpcr1);
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345
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346 /* Set the Autoreload value */
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347 LL_TIM_SetAutoReload(TIMx, TIM_InitStruct->Autoreload);
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348
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349 /* Set the Prescaler value */
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350 LL_TIM_SetPrescaler(TIMx, TIM_InitStruct->Prescaler);
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351
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352 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
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353 {
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354 /* Set the Repetition Counter value */
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355 LL_TIM_SetRepetitionCounter(TIMx, TIM_InitStruct->RepetitionCounter);
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356 }
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357
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358 /* Generate an update event to reload the Prescaler
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359 and the repetition counter value (if applicable) immediately */
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360 LL_TIM_GenerateEvent_UPDATE(TIMx);
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361
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362 return SUCCESS;
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363 }
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364
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365 /**
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366 * @brief Set the fields of the TIMx output channel configuration data
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367 * structure to their default values.
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368 * @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (the output channel configuration data structure)
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369 * @retval None
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370 */
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371 void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
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372 {
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373 /* Set the default configuration */
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374 TIM_OC_InitStruct->OCMode = LL_TIM_OCMODE_FROZEN;
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375 TIM_OC_InitStruct->OCState = LL_TIM_OCSTATE_DISABLE;
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376 TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE;
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377 TIM_OC_InitStruct->CompareValue = 0x00000000U;
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378 TIM_OC_InitStruct->OCPolarity = LL_TIM_OCPOLARITY_HIGH;
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379 TIM_OC_InitStruct->OCNPolarity = LL_TIM_OCPOLARITY_HIGH;
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380 TIM_OC_InitStruct->OCIdleState = LL_TIM_OCIDLESTATE_LOW;
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381 TIM_OC_InitStruct->OCNIdleState = LL_TIM_OCIDLESTATE_LOW;
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382 }
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383
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384 /**
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385 * @brief Configure the TIMx output channel.
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386 * @param TIMx Timer Instance
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387 * @param Channel This parameter can be one of the following values:
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388 * @arg @ref LL_TIM_CHANNEL_CH1
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389 * @arg @ref LL_TIM_CHANNEL_CH2
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390 * @arg @ref LL_TIM_CHANNEL_CH3
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391 * @arg @ref LL_TIM_CHANNEL_CH4
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392 * @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration data structure)
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393 * @retval An ErrorStatus enumeration value:
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394 * - SUCCESS: TIMx output channel is initialized
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395 * - ERROR: TIMx output channel is not initialized
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396 */
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397 ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
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398 {
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399 ErrorStatus result = ERROR;
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400
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401 switch (Channel)
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402 {
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403 case LL_TIM_CHANNEL_CH1:
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404 result = OC1Config(TIMx, TIM_OC_InitStruct);
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405 break;
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406 case LL_TIM_CHANNEL_CH2:
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407 result = OC2Config(TIMx, TIM_OC_InitStruct);
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408 break;
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409 case LL_TIM_CHANNEL_CH3:
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410 result = OC3Config(TIMx, TIM_OC_InitStruct);
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411 break;
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412 case LL_TIM_CHANNEL_CH4:
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413 result = OC4Config(TIMx, TIM_OC_InitStruct);
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414 break;
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415 default:
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416 break;
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417 }
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418
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419 return result;
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420 }
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421
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422 /**
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423 * @brief Set the fields of the TIMx input channel configuration data
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424 * structure to their default values.
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425 * @param TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration data structure)
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426 * @retval None
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427 */
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428 void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
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429 {
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430 /* Set the default configuration */
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431 TIM_ICInitStruct->ICPolarity = LL_TIM_IC_POLARITY_RISING;
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432 TIM_ICInitStruct->ICActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
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433 TIM_ICInitStruct->ICPrescaler = LL_TIM_ICPSC_DIV1;
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434 TIM_ICInitStruct->ICFilter = LL_TIM_IC_FILTER_FDIV1;
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435 }
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436
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437 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
438 * @brief Configure the TIMx input channel.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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439 * @param TIMx Timer Instance
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440 * @param Channel This parameter can be one of the following values:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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441 * @arg @ref LL_TIM_CHANNEL_CH1
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
442 * @arg @ref LL_TIM_CHANNEL_CH2
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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443 * @arg @ref LL_TIM_CHANNEL_CH3
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
444 * @arg @ref LL_TIM_CHANNEL_CH4
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445 * @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data structure)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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446 * @retval An ErrorStatus enumeration value:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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447 * - SUCCESS: TIMx output channel is initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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448 * - ERROR: TIMx output channel is not initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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449 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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450 ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef *TIM_IC_InitStruct)
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451 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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452 ErrorStatus result = ERROR;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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453
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
454 switch (Channel)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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455 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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456 case LL_TIM_CHANNEL_CH1:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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457 result = IC1Config(TIMx, TIM_IC_InitStruct);
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458 break;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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459 case LL_TIM_CHANNEL_CH2:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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460 result = IC2Config(TIMx, TIM_IC_InitStruct);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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461 break;
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462 case LL_TIM_CHANNEL_CH3:
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463 result = IC3Config(TIMx, TIM_IC_InitStruct);
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464 break;
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465 case LL_TIM_CHANNEL_CH4:
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466 result = IC4Config(TIMx, TIM_IC_InitStruct);
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467 break;
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468 default:
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469 break;
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470 }
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471
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472 return result;
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473 }
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474
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475 /**
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476 * @brief Fills each TIM_EncoderInitStruct field with its default value
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477 * @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface configuration data structure)
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478 * @retval None
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479 */
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480 void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)
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481 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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482 /* Set the default configuration */
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483 TIM_EncoderInitStruct->EncoderMode = LL_TIM_ENCODERMODE_X2_TI1;
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484 TIM_EncoderInitStruct->IC1Polarity = LL_TIM_IC_POLARITY_RISING;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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485 TIM_EncoderInitStruct->IC1ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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486 TIM_EncoderInitStruct->IC1Prescaler = LL_TIM_ICPSC_DIV1;
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487 TIM_EncoderInitStruct->IC1Filter = LL_TIM_IC_FILTER_FDIV1;
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488 TIM_EncoderInitStruct->IC2Polarity = LL_TIM_IC_POLARITY_RISING;
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489 TIM_EncoderInitStruct->IC2ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
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490 TIM_EncoderInitStruct->IC2Prescaler = LL_TIM_ICPSC_DIV1;
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491 TIM_EncoderInitStruct->IC2Filter = LL_TIM_IC_FILTER_FDIV1;
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492 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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493
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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494 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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495 * @brief Configure the encoder interface of the timer instance.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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496 * @param TIMx Timer Instance
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497 * @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface configuration data structure)
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498 * @retval An ErrorStatus enumeration value:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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499 * - SUCCESS: TIMx registers are de-initialized
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500 * - ERROR: not applicable
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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501 */
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502 ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)
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503 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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504 uint32_t tmpccmr1 = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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505 uint32_t tmpccer = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
506
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
507 /* Check the parameters */
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508 assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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509 assert_param(IS_LL_TIM_ENCODERMODE(TIM_EncoderInitStruct->EncoderMode));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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510 assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC1Polarity));
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511 assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC1ActiveInput));
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512 assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC1Prescaler));
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513 assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC1Filter));
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514 assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC2Polarity));
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515 assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC2ActiveInput));
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516 assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC2Prescaler));
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517 assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC2Filter));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
518
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
519 /* Disable the CC1 and CC2: Reset the CC1E and CC2E Bits */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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520 TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E);
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diff changeset
521
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
522 /* Get the TIMx CCMR1 register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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523 tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
524
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
525 /* Get the TIMx CCER register value */
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526 tmpccer = LL_TIM_ReadReg(TIMx, CCER);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
527
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
528 /* Configure TI1 */
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529 tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC);
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530 tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1ActiveInput >> 16U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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531 tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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532 tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U);
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diff changeset
533
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
534 /* Configure TI2 */
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535 tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC2S | TIM_CCMR1_IC2F | TIM_CCMR1_IC2PSC);
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536 tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2ActiveInput >> 8U);
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537 tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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538 tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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539
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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540 /* Set TI1 and TI2 polarity and enable TI1 and TI2 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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541 tmpccer &= (uint32_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP | TIM_CCER_CC2P | TIM_CCER_CC2NP);
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542 tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC1Polarity);
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diff changeset
543 tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC2Polarity << 4U);
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diff changeset
544 tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
545
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
546 /* Set encoder mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
547 LL_TIM_SetEncoderMode(TIMx, TIM_EncoderInitStruct->EncoderMode);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
548
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
549 /* Write to TIMx CCMR1 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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550 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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551
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
552 /* Write to TIMx CCER */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
553 LL_TIM_WriteReg(TIMx, CCER, tmpccer);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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554
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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555 return SUCCESS;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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556 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
557
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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558 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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559 * @brief Set the fields of the TIMx Hall sensor interface configuration data
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
560 * structure to their default values.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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561 * @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (HALL sensor interface configuration data structure)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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562 * @retval None
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
563 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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564 void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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565 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
566 /* Set the default configuration */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
567 TIM_HallSensorInitStruct->IC1Polarity = LL_TIM_IC_POLARITY_RISING;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
568 TIM_HallSensorInitStruct->IC1Prescaler = LL_TIM_ICPSC_DIV1;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
569 TIM_HallSensorInitStruct->IC1Filter = LL_TIM_IC_FILTER_FDIV1;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
570 TIM_HallSensorInitStruct->CommutationDelay = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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571 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
572
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
573 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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574 * @brief Configure the Hall sensor interface of the timer instance.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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575 * @note TIMx CH1, CH2 and CH3 inputs connected through a XOR
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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576 * to the TI1 input channel
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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577 * @note TIMx slave mode controller is configured in reset mode.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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578 Selected internal trigger is TI1F_ED.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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579 * @note Channel 1 is configured as input, IC1 is mapped on TRC.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
580 * @note Captured value stored in TIMx_CCR1 correspond to the time elapsed
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
581 * between 2 changes on the inputs. It gives information about motor speed.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
582 * @note Channel 2 is configured in output PWM 2 mode.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
583 * @note Compare value stored in TIMx_CCR2 corresponds to the commutation delay.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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584 * @note OC2REF is selected as trigger output on TRGO.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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585 * @note LL_TIM_IC_POLARITY_BOTHEDGE must not be used for TI1 when it is used
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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586 * when TIMx operates in Hall sensor interface mode.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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587 * @param TIMx Timer Instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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588 * @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (TIMx HALL sensor interface configuration data structure)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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589 * @retval An ErrorStatus enumeration value:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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590 * - SUCCESS: TIMx registers are de-initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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591 * - ERROR: not applicable
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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592 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
593 ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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594 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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595 uint32_t tmpcr2 = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
596 uint32_t tmpccmr1 = 0U;
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diff changeset
597 uint32_t tmpccer = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
598 uint32_t tmpsmcr = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
599
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
600 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
601 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(TIMx));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
602 assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_HallSensorInitStruct->IC1Polarity));
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diff changeset
603 assert_param(IS_LL_TIM_ICPSC(TIM_HallSensorInitStruct->IC1Prescaler));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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604 assert_param(IS_LL_TIM_IC_FILTER(TIM_HallSensorInitStruct->IC1Filter));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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605
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
606 /* Disable the CC1 and CC2: Reset the CC1E and CC2E Bits */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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607 TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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608
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
609 /* Get the TIMx CR2 register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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610 tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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611
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
612 /* Get the TIMx CCMR1 register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
613 tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
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diff changeset
614
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
615 /* Get the TIMx CCER register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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616 tmpccer = LL_TIM_ReadReg(TIMx, CCER);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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617
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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618 /* Get the TIMx SMCR register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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619 tmpsmcr = LL_TIM_ReadReg(TIMx, SMCR);
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620
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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621 /* Connect TIMx_CH1, CH2 and CH3 pins to the TI1 input */
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622 tmpcr2 |= TIM_CR2_TI1S;
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623
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
624 /* OC2REF signal is used as trigger output (TRGO) */
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625 tmpcr2 |= LL_TIM_TRGO_OC2REF;
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diff changeset
626
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
627 /* Configure the slave mode controller */
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628 tmpsmcr &= (uint32_t)~(TIM_SMCR_TS | TIM_SMCR_SMS);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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629 tmpsmcr |= LL_TIM_TS_TI1F_ED;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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630 tmpsmcr |= LL_TIM_SLAVEMODE_RESET;
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diff changeset
631
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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632 /* Configure input channel 1 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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633 tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC);
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634 tmpccmr1 |= (uint32_t)(LL_TIM_ACTIVEINPUT_TRC >> 16U);
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635 tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Filter >> 16U);
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636 tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Prescaler >> 16U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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637
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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638 /* Configure input channel 2 */
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639 tmpccmr1 &= (uint32_t)~(TIM_CCMR1_OC2M | TIM_CCMR1_OC2FE | TIM_CCMR1_OC2PE | TIM_CCMR1_OC2CE);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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640 tmpccmr1 |= (uint32_t)(LL_TIM_OCMODE_PWM2 << 8U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
641
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
642 /* Set Channel 1 polarity and enable Channel 1 and Channel2 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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643 tmpccer &= (uint32_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP | TIM_CCER_CC2P | TIM_CCER_CC2NP);
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644 tmpccer |= (uint32_t)(TIM_HallSensorInitStruct->IC1Polarity);
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645 tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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646
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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647 /* Write to TIMx CR2 */
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648 LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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649
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
650 /* Write to TIMx SMCR */
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651 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
652
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
653 /* Write to TIMx CCMR1 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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654 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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655
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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656 /* Write to TIMx CCER */
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657 LL_TIM_WriteReg(TIMx, CCER, tmpccer);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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658
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
659 /* Write to TIMx CCR2 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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660 LL_TIM_OC_SetCompareCH2(TIMx, TIM_HallSensorInitStruct->CommutationDelay);
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661
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662 return SUCCESS;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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663 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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664
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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665 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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666 * @brief Set the fields of the Break and Dead Time configuration data structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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667 * to their default values.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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668 * @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration data structure)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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669 * @retval None
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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670 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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671 void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct)
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672 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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673 /* Set the default configuration */
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674 TIM_BDTRInitStruct->OSSRState = LL_TIM_OSSR_DISABLE;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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675 TIM_BDTRInitStruct->OSSIState = LL_TIM_OSSI_DISABLE;
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676 TIM_BDTRInitStruct->LockLevel = LL_TIM_LOCKLEVEL_OFF;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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677 TIM_BDTRInitStruct->DeadTime = (uint8_t)0x00U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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678 TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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679 TIM_BDTRInitStruct->BreakPolarity = LL_TIM_BREAK_POLARITY_LOW;
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680 TIM_BDTRInitStruct->AutomaticOutput = LL_TIM_AUTOMATICOUTPUT_DISABLE;
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681 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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682
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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683 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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684 * @brief Configure the Break and Dead Time feature of the timer instance.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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685 * @note As the bits AOE, BKP, BKE, OSSR, OSSI and DTG[7:0] can be write-locked
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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686 * depending on the LOCK configuration, it can be necessary to configure all of
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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687 * them during the first write access to the TIMx_BDTR register.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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688 * @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
689 * a timer instance provides a break input.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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690 * @param TIMx Timer Instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
691 * @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure(Break and Dead Time configuration data structure)
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692 * @retval An ErrorStatus enumeration value:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
693 * - SUCCESS: Break and Dead Time is initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
694 * - ERROR: not applicable
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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695 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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696 ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct)
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697 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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698 uint32_t tmpbdtr = 0;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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699
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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700 /* Check the parameters */
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701 assert_param(IS_TIM_BREAK_INSTANCE(TIMx));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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702 assert_param(IS_LL_TIM_OSSR_STATE(TIM_BDTRInitStruct->OSSRState));
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703 assert_param(IS_LL_TIM_OSSI_STATE(TIM_BDTRInitStruct->OSSIState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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704 assert_param(IS_LL_TIM_LOCK_LEVEL(TIM_BDTRInitStruct->LockLevel));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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705 assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState));
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706 assert_param(IS_LL_TIM_BREAK_POLARITY(TIM_BDTRInitStruct->BreakPolarity));
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707 assert_param(IS_LL_TIM_AUTOMATIC_OUTPUT_STATE(TIM_BDTRInitStruct->AutomaticOutput));
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708
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
709 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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710 the OSSI State, the dead time value and the Automatic Output Enable Bit */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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711
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
712 /* Set the BDTR bits */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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713 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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714 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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715 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState);
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716 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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717 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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718 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity);
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parents:
diff changeset
719 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
720 MODIFY_REG(tmpbdtr, TIM_BDTR_MOE, TIM_BDTRInitStruct->AutomaticOutput);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
721
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
722 /* Set TIMx_BDTR */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
723 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
724
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
725 return SUCCESS;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
726 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
727 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
728 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
729 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
730
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
731 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
732 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
733 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
734
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
735 /** @addtogroup TIM_LL_Private_Functions TIM Private Functions
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
736 * @brief Private functions
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
737 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
738 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
739 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
740 * @brief Configure the TIMx output channel 1.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
741 * @param TIMx Timer Instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
742 * @param TIM_OCInitStruct pointer to the the TIMx output channel 1 configuration data structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
743 * @retval An ErrorStatus enumeration value:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
744 * - SUCCESS: TIMx registers are de-initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
745 * - ERROR: not applicable
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
746 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
747 static ErrorStatus OC1Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
748 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
749 uint32_t tmpccmr1 = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
750 uint32_t tmpccer = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
751 uint32_t tmpcr2 = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
752
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
753 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
754 assert_param(IS_TIM_CC1_INSTANCE(TIMx));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
755 assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
756 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
757 assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
758 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
759 assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
760
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
761 /* Disable the Channel 1: Reset the CC1E Bit */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
762 CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
763
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
764 /* Get the TIMx CCER register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
765 tmpccer = LL_TIM_ReadReg(TIMx, CCER);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
766
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
767 /* Get the TIMx CR2 register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
768 tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
769
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
770 /* Get the TIMx CCMR1 register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
771 tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
772
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
773 /* Reset Capture/Compare selection Bits */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
774 CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
775
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
776 /* Set the Output Compare Mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
777 MODIFY_REG(tmpccmr1, TIM_CCMR1_OC1M, TIM_OCInitStruct->OCMode);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
778
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
779 /* Set the Output Compare Polarity */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
780 MODIFY_REG(tmpccer, TIM_CCER_CC1P, TIM_OCInitStruct->OCPolarity);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
781
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
782 /* Set the Output State */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
783 MODIFY_REG(tmpccer, TIM_CCER_CC1E, TIM_OCInitStruct->OCState);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
784
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
785 if (IS_TIM_BREAK_INSTANCE(TIMx))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
786 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
787 assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
788 assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
789
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
790 /* Set the complementary output Polarity */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
791 MODIFY_REG(tmpccer, TIM_CCER_CC1NP, TIM_OCInitStruct->OCNPolarity << 2U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
792
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
793 /* Set the complementary output State */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
794 MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
795
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
796 /* Set the Output Idle state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
797 MODIFY_REG(tmpcr2, TIM_CR2_OIS1, TIM_OCInitStruct->OCIdleState);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
798
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
799 /* Set the complementary output Idle state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
800 MODIFY_REG(tmpcr2, TIM_CR2_OIS1N, TIM_OCInitStruct->OCNIdleState << 1U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
801 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
802
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
803 /* Write to TIMx CR2 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
804 LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
805
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
806 /* Write to TIMx CCMR1 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
807 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
808
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
809 /* Set the Capture Compare Register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
810 LL_TIM_OC_SetCompareCH1(TIMx, TIM_OCInitStruct->CompareValue);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
811
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
812 /* Write to TIMx CCER */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
813 LL_TIM_WriteReg(TIMx, CCER, tmpccer);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
814
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
815 return SUCCESS;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
816 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
817
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
818 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
819 * @brief Configure the TIMx output channel 2.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
820 * @param TIMx Timer Instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
821 * @param TIM_OCInitStruct pointer to the the TIMx output channel 2 configuration data structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
822 * @retval An ErrorStatus enumeration value:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
823 * - SUCCESS: TIMx registers are de-initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
824 * - ERROR: not applicable
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
825 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
826 static ErrorStatus OC2Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
827 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
828 uint32_t tmpccmr1 = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
829 uint32_t tmpccer = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
830 uint32_t tmpcr2 = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
831
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
832 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
833 assert_param(IS_TIM_CC2_INSTANCE(TIMx));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
834 assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
835 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
836 assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
837 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
838 assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
839
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
840 /* Disable the Channel 2: Reset the CC2E Bit */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
841 CLEAR_BIT(TIMx->CCER, TIM_CCER_CC2E);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
842
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
843 /* Get the TIMx CCER register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
844 tmpccer = LL_TIM_ReadReg(TIMx, CCER);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
845
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
846 /* Get the TIMx CR2 register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
847 tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
848
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
849 /* Get the TIMx CCMR1 register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
850 tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
851
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
852 /* Reset Capture/Compare selection Bits */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
853 CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC2S);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
854
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
855 /* Select the Output Compare Mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
856 MODIFY_REG(tmpccmr1, TIM_CCMR1_OC2M, TIM_OCInitStruct->OCMode << 8U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
857
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
858 /* Set the Output Compare Polarity */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
859 MODIFY_REG(tmpccer, TIM_CCER_CC2P, TIM_OCInitStruct->OCPolarity << 4U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
860
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
861 /* Set the Output State */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
862 MODIFY_REG(tmpccer, TIM_CCER_CC2E, TIM_OCInitStruct->OCState << 4U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
863
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
864 if (IS_TIM_BREAK_INSTANCE(TIMx))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
865 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
866 assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
867 assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
868
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
869 /* Set the complementary output Polarity */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
870 MODIFY_REG(tmpccer, TIM_CCER_CC2NP, TIM_OCInitStruct->OCNPolarity << 6U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
871
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
872 /* Set the complementary output State */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
873 MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
874
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
875 /* Set the Output Idle state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
876 MODIFY_REG(tmpcr2, TIM_CR2_OIS2, TIM_OCInitStruct->OCIdleState << 2U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
877
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
878 /* Set the complementary output Idle state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
879 MODIFY_REG(tmpcr2, TIM_CR2_OIS2N, TIM_OCInitStruct->OCNIdleState << 3U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
880 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
881
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
882 /* Write to TIMx CR2 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
883 LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
884
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
885 /* Write to TIMx CCMR1 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
886 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
887
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
888 /* Set the Capture Compare Register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
889 LL_TIM_OC_SetCompareCH2(TIMx, TIM_OCInitStruct->CompareValue);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
890
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
891 /* Write to TIMx CCER */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
892 LL_TIM_WriteReg(TIMx, CCER, tmpccer);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
893
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
894 return SUCCESS;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
895 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
896
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
897 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
898 * @brief Configure the TIMx output channel 3.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
899 * @param TIMx Timer Instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
900 * @param TIM_OCInitStruct pointer to the the TIMx output channel 3 configuration data structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
901 * @retval An ErrorStatus enumeration value:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
902 * - SUCCESS: TIMx registers are de-initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
903 * - ERROR: not applicable
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
904 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
905 static ErrorStatus OC3Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
906 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
907 uint32_t tmpccmr2 = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
908 uint32_t tmpccer = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
909 uint32_t tmpcr2 = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
910
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
911 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
912 assert_param(IS_TIM_CC3_INSTANCE(TIMx));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
913 assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
914 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
915 assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
916 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
917 assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
918
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
919 /* Disable the Channel 3: Reset the CC3E Bit */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
920 CLEAR_BIT(TIMx->CCER, TIM_CCER_CC3E);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
921
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
922 /* Get the TIMx CCER register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
923 tmpccer = LL_TIM_ReadReg(TIMx, CCER);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
924
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
925 /* Get the TIMx CR2 register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
926 tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
927
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
928 /* Get the TIMx CCMR2 register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
929 tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
930
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
931 /* Reset Capture/Compare selection Bits */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
932 CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC3S);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
933
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
934 /* Select the Output Compare Mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
935 MODIFY_REG(tmpccmr2, TIM_CCMR2_OC3M, TIM_OCInitStruct->OCMode);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
936
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
937 /* Set the Output Compare Polarity */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
938 MODIFY_REG(tmpccer, TIM_CCER_CC3P, TIM_OCInitStruct->OCPolarity << 8U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
939
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
940 /* Set the Output State */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
941 MODIFY_REG(tmpccer, TIM_CCER_CC3E, TIM_OCInitStruct->OCState << 8U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
942
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
943 if (IS_TIM_BREAK_INSTANCE(TIMx))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
944 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
945 assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
946 assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
947
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
948 /* Set the complementary output Polarity */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
949 MODIFY_REG(tmpccer, TIM_CCER_CC3NP, TIM_OCInitStruct->OCNPolarity << 10U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
950
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
951 /* Set the complementary output State */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
952 MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
953
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
954 /* Set the Output Idle state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
955 MODIFY_REG(tmpcr2, TIM_CR2_OIS3, TIM_OCInitStruct->OCIdleState << 4U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
956
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
957 /* Set the complementary output Idle state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
958 MODIFY_REG(tmpcr2, TIM_CR2_OIS3N, TIM_OCInitStruct->OCNIdleState << 5U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
959 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
960
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
961 /* Write to TIMx CR2 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
962 LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
963
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
964 /* Write to TIMx CCMR2 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
965 LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
966
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
967 /* Set the Capture Compare Register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
968 LL_TIM_OC_SetCompareCH3(TIMx, TIM_OCInitStruct->CompareValue);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
969
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
970 /* Write to TIMx CCER */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
971 LL_TIM_WriteReg(TIMx, CCER, tmpccer);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
972
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
973 return SUCCESS;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
974 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
975
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
976 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
977 * @brief Configure the TIMx output channel 4.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
978 * @param TIMx Timer Instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
979 * @param TIM_OCInitStruct pointer to the the TIMx output channel 4 configuration data structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
980 * @retval An ErrorStatus enumeration value:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
981 * - SUCCESS: TIMx registers are de-initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
982 * - ERROR: not applicable
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
983 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
984 static ErrorStatus OC4Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
985 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
986 uint32_t tmpccmr2 = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
987 uint32_t tmpccer = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
988 uint32_t tmpcr2 = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
989
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
990 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
991 assert_param(IS_TIM_CC4_INSTANCE(TIMx));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
992 assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
993 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
994 assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
995 assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
996 assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
997
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
998 /* Disable the Channel 4: Reset the CC4E Bit */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
999 CLEAR_BIT(TIMx->CCER, TIM_CCER_CC4E);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1000
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1001 /* Get the TIMx CCER register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1002 tmpccer = LL_TIM_ReadReg(TIMx, CCER);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1003
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1004 /* Get the TIMx CR2 register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1005 tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1006
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1007 /* Get the TIMx CCMR2 register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1008 tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1009
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1010 /* Reset Capture/Compare selection Bits */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1011 CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC4S);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1012
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1013 /* Select the Output Compare Mode */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1014 MODIFY_REG(tmpccmr2, TIM_CCMR2_OC4M, TIM_OCInitStruct->OCMode << 8U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1015
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1016 /* Set the Output Compare Polarity */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1017 MODIFY_REG(tmpccer, TIM_CCER_CC4P, TIM_OCInitStruct->OCPolarity << 12U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1018
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1019 /* Set the Output State */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1020 MODIFY_REG(tmpccer, TIM_CCER_CC4E, TIM_OCInitStruct->OCState << 12U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1021
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1022 if (IS_TIM_BREAK_INSTANCE(TIMx))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1023 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1024 assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1025 assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1026
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1027 /* Set the Output Idle state */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1028 MODIFY_REG(tmpcr2, TIM_CR2_OIS4, TIM_OCInitStruct->OCIdleState << 6U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1029 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1030
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1031 /* Write to TIMx CR2 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1032 LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1033
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1034 /* Write to TIMx CCMR2 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1035 LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1036
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1037 /* Set the Capture Compare Register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1038 LL_TIM_OC_SetCompareCH4(TIMx, TIM_OCInitStruct->CompareValue);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1039
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1040 /* Write to TIMx CCER */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1041 LL_TIM_WriteReg(TIMx, CCER, tmpccer);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1042
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1043 return SUCCESS;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1044 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1045
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1046
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1047 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1048 * @brief Configure the TIMx input channel 1.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1049 * @param TIMx Timer Instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1050 * @param TIM_ICInitStruct pointer to the the TIMx input channel 1 configuration data structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1051 * @retval An ErrorStatus enumeration value:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1052 * - SUCCESS: TIMx registers are de-initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1053 * - ERROR: not applicable
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1054 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1055 static ErrorStatus IC1Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1056 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1057 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1058 assert_param(IS_TIM_CC1_INSTANCE(TIMx));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1059 assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1060 assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1061 assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1062 assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1063
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1064 /* Disable the Channel 1: Reset the CC1E Bit */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1065 TIMx->CCER &= (uint32_t)~TIM_CCER_CC1E;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1066
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1067 /* Select the Input and set the filter and the prescaler value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1068 MODIFY_REG(TIMx->CCMR1,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1069 (TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC),
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1070 (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 16U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1071
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1072 /* Select the Polarity and set the CC1E Bit */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1073 MODIFY_REG(TIMx->CCER,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1074 (TIM_CCER_CC1P | TIM_CCER_CC1NP),
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1075 (TIM_ICInitStruct->ICPolarity | TIM_CCER_CC1E));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1076
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1077 return SUCCESS;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1078 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1079
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1080 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1081 * @brief Configure the TIMx input channel 2.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1082 * @param TIMx Timer Instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1083 * @param TIM_ICInitStruct pointer to the the TIMx input channel 2 configuration data structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1084 * @retval An ErrorStatus enumeration value:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1085 * - SUCCESS: TIMx registers are de-initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1086 * - ERROR: not applicable
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1087 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1088 static ErrorStatus IC2Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1089 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1090 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1091 assert_param(IS_TIM_CC2_INSTANCE(TIMx));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1092 assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1093 assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1094 assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1095 assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1096
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1097 /* Disable the Channel 2: Reset the CC2E Bit */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1098 TIMx->CCER &= (uint32_t)~TIM_CCER_CC2E;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1099
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1100 /* Select the Input and set the filter and the prescaler value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1101 MODIFY_REG(TIMx->CCMR1,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1102 (TIM_CCMR1_CC2S | TIM_CCMR1_IC2F | TIM_CCMR1_IC2PSC),
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1103 (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 8U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1104
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1105 /* Select the Polarity and set the CC2E Bit */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1106 MODIFY_REG(TIMx->CCER,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1107 (TIM_CCER_CC2P | TIM_CCER_CC2NP),
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1108 ((TIM_ICInitStruct->ICPolarity << 4U) | TIM_CCER_CC2E));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1109
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1110 return SUCCESS;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1111 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1112
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1113 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1114 * @brief Configure the TIMx input channel 3.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1115 * @param TIMx Timer Instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1116 * @param TIM_ICInitStruct pointer to the the TIMx input channel 3 configuration data structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1117 * @retval An ErrorStatus enumeration value:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1118 * - SUCCESS: TIMx registers are de-initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1119 * - ERROR: not applicable
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1120 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1121 static ErrorStatus IC3Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1122 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1123 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1124 assert_param(IS_TIM_CC3_INSTANCE(TIMx));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1125 assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1126 assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1127 assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1128 assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1129
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1130 /* Disable the Channel 3: Reset the CC3E Bit */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1131 TIMx->CCER &= (uint32_t)~TIM_CCER_CC3E;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1132
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1133 /* Select the Input and set the filter and the prescaler value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1134 MODIFY_REG(TIMx->CCMR2,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1135 (TIM_CCMR2_CC3S | TIM_CCMR2_IC3F | TIM_CCMR2_IC3PSC),
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1136 (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 16U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1137
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1138 /* Select the Polarity and set the CC3E Bit */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1139 MODIFY_REG(TIMx->CCER,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1140 (TIM_CCER_CC3P | TIM_CCER_CC3NP),
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1141 ((TIM_ICInitStruct->ICPolarity << 8U) | TIM_CCER_CC3E));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1142
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1143 return SUCCESS;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1144 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1145
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1146 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1147 * @brief Configure the TIMx input channel 4.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1148 * @param TIMx Timer Instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1149 * @param TIM_ICInitStruct pointer to the the TIMx input channel 4 configuration data structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1150 * @retval An ErrorStatus enumeration value:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1151 * - SUCCESS: TIMx registers are de-initialized
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1152 * - ERROR: not applicable
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1153 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1154 static ErrorStatus IC4Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1155 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1156 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1157 assert_param(IS_TIM_CC4_INSTANCE(TIMx));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1158 assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1159 assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1160 assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1161 assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1162
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1163 /* Disable the Channel 4: Reset the CC4E Bit */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1164 TIMx->CCER &= (uint32_t)~TIM_CCER_CC4E;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1165
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1166 /* Select the Input and set the filter and the prescaler value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1167 MODIFY_REG(TIMx->CCMR2,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1168 (TIM_CCMR2_CC4S | TIM_CCMR2_IC4F | TIM_CCMR2_IC4PSC),
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1169 (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 8U);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1170
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1171 /* Select the Polarity and set the CC2E Bit */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1172 MODIFY_REG(TIMx->CCER,
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1173 (TIM_CCER_CC4P | TIM_CCER_CC4NP),
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1174 ((TIM_ICInitStruct->ICPolarity << 12U) | TIM_CCER_CC4E));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1175
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1176 return SUCCESS;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1177 }
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1178
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1179
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1180 /**
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1181 * @}
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1182 */
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1183
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1184 /**
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1185 * @}
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1186 */
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1187
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1188 #endif /* TIM1 || TIM2 || TIM3 || TIM4 || TIM5 || TIM6 || TIM7 || TIM8 || TIM9 || TIM10 || TIM11 || TIM12 || TIM13 || TIM14 */
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1189
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1190 /**
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1191 * @}
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1192 */
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1193
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1194 #endif /* USE_FULL_LL_DRIVER */
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1195
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1196 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/