Mercurial > public > ostc4
annotate Small_CPU/Src/uart.c @ 922:7c996354b8ac Evo_2_23
Moved UART6 into a separate unit:
UART6 connects internal devices. As a first step the existing code sections have been moved into a new unit. As well the code of the external GNSS sensor has been copied into this unit as starting point for the further development. Later the internal part can be integrated into the common uart (code cleanup).
author | Ideenmodellierer |
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date | Sun, 03 Nov 2024 20:53:05 +0100 |
parents | eb4109d7d1e9 |
children |
rev | line source |
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38 | 1 /** |
2 ****************************************************************************** | |
3 * @file uart.c | |
4 * @author heinrichs weikamp gmbh | |
5 * @version V0.0.1 | |
6 * @date 27-March-2014 | |
7 * @brief button control | |
8 * | |
9 @verbatim | |
10 ============================================================================== | |
11 ##### How to use ##### | |
12 ============================================================================== | |
13 @endverbatim | |
14 ****************************************************************************** | |
15 * @attention | |
16 * | |
17 * <h2><center>© COPYRIGHT(c) 2015 heinrichs weikamp</center></h2> | |
18 * | |
19 ****************************************************************************** | |
20 */ | |
21 /* Includes ------------------------------------------------------------------*/ | |
22 #include "uart.h" | |
794 | 23 #include "uartProtocol_O2.h" |
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24 #include "uartProtocol_Co2.h" |
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25 #include "uartProtocol_Sentinel.h" |
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26 #include "uartProtocol_GNSS.h" |
662 | 27 #include "externalInterface.h" |
28 #include "data_exchange.h" | |
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29 #include <string.h> /* memset */ |
38 | 30 |
922 | 31 #ifdef ENABLE_GPIO_V2 |
32 extern UART_HandleTypeDef huart6; | |
33 extern void UART6_RxCpltCallback(UART_HandleTypeDef *huart); | |
34 extern void UART6_TxCpltCallback(UART_HandleTypeDef *huart); | |
35 #endif | |
889 | 36 |
38 | 37 /* Private variables ---------------------------------------------------------*/ |
38 | |
794 | 39 |
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40 #define TX_BUF_SIZE (40u) /* max length for commands */ |
781 | 41 #define CHUNK_SIZE (25u) /* the DMA will handle chunk size transfers */ |
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42 #define CHUNKS_PER_BUFFER (6u) |
794 | 43 |
889 | 44 |
662 | 45 |
922 | 46 DMA_HandleTypeDef hdma_usart1_rx, hdma_usart1_tx; |
38 | 47 |
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48 uint8_t rxBuffer[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */ |
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49 uint8_t txBuffer[CHUNK_SIZE]; /* tx uses less bytes */ |
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50 uint8_t txBufferQue[TX_BUF_SIZE]; /* In MUX mode command may be send shortly after each other => allow q 1 entry que */ |
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51 uint8_t txBufferQueLen; |
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52 |
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53 static uint8_t rxWriteIndex; /* Index of the data item which is analysed */ |
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54 static uint8_t rxReadIndex; /* Index at which new data is stared */ |
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55 static uint8_t lastCmdIndex; /* Index of last command which has not been completely received */ |
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56 static uint8_t dmaRxActive; /* Indicator if DMA reception needs to be started */ |
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57 static uint8_t dmaTxActive; /* Indicator if DMA reception needs to be started */ |
794 | 58 |
921 | 59 static uint32_t LastCmdRequestTick = 0; /* Used by ADC handler to avoid interferance with UART communication */ |
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60 |
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61 static uint8_t isEndIndication(uint8_t index); |
889 | 62 |
38 | 63 /* Exported functions --------------------------------------------------------*/ |
64 | |
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65 void UART_clearRxBuffer(void) |
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66 { |
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67 uint16_t index = 0; |
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68 do |
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69 { |
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70 rxBuffer[index++] = BUFFER_NODATA_LOW; |
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71 rxBuffer[index++] = BUFFER_NODATA_HIGH; |
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72 } while (index < sizeof(rxBuffer)); |
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73 |
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74 rxReadIndex = 0; |
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75 rxWriteIndex = 0; |
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76 } |
794 | 77 |
662 | 78 void MX_USART1_UART_Init(void) |
38 | 79 { |
662 | 80 /* regular init */ |
81 huart1.Instance = USART1; | |
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82 huart1.Init.BaudRate = 19200; |
662 | 83 huart1.Init.WordLength = UART_WORDLENGTH_8B; |
84 huart1.Init.StopBits = UART_STOPBITS_1; | |
85 huart1.Init.Parity = UART_PARITY_NONE; | |
86 huart1.Init.Mode = UART_MODE_TX_RX; | |
87 huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; | |
88 huart1.Init.OverSampling = UART_OVERSAMPLING_16; | |
89 | |
90 HAL_UART_Init(&huart1); | |
91 | |
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92 MX_USART1_DMA_Init(); |
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93 |
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94 UART_clearRxBuffer(); |
662 | 95 rxReadIndex = 0; |
96 lastCmdIndex = 0; | |
97 rxWriteIndex = 0; | |
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98 dmaRxActive = 0; |
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99 dmaTxActive = 0; |
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100 txBufferQueLen = 0; |
662 | 101 } |
38 | 102 |
889 | 103 |
104 | |
662 | 105 void MX_USART1_UART_DeInit(void) |
106 { | |
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107 HAL_DMA_Abort(&hdma_usart1_rx); |
662 | 108 HAL_DMA_DeInit(&hdma_usart1_rx); |
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109 HAL_DMA_Abort(&hdma_usart1_tx); |
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110 HAL_DMA_DeInit(&hdma_usart1_tx); |
662 | 111 HAL_UART_DeInit(&huart1); |
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112 dmaRxActive = 0; |
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113 dmaTxActive = 0; |
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114 txBufferQueLen = 0; |
662 | 115 } |
116 | |
117 void MX_USART1_DMA_Init() | |
118 { | |
119 /* DMA controller clock enable */ | |
120 __DMA2_CLK_ENABLE(); | |
121 | |
122 /* Peripheral DMA init*/ | |
123 hdma_usart1_rx.Instance = DMA2_Stream5; | |
124 hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4; | |
125 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; //DMA_MEMORY_TO_PERIPH; | |
126 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; | |
127 hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; | |
128 hdma_usart1_rx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; | |
129 hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; | |
130 hdma_usart1_rx.Init.Mode = DMA_NORMAL; | |
131 hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; | |
132 hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
133 HAL_DMA_Init(&hdma_usart1_rx); | |
134 | |
135 __HAL_LINKDMA(&huart1,hdmarx,hdma_usart1_rx); | |
136 | |
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137 hdma_usart1_tx.Instance = DMA2_Stream7; |
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138 hdma_usart1_tx.Init.Channel = DMA_CHANNEL_4; |
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139 hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; |
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140 hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; |
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141 hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; |
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142 hdma_usart1_tx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; |
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143 hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; |
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144 hdma_usart1_tx.Init.Mode = DMA_NORMAL; |
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145 hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; |
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146 hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; |
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147 HAL_DMA_Init(&hdma_usart1_tx); |
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148 |
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149 __HAL_LINKDMA(&huart1,hdmatx,hdma_usart1_tx); |
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150 |
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151 |
662 | 152 /* DMA interrupt init */ |
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153 HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 2, 2); |
662 | 154 HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn); |
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155 HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 2, 1); |
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156 HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); |
38 | 157 } |
158 | |
794 | 159 void UART_MUX_SelectAddress(uint8_t muxAddress) |
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160 { |
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161 uint8_t indexstr[4]; |
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162 |
794 | 163 if(muxAddress <= MAX_MUX_CHANNEL) |
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164 { |
794 | 165 indexstr[0] = '~'; |
166 indexstr[1] = muxAddress; | |
167 indexstr[2] = 0x0D; | |
168 indexstr[3] = 0x0A; | |
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169 if(!dmaTxActive) |
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170 { |
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171 memcpy(txBuffer, indexstr, 4); |
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172 dmaTxActive = 0; |
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173 if(HAL_OK == HAL_UART_Transmit_DMA(&huart1,txBuffer,4)) |
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174 { |
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175 dmaTxActive = 1; |
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176 while(dmaTxActive) |
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177 { |
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178 HAL_Delay(1); |
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179 } |
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180 } |
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181 } |
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182 else |
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183 { |
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184 memcpy(txBufferQue, indexstr, 4); |
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185 txBufferQueLen = 4; |
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186 } |
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187 } |
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188 } |
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189 |
794 | 190 |
191 void UART_SendCmdString(uint8_t *cmdString) | |
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192 { |
794 | 193 uint8_t cmdLength = strlen((char*)cmdString); |
194 | |
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195 if(dmaTxActive == 0) |
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196 { |
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197 if(cmdLength < TX_BUF_SIZE) /* A longer string is an indication for a missing 0 termination */ |
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198 { |
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199 if(dmaRxActive == 0) |
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200 { |
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201 UART_StartDMA_Receiption(); |
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202 } |
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203 memcpy(txBuffer, cmdString, cmdLength); |
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204 if(HAL_OK == HAL_UART_Transmit_DMA(&huart1,txBuffer,cmdLength)) |
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205 { |
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206 dmaTxActive = 1; |
921 | 207 LastCmdRequestTick = HAL_GetTick(); |
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208 } |
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209 } |
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210 } |
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211 else |
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212 { |
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213 memcpy(txBufferQue, cmdString, cmdLength); |
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214 txBufferQueLen = cmdLength; |
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215 } |
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216 } |
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217 |
922 | 218 void UART_SendCmdUbx(const uint8_t *cmd, uint8_t len) |
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219 { |
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220 if(len < TX_BUF_SIZE) /* A longer string is an indication for a missing 0 termination */ |
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221 { |
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222 if(dmaRxActive == 0) |
794 | 223 { |
224 UART_StartDMA_Receiption(); | |
225 } | |
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226 memcpy(txBuffer, cmd, len); |
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227 if(HAL_OK == HAL_UART_Transmit_DMA(&huart1,txBuffer,len)) |
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228 { |
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229 dmaTxActive = 1; |
921 | 230 LastCmdRequestTick = HAL_GetTick(); |
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231 } |
794 | 232 } |
233 } | |
234 | |
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235 |
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236 void StringToInt(char *pstr, uint32_t *puInt32) |
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237 { |
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238 uint8_t index = 0; |
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239 uint32_t result = 0; |
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240 while((pstr[index] >= '0') && (pstr[index] <= '9')) |
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241 { |
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242 result *=10; |
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243 result += pstr[index] - '0'; |
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244 index++; |
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245 } |
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246 *puInt32 = result; |
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247 } |
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248 |
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249 void StringToUInt64(char *pstr, uint64_t *puint64) |
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250 { |
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251 uint8_t index = 0; |
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252 uint64_t result = 0; |
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253 while((pstr[index] >= '0') && (pstr[index] <= '9')) |
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254 { |
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255 result *=10; |
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256 result += pstr[index] - '0'; |
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257 index++; |
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258 } |
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259 *puint64 = result; |
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260 } |
662 | 261 |
742 | 262 void UART_StartDMA_Receiption() |
263 { | |
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264 if(dmaRxActive == 0) |
742 | 265 { |
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266 if(((rxWriteIndex / CHUNK_SIZE) != (rxReadIndex / CHUNK_SIZE)) || ((isEndIndication(rxWriteIndex)) && (isEndIndication(rxWriteIndex + 1)))) /* start next transfer if we did not catch up with read index */ |
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267 { |
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268 if(HAL_OK == HAL_UART_Receive_DMA (&huart1, &rxBuffer[rxWriteIndex], CHUNK_SIZE)) |
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269 { |
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270 dmaRxActive = 1; |
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271 } |
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272 } |
742 | 273 } |
274 } | |
690 | 275 |
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276 void UART_ChangeBaudrate(uint32_t newBaudrate) |
38 | 277 { |
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278 MX_USART1_UART_DeInit(); |
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279 huart1.Init.BaudRate = newBaudrate; |
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280 HAL_UART_Init(&huart1); |
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281 MX_USART1_DMA_Init(); |
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282 HAL_NVIC_SetPriority(USART1_IRQn, 1, 3); |
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283 HAL_NVIC_EnableIRQ(USART1_IRQn); |
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284 |
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285 UART_clearRxBuffer(); |
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286 rxReadIndex = 0; |
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287 rxWriteIndex = 0; |
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288 dmaRxActive = 0; |
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289 txBufferQueLen = 0; |
38 | 290 } |
690 | 291 |
662 | 292 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) |
38 | 293 { |
662 | 294 if(huart == &huart1) |
295 { | |
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296 dmaRxActive = 0; |
662 | 297 rxWriteIndex+=CHUNK_SIZE; |
298 if(rxWriteIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) | |
299 { | |
300 rxWriteIndex = 0; | |
301 } | |
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302 UART_StartDMA_Receiption(); |
662 | 303 } |
922 | 304 #ifdef ENABLE_GPIO_V2 |
305 if(huart == &huart6) | |
306 { | |
307 UART6_RxCpltCallback(huart); | |
308 } | |
309 #endif | |
38 | 310 } |
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311 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) |
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312 { |
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313 if(huart == &huart1) |
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314 { |
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315 dmaTxActive = 0; |
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316 UART_WriteData(); |
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317 if(txBufferQueLen) |
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318 { |
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319 memcpy(txBuffer, txBufferQue, txBufferQueLen); |
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320 HAL_UART_Transmit_DMA(&huart1,txBuffer,txBufferQueLen); |
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321 dmaTxActive = 1; |
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322 txBufferQueLen = 0; |
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323 } |
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324 } |
922 | 325 #ifdef ENABLE_GPIO_V2 |
326 if(huart == &huart6) | |
327 { | |
328 UART6_TxCpltCallback(huart); | |
329 } | |
330 #endif | |
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331 } |
38 | 332 |
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333 uint8_t isEndIndication(uint8_t index) |
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334 { |
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335 uint8_t ret = 0; |
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336 if(index % 2) |
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337 { |
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338 if(rxBuffer[index] == BUFFER_NODATA_HIGH) |
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339 { |
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340 ret = 1; |
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341 } |
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342 } |
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343 else |
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344 { |
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345 if(rxBuffer[index] == BUFFER_NODATA_LOW) |
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346 { |
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347 ret = 1; |
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348 } |
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349 } |
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350 |
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351 return ret; |
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352 } |
794 | 353 void UART_ReadData(uint8_t sensorType) |
354 { | |
355 uint8_t localRX = rxReadIndex; | |
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356 uint8_t futureIndex = rxReadIndex + 1; |
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357 uint8_t moreData = 0; |
38 | 358 |
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359 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
794 | 360 { |
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361 futureIndex = 0; |
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362 } |
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363 |
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364 if((!isEndIndication(localRX)) || (!isEndIndication(futureIndex))) do |
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365 { |
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366 while((!isEndIndication(localRX)) || (moreData)) |
794 | 367 { |
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368 moreData = 0; |
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369 switch (sensorType) |
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370 { |
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371 case SENSOR_MUX: |
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372 case SENSOR_DIGO2: uartO2_ProcessData(rxBuffer[localRX]); |
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373 break; |
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374 #ifdef ENABLE_CO2_SUPPORT |
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375 case SENSOR_CO2: uartCo2_ProcessData(rxBuffer[localRX]); |
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376 break; |
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377 #endif |
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378 #ifdef ENABLE_GNSS_SUPPORT |
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379 case SENSOR_GNSS: uartGnss_ProcessData(rxBuffer[localRX]); |
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380 break; |
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381 #endif |
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382 #ifdef ENABLE_SENTINEL_MODE |
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383 case SENSOR_SENTINEL: uartSentinel_ProcessData(rxBuffer[localRX]); |
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384 break; |
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385 #endif |
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386 default: |
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387 break; |
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388 } |
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389 if(localRX % 2) |
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390 { |
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391 rxBuffer[localRX] = BUFFER_NODATA_HIGH; |
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392 } |
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393 else |
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394 { |
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395 rxBuffer[localRX] = BUFFER_NODATA_LOW; |
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396 } |
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397 |
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398 localRX++; |
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399 rxReadIndex++; |
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400 if(rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
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401 { |
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402 localRX = 0; |
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403 rxReadIndex = 0; |
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404 } |
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405 futureIndex++; |
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406 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
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407 { |
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408 futureIndex = 0; |
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409 } |
794 | 410 } |
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411 if(!isEndIndication(futureIndex)) |
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412 { |
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413 moreData = 1; |
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414 } |
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415 } while(moreData); |
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416 } |
794 | 417 |
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418 void UART_WriteData(void) |
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419 { |
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420 if(huart1.hdmatx->State == HAL_DMA_STATE_READY) |
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421 { |
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422 huart1.gState = HAL_UART_STATE_READY; |
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423 dmaTxActive = 0; |
794 | 424 } |
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425 if(huart1.hdmarx->State == HAL_DMA_STATE_READY) |
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426 { |
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427 huart1.RxState = HAL_UART_STATE_READY; |
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428 dmaRxActive = 0; |
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429 } |
794 | 430 } |
431 | |
432 void UART_FlushRxBuffer(void) | |
433 { | |
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434 uint8_t futureIndex = rxReadIndex + 1; |
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435 |
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436 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
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437 { |
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438 futureIndex = 0; |
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439 } |
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440 while((rxBuffer[rxReadIndex] != BUFFER_NODATA_LOW) && (rxBuffer[futureIndex] != BUFFER_NODATA_HIGH)) |
794 | 441 { |
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442 if(rxReadIndex % 2) |
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443 { |
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444 rxBuffer[rxReadIndex++] = BUFFER_NODATA_HIGH; |
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445 } |
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446 else |
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447 { |
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448 rxBuffer[rxReadIndex++] = BUFFER_NODATA_LOW; |
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449 } |
794 | 450 if(rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
451 { | |
452 rxReadIndex = 0; | |
453 } | |
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454 futureIndex++; |
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455 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
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456 { |
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457 futureIndex = 0; |
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458 } |
794 | 459 } |
460 } | |
662 | 461 |
861 | 462 uint8_t UART_isComActive(uint8_t sensorId) |
463 { | |
464 uint8_t active = 1; | |
809 | 465 |
921 | 466 if(time_elapsed_ms(LastCmdRequestTick, HAL_GetTick()) > 300) /* UART activity should be inactive 300ms after last command */ |
861 | 467 { |
468 active = 0; | |
469 } | |
470 return active; | |
471 } | |
809 | 472 |
921 | 473 |
38 | 474 /************************ (C) COPYRIGHT heinrichs weikamp *****END OF FILE****/ |