38
+ − 1 /*****************************************************************************
+ − 2 *** -*- coding: UTF-8 -*-
+ − 3 ***
+ − 4 *** \file Discovery/Src/startup_stm32f429xx.s
+ − 5 *** \brief STM32F427xx Devices vector table
+ − 6 *** \author Heinrichs Weikamp gmbh
+ − 7 *** \date 15-December-2014
+ − 8 ***
+ − 9 *** \details
+ − 10 *** STM32F427xx Devices vector table
+ − 11 *** This module performs:
+ − 12 *** - Set the initial SP
+ − 13 *** - Set the initial PC == Reset_Handler,
+ − 14 *** - Set the vector table entries with the exceptions ISR address
+ − 15 *** - Branches to main in the C library (which eventually
+ − 16 *** calls main()).
+ − 17 *** After Reset the Cortex-M4 processor is in Thread mode,
+ − 18 *** priority is Privileged, and the Stack is set to Main.
+ − 19 ***
+ − 20 *** $Id$
+ − 21 ******************************************************************************
+ − 22 *** \par Copyright (c) 2014-2018 Heinrichs Weikamp gmbh
+ − 23 ***
+ − 24 *** This program is free software: you can redistribute it and/or modify
+ − 25 *** it under the terms of the GNU General Public License as published by
+ − 26 *** the Free Software Foundation, either version 3 of the License, or
+ − 27 *** (at your option) any later version.
+ − 28 ***
+ − 29 *** This program is distributed in the hope that it will be useful,
+ − 30 *** but WITHOUT ANY WARRANTY; without even the implied warranty of
+ − 31 *** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ − 32 *** GNU General Public License for more details.
+ − 33 ***
+ − 34 *** You should have received a copy of the GNU General Public License
+ − 35 *** along with this program. If not, see <http://www.gnu.org/licenses/>.
+ − 36 ******************************************************************************
+ − 37 *** \par Copyright (c) 2014 STMicroelectronics
+ − 38 ***
+ − 39 *** Redistribution and use in source and binary forms, with or without modification,
+ − 40 *** are permitted provided that the following conditions are met:
+ − 41 *** 1. Redistributions of source code must retain the above copyright notice,
+ − 42 *** this list of conditions and the following disclaimer.
+ − 43 *** 2. Redistributions in binary form must reproduce the above copyright notice,
+ − 44 *** this list of conditions and the following disclaimer in the documentation
+ − 45 *** and/or other materials provided with the distribution.
+ − 46 *** 3. Neither the name of STMicroelectronics nor the names of its contributors
+ − 47 *** may be used to endorse or promote products derived from this software
+ − 48 *** without specific prior written permission.
+ − 49 ***
+ − 50 *** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ − 51 *** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ − 52 *** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ − 53 *** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ − 54 *** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ − 55 *** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ − 56 *** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ − 57 *** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ − 58 *** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ − 59 *** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ − 60 *****************************************************************************/
+ − 61
+ − 62 .syntax unified
+ − 63 .cpu cortex-m4
+ − 64 .fpu softvfp
+ − 65 .thumb
+ − 66
+ − 67 .global g_pfnVectors
+ − 68 .global Default_Handler
+ − 69
+ − 70 /* start address for the initialization values of the .data section.
+ − 71 defined in linker script */
+ − 72 .word _sidata
+ − 73 /* start address for the .data section. defined in linker script */
+ − 74 .word _sdata
+ − 75 /* end address for the .data section. defined in linker script */
+ − 76 .word _edata
+ − 77 /* start address for the .bss section. defined in linker script */
+ − 78 .word _sbss
+ − 79 /* end address for the .bss section. defined in linker script */
+ − 80 .word _ebss
+ − 81 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
+ − 82
+ − 83 /**
+ − 84 * @brief This is the code that gets called when the processor first
+ − 85 * starts execution following a reset event. Only the absolutely
+ − 86 * necessary set is performed, after which the application
+ − 87 * supplied main() routine is called.
+ − 88 * @param None
+ − 89 * @retval : None
+ − 90 */
+ − 91
+ − 92 .section .text.Reset_Handler
+ − 93 .weak Reset_Handler
+ − 94 .type Reset_Handler, %function
+ − 95 Reset_Handler:
+ − 96 ldr sp, =_estack /* set stack pointer */
+ − 97
+ − 98 /* Copy the data segment initializers from flash to SRAM */
+ − 99 movs r1, #0
+ − 100 b LoopCopyDataInit
+ − 101
+ − 102 CopyDataInit:
+ − 103 ldr r3, =_sidata
+ − 104 ldr r3, [r3, r1]
+ − 105 str r3, [r0, r1]
+ − 106 adds r1, r1, #4
+ − 107
+ − 108 LoopCopyDataInit:
+ − 109 ldr r0, =_sdata
+ − 110 ldr r3, =_edata
+ − 111 adds r2, r0, r1
+ − 112 cmp r2, r3
+ − 113 bcc CopyDataInit
+ − 114 ldr r2, =_sbss
+ − 115 b LoopFillZerobss
+ − 116 /* Zero fill the bss segment. */
+ − 117 FillZerobss:
+ − 118 movs r3, #0
+ − 119 str r3, [r2], #4
+ − 120
+ − 121 LoopFillZerobss:
+ − 122 ldr r3, = _ebss
+ − 123 cmp r2, r3
+ − 124 bcc FillZerobss
+ − 125
+ − 126 /* Call the clock system intitialization function.*/
+ − 127 bl SystemInit
+ − 128 /* Call static constructors */
+ − 129 bl __libc_init_array
+ − 130 /* Call the application's entry point.*/
+ − 131 bl main
+ − 132 bx lr
+ − 133 .size Reset_Handler, .-Reset_Handler
+ − 134
+ − 135 /**
+ − 136 * @brief This is the code that gets called when the processor receives an
+ − 137 * unexpected interrupt. This simply enters an infinite loop, preserving
+ − 138 * the system state for examination by a debugger.
+ − 139 * @param None
+ − 140 * @retval None
+ − 141 */
+ − 142 .section .text.Default_Handler,"ax",%progbits
+ − 143 Default_Handler:
+ − 144 Infinite_Loop:
+ − 145 b Infinite_Loop
+ − 146 .size Default_Handler, .-Default_Handler
+ − 147 /******************************************************************************
+ − 148 *
+ − 149 * The minimal vector table for a Cortex M3. Note that the proper constructs
+ − 150 * must be placed on this to ensure that it ends up at physical address
+ − 151 * 0x0000.0000.
+ − 152 *
+ − 153 *******************************************************************************/
+ − 154 .section .isr_vector,"a",%progbits
+ − 155 .type g_pfnVectors, %object
+ − 156 .size g_pfnVectors, .-g_pfnVectors
+ − 157
+ − 158 g_pfnVectors:
+ − 159 .word _estack
+ − 160 .word Reset_Handler
+ − 161
+ − 162 .word NMI_Handler
+ − 163 .word HardFault_Handler
+ − 164 .word MemManage_Handler
+ − 165 .word BusFault_Handler
+ − 166 .word UsageFault_Handler
+ − 167 .word 0
+ − 168 .word 0
+ − 169 .word 0
+ − 170 .word 0
+ − 171 .word SVC_Handler
+ − 172 .word DebugMon_Handler
+ − 173 .word 0
+ − 174 .word PendSV_Handler
+ − 175 .word SysTick_Handler
+ − 176
+ − 177 /* External Interrupts */
+ − 178 .word WWDG_IRQHandler /* Window WatchDog */
+ − 179 .word PVD_IRQHandler /* PVD through EXTI Line detection */
+ − 180 .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
+ − 181 .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
+ − 182 .word FLASH_IRQHandler /* FLASH */
+ − 183 .word RCC_IRQHandler /* RCC */
+ − 184 .word EXTI0_IRQHandler /* EXTI Line0 */
+ − 185 .word EXTI1_IRQHandler /* EXTI Line1 */
+ − 186 .word EXTI2_IRQHandler /* EXTI Line2 */
+ − 187 .word EXTI3_IRQHandler /* EXTI Line3 */
+ − 188 .word EXTI4_IRQHandler /* EXTI Line4 */
+ − 189 .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
+ − 190 .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
+ − 191 .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
+ − 192 .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
+ − 193 .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
+ − 194 .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
+ − 195 .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
+ − 196 .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
+ − 197 .word CAN1_TX_IRQHandler /* CAN1 TX */
+ − 198 .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
+ − 199 .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
+ − 200 .word CAN1_SCE_IRQHandler /* CAN1 SCE */
+ − 201 .word EXTI9_5_IRQHandler /* External Line[9:5]s */
+ − 202 .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
+ − 203 .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
+ − 204 .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
+ − 205 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
+ − 206 .word TIM2_IRQHandler /* TIM2 */
+ − 207 .word TIM3_IRQHandler /* TIM3 */
+ − 208 .word TIM4_IRQHandler /* TIM4 */
+ − 209 .word I2C1_EV_IRQHandler /* I2C1 Event */
+ − 210 .word I2C1_ER_IRQHandler /* I2C1 Error */
+ − 211 .word I2C2_EV_IRQHandler /* I2C2 Event */
+ − 212 .word I2C2_ER_IRQHandler /* I2C2 Error */
+ − 213 .word SPI1_IRQHandler /* SPI1 */
+ − 214 .word SPI2_IRQHandler /* SPI2 */
+ − 215 .word USART1_IRQHandler /* USART1 */
+ − 216 .word USART2_IRQHandler /* USART2 */
+ − 217 .word USART3_IRQHandler /* USART3 */
+ − 218 .word EXTI15_10_IRQHandler /* External Line[15:10]s */
+ − 219 .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
+ − 220 .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
+ − 221 .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
+ − 222 .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
+ − 223 .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
+ − 224 .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
+ − 225 .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
+ − 226 .word FMC_IRQHandler /* FMC */
+ − 227 .word SDIO_IRQHandler /* SDIO */
+ − 228 .word TIM5_IRQHandler /* TIM5 */
+ − 229 .word SPI3_IRQHandler /* SPI3 */
+ − 230 .word UART4_IRQHandler /* UART4 */
+ − 231 .word UART5_IRQHandler /* UART5 */
+ − 232 .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
+ − 233 .word TIM7_IRQHandler /* TIM7 */
+ − 234 .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
+ − 235 .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
+ − 236 .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
+ − 237 .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
+ − 238 .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
+ − 239 .word ETH_IRQHandler /* Ethernet */
+ − 240 .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
+ − 241 .word CAN2_TX_IRQHandler /* CAN2 TX */
+ − 242 .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
+ − 243 .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
+ − 244 .word CAN2_SCE_IRQHandler /* CAN2 SCE */
+ − 245 .word OTG_FS_IRQHandler /* USB OTG FS */
+ − 246 .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
+ − 247 .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
+ − 248 .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
+ − 249 .word USART6_IRQHandler /* USART6 */
+ − 250 .word I2C3_EV_IRQHandler /* I2C3 event */
+ − 251 .word I2C3_ER_IRQHandler /* I2C3 error */
+ − 252 .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
+ − 253 .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
+ − 254 .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
+ − 255 .word OTG_HS_IRQHandler /* USB OTG HS */
+ − 256 .word DCMI_IRQHandler /* DCMI */
+ − 257 .word 0 /* Reserved */
+ − 258 .word HASH_RNG_IRQHandler /* Hash and Rng */
+ − 259 .word FPU_IRQHandler /* FPU */
+ − 260 .word UART7_IRQHandler /* UART7 */
+ − 261 .word UART8_IRQHandler /* UART8 */
+ − 262 .word SPI4_IRQHandler /* SPI4 */
+ − 263 .word SPI5_IRQHandler /* SPI5 */
+ − 264 .word SPI6_IRQHandler /* SPI6 */
+ − 265 .word SAI1_IRQHandler /* SAI1 */
+ − 266 .word LTDC_IRQHandler /* LTDC_IRQHandler */
+ − 267 .word LTDC_ER_IRQHandler /* LTDC_ER_IRQHandler */
+ − 268 .word DMA2D_IRQHandler /* DMA2D */
+ − 269
+ − 270 /*******************************************************************************
+ − 271 *
+ − 272 * Provide weak aliases for each Exception handler to the Default_Handler.
+ − 273 * As they are weak aliases, any function with the same name will override
+ − 274 * this definition.
+ − 275 *
+ − 276 *******************************************************************************/
+ − 277 .weak NMI_Handler
+ − 278 .thumb_set NMI_Handler,Default_Handler
+ − 279
+ − 280 .weak HardFault_Handler
+ − 281 .thumb_set HardFault_Handler,Default_Handler
+ − 282
+ − 283 .weak MemManage_Handler
+ − 284 .thumb_set MemManage_Handler,Default_Handler
+ − 285
+ − 286 .weak BusFault_Handler
+ − 287 .thumb_set BusFault_Handler,Default_Handler
+ − 288
+ − 289 .weak UsageFault_Handler
+ − 290 .thumb_set UsageFault_Handler,Default_Handler
+ − 291
+ − 292 .weak SVC_Handler
+ − 293 .thumb_set SVC_Handler,Default_Handler
+ − 294
+ − 295 .weak DebugMon_Handler
+ − 296 .thumb_set DebugMon_Handler,Default_Handler
+ − 297
+ − 298 .weak PendSV_Handler
+ − 299 .thumb_set PendSV_Handler,Default_Handler
+ − 300
+ − 301 .weak SysTick_Handler
+ − 302 .thumb_set SysTick_Handler,Default_Handler
+ − 303
+ − 304 .weak WWDG_IRQHandler
+ − 305 .thumb_set WWDG_IRQHandler,Default_Handler
+ − 306
+ − 307 .weak PVD_IRQHandler
+ − 308 .thumb_set PVD_IRQHandler,Default_Handler
+ − 309
+ − 310 .weak TAMP_STAMP_IRQHandler
+ − 311 .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
+ − 312
+ − 313 .weak RTC_WKUP_IRQHandler
+ − 314 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+ − 315
+ − 316 .weak FLASH_IRQHandler
+ − 317 .thumb_set FLASH_IRQHandler,Default_Handler
+ − 318
+ − 319 .weak RCC_IRQHandler
+ − 320 .thumb_set RCC_IRQHandler,Default_Handler
+ − 321
+ − 322 .weak EXTI0_IRQHandler
+ − 323 .thumb_set EXTI0_IRQHandler,Default_Handler
+ − 324
+ − 325 .weak EXTI1_IRQHandler
+ − 326 .thumb_set EXTI1_IRQHandler,Default_Handler
+ − 327
+ − 328 .weak EXTI2_IRQHandler
+ − 329 .thumb_set EXTI2_IRQHandler,Default_Handler
+ − 330
+ − 331 .weak EXTI3_IRQHandler
+ − 332 .thumb_set EXTI3_IRQHandler,Default_Handler
+ − 333
+ − 334 .weak EXTI4_IRQHandler
+ − 335 .thumb_set EXTI4_IRQHandler,Default_Handler
+ − 336
+ − 337 .weak DMA1_Stream0_IRQHandler
+ − 338 .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
+ − 339
+ − 340 .weak DMA1_Stream1_IRQHandler
+ − 341 .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
+ − 342
+ − 343 .weak DMA1_Stream2_IRQHandler
+ − 344 .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
+ − 345
+ − 346 .weak DMA1_Stream3_IRQHandler
+ − 347 .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
+ − 348
+ − 349 .weak DMA1_Stream4_IRQHandler
+ − 350 .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
+ − 351
+ − 352 .weak DMA1_Stream5_IRQHandler
+ − 353 .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
+ − 354
+ − 355 .weak DMA1_Stream6_IRQHandler
+ − 356 .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
+ − 357
+ − 358 .weak ADC_IRQHandler
+ − 359 .thumb_set ADC_IRQHandler,Default_Handler
+ − 360
+ − 361 .weak CAN1_TX_IRQHandler
+ − 362 .thumb_set CAN1_TX_IRQHandler,Default_Handler
+ − 363
+ − 364 .weak CAN1_RX0_IRQHandler
+ − 365 .thumb_set CAN1_RX0_IRQHandler,Default_Handler
+ − 366
+ − 367 .weak CAN1_RX1_IRQHandler
+ − 368 .thumb_set CAN1_RX1_IRQHandler,Default_Handler
+ − 369
+ − 370 .weak CAN1_SCE_IRQHandler
+ − 371 .thumb_set CAN1_SCE_IRQHandler,Default_Handler
+ − 372
+ − 373 .weak EXTI9_5_IRQHandler
+ − 374 .thumb_set EXTI9_5_IRQHandler,Default_Handler
+ − 375
+ − 376 .weak TIM1_BRK_TIM9_IRQHandler
+ − 377 .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
+ − 378
+ − 379 .weak TIM1_UP_TIM10_IRQHandler
+ − 380 .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
+ − 381
+ − 382 .weak TIM1_TRG_COM_TIM11_IRQHandler
+ − 383 .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
+ − 384
+ − 385 .weak TIM1_CC_IRQHandler
+ − 386 .thumb_set TIM1_CC_IRQHandler,Default_Handler
+ − 387
+ − 388 .weak TIM2_IRQHandler
+ − 389 .thumb_set TIM2_IRQHandler,Default_Handler
+ − 390
+ − 391 .weak TIM3_IRQHandler
+ − 392 .thumb_set TIM3_IRQHandler,Default_Handler
+ − 393
+ − 394 .weak TIM4_IRQHandler
+ − 395 .thumb_set TIM4_IRQHandler,Default_Handler
+ − 396
+ − 397 .weak I2C1_EV_IRQHandler
+ − 398 .thumb_set I2C1_EV_IRQHandler,Default_Handler
+ − 399
+ − 400 .weak I2C1_ER_IRQHandler
+ − 401 .thumb_set I2C1_ER_IRQHandler,Default_Handler
+ − 402
+ − 403 .weak I2C2_EV_IRQHandler
+ − 404 .thumb_set I2C2_EV_IRQHandler,Default_Handler
+ − 405
+ − 406 .weak I2C2_ER_IRQHandler
+ − 407 .thumb_set I2C2_ER_IRQHandler,Default_Handler
+ − 408
+ − 409 .weak SPI1_IRQHandler
+ − 410 .thumb_set SPI1_IRQHandler,Default_Handler
+ − 411
+ − 412 .weak SPI2_IRQHandler
+ − 413 .thumb_set SPI2_IRQHandler,Default_Handler
+ − 414
+ − 415 .weak USART1_IRQHandler
+ − 416 .thumb_set USART1_IRQHandler,Default_Handler
+ − 417
+ − 418 .weak USART2_IRQHandler
+ − 419 .thumb_set USART2_IRQHandler,Default_Handler
+ − 420
+ − 421 .weak USART3_IRQHandler
+ − 422 .thumb_set USART3_IRQHandler,Default_Handler
+ − 423
+ − 424 .weak EXTI15_10_IRQHandler
+ − 425 .thumb_set EXTI15_10_IRQHandler,Default_Handler
+ − 426
+ − 427 .weak RTC_Alarm_IRQHandler
+ − 428 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+ − 429
+ − 430 .weak OTG_FS_WKUP_IRQHandler
+ − 431 .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
+ − 432
+ − 433 .weak TIM8_BRK_TIM12_IRQHandler
+ − 434 .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
+ − 435
+ − 436 .weak TIM8_UP_TIM13_IRQHandler
+ − 437 .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
+ − 438
+ − 439 .weak TIM8_TRG_COM_TIM14_IRQHandler
+ − 440 .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
+ − 441
+ − 442 .weak TIM8_CC_IRQHandler
+ − 443 .thumb_set TIM8_CC_IRQHandler,Default_Handler
+ − 444
+ − 445 .weak DMA1_Stream7_IRQHandler
+ − 446 .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
+ − 447
+ − 448 .weak FMC_IRQHandler
+ − 449 .thumb_set FMC_IRQHandler,Default_Handler
+ − 450
+ − 451 .weak SDIO_IRQHandler
+ − 452 .thumb_set SDIO_IRQHandler,Default_Handler
+ − 453
+ − 454 .weak TIM5_IRQHandler
+ − 455 .thumb_set TIM5_IRQHandler,Default_Handler
+ − 456
+ − 457 .weak SPI3_IRQHandler
+ − 458 .thumb_set SPI3_IRQHandler,Default_Handler
+ − 459
+ − 460 .weak UART4_IRQHandler
+ − 461 .thumb_set UART4_IRQHandler,Default_Handler
+ − 462
+ − 463 .weak UART5_IRQHandler
+ − 464 .thumb_set UART5_IRQHandler,Default_Handler
+ − 465
+ − 466 .weak TIM6_DAC_IRQHandler
+ − 467 .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+ − 468
+ − 469 .weak TIM7_IRQHandler
+ − 470 .thumb_set TIM7_IRQHandler,Default_Handler
+ − 471
+ − 472 .weak DMA2_Stream0_IRQHandler
+ − 473 .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
+ − 474
+ − 475 .weak DMA2_Stream1_IRQHandler
+ − 476 .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
+ − 477
+ − 478 .weak DMA2_Stream2_IRQHandler
+ − 479 .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
+ − 480
+ − 481 .weak DMA2_Stream3_IRQHandler
+ − 482 .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
+ − 483
+ − 484 .weak DMA2_Stream4_IRQHandler
+ − 485 .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
+ − 486
+ − 487 .weak ETH_IRQHandler
+ − 488 .thumb_set ETH_IRQHandler,Default_Handler
+ − 489
+ − 490 .weak ETH_WKUP_IRQHandler
+ − 491 .thumb_set ETH_WKUP_IRQHandler,Default_Handler
+ − 492
+ − 493 .weak CAN2_TX_IRQHandler
+ − 494 .thumb_set CAN2_TX_IRQHandler,Default_Handler
+ − 495
+ − 496 .weak CAN2_RX0_IRQHandler
+ − 497 .thumb_set CAN2_RX0_IRQHandler,Default_Handler
+ − 498
+ − 499 .weak CAN2_RX1_IRQHandler
+ − 500 .thumb_set CAN2_RX1_IRQHandler,Default_Handler
+ − 501
+ − 502 .weak CAN2_SCE_IRQHandler
+ − 503 .thumb_set CAN2_SCE_IRQHandler,Default_Handler
+ − 504
+ − 505 .weak OTG_FS_IRQHandler
+ − 506 .thumb_set OTG_FS_IRQHandler,Default_Handler
+ − 507
+ − 508 .weak DMA2_Stream5_IRQHandler
+ − 509 .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
+ − 510
+ − 511 .weak DMA2_Stream6_IRQHandler
+ − 512 .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
+ − 513
+ − 514 .weak DMA2_Stream7_IRQHandler
+ − 515 .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
+ − 516
+ − 517 .weak USART6_IRQHandler
+ − 518 .thumb_set USART6_IRQHandler,Default_Handler
+ − 519
+ − 520 .weak I2C3_EV_IRQHandler
+ − 521 .thumb_set I2C3_EV_IRQHandler,Default_Handler
+ − 522
+ − 523 .weak I2C3_ER_IRQHandler
+ − 524 .thumb_set I2C3_ER_IRQHandler,Default_Handler
+ − 525
+ − 526 .weak OTG_HS_EP1_OUT_IRQHandler
+ − 527 .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
+ − 528
+ − 529 .weak OTG_HS_EP1_IN_IRQHandler
+ − 530 .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
+ − 531
+ − 532 .weak OTG_HS_WKUP_IRQHandler
+ − 533 .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
+ − 534
+ − 535 .weak OTG_HS_IRQHandler
+ − 536 .thumb_set OTG_HS_IRQHandler,Default_Handler
+ − 537
+ − 538 .weak DCMI_IRQHandler
+ − 539 .thumb_set DCMI_IRQHandler,Default_Handler
+ − 540
+ − 541 .weak HASH_RNG_IRQHandler
+ − 542 .thumb_set HASH_RNG_IRQHandler,Default_Handler
+ − 543
+ − 544 .weak FPU_IRQHandler
+ − 545 .thumb_set FPU_IRQHandler,Default_Handler
+ − 546
+ − 547 .weak UART7_IRQHandler
+ − 548 .thumb_set UART7_IRQHandler,Default_Handler
+ − 549
+ − 550 .weak UART8_IRQHandler
+ − 551 .thumb_set UART8_IRQHandler,Default_Handler
+ − 552
+ − 553 .weak SPI4_IRQHandler
+ − 554 .thumb_set SPI4_IRQHandler,Default_Handler
+ − 555
+ − 556 .weak SPI5_IRQHandler
+ − 557 .thumb_set SPI5_IRQHandler,Default_Handler
+ − 558
+ − 559 .weak SPI6_IRQHandler
+ − 560 .thumb_set SPI6_IRQHandler,Default_Handler
+ − 561
+ − 562 .weak SAI1_IRQHandler
+ − 563 .thumb_set SAI1_IRQHandler,Default_Handler
+ − 564
+ − 565 .weak LTDC_IRQHandler
+ − 566 .thumb_set LTDC_IRQHandler,Default_Handler
+ − 567
+ − 568 .weak LTDC_ER_IRQHandler
+ − 569 .thumb_set LTDC_ER_IRQHandler,Default_Handler
+ − 570
+ − 571 .weak DMA2D_IRQHandler
+ − 572 .thumb_set DMA2D_IRQHandler,Default_Handler