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annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_lptim.c @ 471:73da921869d9 fix-bat-2

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bugfix: implement battery charge percentage in dive header This commit is (much) less trivial than the related 919e5cb51c92. First, rename the CCRmode attribute (corresponding to byte Ox59) of the SLogbookHeaderOSTC3. This byte (according to the hwOS interface document) does not contain any CCR related value, but it contains "battery information". Already since 2017, this byte is used from libdivecomputer to interface the charge percentage. So, its renamed from CCRmode to batteryCharge, to reflect its true purpose. Now, simply add a batteryCharge attribute to the SLogbookHeader (and see below why that is possible, without breaking things). The remaining changes are trivial to implement battery charge percentage in dive header. Caveat: do not get confused by the exact role of the individual logbook header types. SLogbookHeaderOSTC3 is the formal type of the logbook format that the OSTC4 produces. This format is supposed to identical to the format, as is used in hwOS for the series of small OSTCs. Only some values of attributes are different. For example, the OSTC4 supports VPM, so byte 0x79 (deco model used for this dive) also has a value for VPM. But the SLogbookHeader type, despite its name and structure, is *not* a true logbook header, as it includes attributes that are not available in the SLogbookHeaderOSTC3 formal header type. Signed-off-by: Jan Mulder <jan@jlmulder.nl>
author Jan Mulder <jlmulder@xs4all.nl>
date Wed, 22 Apr 2020 13:08:57 +0200
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_ll_lptim.c
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4 * @author MCD Application Team
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5 * @brief LPTIM LL module driver.
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6 ******************************************************************************
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7 * @attention
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8 *
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9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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10 *
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11 * Redistribution and use in source and binary forms, with or without modification,
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12 * are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright notice,
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16 * this list of conditions and the following disclaimer in the documentation
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17 * and/or other materials provided with the distribution.
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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19 * may be used to endorse or promote products derived from this software
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20 * without specific prior written permission.
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21 *
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 *
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33 ******************************************************************************
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34 */
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35 #if defined(USE_FULL_LL_DRIVER)
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36
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37 /* Includes ------------------------------------------------------------------*/
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38 #include "stm32f4xx_ll_lptim.h"
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39 #include "stm32f4xx_ll_bus.h"
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40
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41 #ifdef USE_FULL_ASSERT
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42 #include "stm32_assert.h"
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43 #else
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44 #define assert_param(expr) ((void)0U)
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45 #endif
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46
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47 /** @addtogroup STM32F4xx_LL_Driver
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48 * @{
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49 */
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50
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51 #if defined (LPTIM1) || defined (LPTIM2)
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52
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53 /** @addtogroup LPTIM_LL
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54 * @{
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55 */
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56
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57 /* Private types -------------------------------------------------------------*/
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58 /* Private variables ---------------------------------------------------------*/
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59 /* Private constants ---------------------------------------------------------*/
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60 /* Private macros ------------------------------------------------------------*/
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61 /** @addtogroup LPTIM_LL_Private_Macros
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62 * @{
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63 */
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64 #define IS_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \
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65 || ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL))
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66
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67 #define IS_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1) \
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68 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2) \
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69 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4) \
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70 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8) \
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71 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16) \
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72 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32) \
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73 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64) \
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74 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128))
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75
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76 #define IS_LPTIM_WAVEFORM(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_PWM) \
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77 || ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE))
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78
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79 #define IS_LPTIM_OUTPUT_POLARITY(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_REGULAR) \
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80 || ((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_INVERSE))
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81 /**
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82 * @}
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83 */
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84
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85
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86 /* Private function prototypes -----------------------------------------------*/
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87 /* Exported functions --------------------------------------------------------*/
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88 /** @addtogroup LPTIM_LL_Exported_Functions
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89 * @{
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90 */
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91
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92 /** @addtogroup LPTIM_LL_EF_Init
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93 * @{
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94 */
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95
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96 /**
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97 * @brief Set LPTIMx registers to their reset values.
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98 * @param LPTIMx LP Timer instance
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99 * @retval An ErrorStatus enumeration value:
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100 * - SUCCESS: LPTIMx registers are de-initialized
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101 * - ERROR: invalid LPTIMx instance
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102 */
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103 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef* LPTIMx)
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104 {
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105 ErrorStatus result = SUCCESS;
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106
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107 /* Check the parameters */
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108 assert_param(IS_LPTIM_INSTANCE(LPTIMx));
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109
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110 if (LPTIMx == LPTIM1)
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111 {
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112 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM1);
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113 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM1);
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114 }
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115 #if defined(LPTIM2)
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116 else if (LPTIMx == LPTIM2)
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117 {
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118 LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_LPTIM2);
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119 LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_LPTIM2);
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120 }
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121 #endif
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122 else
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123 {
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124 result = ERROR;
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125 }
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126
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127 return result;
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128 }
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129
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130 /**
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131 * @brief Set each fields of the LPTIM_InitStruct structure to its default
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132 * value.
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133 * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
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134 * @retval None
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135 */
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136 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef* LPTIM_InitStruct)
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137 {
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138 /* Set the default configuration */
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139 LPTIM_InitStruct->ClockSource = LL_LPTIM_CLK_SOURCE_INTERNAL;
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140 LPTIM_InitStruct->Prescaler = LL_LPTIM_PRESCALER_DIV1;
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141 LPTIM_InitStruct->Waveform = LL_LPTIM_OUTPUT_WAVEFORM_PWM;
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142 LPTIM_InitStruct->Polarity = LL_LPTIM_OUTPUT_POLARITY_REGULAR;
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143 }
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144
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145 /**
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146 * @brief Configure the LPTIMx peripheral according to the specified parameters.
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147 * @note LL_LPTIM_Init can only be called when the LPTIM instance is disabled.
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148 * @note LPTIMx can be disabled using unitary function @ref LL_LPTIM_Disable().
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149 * @param LPTIMx LP Timer Instance
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150 * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
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151 * @retval An ErrorStatus enumeration value:
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152 * - SUCCESS: LPTIMx instance has been initialized
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153 * - ERROR: LPTIMx instance hasn't been initialized
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154 */
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155 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef * LPTIMx, LL_LPTIM_InitTypeDef* LPTIM_InitStruct)
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156 {
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157 ErrorStatus result = SUCCESS;
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158
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159 /* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled
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160 (ENABLE bit is reset to 0).
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161 */
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162 if (LL_LPTIM_IsEnabled(LPTIMx))
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163 {
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164 result = ERROR;
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165 }
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166 else
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167 {
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168 /* Check the parameters */
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169 assert_param(IS_LPTIM_INSTANCE(LPTIMx));
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170 assert_param(IS_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource));
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171 assert_param(IS_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler));
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172 assert_param(IS_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform));
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173 assert_param(IS_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->Polarity));
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174
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175 /* Set CKSEL bitfield according to ClockSource value */
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176 /* Set PRESC bitfield according to Prescaler value */
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177 /* Set WAVE bitfield according to Waveform value */
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178 /* Set WAVEPOL bitfield according to Polarity value */
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179 MODIFY_REG(LPTIMx->CFGR,
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180 (LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE| LPTIM_CFGR_WAVPOL),
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181 LPTIM_InitStruct->ClockSource | \
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182 LPTIM_InitStruct->Prescaler | \
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183 LPTIM_InitStruct->Waveform | \
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184 LPTIM_InitStruct->Polarity);
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185 }
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186
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187 return result;
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188 }
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189
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190 /**
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191 * @}
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192 */
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193
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194 /**
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195 * @}
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196 */
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197
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198 /**
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199 * @}
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200 */
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201
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202 #endif /* defined (LPTIM1) || defined (LPTIM2) */
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203
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204 /**
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205 * @}
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206 */
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207
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208 #endif /* USE_FULL_LL_DRIVER */
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209
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210 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/