Mercurial > public > ostc4
annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c @ 820:7322adb00305
Split definition of custom views:
In the previous version the T7 and T3 custom views were defined using the same enum. As result an ID shift may happen causing errors in the selection of the big font views.
The second reason to split the definition is that shift operations are used in uint32_t variable (limit 32). The total number of current views is 27 => splitting will avoid ID problems in case new views are added.
author | Ideenmodellierer |
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date | Sun, 24 Sep 2023 18:43:12 +0200 |
parents | c78bcbd5deda |
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rev | line source |
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128
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_hal_gpio.c |
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4 * @author MCD Application Team |
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5 * @brief GPIO HAL module driver. |
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6 * This file provides firmware functions to manage the following |
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7 * functionalities of the General Purpose Input/Output (GPIO) peripheral: |
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8 * + Initialization and de-initialization functions |
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9 * + IO operation functions |
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10 * |
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11 @verbatim |
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12 ============================================================================== |
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13 ##### GPIO Peripheral features ##### |
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14 ============================================================================== |
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15 [..] |
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16 Subject to the specific hardware characteristics of each I/O port listed in the datasheet, each |
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17 port bit of the General Purpose IO (GPIO) Ports, can be individually configured by software |
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18 in several modes: |
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19 (+) Input mode |
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20 (+) Analog mode |
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21 (+) Output mode |
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22 (+) Alternate function mode |
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23 (+) External interrupt/event lines |
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24 |
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25 [..] |
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26 During and just after reset, the alternate functions and external interrupt |
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27 lines are not active and the I/O ports are configured in input floating mode. |
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28 |
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29 [..] |
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30 All GPIO pins have weak internal pull-up and pull-down resistors, which can be |
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31 activated or not. |
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32 |
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33 [..] |
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34 In Output or Alternate mode, each IO can be configured on open-drain or push-pull |
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35 type and the IO speed can be selected depending on the VDD value. |
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36 |
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37 [..] |
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38 All ports have external interrupt/event capability. To use external interrupt |
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39 lines, the port must be configured in input mode. All available GPIO pins are |
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40 connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. |
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41 |
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42 [..] |
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43 The external interrupt/event controller consists of up to 23 edge detectors |
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44 (16 lines are connected to GPIO) for generating event/interrupt requests (each |
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45 input line can be independently configured to select the type (interrupt or event) |
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46 and the corresponding trigger event (rising or falling or both). Each line can |
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47 also be masked independently. |
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48 |
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49 ##### How to use this driver ##### |
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50 ============================================================================== |
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51 [..] |
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52 (#) Enable the GPIO AHB clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE(). |
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53 |
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54 (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). |
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55 (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure |
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56 (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef |
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57 structure. |
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58 (++) In case of Output or alternate function mode selection: the speed is |
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59 configured through "Speed" member from GPIO_InitTypeDef structure. |
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60 (++) In alternate mode is selection, the alternate function connected to the IO |
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61 is configured through "Alternate" member from GPIO_InitTypeDef structure. |
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62 (++) Analog mode is required when a pin is to be used as ADC channel |
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63 or DAC output. |
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64 (++) In case of external interrupt/event selection the "Mode" member from |
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65 GPIO_InitTypeDef structure select the type (interrupt or event) and |
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66 the corresponding trigger event (rising or falling or both). |
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67 |
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68 (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority |
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69 mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using |
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70 HAL_NVIC_EnableIRQ(). |
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71 |
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72 (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). |
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73 |
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74 (#) To set/reset the level of a pin configured in output mode use |
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75 HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). |
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76 |
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77 (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). |
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78 |
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79 |
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80 (#) During and just after reset, the alternate functions are not |
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81 active and the GPIO pins are configured in input floating mode (except JTAG |
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82 pins). |
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83 |
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84 (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose |
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85 (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has |
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86 priority over the GPIO function. |
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87 |
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88 (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as |
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89 general purpose PH0 and PH1, respectively, when the HSE oscillator is off. |
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90 The HSE has priority over the GPIO function. |
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91 |
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92 @endverbatim |
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93 ****************************************************************************** |
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94 * @attention |
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95 * |
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96 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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97 * |
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98 * Redistribution and use in source and binary forms, with or without modification, |
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99 * are permitted provided that the following conditions are met: |
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100 * 1. Redistributions of source code must retain the above copyright notice, |
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101 * this list of conditions and the following disclaimer. |
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102 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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103 * this list of conditions and the following disclaimer in the documentation |
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104 * and/or other materials provided with the distribution. |
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105 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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106 * may be used to endorse or promote products derived from this software |
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107 * without specific prior written permission. |
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108 * |
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109 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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110 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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111 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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112 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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113 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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114 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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115 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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116 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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117 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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118 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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119 * |
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120 ****************************************************************************** |
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121 */ |
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122 |
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123 /* Includes ------------------------------------------------------------------*/ |
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124 #include "stm32f4xx_hal.h" |
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125 |
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126 /** @addtogroup STM32F4xx_HAL_Driver |
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127 * @{ |
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128 */ |
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129 |
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130 /** @defgroup GPIO GPIO |
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131 * @brief GPIO HAL module driver |
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132 * @{ |
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133 */ |
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134 |
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135 #ifdef HAL_GPIO_MODULE_ENABLED |
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136 |
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137 /* Private typedef -----------------------------------------------------------*/ |
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138 /* Private define ------------------------------------------------------------*/ |
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139 /** @addtogroup GPIO_Private_Constants GPIO Private Constants |
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140 * @{ |
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141 */ |
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142 #define GPIO_MODE 0x00000003U |
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143 #define EXTI_MODE 0x10000000U |
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144 #define GPIO_MODE_IT 0x00010000U |
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145 #define GPIO_MODE_EVT 0x00020000U |
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146 #define RISING_EDGE 0x00100000U |
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147 #define FALLING_EDGE 0x00200000U |
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148 #define GPIO_OUTPUT_TYPE 0x00000010U |
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149 |
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150 #define GPIO_NUMBER 16U |
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151 /** |
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152 * @} |
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153 */ |
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154 /* Private macro -------------------------------------------------------------*/ |
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155 /* Private variables ---------------------------------------------------------*/ |
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156 /* Private function prototypes -----------------------------------------------*/ |
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157 /* Private functions ---------------------------------------------------------*/ |
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158 /* Exported functions --------------------------------------------------------*/ |
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159 /** @defgroup GPIO_Exported_Functions GPIO Exported Functions |
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160 * @{ |
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161 */ |
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162 |
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163 /** @defgroup GPIO_Exported_Functions_Group1 Initialization and de-initialization functions |
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164 * @brief Initialization and Configuration functions |
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165 * |
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166 @verbatim |
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167 =============================================================================== |
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168 ##### Initialization and de-initialization functions ##### |
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169 =============================================================================== |
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170 [..] |
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171 This section provides functions allowing to initialize and de-initialize the GPIOs |
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172 to be ready for use. |
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173 |
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174 @endverbatim |
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175 * @{ |
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176 */ |
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177 |
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178 |
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179 /** |
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180 * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init. |
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181 * @param GPIOx where x can be (A..K) to select the GPIO peripheral for STM32F429X device or |
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182 * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices. |
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183 * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains |
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184 * the configuration information for the specified GPIO peripheral. |
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185 * @retval None |
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186 */ |
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187 void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) |
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188 { |
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189 uint32_t position; |
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190 uint32_t ioposition = 0x00U; |
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191 uint32_t iocurrent = 0x00U; |
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192 uint32_t temp = 0x00U; |
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193 |
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194 /* Check the parameters */ |
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195 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); |
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196 assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); |
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197 assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); |
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198 assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); |
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199 |
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200 /* Configure the port pins */ |
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201 for(position = 0U; position < GPIO_NUMBER; position++) |
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202 { |
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203 /* Get the IO position */ |
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204 ioposition = 0x01U << position; |
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205 /* Get the current IO position */ |
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206 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; |
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207 |
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208 if(iocurrent == ioposition) |
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209 { |
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210 /*--------------------- GPIO Mode Configuration ------------------------*/ |
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211 /* In case of Alternate function mode selection */ |
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212 if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) |
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213 { |
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214 /* Check the Alternate function parameter */ |
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215 assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); |
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216 /* Configure Alternate function mapped with the current IO */ |
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217 temp = GPIOx->AFR[position >> 3U]; |
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218 temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ; |
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219 temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U)); |
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220 GPIOx->AFR[position >> 3U] = temp; |
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221 } |
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222 |
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223 /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ |
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224 temp = GPIOx->MODER; |
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225 temp &= ~(GPIO_MODER_MODER0 << (position * 2U)); |
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226 temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); |
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227 GPIOx->MODER = temp; |
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228 |
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229 /* In case of Output or Alternate function mode selection */ |
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230 if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || |
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231 (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) |
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232 { |
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233 /* Check the Speed parameter */ |
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234 assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); |
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235 /* Configure the IO Speed */ |
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236 temp = GPIOx->OSPEEDR; |
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237 temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U)); |
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238 temp |= (GPIO_Init->Speed << (position * 2U)); |
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239 GPIOx->OSPEEDR = temp; |
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240 |
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241 /* Configure the IO Output Type */ |
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242 temp = GPIOx->OTYPER; |
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243 temp &= ~(GPIO_OTYPER_OT_0 << position) ; |
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244 temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position); |
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245 GPIOx->OTYPER = temp; |
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246 } |
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247 |
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248 /* Activate the Pull-up or Pull down resistor for the current IO */ |
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249 temp = GPIOx->PUPDR; |
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250 temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U)); |
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251 temp |= ((GPIO_Init->Pull) << (position * 2U)); |
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252 GPIOx->PUPDR = temp; |
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253 |
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254 /*--------------------- EXTI Mode Configuration ------------------------*/ |
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255 /* Configure the External Interrupt or event for the current IO */ |
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256 if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) |
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257 { |
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258 /* Enable SYSCFG Clock */ |
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259 __HAL_RCC_SYSCFG_CLK_ENABLE(); |
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260 |
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261 temp = SYSCFG->EXTICR[position >> 2U]; |
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262 temp &= ~(0x0FU << (4U * (position & 0x03U))); |
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263 temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); |
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264 SYSCFG->EXTICR[position >> 2U] = temp; |
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265 |
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266 /* Clear EXTI line configuration */ |
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267 temp = EXTI->IMR; |
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268 temp &= ~((uint32_t)iocurrent); |
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269 if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) |
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270 { |
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271 temp |= iocurrent; |
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272 } |
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273 EXTI->IMR = temp; |
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274 |
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275 temp = EXTI->EMR; |
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276 temp &= ~((uint32_t)iocurrent); |
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277 if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) |
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278 { |
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279 temp |= iocurrent; |
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280 } |
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281 EXTI->EMR = temp; |
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282 |
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283 /* Clear Rising Falling edge configuration */ |
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284 temp = EXTI->RTSR; |
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285 temp &= ~((uint32_t)iocurrent); |
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286 if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) |
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287 { |
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288 temp |= iocurrent; |
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289 } |
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290 EXTI->RTSR = temp; |
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291 |
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292 temp = EXTI->FTSR; |
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293 temp &= ~((uint32_t)iocurrent); |
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294 if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) |
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295 { |
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296 temp |= iocurrent; |
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297 } |
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298 EXTI->FTSR = temp; |
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299 } |
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300 } |
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301 } |
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302 } |
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303 |
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304 /** |
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305 * @brief De-initializes the GPIOx peripheral registers to their default reset values. |
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306 * @param GPIOx where x can be (A..K) to select the GPIO peripheral for STM32F429X device or |
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307 * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices. |
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308 * @param GPIO_Pin specifies the port bit to be written. |
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309 * This parameter can be one of GPIO_PIN_x where x can be (0..15). |
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310 * @retval None |
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311 */ |
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312 void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) |
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313 { |
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314 uint32_t position; |
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315 uint32_t ioposition = 0x00U; |
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316 uint32_t iocurrent = 0x00U; |
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317 uint32_t tmp = 0x00U; |
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318 |
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319 /* Check the parameters */ |
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320 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); |
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321 |
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322 /* Configure the port pins */ |
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323 for(position = 0U; position < GPIO_NUMBER; position++) |
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324 { |
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325 /* Get the IO position */ |
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326 ioposition = 0x01U << position; |
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327 /* Get the current IO position */ |
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328 iocurrent = (GPIO_Pin) & ioposition; |
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329 |
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330 if(iocurrent == ioposition) |
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331 { |
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332 /*------------------------- GPIO Mode Configuration --------------------*/ |
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333 /* Configure IO Direction in Input Floating Mode */ |
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334 GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2U)); |
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335 |
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336 /* Configure the default Alternate Function in current IO */ |
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337 GPIOx->AFR[position >> 3U] &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ; |
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338 |
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339 /* Configure the default value for IO Speed */ |
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340 GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U)); |
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341 |
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342 /* Configure the default value IO Output Type */ |
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343 GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ; |
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344 |
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345 /* Deactivate the Pull-up and Pull-down resistor for the current IO */ |
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346 GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U)); |
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347 |
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348 /*------------------------- EXTI Mode Configuration --------------------*/ |
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349 tmp = SYSCFG->EXTICR[position >> 2U]; |
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350 tmp &= (0x0FU << (4U * (position & 0x03U))); |
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351 if(tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)))) |
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352 { |
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353 /* Configure the External Interrupt or event for the current IO */ |
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354 tmp = 0x0FU << (4U * (position & 0x03U)); |
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355 SYSCFG->EXTICR[position >> 2U] &= ~tmp; |
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356 |
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357 /* Clear EXTI line configuration */ |
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358 EXTI->IMR &= ~((uint32_t)iocurrent); |
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359 EXTI->EMR &= ~((uint32_t)iocurrent); |
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360 |
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361 /* Clear Rising Falling edge configuration */ |
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362 EXTI->RTSR &= ~((uint32_t)iocurrent); |
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363 EXTI->FTSR &= ~((uint32_t)iocurrent); |
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364 } |
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365 } |
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366 } |
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367 } |
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368 |
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369 /** |
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370 * @} |
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371 */ |
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372 |
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373 /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions |
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374 * @brief GPIO Read and Write |
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375 * |
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376 @verbatim |
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377 =============================================================================== |
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378 ##### IO operation functions ##### |
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379 =============================================================================== |
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380 |
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381 @endverbatim |
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382 * @{ |
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383 */ |
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384 |
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385 /** |
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386 * @brief Reads the specified input port pin. |
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387 * @param GPIOx where x can be (A..K) to select the GPIO peripheral for STM32F429X device or |
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388 * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices. |
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389 * @param GPIO_Pin specifies the port bit to read. |
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390 * This parameter can be GPIO_PIN_x where x can be (0..15). |
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391 * @retval The input port pin value. |
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392 */ |
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393 GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
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394 { |
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395 GPIO_PinState bitstatus; |
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396 |
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397 /* Check the parameters */ |
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398 assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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399 |
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400 if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) |
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401 { |
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402 bitstatus = GPIO_PIN_SET; |
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403 } |
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404 else |
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405 { |
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406 bitstatus = GPIO_PIN_RESET; |
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407 } |
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408 return bitstatus; |
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409 } |
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410 |
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411 /** |
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412 * @brief Sets or clears the selected data port bit. |
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413 * |
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414 * @note This function uses GPIOx_BSRR register to allow atomic read/modify |
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415 * accesses. In this way, there is no risk of an IRQ occurring between |
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416 * the read and the modify access. |
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417 * |
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418 * @param GPIOx where x can be (A..K) to select the GPIO peripheral for STM32F429X device or |
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419 * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices. |
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420 * @param GPIO_Pin specifies the port bit to be written. |
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421 * This parameter can be one of GPIO_PIN_x where x can be (0..15). |
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422 * @param PinState specifies the value to be written to the selected bit. |
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423 * This parameter can be one of the GPIO_PinState enum values: |
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424 * @arg GPIO_PIN_RESET: to clear the port pin |
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425 * @arg GPIO_PIN_SET: to set the port pin |
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426 * @retval None |
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427 */ |
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428 void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) |
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429 { |
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430 /* Check the parameters */ |
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431 assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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432 assert_param(IS_GPIO_PIN_ACTION(PinState)); |
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433 |
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434 if(PinState != GPIO_PIN_RESET) |
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435 { |
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436 GPIOx->BSRR = GPIO_Pin; |
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437 } |
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438 else |
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439 { |
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440 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; |
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441 } |
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442 } |
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443 |
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444 /** |
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445 * @brief Toggles the specified GPIO pins. |
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446 * @param GPIOx Where x can be (A..K) to select the GPIO peripheral for STM32F429X device or |
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447 * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices. |
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448 * @param GPIO_Pin Specifies the pins to be toggled. |
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449 * @retval None |
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450 */ |
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451 void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
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452 { |
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453 /* Check the parameters */ |
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454 assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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455 |
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456 GPIOx->ODR ^= GPIO_Pin; |
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457 } |
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458 |
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459 /** |
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460 * @brief Locks GPIO Pins configuration registers. |
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461 * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, |
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462 * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. |
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463 * @note The configuration of the locked GPIO pins can no longer be modified |
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464 * until the next reset. |
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465 * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F4 family |
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466 * @param GPIO_Pin specifies the port bit to be locked. |
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467 * This parameter can be any combination of GPIO_PIN_x where x can be (0..15). |
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468 * @retval None |
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469 */ |
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470 HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
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471 { |
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472 __IO uint32_t tmp = GPIO_LCKR_LCKK; |
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473 |
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474 /* Check the parameters */ |
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475 assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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476 |
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477 /* Apply lock key write sequence */ |
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478 tmp |= GPIO_Pin; |
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479 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ |
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480 GPIOx->LCKR = tmp; |
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481 /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */ |
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482 GPIOx->LCKR = GPIO_Pin; |
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483 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ |
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484 GPIOx->LCKR = tmp; |
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485 /* Read LCKK bit*/ |
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486 tmp = GPIOx->LCKR; |
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487 |
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488 if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET) |
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489 { |
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490 return HAL_OK; |
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491 } |
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492 else |
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493 { |
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494 return HAL_ERROR; |
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495 } |
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496 } |
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497 |
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498 /** |
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499 * @brief This function handles EXTI interrupt request. |
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500 * @param GPIO_Pin Specifies the pins connected EXTI line |
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501 * @retval None |
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502 */ |
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503 void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) |
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504 { |
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505 /* EXTI line interrupt detected */ |
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506 if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) |
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507 { |
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508 __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); |
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509 HAL_GPIO_EXTI_Callback(GPIO_Pin); |
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510 } |
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511 } |
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512 |
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513 /** |
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514 * @brief EXTI line detection callbacks. |
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515 * @param GPIO_Pin Specifies the pins connected EXTI line |
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516 * @retval None |
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517 */ |
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518 __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) |
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519 { |
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520 /* Prevent unused argument(s) compilation warning */ |
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521 UNUSED(GPIO_Pin); |
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522 /* NOTE: This function Should not be modified, when the callback is needed, |
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523 the HAL_GPIO_EXTI_Callback could be implemented in the user file |
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524 */ |
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525 } |
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526 |
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527 /** |
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528 * @} |
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529 */ |
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530 |
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531 |
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532 /** |
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533 * @} |
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534 */ |
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535 |
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536 #endif /* HAL_GPIO_MODULE_ENABLED */ |
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537 /** |
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538 * @} |
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539 */ |
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540 |
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541 /** |
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542 * @} |
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543 */ |
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544 |
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545 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |