annotate Small_CPU/Src/spi.c @ 570:701ead8dddab

Try to reduce legth of log entry string: The metric views of the log data did no longer fit into the line space (because of the change ' to "min"). This may be avoided / reduced by removing spaces depending on the view parameters
author Ideenmodellierer
date Mon, 30 Nov 2020 20:55:23 +0100
parents 84a4e1200726
children 1b995079c045
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1 /**
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
2 ******************************************************************************
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
3 * @file spi.c
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
4 * @author heinrichs weikamp gmbh
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
5 * @version V0.0.1
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
6 * @date 16-Sept-2014
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
7 * @brief Source code for spi control
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
8 *
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
9 @verbatim
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
10 ==============================================================================
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
11 ##### How to use #####
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
12 ==============================================================================
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
13 @endverbatim
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
14 ******************************************************************************
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
15 * @attention
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
16 *
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
17 * <h2><center>&copy; COPYRIGHT(c) 2014 heinrichs weikamp</center></h2>
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
18 *
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
19 ******************************************************************************
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
20 */
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
21
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
22 /* Includes ------------------------------------------------------------------*/
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
23
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
24 #include "global_constants.h"
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
25 #include "spi.h"
120
6347a86caa18 Cleanup warning and disable printf calls
Ideenmodellierer
parents: 104
diff changeset
26 #include "dma.h"
408
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
27 #include "batteryGasGauge.h"
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
28 #include "pressure.h"
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
29
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
30 //#include "gpio.h"
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
31
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
32 /* USER CODE BEGIN 0 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
33 #include "scheduler.h"
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
34
120
6347a86caa18 Cleanup warning and disable printf calls
Ideenmodellierer
parents: 104
diff changeset
35 #ifdef DEBUG_GPIO
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
36 extern void GPIO_new_DEBUG_LOW(void);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
37 extern void GPIO_new_DEBUG_HIGH(void);
120
6347a86caa18 Cleanup warning and disable printf calls
Ideenmodellierer
parents: 104
diff changeset
38 #endif
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
39
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
40 uint8_t data_error = 0;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
41 uint32_t data_error_time = 0;
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
42 uint8_t SPIDataRX = 0; /* Flag to signal that SPI RX callback has been triggered */
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
43
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
44 static void SPI_Error_Handler(void);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
45
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
46 /* USER CODE END 0 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
47
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
48 static uint8_t SPI_check_header_and_footer_ok(void);
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
49 static uint8_t DataEX_check_header_and_footer_shifted(void);
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
50
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
51 SPI_HandleTypeDef hspi1;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
52 SPI_HandleTypeDef hspi3;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
53
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
54 DMA_HandleTypeDef hdma_tx;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
55 DMA_HandleTypeDef hdma_rx;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
56
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
57 // SPI3 init function
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
58 void MX_SPI3_Init(void) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
59 hspi3.Instance = SPI3;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
60 hspi3.Init.Mode = SPI_MODE_MASTER;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
61 hspi3.Init.Direction = SPI_DIRECTION_2LINES;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
62 hspi3.Init.DataSize = SPI_DATASIZE_8BIT;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
63 hspi3.Init.CLKPolarity = SPI_POLARITY_HIGH;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
64 hspi3.Init.CLKPhase = SPI_PHASE_1EDGE;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
65 hspi3.Init.NSS = SPI_NSS_SOFT;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
66 hspi3.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
67 hspi3.Init.FirstBit = SPI_FIRSTBIT_MSB;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
68 hspi3.Init.TIMode = SPI_TIMODE_DISABLED;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
69 hspi3.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
70 hspi3.Init.CRCPolynomial = 7;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
71 HAL_SPI_Init(&hspi3);
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
72 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
73
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
74 void MX_SPI3_DeInit(void) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
75 HAL_SPI_DeInit(&hspi3);
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
76 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
77
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
78 uint8_t SPI3_ButtonAdjust(uint8_t *arrayInput, uint8_t *arrayOutput) {
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
79 HAL_StatusTypeDef status;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
80 uint8_t answer[10];
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
81 uint8_t rework[10];
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
82
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
83 rework[0] = 0xFF;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
84 for (int i = 0; i < 3; i++) {
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
85 // limiter
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
86 if (arrayInput[i] == 0xFF)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
87 arrayInput[i] = 0xFE;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
88 if (arrayInput[i] >= 15) {
82
a6f0881074a4 +i2c analog noise filtering
Dmitry Romanov <kitt@bk.ru>
parents: 63
diff changeset
89 // copy - ausl�se-schwelle
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
90 rework[i + 1] = arrayInput[i];
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
91 // wieder-scharf-schalte-schwelle
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
92 rework[i + 3 + 1] = arrayInput[i] - 10;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
93 } else if (arrayInput[i] >= 10) {
82
a6f0881074a4 +i2c analog noise filtering
Dmitry Romanov <kitt@bk.ru>
parents: 63
diff changeset
94 // copy - ausl�se-schwelle
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
95 rework[i + 1] = arrayInput[i];
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
96 // wieder-scharf-schalte-schwelle
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
97 rework[i + 3 + 1] = arrayInput[i] - 5;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
98 } else {
82
a6f0881074a4 +i2c analog noise filtering
Dmitry Romanov <kitt@bk.ru>
parents: 63
diff changeset
99 // copy - ausl�se-schwelle
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
100 rework[i + 1] = 7;
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
101 // wieder-scharf-schalte-schwelle
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
102 rework[i + 3 + 1] = 6;
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
103 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
104 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
105
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
106 status = HAL_OK; /* = 0 */
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
107 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_SET);
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
108 for (int i = 0; i < 7; i++) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
109 HAL_Delay(10);
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
110 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_RESET);
63
cd298de33783 Replaced wait loop with delay fct
Ideenmodellierer
parents: 38
diff changeset
111 HAL_Delay(10);
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
112 status += HAL_SPI_TransmitReceive(&hspi3, &rework[i], &answer[i], 1,
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
113 20);
63
cd298de33783 Replaced wait loop with delay fct
Ideenmodellierer
parents: 38
diff changeset
114 HAL_Delay(10);
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
115 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_SET);
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
116 }
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
117
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
118 if (status == HAL_OK) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
119 for (int i = 0; i < 3; i++) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
120 arrayOutput[i] = answer[i + 2]; // first not, return of 0xFF not
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
121 }
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
122 return 1;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
123 } else
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
124
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
125 return 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
126 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
127
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
128 // SPI5 init function
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
129 void MX_SPI1_Init(void) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
130 hspi1.Instance = SPI1;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
131 hspi1.Init.Mode = SPI_MODE_SLAVE;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
132 hspi1.Init.Direction = SPI_DIRECTION_2LINES;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
133 hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
134 hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
135 hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
136 hspi1.Init.NSS = SPI_NSS_HARD_INPUT; //SPI_NSS_SOFT;
148
ee744c7160ce Use SPI TX callback to synchronize to main CPU
Ideenmodellierer
parents: 143
diff changeset
137 hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
138 hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
139 hspi1.Init.TIMode = SPI_TIMODE_DISABLED;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
140 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED; //_DISABLED; _ENABLED;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
141 hspi1.Init.CRCPolynomial = 7;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
142 HAL_SPI_Init(&hspi1);
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
143 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
144
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
145 void MX_SPI_DeInit(void) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
146 HAL_SPI_DeInit(&hspi1);
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
147 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
148
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
149 void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) {
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
150
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
151 GPIO_InitTypeDef GPIO_InitStruct;
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
152
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
153 if (hspi->Instance == SPI1) {
148
ee744c7160ce Use SPI TX callback to synchronize to main CPU
Ideenmodellierer
parents: 143
diff changeset
154 SPIDataRX = 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
155 // Peripheral clock enable
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
156 __SPI1_CLK_ENABLE();
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
157 __GPIOA_CLK_ENABLE();
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
158 //SPI1 GPIO Configuration
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
159 //PA4 ------> SPI1_CS
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
160 //PA5 ------> SPI1_SCK
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
161 //PA6 ------> SPI1_MISO
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
162 //PA7 ------> SPI1_MOSI
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
163
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
164 GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7;
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
165 // GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
166 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
167 GPIO_InitStruct.Pull = GPIO_PULLUP;
124
4b355396557a Change GPIO speed for SPI communication as recommended by STM32 Errata
Ideenmodellierer
parents: 120
diff changeset
168 GPIO_InitStruct.Speed = GPIO_SPEED_FAST; /* Decision is based on errata which recommends FAST for GPIO at 90Mhz */
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
169 GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
170 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
171
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
172 //##-3- Configure the DMA streams ##########################################
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
173 // Configure the DMA handler for Transmission process
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
174 hdma_tx.Instance = DMA2_Stream3;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
175 hdma_tx.Init.Channel = DMA_CHANNEL_3;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
176 hdma_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
177 hdma_tx.Init.PeriphInc = DMA_PINC_DISABLE;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
178 hdma_tx.Init.MemInc = DMA_MINC_ENABLE;
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
179 hdma_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
180 hdma_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
181 hdma_tx.Init.Mode = DMA_NORMAL;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
182 hdma_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
183 hdma_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
184 hdma_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
185 hdma_tx.Init.MemBurst = DMA_MBURST_INC4;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
186 hdma_tx.Init.PeriphBurst = DMA_PBURST_INC4;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
187
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
188 HAL_DMA_Init(&hdma_tx);
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
189
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
190 // Associate the initialized DMA handle to the the SPI handle
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
191 __HAL_LINKDMA(hspi, hdmatx, hdma_tx);
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
192
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
193 // Configure the DMA handler for Transmission process
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
194 hdma_rx.Instance = DMA2_Stream0;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
195 hdma_rx.Init.Channel = DMA_CHANNEL_3;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
196 hdma_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
197 hdma_rx.Init.PeriphInc = DMA_PINC_DISABLE;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
198 hdma_rx.Init.MemInc = DMA_MINC_ENABLE;
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
199 hdma_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
200 hdma_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
201 hdma_rx.Init.Mode = DMA_NORMAL;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
202 hdma_rx.Init.Priority = DMA_PRIORITY_HIGH;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
203 hdma_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
204 hdma_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
205 hdma_rx.Init.MemBurst = DMA_MBURST_INC4;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
206 hdma_rx.Init.PeriphBurst = DMA_PBURST_INC4;
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
207
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
208 HAL_DMA_Init(&hdma_rx);
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
209
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
210 // Associate the initialized DMA handle to the the SPI handle
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
211 __HAL_LINKDMA(hspi, hdmarx, hdma_rx);
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
212
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
213 //##-4- Configure the NVIC for DMA #########################################
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
214 //NVIC configuration for DMA transfer complete interrupt (SPI3_RX)
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
215 HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 1, 0);
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
216 HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
217
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
218 // NVIC configuration for DMA transfer complete interrupt (SPI1_TX)
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
219 HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 1, 1);
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
220 HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
221 } else if (hspi->Instance == SPI3) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
222 __GPIOC_CLK_ENABLE();
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
223 __SPI3_CLK_ENABLE();
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
224
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
225 //SPI1 GPIO Configuration
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
226 //PC10 ------> SPI3_SCK
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
227 //PC11 ------> SPI3_MISO
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
228 //PC12 ------> SPI3_MOSI
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
229 //PA15 ------> SPI3_NSS (official)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
230 //PC9 ------> SPI3_NSS (hw)
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
231
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
232 GPIO_InitStruct.Pin = GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
233 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
234 GPIO_InitStruct.Pull = GPIO_PULLUP;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
235 GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
236 GPIO_InitStruct.Alternate = GPIO_AF6_SPI3;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
237 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
238
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
239 GPIO_InitStruct.Pin = GPIO_PIN_9;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
240 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
241 GPIO_InitStruct.Pull = GPIO_PULLUP;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
242 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
243 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
244
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
245 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_SET);
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
246 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
247 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
248
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
249 void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
250 if (hspi->Instance == SPI1) {
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
251 __SPI1_FORCE_RESET();
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
252 __SPI1_RELEASE_RESET();
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
253
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
254 //SPI1 GPIO Configuration
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
255 //PA5 ------> SPI1_SCK
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
256 //PA6 ------> SPI1_MISO
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
257 //PA7 ------> SPI1_MOSI
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
258
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
259 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7);
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
260
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
261 HAL_DMA_DeInit(&hdma_tx);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
262 HAL_DMA_DeInit(&hdma_rx);
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
263
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
264 HAL_NVIC_DisableIRQ(DMA2_Stream3_IRQn);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
265 HAL_NVIC_DisableIRQ(DMA2_Stream0_IRQn);
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
266 } else if (hspi->Instance == SPI3) {
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
267 __SPI3_FORCE_RESET();
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
268 __SPI3_RELEASE_RESET();
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
269
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
270 //SPI1 GPIO Configuration
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
271 //PC10 ------> SPI3_SCK
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
272 //PC11 ------> SPI3_MISO
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
273 //PC12 ------> SPI3_MOSI
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
274 //PA15 ------> SPI3_NSS (official)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
275 //PC9 ------> SPI3_NSS (hw)
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
276 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12);
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
277 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
278 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
279
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
280 void SPI_synchronize_with_Master(void) {
148
ee744c7160ce Use SPI TX callback to synchronize to main CPU
Ideenmodellierer
parents: 143
diff changeset
281 #ifdef USE_OLD_SYNC_METHOD
136
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
282 GPIO_InitTypeDef GPIO_InitStruct;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
283 //
136
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
284 __GPIOA_CLK_ENABLE();
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
285 /**SPI1 GPIO Configuration
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
286 PA5 ------> SPI1_SCK
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
287 */
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
288 GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5;
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
289 GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
290 GPIO_InitStruct.Pull = GPIO_PULLUP;
148
ee744c7160ce Use SPI TX callback to synchronize to main CPU
Ideenmodellierer
parents: 143
diff changeset
291 GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
136
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
292 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
293 //
136
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
294 HAL_Delay(10);
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
295 while (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_4) == 0);
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
296 HAL_Delay(10);
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
297 while (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_5) == 1);
148
ee744c7160ce Use SPI TX callback to synchronize to main CPU
Ideenmodellierer
parents: 143
diff changeset
298 HAL_Delay(50);
136
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
299 #endif
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
300 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
301
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
302 void SPI_Start_single_TxRx_with_Master(void) {
408
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
303 static uint8_t DevicedataDelayCnt = 10;
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
304 static uint8_t DeviceDataPending = 0;
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
305 uint8_t * pOutput;
136
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
306 HAL_StatusTypeDef retval;
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
307
408
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
308 if ((global.dataSendToSlave.getDeviceDataNow) || (DeviceDataPending))
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
309 {
559
84a4e1200726 Check if HW evaluation was performed:
Ideenmodellierer
parents: 408
diff changeset
310 if(((DevicedataDelayCnt == 0) || (((get_voltage() != 6.0) && (get_temperature() != 0.0)
84a4e1200726 Check if HW evaluation was performed:
Ideenmodellierer
parents: 408
diff changeset
311 && global.deviceDataSendToMaster.hw_Info.checkCompass)
84a4e1200726 Check if HW evaluation was performed:
Ideenmodellierer
parents: 408
diff changeset
312 && global.deviceDataSendToMaster.hw_Info.checkADC))) /* devicedata complete? */
408
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
313 {
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
314 global.dataSendToSlave.getDeviceDataNow = 0;
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
315 DeviceDataPending = 0;
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
316 pOutput = (uint8_t*) &(global.deviceDataSendToMaster);
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
317 }
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
318 else
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
319 {
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
320 DeviceDataPending = 1;
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
321 DevicedataDelayCnt--;
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
322 pOutput = (uint8_t*) &(global.dataSendToMaster);
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
323 }
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
324
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
325 }
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
326 else
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
327 {
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
328 pOutput = (uint8_t*) &(global.dataSendToMaster);
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
329 }
136
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
330 retval = HAL_SPI_TransmitReceive_DMA(&hspi1, pOutput,(uint8_t*) &(global.dataSendToSlave), EXCHANGE_BUFFERSIZE);
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
331 if ( retval!= HAL_OK) {
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
332 SPI_Error_Handler();
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
333 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
334 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
335
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
336 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
337 /* restart SPI */
136
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
338 if (hspi == &hspi1)
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
339 {
264
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
340 if(SPI_check_header_and_footer_ok()) /* process timestamp provided by main */
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
341 {
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
342 Scheduler_SyncToSPI(global.dataSendToSlave.header.checkCode[SPI_HEADER_INDEX_TX_TICK]);
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
343 }
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
344 else
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
345 {
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
346 Scheduler_SyncToSPI(0); /* => no async will be calculated */
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
347 }
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
348
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
349 SPIDataRX = 1;
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
350
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
351 /* stop data exchange? */
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
352 if (global.mode == MODE_SHUTDOWN) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
353 global.mode = MODE_SLEEP;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
354 global.dataSendToSlavePending = 0;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
355 global.dataSendToSlaveIsValid = 1;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
356 global.dataSendToSlaveIsNotValidCount = 0;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
357 }
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
358 }
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
359 }
82
a6f0881074a4 +i2c analog noise filtering
Dmitry Romanov <kitt@bk.ru>
parents: 63
diff changeset
360
264
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
361 uint8_t SPI_Evaluate_RX_Data()
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
362 {
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
363 uint8_t resettimeout = 1;
264
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
364 uint8_t ret = SPIDataRX;
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
365
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
366 if ((global.mode != MODE_SHUTDOWN) && ( global.mode != MODE_SLEEP) && (SPIDataRX))
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
367 {
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
368 SPIDataRX = 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
369 /* data consistent? */
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
370 if (SPI_check_header_and_footer_ok()) {
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
371 global.dataSendToMaster.header.checkCode[SPI_HEADER_INDEX_RX_STATE] = SPI_RX_STATE_OK;
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
372 // GPIO_new_DEBUG_HIGH(); //For debug.
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
373 global.dataSendToSlaveIsValid = 1;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
374 global.dataSendToSlaveIsNotValidCount = 0;
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
375 /* Master signal a data shift outside of his control => reset own DMA and resync */
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
376 if(global.dataSendToSlave.header.checkCode[SPI_HEADER_INDEX_RX_STATE] == SPI_RX_STATE_SHIFTED)
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
377 {
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
378 HAL_SPI_Abort_IT(&hspi1);
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
379 Scheduler_Request_sync_with_SPI(SPI_SYNC_METHOD_HARD);
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
380 }
277
580822b5d3d1 Rework SPI error handling.
ideenmodellierer
parents: 264
diff changeset
381 else
580822b5d3d1 Rework SPI error handling.
ideenmodellierer
parents: 264
diff changeset
382 {
580822b5d3d1 Rework SPI error handling.
ideenmodellierer
parents: 264
diff changeset
383 }
580822b5d3d1 Rework SPI error handling.
ideenmodellierer
parents: 264
diff changeset
384 SPI_Start_single_TxRx_with_Master();
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
385 }
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
386 else
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
387 {
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
388 // GPIO_new_DEBUG_LOW(); //For debug.
136
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
389 global.dataSendToSlaveIsValid = 0;
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
390 global.dataSendToSlaveIsNotValidCount++;
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
391 if(DataEX_check_header_and_footer_shifted())
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
392 {
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
393
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
394 /* Reset own DMA */
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
395 if ((global.dataSendToSlaveIsNotValidCount % 10) == 1) //% 10
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
396 {
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
397 HAL_SPI_Abort_IT(&hspi1); /* reset DMA only once */
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
398 }
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
399 /* Signal problem to master */
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
400 if ((global.dataSendToSlaveIsNotValidCount ) >= 2)
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
401 {
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
402 global.dataSendToMaster.header.checkCode[SPI_HEADER_INDEX_RX_STATE] = SPI_RX_STATE_SHIFTED;
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
403 }
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
404 }
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
405 else /* handle received data as if no data would have been received */
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
406 {
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
407 global.dataSendToMaster.header.checkCode[SPI_HEADER_INDEX_RX_STATE] = SPI_RX_STATE_OFFLINE;
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
408 resettimeout = 0;
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
409 }
277
580822b5d3d1 Rework SPI error handling.
ideenmodellierer
parents: 264
diff changeset
410 HAL_SPI_TransmitReceive_DMA(&hspi1,(uint8_t*) &(global.dataSendToMaster),(uint8_t*) &(global.dataSendToSlave), EXCHANGE_BUFFERSIZE);
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
411 }
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
412
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
413 global.dataSendToMaster.power_on_reset = 0;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
414 global.deviceDataSendToMaster.power_on_reset = 0;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
415
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
416 scheduleSpecial_Evaluate_DataSendToSlave();
136
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
417
264
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
418 if(resettimeout)
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
419 {
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
420 global.check_sync_not_running = 0;
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
421 }
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
422 }
264
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
423 return ret;
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
424 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
425
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
426 static uint8_t SPI_check_header_and_footer_ok(void) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
427 if (global.dataSendToSlave.header.checkCode[0] != 0xBB)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
428 return 0;
148
ee744c7160ce Use SPI TX callback to synchronize to main CPU
Ideenmodellierer
parents: 143
diff changeset
429 #ifdef USE_OLD_HEADER_FORMAT
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
430 if (global.dataSendToSlave.header.checkCode[1] != 0x01)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
431 return 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
432 if (global.dataSendToSlave.header.checkCode[2] != 0x01)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
433 return 0;
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
434 #endif
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
435 if (global.dataSendToSlave.header.checkCode[3] != 0xBB)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
436 return 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
437 if (global.dataSendToSlave.footer.checkCode[0] != 0xF4)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
438 return 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
439 if (global.dataSendToSlave.footer.checkCode[1] != 0xF3)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
440 return 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
441 if (global.dataSendToSlave.footer.checkCode[2] != 0xF2)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
442 return 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
443 if (global.dataSendToSlave.footer.checkCode[3] != 0xF1)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
444 return 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
445
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
446 return 1;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
447 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
448
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
449
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
450 /* Check if there is an empty frame providec by RTE (all 0) or even no data provided by RTE (all 0xFF)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
451 * If that is not the case the DMA is somehow not in sync
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
452 */
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
453 uint8_t DataEX_check_header_and_footer_shifted()
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
454 {
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
455 uint8_t ret = 1;
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
456 if((global.dataSendToSlave.footer.checkCode[0] == 0x00)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
457 && (global.dataSendToSlave.footer.checkCode[1] == 0x00)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
458 && (global.dataSendToSlave.footer.checkCode[2] == 0x00)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
459 && (global.dataSendToSlave.footer.checkCode[3] == 0x00)) { ret = 0; }
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
460
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
461 if((global.dataSendToSlave.footer.checkCode[0] == 0xff)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
462 && (global.dataSendToSlave.footer.checkCode[1] == 0xff)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
463 && (global.dataSendToSlave.footer.checkCode[2] == 0xff)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
464 && (global.dataSendToSlave.footer.checkCode[3] == 0xff)) { ret = 0; }
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
465
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
466 return ret;
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
467 }
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
468
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
469 static void SPI_Error_Handler(void) {
82
a6f0881074a4 +i2c analog noise filtering
Dmitry Romanov <kitt@bk.ru>
parents: 63
diff changeset
470 //The device is locks. Hard to recover.
a6f0881074a4 +i2c analog noise filtering
Dmitry Romanov <kitt@bk.ru>
parents: 63
diff changeset
471 // while(1)
a6f0881074a4 +i2c analog noise filtering
Dmitry Romanov <kitt@bk.ru>
parents: 63
diff changeset
472 // {
a6f0881074a4 +i2c analog noise filtering
Dmitry Romanov <kitt@bk.ru>
parents: 63
diff changeset
473 // }
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
474 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
475
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
476 /**
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
477 * @}
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
478 */
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
479
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
480 /**
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
481 * @}
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
482 */
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
483
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
484 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/