annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h @ 756:6de83d8205a0

Added visualization of CO2 during dive: In the previous version CO2 values were available in sufrace mode only. Now the display of Co2 value has been added to the lower left corner view. In addition a Co2 alarm has been added. Early Co2 warning vaues will be displayed in yellow while critical values are shown in red.
author Ideenmodellierer
date Tue, 07 Mar 2023 20:02:05 +0100
parents c78bcbd5deda
children
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_uart.h
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4 * @author MCD Application Team
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5 * @brief Header file of UART HAL module.
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6 ******************************************************************************
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7 * @attention
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8 *
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9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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10 *
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11 * Redistribution and use in source and binary forms, with or without modification,
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12 * are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright notice,
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16 * this list of conditions and the following disclaimer in the documentation
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17 * and/or other materials provided with the distribution.
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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19 * may be used to endorse or promote products derived from this software
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20 * without specific prior written permission.
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21 *
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 *
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33 ******************************************************************************
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34 */
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35
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36 /* Define to prevent recursive inclusion -------------------------------------*/
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37 #ifndef __STM32F4xx_HAL_UART_H
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38 #define __STM32F4xx_HAL_UART_H
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39
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40 #ifdef __cplusplus
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41 extern "C" {
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42 #endif
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43
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44 /* Includes ------------------------------------------------------------------*/
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45 #include "stm32f4xx_hal_def.h"
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46
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47 /** @addtogroup STM32F4xx_HAL_Driver
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48 * @{
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49 */
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50
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51 /** @addtogroup UART
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52 * @{
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53 */
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54
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55 /* Exported types ------------------------------------------------------------*/
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56 /** @defgroup UART_Exported_Types UART Exported Types
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57 * @{
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58 */
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59
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60 /**
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61 * @brief UART Init Structure definition
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62 */
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63 typedef struct
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64 {
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65 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
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66 The baud rate is computed using the following formula:
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67 - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate)))
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68 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5
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69 Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */
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70
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71 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
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72 This parameter can be a value of @ref UART_Word_Length */
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73
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74 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
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75 This parameter can be a value of @ref UART_Stop_Bits */
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76
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77 uint32_t Parity; /*!< Specifies the parity mode.
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78 This parameter can be a value of @ref UART_Parity
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79 @note When parity is enabled, the computed parity is inserted
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80 at the MSB position of the transmitted data (9th bit when
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81 the word length is set to 9 data bits; 8th bit when the
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82 word length is set to 8 data bits). */
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83
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84 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
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85 This parameter can be a value of @ref UART_Mode */
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86
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87 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
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88 or disabled.
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89 This parameter can be a value of @ref UART_Hardware_Flow_Control */
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90
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91 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
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92 This parameter can be a value of @ref UART_Over_Sampling */
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93 }UART_InitTypeDef;
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94
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95 /**
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96 * @brief HAL UART State structures definition
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97 * @note HAL UART State value is a combination of 2 different substates: gState and RxState.
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98 * - gState contains UART state information related to global Handle management
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99 * and also information related to Tx operations.
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100 * gState value coding follow below described bitmap :
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101 * b7-b6 Error information
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102 * 00 : No Error
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103 * 01 : (Not Used)
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104 * 10 : Timeout
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105 * 11 : Error
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106 * b5 IP initilisation status
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107 * 0 : Reset (IP not initialized)
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108 * 1 : Init done (IP not initialized. HAL UART Init function already called)
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109 * b4-b3 (not used)
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110 * xx : Should be set to 00
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111 * b2 Intrinsic process state
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112 * 0 : Ready
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113 * 1 : Busy (IP busy with some configuration or internal operations)
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114 * b1 (not used)
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115 * x : Should be set to 0
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116 * b0 Tx state
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117 * 0 : Ready (no Tx operation ongoing)
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118 * 1 : Busy (Tx operation ongoing)
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119 * - RxState contains information related to Rx operations.
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120 * RxState value coding follow below described bitmap :
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121 * b7-b6 (not used)
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122 * xx : Should be set to 00
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123 * b5 IP initilisation status
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124 * 0 : Reset (IP not initialized)
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125 * 1 : Init done (IP not initialized)
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126 * b4-b2 (not used)
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127 * xxx : Should be set to 000
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128 * b1 Rx state
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129 * 0 : Ready (no Rx operation ongoing)
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130 * 1 : Busy (Rx operation ongoing)
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131 * b0 (not used)
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132 * x : Should be set to 0.
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133 */
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134 typedef enum
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135 {
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136 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized
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137 Value is allowed for gState and RxState */
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138 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
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139 Value is allowed for gState and RxState */
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140 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
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141 Value is allowed for gState only */
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142 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
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143 Value is allowed for gState only */
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144 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
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145 Value is allowed for RxState only */
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146 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
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147 Not to be used for neither gState nor RxState.
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148 Value is result of combination (Or) between gState and RxState values */
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149 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
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150 Value is allowed for gState only */
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151 HAL_UART_STATE_ERROR = 0xE0U /*!< Error
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152 Value is allowed for gState only */
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153 }HAL_UART_StateTypeDef;
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154
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155 /**
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156 * @brief UART handle Structure definition
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157 */
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158 typedef struct
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159 {
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160 USART_TypeDef *Instance; /*!< UART registers base address */
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161
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162 UART_InitTypeDef Init; /*!< UART communication parameters */
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163
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164 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
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165
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166 uint16_t TxXferSize; /*!< UART Tx Transfer size */
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167
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168 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
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169
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170 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
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171
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172 uint16_t RxXferSize; /*!< UART Rx Transfer size */
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173
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174 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
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175
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176 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
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177
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178 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
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179
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180 HAL_LockTypeDef Lock; /*!< Locking object */
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181
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182 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
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183 and also related to Tx operations.
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184 This parameter can be a value of @ref HAL_UART_StateTypeDef */
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185
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186 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
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187 This parameter can be a value of @ref HAL_UART_StateTypeDef */
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188
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189 __IO uint32_t ErrorCode; /*!< UART Error code */
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190
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191 }UART_HandleTypeDef;
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192 /**
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193 * @}
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194 */
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195
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196 /* Exported constants --------------------------------------------------------*/
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197 /** @defgroup UART_Exported_Constants UART Exported constants
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198 * @{
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199 */
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200
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201 /** @defgroup UART_Error_Code UART Error Code
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202 * @brief UART Error Code
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203 * @{
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204 */
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205 #define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */
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206 #define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */
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207 #define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */
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208 #define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */
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209 #define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */
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210 #define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */
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211 /**
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212 * @}
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213 */
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214
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215 /** @defgroup UART_Word_Length UART Word Length
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216 * @{
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217 */
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218 #define UART_WORDLENGTH_8B 0x00000000U
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219 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
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220 /**
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221 * @}
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222 */
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223
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224 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
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225 * @{
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226 */
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227 #define UART_STOPBITS_1 0x00000000U
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228 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
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229 /**
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230 * @}
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231 */
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232
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233 /** @defgroup UART_Parity UART Parity
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234 * @{
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235 */
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236 #define UART_PARITY_NONE 0x00000000U
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237 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
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238 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
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239 /**
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240 * @}
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241 */
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242
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243 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
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244 * @{
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245 */
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246 #define UART_HWCONTROL_NONE 0x00000000U
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247 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
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248 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
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249 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
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250 /**
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251 * @}
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252 */
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253
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254 /** @defgroup UART_Mode UART Transfer Mode
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255 * @{
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256 */
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257 #define UART_MODE_RX ((uint32_t)USART_CR1_RE)
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258 #define UART_MODE_TX ((uint32_t)USART_CR1_TE)
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259 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
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260 /**
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261 * @}
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262 */
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263
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264 /** @defgroup UART_State UART State
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265 * @{
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266 */
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267 #define UART_STATE_DISABLE 0x00000000U
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268 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
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269 /**
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270 * @}
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271 */
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272
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273 /** @defgroup UART_Over_Sampling UART Over Sampling
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274 * @{
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275 */
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276 #define UART_OVERSAMPLING_16 0x00000000U
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277 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
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278 /**
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279 * @}
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280 */
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281
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282 /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length
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283 * @{
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284 */
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285 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U
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286 #define UART_LINBREAKDETECTLENGTH_11B 0x00000020U
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287 /**
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288 * @}
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289 */
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290
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291 /** @defgroup UART_WakeUp_functions UART Wakeup Functions
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292 * @{
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293 */
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294 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U
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295 #define UART_WAKEUPMETHOD_ADDRESSMARK 0x00000800U
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296 /**
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297 * @}
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298 */
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299
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300 /** @defgroup UART_Flags UART FLags
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301 * Elements values convention: 0xXXXX
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302 * - 0xXXXX : Flag mask in the SR register
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303 * @{
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304 */
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305 #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS)
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306 #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD)
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307 #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE)
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308 #define UART_FLAG_TC ((uint32_t)USART_SR_TC)
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309 #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
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310 #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
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311 #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE)
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312 #define UART_FLAG_NE ((uint32_t)USART_SR_NE)
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313 #define UART_FLAG_FE ((uint32_t)USART_SR_FE)
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314 #define UART_FLAG_PE ((uint32_t)USART_SR_PE)
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315 /**
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316 * @}
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317 */
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318
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319 /** @defgroup UART_Interrupt_definition UART Interrupt Definitions
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320 * Elements values convention: 0xY000XXXX
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321 * - XXXX : Interrupt mask (16 bits) in the Y register
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322 * - Y : Interrupt source register (2bits)
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323 * - 0001: CR1 register
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324 * - 0010: CR2 register
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325 * - 0011: CR3 register
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326 *
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327 * @{
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328 */
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329
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330 #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
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331 #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
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332 #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
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333 #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
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334 #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
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335
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336 #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
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337
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338 #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
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339 #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE))
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340 /**
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341 * @}
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342 */
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343
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344 /**
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345 * @}
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346 */
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347
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348 /* Exported macro ------------------------------------------------------------*/
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349 /** @defgroup UART_Exported_Macros UART Exported Macros
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350 * @{
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351 */
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352
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353 /** @brief Reset UART handle gstate & RxState
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354 * @param __HANDLE__ specifies the UART Handle.
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355 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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356 * UART peripheral.
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357 * @retval None
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358 */
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359 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
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360 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
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361 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
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362 } while(0U)
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363
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364 /** @brief Flushes the UART DR register
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365 * @param __HANDLE__ specifies the UART Handle.
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366 */
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367 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
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368
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369 /** @brief Checks whether the specified UART flag is set or not.
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370 * @param __HANDLE__ specifies the UART Handle.
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371 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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372 * UART peripheral.
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373 * @param __FLAG__ specifies the flag to check.
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374 * This parameter can be one of the following values:
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375 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
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376 * @arg UART_FLAG_LBD: LIN Break detection flag
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377 * @arg UART_FLAG_TXE: Transmit data register empty flag
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378 * @arg UART_FLAG_TC: Transmission Complete flag
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379 * @arg UART_FLAG_RXNE: Receive data register not empty flag
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380 * @arg UART_FLAG_IDLE: Idle Line detection flag
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381 * @arg UART_FLAG_ORE: Overrun Error flag
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382 * @arg UART_FLAG_NE: Noise Error flag
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383 * @arg UART_FLAG_FE: Framing Error flag
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384 * @arg UART_FLAG_PE: Parity Error flag
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385 * @retval The new state of __FLAG__ (TRUE or FALSE).
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386 */
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387
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388 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
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389
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390 /** @brief Clears the specified UART pending flag.
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391 * @param __HANDLE__ specifies the UART Handle.
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392 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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393 * UART peripheral.
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394 * @param __FLAG__ specifies the flag to check.
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395 * This parameter can be any combination of the following values:
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396 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
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397 * @arg UART_FLAG_LBD: LIN Break detection flag.
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398 * @arg UART_FLAG_TC: Transmission Complete flag.
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399 * @arg UART_FLAG_RXNE: Receive data register not empty flag.
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400 *
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401 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun
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402 * error) and IDLE (Idle line detected) flags are cleared by software
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403 * sequence: a read operation to USART_SR register followed by a read
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404 * operation to USART_DR register.
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405 * @note RXNE flag can be also cleared by a read to the USART_DR register.
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406 * @note TC flag can be also cleared by software sequence: a read operation to
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407 * USART_SR register followed by a write operation to USART_DR register.
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408 * @note TXE flag is cleared only by a write to the USART_DR register.
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409 *
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410 * @retval None
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411 */
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412 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
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413
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414 /** @brief Clear the UART PE pending flag.
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415 * @param __HANDLE__ specifies the UART Handle.
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416 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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417 * UART peripheral.
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418 * @retval None
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419 */
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420 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \
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421 do{ \
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422 __IO uint32_t tmpreg = 0x00U; \
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423 tmpreg = (__HANDLE__)->Instance->SR; \
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424 tmpreg = (__HANDLE__)->Instance->DR; \
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425 UNUSED(tmpreg); \
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426 } while(0U)
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427
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428 /** @brief Clear the UART FE pending flag.
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429 * @param __HANDLE__ specifies the UART Handle.
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430 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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431 * UART peripheral.
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432 * @retval None
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433 */
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434 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
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435
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436 /** @brief Clear the UART NE pending flag.
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437 * @param __HANDLE__ specifies the UART Handle.
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438 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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439 * UART peripheral.
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440 * @retval None
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441 */
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442 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
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443
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444 /** @brief Clear the UART ORE pending flag.
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445 * @param __HANDLE__ specifies the UART Handle.
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446 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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447 * UART peripheral.
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448 * @retval None
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449 */
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450 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
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451
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452 /** @brief Clear the UART IDLE pending flag.
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453 * @param __HANDLE__ specifies the UART Handle.
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454 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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455 * UART peripheral.
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456 * @retval None
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457 */
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458 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
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459
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460 /** @brief Enable the specified UART interrupt.
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461 * @param __HANDLE__ specifies the UART Handle.
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462 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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463 * UART peripheral.
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464 * @param __INTERRUPT__ specifies the UART interrupt source to enable.
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465 * This parameter can be one of the following values:
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466 * @arg UART_IT_CTS: CTS change interrupt
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467 * @arg UART_IT_LBD: LIN Break detection interrupt
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468 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
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469 * @arg UART_IT_TC: Transmission complete interrupt
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470 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
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471 * @arg UART_IT_IDLE: Idle line detection interrupt
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472 * @arg UART_IT_PE: Parity Error interrupt
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473 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
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474 * @retval None
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475 */
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476 #define UART_IT_MASK 0x0000FFFFU
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477 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \
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478 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \
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479 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK)))
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480 /** @brief Disable the specified UART interrupt.
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481 * @param __HANDLE__ specifies the UART Handle.
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482 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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483 * UART peripheral.
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484 * @param __INTERRUPT__ specifies the UART interrupt source to disable.
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485 * This parameter can be one of the following values:
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486 * @arg UART_IT_CTS: CTS change interrupt
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487 * @arg UART_IT_LBD: LIN Break detection interrupt
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488 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
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489 * @arg UART_IT_TC: Transmission complete interrupt
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490 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
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491 * @arg UART_IT_IDLE: Idle line detection interrupt
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492 * @arg UART_IT_PE: Parity Error interrupt
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493 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
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494 * @retval None
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495 */
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496 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
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497 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
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498 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK)))
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499
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500 /** @brief Checks whether the specified UART interrupt has occurred or not.
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501 * @param __HANDLE__ specifies the UART Handle.
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502 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
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503 * UART peripheral.
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504 * @param __IT__ specifies the UART interrupt source to check.
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505 * This parameter can be one of the following values:
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506 * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
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507 * @arg UART_IT_LBD: LIN Break detection interrupt
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508 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
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509 * @arg UART_IT_TC: Transmission complete interrupt
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510 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
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511 * @arg UART_IT_IDLE: Idle line detection interrupt
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512 * @arg USART_IT_ERR: Error interrupt
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513 * @retval The new state of __IT__ (TRUE or FALSE).
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514 */
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515 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == 2U)? \
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516 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
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517
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518 /** @brief Enable CTS flow control
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519 * This macro allows to enable CTS hardware flow control for a given UART instance,
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520 * without need to call HAL_UART_Init() function.
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521 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
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522 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
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523 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
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524 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
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525 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
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526 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
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527 * @param __HANDLE__ specifies the UART Handle.
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528 * The Handle Instance can be USART1, USART2 or LPUART.
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529 * @retval None
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530 */
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531 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
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532 do{ \
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533 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
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534 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
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535 } while(0U)
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536
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537 /** @brief Disable CTS flow control
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538 * This macro allows to disable CTS hardware flow control for a given UART instance,
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539 * without need to call HAL_UART_Init() function.
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540 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
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541 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
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542 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
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543 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
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544 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
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545 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
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546 * @param __HANDLE__ specifies the UART Handle.
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547 * The Handle Instance can be USART1, USART2 or LPUART.
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548 * @retval None
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549 */
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550 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
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551 do{ \
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552 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
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553 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
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554 } while(0U)
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555
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556 /** @brief Enable RTS flow control
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557 * This macro allows to enable RTS hardware flow control for a given UART instance,
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558 * without need to call HAL_UART_Init() function.
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559 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
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560 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
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561 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
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562 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
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563 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
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564 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
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565 * @param __HANDLE__ specifies the UART Handle.
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566 * The Handle Instance can be USART1, USART2 or LPUART.
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567 * @retval None
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568 */
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569 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
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570 do{ \
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571 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
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572 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
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573 } while(0U)
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574
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575 /** @brief Disable RTS flow control
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576 * This macro allows to disable RTS hardware flow control for a given UART instance,
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577 * without need to call HAL_UART_Init() function.
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578 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
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579 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
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580 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
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581 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
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582 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
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583 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
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584 * @param __HANDLE__ specifies the UART Handle.
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585 * The Handle Instance can be USART1, USART2 or LPUART.
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586 * @retval None
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587 */
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588 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
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589 do{ \
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590 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
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591 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
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592 } while(0U)
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593
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594 /** @brief macros to enables the UART's one bit sample method
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595 * @param __HANDLE__ specifies the UART Handle.
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596 * @retval None
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597 */
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598 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
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599
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600 /** @brief macros to disables the UART's one bit sample method
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601 * @param __HANDLE__ specifies the UART Handle.
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602 * @retval None
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603 */
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604 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
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605
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606 /** @brief Enable UART
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607 * @param __HANDLE__ specifies the UART Handle.
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608 * @retval None
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609 */
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610 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
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611
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612 /** @brief Disable UART
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613 * @param __HANDLE__ specifies the UART Handle.
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614 * @retval None
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615 */
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616 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
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617 /**
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618 * @}
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619 */
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620
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621 /* Exported functions --------------------------------------------------------*/
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622 /** @addtogroup UART_Exported_Functions
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623 * @{
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624 */
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625
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626 /** @addtogroup UART_Exported_Functions_Group1
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627 * @{
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628 */
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629 /* Initialization/de-initialization functions **********************************/
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630 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
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631 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
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632 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
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633 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
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634 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
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635 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
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636 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
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637 /**
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638 * @}
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639 */
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640
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641 /** @addtogroup UART_Exported_Functions_Group2
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642 * @{
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643 */
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644 /* IO operation functions *******************************************************/
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645 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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646 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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647 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
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648 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
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649 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
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650 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
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651 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
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652 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
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653 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
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654 /* Transfer Abort functions */
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655 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
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656 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
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657 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
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658 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
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659 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
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660 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
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661
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662 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
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663 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
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664 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
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665 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
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666 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
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667 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
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668 void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart);
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669 void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart);
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670 void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart);
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671 /**
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672 * @}
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673 */
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674
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675 /** @addtogroup UART_Exported_Functions_Group3
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676 * @{
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677 */
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678 /* Peripheral Control functions ************************************************/
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679 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
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680 HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
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681 HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart);
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682 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
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683 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
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684 /**
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685 * @}
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686 */
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687
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688 /** @addtogroup UART_Exported_Functions_Group4
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689 * @{
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690 */
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691 /* Peripheral State functions **************************************************/
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692 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
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693 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
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694 /**
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695 * @}
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696 */
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697
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698 /**
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699 * @}
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700 */
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701 /* Private types -------------------------------------------------------------*/
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702 /* Private variables ---------------------------------------------------------*/
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703 /* Private constants ---------------------------------------------------------*/
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704 /** @defgroup UART_Private_Constants UART Private Constants
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705 * @{
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706 */
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707 /** @brief UART interruptions flag mask
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708 *
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709 */
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710 #define UART_CR1_REG_INDEX 1U
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711 #define UART_CR2_REG_INDEX 2U
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712 #define UART_CR3_REG_INDEX 3U
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713 /**
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714 * @}
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715 */
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716
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717 /* Private macros ------------------------------------------------------------*/
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718 /** @defgroup UART_Private_Macros UART Private Macros
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719 * @{
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720 */
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721 #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
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722 ((LENGTH) == UART_WORDLENGTH_9B))
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723 #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B))
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724 #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
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725 ((STOPBITS) == UART_STOPBITS_2))
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726 #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
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727 ((PARITY) == UART_PARITY_EVEN) || \
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728 ((PARITY) == UART_PARITY_ODD))
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729 #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
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730 (((CONTROL) == UART_HWCONTROL_NONE) || \
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731 ((CONTROL) == UART_HWCONTROL_RTS) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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732 ((CONTROL) == UART_HWCONTROL_CTS) || \
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733 ((CONTROL) == UART_HWCONTROL_RTS_CTS))
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734 #define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U))
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735 #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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736 ((STATE) == UART_STATE_ENABLE))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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737 #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
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738 ((SAMPLING) == UART_OVERSAMPLING_8))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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739 #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16))
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740 #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
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741 ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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742 #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
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743 ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
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744 #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 10500001U)
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745 #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU)
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746
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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747 #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_)))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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748 #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U)
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749 #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U)
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750 /* UART BRR = mantissa + overflow + fraction
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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751 = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
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752 #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \
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753 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \
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754 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU))
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755
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756 #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_)))
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757 #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U)
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758 #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U + 50U) / 100U)
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759 /* UART BRR = mantissa + overflow + fraction
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760 = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */
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761 #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \
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762 ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \
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763 (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U))
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764
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765 /**
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766 * @}
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767 */
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768
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769 /* Private functions ---------------------------------------------------------*/
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770 /** @defgroup UART_Private_Functions UART Private Functions
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771 * @{
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772 */
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773
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774 /**
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775 * @}
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776 */
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777
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778 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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779 * @}
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780 */
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781
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782 /**
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783 * @}
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784 */
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785
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786 #ifdef __cplusplus
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787 }
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788 #endif
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789
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790 #endif /* __STM32F4xx_HAL_UART_H */
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791
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792 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/