Mercurial > public > ostc4
annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cryp.h @ 909:6902bb4b6b2e Evo_2_23
Define state of new GPIO out pins:
Some new GPIO pins were initialized but not used. This may cause some random activations e.g. of the red debug LED. To avoid this the output levels are set to inactive levels (e.g. to LED_OFF)
author | Ideenmodellierer |
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date | Tue, 15 Oct 2024 19:07:19 +0200 |
parents | c78bcbd5deda |
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rev | line source |
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128
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_hal_cryp.h |
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4 * @author MCD Application Team |
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5 * @brief Header file of CRYP HAL module. |
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6 ****************************************************************************** |
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7 * @attention |
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8 * |
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9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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10 * |
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11 * Redistribution and use in source and binary forms, with or without modification, |
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12 * are permitted provided that the following conditions are met: |
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13 * 1. Redistributions of source code must retain the above copyright notice, |
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14 * this list of conditions and the following disclaimer. |
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15 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 * this list of conditions and the following disclaimer in the documentation |
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17 * and/or other materials provided with the distribution. |
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 * may be used to endorse or promote products derived from this software |
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20 * without specific prior written permission. |
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21 * |
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 * |
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33 ****************************************************************************** |
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34 */ |
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35 |
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36 /* Define to prevent recursive inclusion -------------------------------------*/ |
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37 #ifndef __STM32F4xx_HAL_CRYP_H |
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38 #define __STM32F4xx_HAL_CRYP_H |
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39 |
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40 #ifdef __cplusplus |
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41 extern "C" { |
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42 #endif |
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43 |
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44 /* Includes ------------------------------------------------------------------*/ |
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45 #include "stm32f4xx_hal_def.h" |
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46 |
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47 |
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48 #if defined(CRYP) |
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49 |
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50 /** @addtogroup STM32F4xx_HAL_Driver |
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51 * @{ |
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52 */ |
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53 |
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54 /** @addtogroup CRYP |
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55 * @{ |
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56 */ |
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57 |
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58 /* Exported types ------------------------------------------------------------*/ |
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59 |
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60 /** @defgroup CRYP_Exported_Types CRYP Exported Types |
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61 * @{ |
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62 */ |
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63 |
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64 /** @defgroup CRYP_Exported_Types_Group1 CRYP Configuration Structure definition |
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65 * @{ |
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66 */ |
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67 |
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68 typedef struct |
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69 { |
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70 uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string. |
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71 This parameter can be a value of @ref CRYP_Data_Type */ |
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72 |
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73 uint32_t KeySize; /*!< Used only in AES mode only : 128, 192 or 256 bit key length. |
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74 This parameter can be a value of @ref CRYP_Key_Size */ |
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75 |
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76 uint8_t* pKey; /*!< The key used for encryption/decryption */ |
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77 |
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78 uint8_t* pInitVect; /*!< The initialization vector used also as initialization |
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79 counter in CTR mode */ |
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80 |
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81 uint8_t IVSize; /*!< The size of initialization vector. |
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82 This parameter (called nonce size in CCM) is used only |
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83 in AES-128/192/256 encryption/decryption CCM mode */ |
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84 |
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85 uint8_t TagSize; /*!< The size of returned authentication TAG. |
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86 This parameter is used only in AES-128/192/256 |
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87 encryption/decryption CCM mode */ |
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88 |
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89 uint8_t* Header; /*!< The header used in GCM and CCM modes */ |
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90 |
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91 uint32_t HeaderSize; /*!< The size of header buffer in bytes */ |
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92 |
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93 uint8_t* pScratch; /*!< Scratch buffer used to append the header. It's size must be equal to header size + 21 bytes. |
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94 This parameter is used only in AES-128/192/256 encryption/decryption CCM mode */ |
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95 }CRYP_InitTypeDef; |
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96 |
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97 /** |
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98 * @} |
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99 */ |
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100 |
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101 /** @defgroup CRYP_Exported_Types_Group2 CRYP State structures definition |
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102 * @{ |
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103 */ |
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104 |
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105 |
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106 typedef enum |
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107 { |
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108 HAL_CRYP_STATE_RESET = 0x00U, /*!< CRYP not yet initialized or disabled */ |
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109 HAL_CRYP_STATE_READY = 0x01U, /*!< CRYP initialized and ready for use */ |
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110 HAL_CRYP_STATE_BUSY = 0x02U, /*!< CRYP internal processing is ongoing */ |
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111 HAL_CRYP_STATE_TIMEOUT = 0x03U, /*!< CRYP timeout state */ |
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112 HAL_CRYP_STATE_ERROR = 0x04U /*!< CRYP error state */ |
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113 }HAL_CRYP_STATETypeDef; |
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114 |
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115 /** |
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116 * @} |
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117 */ |
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118 |
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119 /** @defgroup CRYP_Exported_Types_Group3 CRYP phase structures definition |
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120 * @{ |
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121 */ |
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122 |
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123 |
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124 typedef enum |
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125 { |
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126 HAL_CRYP_PHASE_READY = 0x01U, /*!< CRYP peripheral is ready for initialization. */ |
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127 HAL_CRYP_PHASE_PROCESS = 0x02U, /*!< CRYP peripheral is in processing phase */ |
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128 HAL_CRYP_PHASE_FINAL = 0x03U /*!< CRYP peripheral is in final phase |
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129 This is relevant only with CCM and GCM modes */ |
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130 }HAL_PhaseTypeDef; |
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131 |
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132 /** |
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133 * @} |
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134 */ |
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135 |
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136 /** @defgroup CRYP_Exported_Types_Group4 CRYP handle Structure definition |
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137 * @{ |
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138 */ |
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139 |
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140 typedef struct |
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141 { |
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142 CRYP_TypeDef *Instance; /*!< CRYP registers base address */ |
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143 |
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144 CRYP_InitTypeDef Init; /*!< CRYP required parameters */ |
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145 |
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146 uint8_t *pCrypInBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */ |
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147 |
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148 uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */ |
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149 |
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150 __IO uint16_t CrypInCount; /*!< Counter of inputed data */ |
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151 |
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152 __IO uint16_t CrypOutCount; /*!< Counter of output data */ |
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153 |
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154 HAL_StatusTypeDef Status; /*!< CRYP peripheral status */ |
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155 |
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156 HAL_PhaseTypeDef Phase; /*!< CRYP peripheral phase */ |
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157 |
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158 DMA_HandleTypeDef *hdmain; /*!< CRYP In DMA handle parameters */ |
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159 |
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160 DMA_HandleTypeDef *hdmaout; /*!< CRYP Out DMA handle parameters */ |
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161 |
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162 HAL_LockTypeDef Lock; /*!< CRYP locking object */ |
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163 |
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164 __IO HAL_CRYP_STATETypeDef State; /*!< CRYP peripheral state */ |
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165 }CRYP_HandleTypeDef; |
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166 |
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167 /** |
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168 * @} |
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169 */ |
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170 |
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171 /** |
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172 * @} |
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173 */ |
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174 |
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175 /* Exported constants --------------------------------------------------------*/ |
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176 /** @defgroup CRYP_Exported_Constants CRYP Exported Constants |
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177 * @{ |
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178 */ |
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179 |
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180 /** @defgroup CRYP_Key_Size CRYP Key Size |
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181 * @{ |
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182 */ |
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183 #define CRYP_KEYSIZE_128B 0x00000000U |
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184 #define CRYP_KEYSIZE_192B CRYP_CR_KEYSIZE_0 |
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185 #define CRYP_KEYSIZE_256B CRYP_CR_KEYSIZE_1 |
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186 /** |
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187 * @} |
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188 */ |
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189 |
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190 /** @defgroup CRYP_Data_Type CRYP Data Type |
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191 * @{ |
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192 */ |
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193 #define CRYP_DATATYPE_32B 0x00000000U |
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194 #define CRYP_DATATYPE_16B CRYP_CR_DATATYPE_0 |
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195 #define CRYP_DATATYPE_8B CRYP_CR_DATATYPE_1 |
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196 #define CRYP_DATATYPE_1B CRYP_CR_DATATYPE |
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197 /** |
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198 * @} |
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199 */ |
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200 |
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201 /** @defgroup CRYP_Exported_Constants_Group3 CRYP CRYP_AlgoModeDirection |
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202 * @{ |
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203 */ |
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204 #define CRYP_CR_ALGOMODE_DIRECTION 0x0008003CU |
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205 #define CRYP_CR_ALGOMODE_TDES_ECB_ENCRYPT 0x00000000U |
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206 #define CRYP_CR_ALGOMODE_TDES_ECB_DECRYPT 0x00000004U |
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207 #define CRYP_CR_ALGOMODE_TDES_CBC_ENCRYPT 0x00000008U |
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208 #define CRYP_CR_ALGOMODE_TDES_CBC_DECRYPT 0x0000000CU |
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209 #define CRYP_CR_ALGOMODE_DES_ECB_ENCRYPT 0x00000010U |
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210 #define CRYP_CR_ALGOMODE_DES_ECB_DECRYPT 0x00000014U |
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211 #define CRYP_CR_ALGOMODE_DES_CBC_ENCRYPT 0x00000018U |
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212 #define CRYP_CR_ALGOMODE_DES_CBC_DECRYPT 0x0000001CU |
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213 #define CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT 0x00000020U |
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214 #define CRYP_CR_ALGOMODE_AES_ECB_DECRYPT 0x00000024U |
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215 #define CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT 0x00000028U |
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216 #define CRYP_CR_ALGOMODE_AES_CBC_DECRYPT 0x0000002CU |
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217 #define CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT 0x00000030U |
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218 #define CRYP_CR_ALGOMODE_AES_CTR_DECRYPT 0x00000034U |
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219 /** |
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220 * @} |
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221 */ |
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222 |
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223 /** @defgroup CRYP_Exported_Constants_Group4 CRYP CRYP_Interrupt |
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224 * @{ |
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225 */ |
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226 #define CRYP_IT_INI ((uint32_t)CRYP_IMSCR_INIM) /*!< Input FIFO Interrupt */ |
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227 #define CRYP_IT_OUTI ((uint32_t)CRYP_IMSCR_OUTIM) /*!< Output FIFO Interrupt */ |
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228 /** |
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229 * @} |
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230 */ |
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231 |
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232 /** @defgroup CRYP_Exported_Constants_Group5 CRYP CRYP_Flags |
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233 * @{ |
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234 */ |
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235 #define CRYP_FLAG_BUSY 0x00000010U /*!< The CRYP core is currently |
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236 processing a block of data |
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237 or a key preparation (for |
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238 AES decryption). */ |
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239 #define CRYP_FLAG_IFEM 0x00000001U /*!< Input FIFO is empty */ |
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240 #define CRYP_FLAG_IFNF 0x00000002U /*!< Input FIFO is not Full */ |
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241 #define CRYP_FLAG_OFNE 0x00000004U /*!< Output FIFO is not empty */ |
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242 #define CRYP_FLAG_OFFU 0x00000008U /*!< Output FIFO is Full */ |
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243 #define CRYP_FLAG_OUTRIS 0x01000002U /*!< Output FIFO service raw |
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244 interrupt status */ |
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245 #define CRYP_FLAG_INRIS 0x01000001U /*!< Input FIFO service raw |
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246 interrupt status */ |
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247 /** |
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248 * @} |
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249 */ |
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250 |
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251 /** |
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252 * @} |
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253 */ |
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254 |
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255 /* Exported macro ------------------------------------------------------------*/ |
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256 /** @defgroup CRYP_Exported_Macros CRYP Exported Macros |
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257 * @{ |
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258 */ |
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259 |
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260 /** @brief Reset CRYP handle state |
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261 * @param __HANDLE__ specifies the CRYP handle. |
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262 * @retval None |
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263 */ |
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264 #define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET) |
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265 |
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266 /** |
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267 * @brief Enable/Disable the CRYP peripheral. |
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268 * @param __HANDLE__ specifies the CRYP handle. |
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269 * @retval None |
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270 */ |
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271 #define __HAL_CRYP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRYP_CR_CRYPEN) |
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272 #define __HAL_CRYP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~CRYP_CR_CRYPEN) |
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273 |
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274 /** |
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275 * @brief Flush the data FIFO. |
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276 * @param __HANDLE__ specifies the CRYP handle. |
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277 * @retval None |
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278 */ |
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279 #define __HAL_CRYP_FIFO_FLUSH(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRYP_CR_FFLUSH) |
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280 |
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281 /** |
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282 * @brief Set the algorithm mode: AES-ECB, AES-CBC, AES-CTR, DES-ECB, DES-CBC. |
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283 * @param __HANDLE__ specifies the CRYP handle. |
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284 * @param MODE The algorithm mode. |
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285 * @retval None |
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286 */ |
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287 #define __HAL_CRYP_SET_MODE(__HANDLE__, MODE) ((__HANDLE__)->Instance->CR |= (uint32_t)(MODE)) |
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288 |
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289 /** @brief Check whether the specified CRYP flag is set or not. |
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290 * @param __HANDLE__ specifies the CRYP handle. |
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291 * @param __FLAG__ specifies the flag to check. |
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292 * This parameter can be one of the following values: |
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293 * @arg CRYP_FLAG_BUSY: The CRYP core is currently processing a block of data |
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294 * or a key preparation (for AES decryption). |
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295 * @arg CRYP_FLAG_IFEM: Input FIFO is empty |
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296 * @arg CRYP_FLAG_IFNF: Input FIFO is not full |
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297 * @arg CRYP_FLAG_INRIS: Input FIFO service raw interrupt is pending |
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298 * @arg CRYP_FLAG_OFNE: Output FIFO is not empty |
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299 * @arg CRYP_FLAG_OFFU: Output FIFO is full |
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300 * @arg CRYP_FLAG_OUTRIS: Input FIFO service raw interrupt is pending |
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301 * @retval The new state of __FLAG__ (TRUE or FALSE). |
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302 */ |
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303 |
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304 #define __HAL_CRYP_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 24U)) == 0x01U)?((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK)): \ |
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305 ((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK))) |
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306 |
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307 /** @brief Check whether the specified CRYP interrupt is set or not. |
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308 * @param __HANDLE__ specifies the CRYP handle. |
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309 * @param __INTERRUPT__ specifies the interrupt to check. |
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310 * This parameter can be one of the following values: |
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311 * @arg CRYP_IT_INRIS: Input FIFO service raw interrupt is pending |
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312 * @arg CRYP_IT_OUTRIS: Output FIFO service raw interrupt is pending |
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313 * @retval The new state of __INTERRUPT__ (TRUE or FALSE). |
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314 */ |
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315 #define __HAL_CRYP_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->MISR & (__INTERRUPT__)) == (__INTERRUPT__)) |
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316 |
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317 /** |
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318 * @brief Enable the CRYP interrupt. |
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319 * @param __HANDLE__ specifies the CRYP handle. |
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320 * @param __INTERRUPT__ CRYP Interrupt. |
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321 * @retval None |
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322 */ |
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323 #define __HAL_CRYP_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IMSCR) |= (__INTERRUPT__)) |
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324 |
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325 /** |
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326 * @brief Disable the CRYP interrupt. |
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327 * @param __HANDLE__ specifies the CRYP handle. |
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328 * @param __INTERRUPT__ CRYP interrupt. |
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329 * @retval None |
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330 */ |
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331 #define __HAL_CRYP_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IMSCR) &= ~(__INTERRUPT__)) |
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332 |
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333 /** |
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334 * @} |
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335 */ |
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336 |
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337 /* Include CRYP HAL Extension module */ |
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338 #include "stm32f4xx_hal_cryp_ex.h" |
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339 |
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340 /* Exported functions --------------------------------------------------------*/ |
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341 /** @defgroup CRYP_Exported_Functions CRYP Exported Functions |
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342 * @{ |
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343 */ |
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344 |
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345 /** @addtogroup CRYP_Exported_Functions_Group1 |
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346 * @{ |
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347 */ |
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348 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp); |
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349 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp); |
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350 void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp); |
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351 void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp); |
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352 /** |
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353 * @} |
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354 */ |
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355 |
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356 /** @addtogroup CRYP_Exported_Functions_Group2 |
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357 * @{ |
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358 */ |
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359 /* AES encryption/decryption using polling ***********************************/ |
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360 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
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361 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
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362 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
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363 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
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364 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
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365 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
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366 |
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367 /* AES encryption/decryption using interrupt *********************************/ |
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368 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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369 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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370 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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371 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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372 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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373 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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374 |
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375 /* AES encryption/decryption using DMA ***************************************/ |
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376 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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377 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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378 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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379 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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380 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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381 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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382 /** |
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383 * @} |
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384 */ |
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385 |
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386 /** @addtogroup CRYP_Exported_Functions_Group3 |
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387 * @{ |
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388 */ |
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389 /* DES encryption/decryption using polling ***********************************/ |
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390 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
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391 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
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392 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
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393 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
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394 |
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395 /* DES encryption/decryption using interrupt *********************************/ |
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396 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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397 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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398 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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399 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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400 |
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401 /* DES encryption/decryption using DMA ***************************************/ |
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402 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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403 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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404 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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405 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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406 /** |
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407 * @} |
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408 */ |
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409 |
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410 /** @addtogroup CRYP_Exported_Functions_Group4 |
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411 * @{ |
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412 */ |
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413 /* TDES encryption/decryption using polling **********************************/ |
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414 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
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415 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
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416 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
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417 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
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418 |
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419 /* TDES encryption/decryption using interrupt ********************************/ |
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420 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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421 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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422 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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423 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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424 |
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425 /* TDES encryption/decryption using DMA **************************************/ |
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426 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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427 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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428 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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429 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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430 /** |
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431 * @} |
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432 */ |
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433 |
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434 /** @addtogroup CRYP_Exported_Functions_Group5 |
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435 * @{ |
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436 */ |
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437 void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp); |
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438 void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp); |
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439 void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp); |
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440 /** |
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441 * @} |
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442 */ |
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443 |
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444 /** @addtogroup CRYP_Exported_Functions_Group6 |
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445 * @{ |
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446 */ |
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447 void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp); |
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448 /** |
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449 * @} |
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450 */ |
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451 |
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452 /** @addtogroup CRYP_Exported_Functions_Group7 |
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453 * @{ |
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454 */ |
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455 HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp); |
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456 /** |
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457 * @} |
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458 */ |
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459 |
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460 /** |
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461 * @} |
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462 */ |
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463 |
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464 /* Private types -------------------------------------------------------------*/ |
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465 /** @defgroup CRYP_Private_Types CRYP Private Types |
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466 * @{ |
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467 */ |
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468 |
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469 /** |
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470 * @} |
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471 */ |
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472 |
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473 /* Private variables ---------------------------------------------------------*/ |
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474 /** @defgroup CRYP_Private_Variables CRYP Private Variables |
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475 * @{ |
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476 */ |
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477 |
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478 /** |
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479 * @} |
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480 */ |
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481 |
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482 /* Private constants ---------------------------------------------------------*/ |
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483 /** @defgroup CRYP_Private_Constants CRYP Private Constants |
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484 * @{ |
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485 */ |
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486 #define CRYP_FLAG_MASK 0x0000001FU |
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487 /** |
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488 * @} |
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489 */ |
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490 |
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491 /* Private macros ------------------------------------------------------------*/ |
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492 /** @defgroup CRYP_Private_Macros CRYP Private Macros |
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493 * @{ |
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494 */ |
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495 |
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496 #define IS_CRYP_KEYSIZE(__KEYSIZE__) (((__KEYSIZE__) == CRYP_KEYSIZE_128B) || \ |
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497 ((__KEYSIZE__) == CRYP_KEYSIZE_192B) || \ |
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498 ((__KEYSIZE__) == CRYP_KEYSIZE_256B)) |
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499 |
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500 |
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501 #define IS_CRYP_DATATYPE(__DATATYPE__) (((__DATATYPE__) == CRYP_DATATYPE_32B) || \ |
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502 ((__DATATYPE__) == CRYP_DATATYPE_16B) || \ |
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503 ((__DATATYPE__) == CRYP_DATATYPE_8B) || \ |
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504 ((__DATATYPE__) == CRYP_DATATYPE_1B)) |
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505 |
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506 |
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507 /** |
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508 * @} |
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509 */ |
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510 |
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511 /* Private functions ---------------------------------------------------------*/ |
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512 /** @defgroup CRYP_Private_Functions CRYP Private Functions |
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513 * @{ |
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514 */ |
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515 |
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516 /** |
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517 * @} |
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518 */ |
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519 |
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520 #endif /* CRYP */ |
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521 |
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522 #if defined (AES) |
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523 |
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524 /** @addtogroup STM32F4xx_HAL_Driver |
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525 * @{ |
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526 */ |
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527 |
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528 /** @addtogroup CRYP |
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529 * @{ |
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530 */ |
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531 |
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532 /* Exported types ------------------------------------------------------------*/ |
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533 /** @defgroup CRYP_Exported_Types CRYP Exported Types |
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534 * @{ |
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535 */ |
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536 |
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537 /** |
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538 * @brief CRYP Configuration Structure definition |
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539 */ |
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540 typedef struct |
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541 { |
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542 uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string. |
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543 This parameter can be a value of @ref CRYP_Data_Type */ |
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544 |
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545 uint32_t KeySize; /*!< 128 or 256-bit key length. |
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546 This parameter can be a value of @ref CRYP_Key_Size */ |
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547 |
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548 uint32_t OperatingMode; /*!< AES operating mode. |
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549 This parameter can be a value of @ref CRYP_AES_OperatingMode */ |
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550 |
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551 uint32_t ChainingMode; /*!< AES chaining mode. |
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552 This parameter can be a value of @ref CRYP_AES_ChainingMode */ |
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553 |
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554 uint32_t KeyWriteFlag; /*!< Allows to bypass or not key write-up before decryption. |
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555 This parameter can be a value of @ref CRYP_Key_Write */ |
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556 |
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557 uint32_t GCMCMACPhase; /*!< Indicates the processing phase of the Galois Counter Mode (GCM), |
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558 Galois Message Authentication Code (GMAC) or Cipher Message |
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559 Authentication Code (CMAC) or Counter with Cipher Mode (CCM) when |
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560 the latter is applicable. |
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561 This parameter can be a value of @ref CRYP_GCM_CMAC_Phase */ |
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562 |
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563 uint8_t* pKey; /*!< Encryption/Decryption Key */ |
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564 |
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565 uint8_t* pInitVect; /*!< Initialization Vector used for CTR, CBC, GCM/GMAC, CMAC, |
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566 (and CCM when applicable) modes */ |
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567 |
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568 uint8_t* Header; /*!< Header used in GCM/GMAC, CMAC (and CCM when applicable) modes */ |
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569 |
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570 uint64_t HeaderSize; /*!< Header size in bytes */ |
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571 |
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572 }CRYP_InitTypeDef; |
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573 |
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574 /** |
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575 * @brief HAL CRYP State structures definition |
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576 */ |
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577 typedef enum |
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578 { |
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579 HAL_CRYP_STATE_RESET = 0x00U, /*!< CRYP not yet initialized or disabled */ |
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580 HAL_CRYP_STATE_READY = 0x01U, /*!< CRYP initialized and ready for use */ |
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581 HAL_CRYP_STATE_BUSY = 0x02U, /*!< CRYP internal processing is ongoing */ |
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582 HAL_CRYP_STATE_TIMEOUT = 0x03U, /*!< CRYP timeout state */ |
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583 HAL_CRYP_STATE_ERROR = 0x04U, /*!< CRYP error state */ |
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584 HAL_CRYP_STATE_SUSPENDED = 0x05U /*!< CRYP suspended */ |
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585 }HAL_CRYP_STATETypeDef; |
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586 |
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587 /** |
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588 * @brief HAL CRYP phase structures definition |
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589 */ |
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590 typedef enum |
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591 { |
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592 HAL_CRYP_PHASE_READY = 0x01U, /*!< CRYP peripheral is ready for initialization. */ |
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593 HAL_CRYP_PHASE_PROCESS = 0x02U, /*!< CRYP peripheral is in processing phase */ |
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594 HAL_CRYP_PHASE_START = 0x03U, /*!< CRYP peripheral has been initialized but |
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595 GCM/GMAC/CMAC(/CCM) initialization phase has not started */ |
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596 HAL_CRYP_PHASE_INIT_OVER = 0x04U, /*!< GCM/GMAC/CMAC(/CCM) init phase has been carried out */ |
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597 HAL_CRYP_PHASE_HEADER_OVER = 0x05U, /*!< GCM/GMAC/CMAC(/CCM) header phase has been carried out */ |
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598 HAL_CRYP_PHASE_PAYLOAD_OVER = 0x06U, /*!< GCM(/CCM) payload phase has been carried out */ |
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599 HAL_CRYP_PHASE_FINAL_OVER = 0x07U, /*!< GCM/GMAC/CMAC(/CCM) final phase has been carried out */ |
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600 HAL_CRYP_PHASE_HEADER_SUSPENDED = 0x08U, /*!< GCM/GMAC/CMAC(/CCM) header phase has been suspended */ |
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601 HAL_CRYP_PHASE_PAYLOAD_SUSPENDED = 0x09U, /*!< GCM(/CCM) payload phase has been suspended */ |
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602 HAL_CRYP_PHASE_NOT_USED = 0x0AU /*!< Phase is irrelevant to the current chaining mode */ |
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603 }HAL_PhaseTypeDef; |
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604 |
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605 /** |
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606 * @brief HAL CRYP mode suspend definitions |
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607 */ |
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608 typedef enum |
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609 { |
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610 HAL_CRYP_SUSPEND_NONE = 0x00U, /*!< CRYP peripheral suspension not requested */ |
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611 HAL_CRYP_SUSPEND = 0x01U /*!< CRYP peripheral suspension requested */ |
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612 }HAL_SuspendTypeDef; |
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613 |
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614 |
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615 /** |
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616 * @brief HAL CRYP Error Codes definition |
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617 */ |
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618 #define HAL_CRYP_ERROR_NONE 0x00000000U /*!< No error */ |
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619 #define HAL_CRYP_WRITE_ERROR 0x00000001U /*!< Write error */ |
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620 #define HAL_CRYP_READ_ERROR 0x00000002U /*!< Read error */ |
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621 #define HAL_CRYP_DMA_ERROR 0x00000004U /*!< DMA error */ |
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622 #define HAL_CRYP_BUSY_ERROR 0x00000008U /*!< Busy flag error */ |
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623 |
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624 /** |
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625 * @brief CRYP handle Structure definition |
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626 */ |
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627 typedef struct |
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628 { |
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629 AES_TypeDef *Instance; /*!< Register base address */ |
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630 |
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631 CRYP_InitTypeDef Init; /*!< CRYP initialization parameters */ |
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632 |
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633 uint8_t *pCrypInBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) input buffer */ |
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634 |
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635 uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) output buffer */ |
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636 |
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637 uint32_t CrypInCount; /*!< Input data size in bytes or, after suspension, the remaining |
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638 number of bytes to process */ |
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639 |
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640 uint32_t CrypOutCount; /*!< Output data size in bytes */ |
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641 |
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642 HAL_PhaseTypeDef Phase; /*!< CRYP peripheral processing phase for GCM, GMAC, CMAC |
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643 (or CCM when applicable) modes. |
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644 Indicates the last phase carried out to ease |
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645 phase transitions */ |
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646 |
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647 DMA_HandleTypeDef *hdmain; /*!< CRYP peripheral Input DMA handle parameters */ |
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648 |
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649 DMA_HandleTypeDef *hdmaout; /*!< CRYP peripheral Output DMA handle parameters */ |
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650 |
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651 HAL_LockTypeDef Lock; /*!< CRYP locking object */ |
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652 |
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653 __IO HAL_CRYP_STATETypeDef State; /*!< CRYP peripheral state */ |
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654 |
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655 __IO uint32_t ErrorCode; /*!< CRYP peripheral error code */ |
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656 |
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657 HAL_SuspendTypeDef SuspendRequest; /*!< CRYP peripheral suspension request flag */ |
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658 }CRYP_HandleTypeDef; |
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659 |
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660 /** |
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661 * @} |
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662 */ |
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663 |
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664 |
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665 /* Exported constants --------------------------------------------------------*/ |
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666 /** @defgroup CRYP_Exported_Constants CRYP Exported Constants |
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667 * @{ |
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668 */ |
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669 |
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670 /** @defgroup CRYP_Key_Size Key size selection |
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671 * @{ |
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672 */ |
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673 #define CRYP_KEYSIZE_128B 0x00000000U /*!< 128-bit long key */ |
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674 #define CRYP_KEYSIZE_256B AES_CR_KEYSIZE /*!< 256-bit long key */ |
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675 /** |
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676 * @} |
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677 */ |
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678 |
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679 /** @defgroup CRYP_Data_Type AES Data Type selection |
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680 * @{ |
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681 */ |
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682 #define CRYP_DATATYPE_32B 0x00000000U /*!< 32-bit data type (no swapping) */ |
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683 #define CRYP_DATATYPE_16B AES_CR_DATATYPE_0 /*!< 16-bit data type (half-word swapping) */ |
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684 #define CRYP_DATATYPE_8B AES_CR_DATATYPE_1 /*!< 8-bit data type (byte swapping) */ |
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685 #define CRYP_DATATYPE_1B AES_CR_DATATYPE /*!< 1-bit data type (bit swapping) */ |
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686 /** |
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687 * @} |
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688 */ |
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689 |
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690 /** @defgroup CRYP_AES_State AES Enable state |
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691 * @{ |
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692 */ |
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693 #define CRYP_AES_DISABLE 0x00000000U /*!< Disable AES */ |
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694 #define CRYP_AES_ENABLE AES_CR_EN /*!< Enable AES */ |
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695 /** |
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696 * @} |
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697 */ |
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698 |
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699 /** @defgroup CRYP_AES_OperatingMode AES operating mode |
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700 * @{ |
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701 */ |
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702 #define CRYP_ALGOMODE_ENCRYPT 0x00000000U /*!< Encryption mode */ |
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703 #define CRYP_ALGOMODE_KEYDERIVATION AES_CR_MODE_0 /*!< Key derivation mode */ |
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704 #define CRYP_ALGOMODE_DECRYPT AES_CR_MODE_1 /*!< Decryption */ |
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705 #define CRYP_ALGOMODE_KEYDERIVATION_DECRYPT AES_CR_MODE /*!< Key derivation and decryption */ |
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706 #define CRYP_ALGOMODE_TAG_GENERATION 0x00000000U /*!< GMAC or CMAC authentication tag generation */ |
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707 /** |
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|
708 * @} |
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|
709 */ |
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710 |
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711 /** @defgroup CRYP_AES_ChainingMode AES chaining mode |
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712 * @{ |
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|
713 */ |
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714 #define CRYP_CHAINMODE_AES_ECB 0x00000000U /*!< Electronic codebook chaining algorithm */ |
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715 #define CRYP_CHAINMODE_AES_CBC AES_CR_CHMOD_0 /*!< Cipher block chaining algorithm */ |
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716 #define CRYP_CHAINMODE_AES_CTR AES_CR_CHMOD_1 /*!< Counter mode chaining algorithm */ |
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717 #define CRYP_CHAINMODE_AES_GCM_GMAC (AES_CR_CHMOD_0 | AES_CR_CHMOD_1) /*!< Galois counter mode - Galois message authentication code */ |
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718 #define CRYP_CHAINMODE_AES_CMAC AES_CR_CHMOD_2 /*!< Cipher message authentication code */ |
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719 #if defined(AES_CR_NPBLB) |
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720 #define CRYP_CHAINMODE_AES_CCM_CMAC AES_CR_CHMOD_2 /*!< Counter with Cipher Mode - Cipher message authentication code */ |
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721 #endif |
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722 /** |
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723 * @} |
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724 */ |
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725 |
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726 /** @defgroup CRYP_Key_Write AES decryption key write-up flag |
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727 * @{ |
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728 */ |
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729 #define CRYP_KEY_WRITE_ENABLE 0x00000000U /*!< Enable decryption key writing */ |
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730 #define CRYP_KEY_WRITE_DISABLE 0x00000001U /*!< Disable decryption key writing */ |
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731 /** |
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732 * @} |
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733 */ |
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734 |
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735 /** @defgroup CRYP_DMAIN DMA Input phase management enable state |
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736 * @{ |
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737 */ |
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738 #define CRYP_DMAIN_DISABLE 0x00000000U /*!< Disable DMA Input phase management */ |
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739 #define CRYP_DMAIN_ENABLE AES_CR_DMAINEN /*!< Enable DMA Input phase management */ |
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740 /** |
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741 * @} |
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742 */ |
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743 |
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744 /** @defgroup CRYP_DMAOUT DMA Output phase management enable state |
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745 * @{ |
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746 */ |
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747 #define CRYP_DMAOUT_DISABLE 0x00000000U /*!< Disable DMA Output phase management */ |
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748 #define CRYP_DMAOUT_ENABLE AES_CR_DMAOUTEN /*!< Enable DMA Output phase management */ |
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749 /** |
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750 * @} |
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751 */ |
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752 |
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753 |
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754 /** @defgroup CRYP_GCM_CMAC_Phase GCM/GMAC and CMAC processing phase selection |
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755 * @{ |
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756 */ |
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757 #define CRYP_GCM_INIT_PHASE 0x00000000U /*!< GCM/GMAC (or CCM) init phase */ |
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758 #define CRYP_GCMCMAC_HEADER_PHASE AES_CR_GCMPH_0 /*!< GCM/GMAC or (CCM/)CMAC header phase */ |
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759 #define CRYP_GCM_PAYLOAD_PHASE AES_CR_GCMPH_1 /*!< GCM(/CCM) payload phase */ |
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760 #define CRYP_GCMCMAC_FINAL_PHASE AES_CR_GCMPH /*!< GCM/GMAC or (CCM/)CMAC final phase */ |
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761 /* Definitions duplication for code readibility's sake: |
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762 supported or not supported chain modes are not specified for each phase */ |
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763 #define CRYP_INIT_PHASE 0x00000000U /*!< Init phase */ |
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764 #define CRYP_HEADER_PHASE AES_CR_GCMPH_0 /*!< Header phase */ |
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765 #define CRYP_PAYLOAD_PHASE AES_CR_GCMPH_1 /*!< Payload phase */ |
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766 #define CRYP_FINAL_PHASE AES_CR_GCMPH /*!< Final phase */ |
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767 /** |
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|
768 * @} |
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|
769 */ |
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|
770 |
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|
771 /** @defgroup CRYP_Flags AES status flags |
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|
772 * @{ |
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|
773 */ |
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|
774 |
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|
775 #define CRYP_FLAG_BUSY AES_SR_BUSY /*!< GCM process suspension forbidden */ |
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776 #define CRYP_FLAG_WRERR AES_SR_WRERR /*!< Write Error */ |
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|
777 #define CRYP_FLAG_RDERR AES_SR_RDERR /*!< Read error */ |
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778 #define CRYP_FLAG_CCF AES_SR_CCF /*!< Computation completed */ |
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779 /** |
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780 * @} |
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|
781 */ |
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782 |
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783 /** @defgroup CRYP_Clear_Flags AES clearing flags |
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784 * @{ |
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|
785 */ |
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|
786 |
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|
787 #define CRYP_CCF_CLEAR AES_CR_CCFC /*!< Computation Complete Flag Clear */ |
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788 #define CRYP_ERR_CLEAR AES_CR_ERRC /*!< Error Flag Clear */ |
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789 /** |
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790 * @} |
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791 */ |
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792 |
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793 /** @defgroup AES_Interrupts_Enable AES Interrupts Enable bits |
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794 * @{ |
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|
795 */ |
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796 #define CRYP_IT_CCFIE AES_CR_CCFIE /*!< Computation Complete interrupt enable */ |
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797 #define CRYP_IT_ERRIE AES_CR_ERRIE /*!< Error interrupt enable */ |
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798 /** |
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799 * @} |
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|
800 */ |
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|
801 |
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802 /** @defgroup CRYP_Interrupts_Flags AES Interrupts flags |
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803 * @{ |
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|
804 */ |
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805 #define CRYP_IT_WRERR AES_SR_WRERR /*!< Write Error */ |
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806 #define CRYP_IT_RDERR AES_SR_RDERR /*!< Read Error */ |
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807 #define CRYP_IT_CCF AES_SR_CCF /*!< Computation completed */ |
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808 /** |
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|
809 * @} |
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810 */ |
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811 |
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812 /** |
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813 * @} |
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|
814 */ |
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|
815 |
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816 /* Exported macros -----------------------------------------------------------*/ |
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817 /** @defgroup CRYP_Exported_Macros CRYP Exported Macros |
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818 * @{ |
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|
819 */ |
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|
820 |
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|
821 /** @brief Reset CRYP handle state. |
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|
822 * @param __HANDLE__ specifies the CRYP handle. |
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823 * @retval None |
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|
824 */ |
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825 #define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET) |
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826 |
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|
827 /** |
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828 * @brief Enable the CRYP AES peripheral. |
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829 * @retval None |
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|
830 */ |
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831 #define __HAL_CRYP_ENABLE() (AES->CR |= AES_CR_EN) |
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832 |
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833 /** |
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|
834 * @brief Disable the CRYP AES peripheral. |
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835 * @retval None |
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|
836 */ |
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837 #define __HAL_CRYP_DISABLE() (AES->CR &= ~AES_CR_EN) |
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838 |
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|
839 /** |
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|
840 * @brief Set the algorithm operating mode. |
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841 * @param __OPERATING_MODE__ specifies the operating mode |
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842 * This parameter can be one of the following values: |
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843 * @arg @ref CRYP_ALGOMODE_ENCRYPT encryption |
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844 * @arg @ref CRYP_ALGOMODE_KEYDERIVATION key derivation |
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845 * @arg @ref CRYP_ALGOMODE_DECRYPT decryption |
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846 * @arg @ref CRYP_ALGOMODE_KEYDERIVATION_DECRYPT key derivation and decryption |
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847 * @retval None |
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|
848 */ |
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849 #define __HAL_CRYP_SET_OPERATINGMODE(__OPERATING_MODE__) MODIFY_REG(AES->CR, AES_CR_MODE, (__OPERATING_MODE__)) |
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|
850 |
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|
851 |
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852 /** |
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|
853 * @brief Set the algorithm chaining mode. |
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854 * @param __CHAINING_MODE__ specifies the chaining mode |
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855 * This parameter can be one of the following values: |
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856 * @arg @ref CRYP_CHAINMODE_AES_ECB Electronic CodeBook |
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857 * @arg @ref CRYP_CHAINMODE_AES_CBC Cipher Block Chaining |
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858 * @arg @ref CRYP_CHAINMODE_AES_CTR CounTeR mode |
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859 * @arg @ref CRYP_CHAINMODE_AES_GCM_GMAC Galois Counter Mode or Galois Message Authentication Code |
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860 * @arg @ref CRYP_CHAINMODE_AES_CMAC Cipher Message Authentication Code (or Counter with Cipher Mode when applicable) |
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|
861 * @retval None |
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|
862 */ |
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|
863 #define __HAL_CRYP_SET_CHAININGMODE(__CHAINING_MODE__) MODIFY_REG(AES->CR, AES_CR_CHMOD, (__CHAINING_MODE__)) |
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|
864 |
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|
865 |
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|
866 |
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867 /** @brief Check whether the specified CRYP status flag is set or not. |
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868 * @param __FLAG__ specifies the flag to check. |
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869 * This parameter can be one of the following values: |
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870 * @arg @ref CRYP_FLAG_BUSY GCM process suspension forbidden |
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871 * @arg @ref CRYP_IT_WRERR Write Error |
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872 * @arg @ref CRYP_IT_RDERR Read Error |
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873 * @arg @ref CRYP_IT_CCF Computation Complete |
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874 * @retval The state of __FLAG__ (TRUE or FALSE). |
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875 */ |
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876 #define __HAL_CRYP_GET_FLAG(__FLAG__) ((AES->SR & (__FLAG__)) == (__FLAG__)) |
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877 |
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|
878 |
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879 /** @brief Clear the CRYP pending status flag. |
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880 * @param __FLAG__ specifies the flag to clear. |
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881 * This parameter can be one of the following values: |
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882 * @arg @ref CRYP_ERR_CLEAR Read (RDERR) or Write Error (WRERR) Flag Clear |
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883 * @arg @ref CRYP_CCF_CLEAR Computation Complete Flag (CCF) Clear |
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884 * @retval None |
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885 */ |
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886 #define __HAL_CRYP_CLEAR_FLAG(__FLAG__) SET_BIT(AES->CR, (__FLAG__)) |
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|
887 |
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|
888 |
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|
889 |
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890 /** @brief Check whether the specified CRYP interrupt source is enabled or not. |
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891 * @param __INTERRUPT__ CRYP interrupt source to check |
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892 * This parameter can be one of the following values: |
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893 * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR) |
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894 * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt |
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895 * @retval State of interruption (TRUE or FALSE). |
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896 */ |
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|
897 #define __HAL_CRYP_GET_IT_SOURCE(__INTERRUPT__) ((AES->CR & (__INTERRUPT__)) == (__INTERRUPT__)) |
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Added current STM32 standandard libraries in version independend folder structure
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898 |
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|
899 |
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|
900 /** @brief Check whether the specified CRYP interrupt is set or not. |
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901 * @param __INTERRUPT__ specifies the interrupt to check. |
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902 * This parameter can be one of the following values: |
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|
903 * @arg @ref CRYP_IT_WRERR Write Error |
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904 * @arg @ref CRYP_IT_RDERR Read Error |
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905 * @arg @ref CRYP_IT_CCF Computation Complete |
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906 * @retval The state of __INTERRUPT__ (TRUE or FALSE). |
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907 */ |
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|
908 #define __HAL_CRYP_GET_IT(__INTERRUPT__) ((AES->SR & (__INTERRUPT__)) == (__INTERRUPT__)) |
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|
909 |
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|
910 |
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|
911 |
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|
912 /** @brief Clear the CRYP pending interrupt. |
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|
913 * @param __INTERRUPT__ specifies the IT to clear. |
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914 * This parameter can be one of the following values: |
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|
915 * @arg @ref CRYP_ERR_CLEAR Read (RDERR) or Write Error (WRERR) Flag Clear |
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916 * @arg @ref CRYP_CCF_CLEAR Computation Complete Flag (CCF) Clear |
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917 * @retval None |
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918 */ |
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919 #define __HAL_CRYP_CLEAR_IT(__INTERRUPT__) SET_BIT(AES->CR, (__INTERRUPT__)) |
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|
920 |
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|
921 |
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922 /** |
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923 * @brief Enable the CRYP interrupt. |
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924 * @param __INTERRUPT__ CRYP Interrupt. |
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|
925 * This parameter can be one of the following values: |
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926 * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR) |
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927 * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt |
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928 * @retval None |
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|
929 */ |
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930 #define __HAL_CRYP_ENABLE_IT(__INTERRUPT__) ((AES->CR) |= (__INTERRUPT__)) |
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931 |
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932 |
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933 /** |
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934 * @brief Disable the CRYP interrupt. |
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935 * @param __INTERRUPT__ CRYP Interrupt. |
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936 * This parameter can be one of the following values: |
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|
937 * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR) |
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938 * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt |
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939 * @retval None |
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|
940 */ |
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941 #define __HAL_CRYP_DISABLE_IT(__INTERRUPT__) ((AES->CR) &= ~(__INTERRUPT__)) |
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942 |
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|
943 /** |
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944 * @} |
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945 */ |
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|
946 |
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|
947 /* Private macros --------------------------------------------------------*/ |
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948 /** @addtogroup CRYP_Private_Macros CRYP Private Macros |
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949 * @{ |
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|
950 */ |
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|
951 |
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|
952 /** |
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953 * @brief Verify the key size length. |
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|
954 * @param __KEYSIZE__ Ciphering/deciphering algorithm key size. |
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955 * @retval SET (__KEYSIZE__ is a valid value) or RESET (__KEYSIZE__ is invalid) |
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956 */ |
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957 #define IS_CRYP_KEYSIZE(__KEYSIZE__) (((__KEYSIZE__) == CRYP_KEYSIZE_128B) || \ |
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958 ((__KEYSIZE__) == CRYP_KEYSIZE_256B)) |
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959 |
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960 /** |
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961 * @brief Verify the input data type. |
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962 * @param __DATATYPE__ Ciphering/deciphering algorithm input data type. |
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963 * @retval SET (__DATATYPE__ is valid) or RESET (__DATATYPE__ is invalid) |
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964 */ |
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965 #define IS_CRYP_DATATYPE(__DATATYPE__) (((__DATATYPE__) == CRYP_DATATYPE_32B) || \ |
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966 ((__DATATYPE__) == CRYP_DATATYPE_16B) || \ |
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967 ((__DATATYPE__) == CRYP_DATATYPE_8B) || \ |
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968 ((__DATATYPE__) == CRYP_DATATYPE_1B)) |
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|
969 |
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|
970 /** |
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971 * @brief Verify the CRYP AES IP running mode. |
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972 * @param __MODE__ CRYP AES IP running mode. |
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973 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
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974 */ |
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975 #define IS_CRYP_AES(__MODE__) (((__MODE__) == CRYP_AES_DISABLE) || \ |
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976 ((__MODE__) == CRYP_AES_ENABLE)) |
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977 |
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978 /** |
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979 * @brief Verify the selected CRYP algorithm. |
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980 * @param __ALGOMODE__ Selected CRYP algorithm (ciphering, deciphering, key derivation or a combination of the latter). |
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981 * @retval SET (__ALGOMODE__ is valid) or RESET (__ALGOMODE__ is invalid) |
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982 */ |
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983 #define IS_CRYP_ALGOMODE(__ALGOMODE__) (((__ALGOMODE__) == CRYP_ALGOMODE_ENCRYPT) || \ |
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984 ((__ALGOMODE__) == CRYP_ALGOMODE_KEYDERIVATION) || \ |
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985 ((__ALGOMODE__) == CRYP_ALGOMODE_DECRYPT) || \ |
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986 ((__ALGOMODE__) == CRYP_ALGOMODE_TAG_GENERATION) || \ |
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987 ((__ALGOMODE__) == CRYP_ALGOMODE_KEYDERIVATION_DECRYPT)) |
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988 |
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989 /** |
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990 * @brief Verify the selected CRYP chaining algorithm. |
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991 * @param __CHAINMODE__ Selected CRYP chaining algorithm. |
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992 * @retval SET (__CHAINMODE__ is valid) or RESET (__CHAINMODE__ is invalid) |
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993 */ |
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994 #if defined(AES_CR_NPBLB) |
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995 #define IS_CRYP_CHAINMODE(__CHAINMODE__) (((__CHAINMODE__) == CRYP_CHAINMODE_AES_ECB) || \ |
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996 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CBC) || \ |
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997 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CTR) || \ |
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998 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_GCM_GMAC) || \ |
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999 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CCM_CMAC)) |
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1000 #else |
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1001 #define IS_CRYP_CHAINMODE(__CHAINMODE__) (((__CHAINMODE__) == CRYP_CHAINMODE_AES_ECB) || \ |
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1002 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CBC) || \ |
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1003 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CTR) || \ |
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1004 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_GCM_GMAC) || \ |
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1005 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CMAC)) |
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1006 #endif |
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1007 |
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1008 /** |
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1009 * @brief Verify the deciphering key write option. |
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1010 * @param __WRITE__ deciphering key write option. |
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1011 * @retval SET (__WRITE__ is valid) or RESET (__WRITE__ is invalid) |
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1012 */ |
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1013 #define IS_CRYP_WRITE(__WRITE__) (((__WRITE__) == CRYP_KEY_WRITE_ENABLE) || \ |
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1014 ((__WRITE__) == CRYP_KEY_WRITE_DISABLE)) |
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1015 |
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1016 /** |
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1017 * @brief Verify the CRYP input data DMA mode. |
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1018 * @param __MODE__ CRYP input data DMA mode. |
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1019 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
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1020 */ |
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1021 #define IS_CRYP_DMAIN(__MODE__) (((__MODE__) == CRYP_DMAIN_DISABLE) || \ |
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1022 ((__MODE__) == CRYP_DMAIN_ENABLE)) |
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1023 |
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1024 /** |
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1025 * @brief Verify the CRYP output data DMA mode. |
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1026 * @param __MODE__ CRYP output data DMA mode. |
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1027 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
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1028 */ |
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1029 #define IS_CRYP_DMAOUT(__MODE__) (((__MODE__) == CRYP_DMAOUT_DISABLE) || \ |
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1030 ((__MODE__) == CRYP_DMAOUT_ENABLE)) |
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1031 |
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1032 /** |
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1033 * @brief Verify the CRYP AES ciphering/deciphering/authentication algorithm phase. |
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1034 * @param __PHASE__ CRYP AES ciphering/deciphering/authentication algorithm phase. |
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1035 * @retval SET (__PHASE__ is valid) or RESET (__PHASE__ is invalid) |
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1036 */ |
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1037 #define IS_CRYP_GCMCMAC_PHASE(__PHASE__) (((__PHASE__) == CRYP_GCM_INIT_PHASE) || \ |
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1038 ((__PHASE__) == CRYP_GCMCMAC_HEADER_PHASE) || \ |
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1039 ((__PHASE__) == CRYP_GCM_PAYLOAD_PHASE) || \ |
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1040 ((__PHASE__) == CRYP_GCMCMAC_FINAL_PHASE)) |
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1041 |
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1042 /** |
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1043 * @} |
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1044 */ |
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1045 |
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1046 /* Include CRYP HAL Extended module */ |
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1047 #include "stm32f4xx_hal_cryp_ex.h" |
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1048 |
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1049 /* Exported functions --------------------------------------------------------*/ |
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1050 /** @addtogroup CRYP_Exported_Functions CRYP Exported Functions |
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1051 * @{ |
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1052 */ |
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1053 |
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1054 /** @addtogroup CRYP_Exported_Functions_Group1 Initialization and deinitialization functions |
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1055 * @{ |
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1056 */ |
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1057 |
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1058 /* Initialization/de-initialization functions ********************************/ |
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1059 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp); |
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1060 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp); |
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1061 |
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1062 /* MSP initialization/de-initialization functions ****************************/ |
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1063 void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp); |
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1064 void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp); |
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1065 |
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1066 /** |
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1067 * @} |
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1068 */ |
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1069 |
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1070 /** @addtogroup CRYP_Exported_Functions_Group2 AES processing functions |
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1071 * @{ |
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1072 */ |
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1073 |
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1074 /* AES encryption/decryption processing functions ****************************/ |
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1075 |
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1076 /* AES encryption/decryption using polling ***********************************/ |
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1077 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
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1078 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
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1079 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
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1080 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
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1081 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
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1082 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
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1083 |
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1084 /* AES encryption/decryption using interrupt *********************************/ |
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1085 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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1086 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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1087 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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1088 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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1089 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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1090 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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1091 |
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1092 /* AES encryption/decryption using DMA ***************************************/ |
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1093 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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1094 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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1095 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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1096 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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1097 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
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1098 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
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1099 |
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1100 /** |
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1101 * @} |
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1102 */ |
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1103 |
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1104 /** @addtogroup CRYP_Exported_Functions_Group3 Callback functions |
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1105 * @{ |
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1106 */ |
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1107 /* CallBack functions ********************************************************/ |
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1108 void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp); |
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1109 void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp); |
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1110 void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp); |
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1111 |
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1112 /** |
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1113 * @} |
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1114 */ |
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1115 |
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1116 /** @addtogroup CRYP_Exported_Functions_Group4 CRYP IRQ handler |
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1117 * @{ |
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1118 */ |
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1119 |
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1120 /* AES interrupt handling function *******************************************/ |
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1121 void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp); |
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1122 |
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1123 /** |
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1124 * @} |
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1125 */ |
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1126 |
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1127 /** @addtogroup CRYP_Exported_Functions_Group5 Peripheral State functions |
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1128 * @{ |
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1129 */ |
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1130 |
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1131 /* Peripheral State functions ************************************************/ |
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1132 HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp); |
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1133 uint32_t HAL_CRYP_GetError(CRYP_HandleTypeDef *hcryp); |
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1134 |
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1135 /** |
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1136 * @} |
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1137 */ |
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1138 |
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1139 /** |
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1140 * @} |
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1141 */ |
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1142 |
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1143 |
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1144 #endif /* AES */ |
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1145 |
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1146 /** |
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1147 * @} |
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1148 */ |
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1149 |
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1150 /** |
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1151 * @} |
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1152 */ |
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1153 |
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1154 #ifdef __cplusplus |
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1155 } |
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1156 #endif |
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1157 |
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1158 #endif /* __STM32F4xx_HAL_CRYP_H */ |
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1159 |
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1160 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |