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annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c @ 413:65c7b009136f Improment_NVM
Bugfix Flipdisplay Gauge and Apnoe mode:
Changes needed to provide the same look and feel like in standard mode were not applied. Added missinng functions.
author | ideenmodellierer |
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date | Tue, 14 Jan 2020 21:10:37 +0100 |
parents | c78bcbd5deda |
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rev | line source |
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128
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_hal_sdram.c |
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4 * @author MCD Application Team |
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5 * @brief SDRAM HAL module driver. |
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6 * This file provides a generic firmware to drive SDRAM memories mounted |
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7 * as external device. |
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8 * |
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9 @verbatim |
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10 ============================================================================== |
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11 ##### How to use this driver ##### |
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12 ============================================================================== |
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13 [..] |
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14 This driver is a generic layered driver which contains a set of APIs used to |
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15 control SDRAM memories. It uses the FMC layer functions to interface |
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16 with SDRAM devices. |
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17 The following sequence should be followed to configure the FMC to interface |
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18 with SDRAM memories: |
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19 |
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20 (#) Declare a SDRAM_HandleTypeDef handle structure, for example: |
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21 SDRAM_HandleTypeDef hdsram |
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22 |
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23 (++) Fill the SDRAM_HandleTypeDef handle "Init" field with the allowed |
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24 values of the structure member. |
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25 |
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26 (++) Fill the SDRAM_HandleTypeDef handle "Instance" field with a predefined |
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27 base register instance for NOR or SDRAM device |
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28 |
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29 (#) Declare a FMC_SDRAM_TimingTypeDef structure; for example: |
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30 FMC_SDRAM_TimingTypeDef Timing; |
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31 and fill its fields with the allowed values of the structure member. |
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32 |
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33 (#) Initialize the SDRAM Controller by calling the function HAL_SDRAM_Init(). This function |
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34 performs the following sequence: |
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35 |
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36 (##) MSP hardware layer configuration using the function HAL_SDRAM_MspInit() |
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37 (##) Control register configuration using the FMC SDRAM interface function |
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38 FMC_SDRAM_Init() |
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39 (##) Timing register configuration using the FMC SDRAM interface function |
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40 FMC_SDRAM_Timing_Init() |
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41 (##) Program the SDRAM external device by applying its initialization sequence |
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42 according to the device plugged in your hardware. This step is mandatory |
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43 for accessing the SDRAM device. |
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44 |
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45 (#) At this stage you can perform read/write accesses from/to the memory connected |
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46 to the SDRAM Bank. You can perform either polling or DMA transfer using the |
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47 following APIs: |
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48 (++) HAL_SDRAM_Read()/HAL_SDRAM_Write() for polling read/write access |
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49 (++) HAL_SDRAM_Read_DMA()/HAL_SDRAM_Write_DMA() for DMA read/write transfer |
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50 |
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51 (#) You can also control the SDRAM device by calling the control APIs HAL_SDRAM_WriteOperation_Enable()/ |
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52 HAL_SDRAM_WriteOperation_Disable() to respectively enable/disable the SDRAM write operation or |
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53 the function HAL_SDRAM_SendCommand() to send a specified command to the SDRAM |
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54 device. The command to be sent must be configured with the FMC_SDRAM_CommandTypeDef |
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55 structure. |
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56 |
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57 (#) You can continuously monitor the SDRAM device HAL state by calling the function |
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58 HAL_SDRAM_GetState() |
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59 |
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60 @endverbatim |
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61 ****************************************************************************** |
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62 * @attention |
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63 * |
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64 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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65 * |
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66 * Redistribution and use in source and binary forms, with or without modification, |
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67 * are permitted provided that the following conditions are met: |
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68 * 1. Redistributions of source code must retain the above copyright notice, |
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69 * this list of conditions and the following disclaimer. |
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70 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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71 * this list of conditions and the following disclaimer in the documentation |
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72 * and/or other materials provided with the distribution. |
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73 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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74 * may be used to endorse or promote products derived from this software |
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75 * without specific prior written permission. |
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76 * |
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77 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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78 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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79 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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80 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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81 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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82 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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83 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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84 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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85 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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86 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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87 * |
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88 ****************************************************************************** |
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89 */ |
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90 |
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91 /* Includes ------------------------------------------------------------------*/ |
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92 #include "stm32f4xx_hal.h" |
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93 |
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94 /** @addtogroup STM32F4xx_HAL_Driver |
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95 * @{ |
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96 */ |
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97 |
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98 /** @defgroup SDRAM SDRAM |
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99 * @brief SDRAM driver modules |
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100 * @{ |
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101 */ |
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102 #ifdef HAL_SDRAM_MODULE_ENABLED |
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103 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
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104 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) |
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105 |
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106 /* Private typedef -----------------------------------------------------------*/ |
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107 /* Private define ------------------------------------------------------------*/ |
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108 /* Private macro -------------------------------------------------------------*/ |
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109 /* Private variables ---------------------------------------------------------*/ |
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110 /* Private functions ---------------------------------------------------------*/ |
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111 /* Exported functions --------------------------------------------------------*/ |
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112 /** @defgroup SDRAM_Exported_Functions SDRAM Exported Functions |
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113 * @{ |
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114 */ |
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115 |
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116 /** @defgroup SDRAM_Exported_Functions_Group1 Initialization and de-initialization functions |
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117 * @brief Initialization and Configuration functions |
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118 * |
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119 @verbatim |
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120 ============================================================================== |
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121 ##### SDRAM Initialization and de_initialization functions ##### |
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122 ============================================================================== |
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123 [..] |
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124 This section provides functions allowing to initialize/de-initialize |
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125 the SDRAM memory |
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126 |
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127 @endverbatim |
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128 * @{ |
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129 */ |
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130 |
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131 /** |
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132 * @brief Performs the SDRAM device initialization sequence. |
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133 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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134 * the configuration information for SDRAM module. |
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135 * @param Timing Pointer to SDRAM control timing structure |
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136 * @retval HAL status |
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137 */ |
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138 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing) |
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139 { |
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140 /* Check the SDRAM handle parameter */ |
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141 if(hsdram == NULL) |
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142 { |
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143 return HAL_ERROR; |
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144 } |
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145 |
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146 if(hsdram->State == HAL_SDRAM_STATE_RESET) |
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147 { |
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148 /* Allocate lock resource and initialize it */ |
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149 hsdram->Lock = HAL_UNLOCKED; |
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150 /* Initialize the low level hardware (MSP) */ |
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151 HAL_SDRAM_MspInit(hsdram); |
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152 } |
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153 |
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154 /* Initialize the SDRAM controller state */ |
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155 hsdram->State = HAL_SDRAM_STATE_BUSY; |
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156 |
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157 /* Initialize SDRAM control Interface */ |
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158 FMC_SDRAM_Init(hsdram->Instance, &(hsdram->Init)); |
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159 |
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160 /* Initialize SDRAM timing Interface */ |
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161 FMC_SDRAM_Timing_Init(hsdram->Instance, Timing, hsdram->Init.SDBank); |
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162 |
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163 /* Update the SDRAM controller state */ |
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164 hsdram->State = HAL_SDRAM_STATE_READY; |
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165 |
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166 return HAL_OK; |
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167 } |
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168 |
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169 /** |
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170 * @brief Perform the SDRAM device initialization sequence. |
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171 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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172 * the configuration information for SDRAM module. |
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173 * @retval HAL status |
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174 */ |
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175 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram) |
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176 { |
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177 /* Initialize the low level hardware (MSP) */ |
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178 HAL_SDRAM_MspDeInit(hsdram); |
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179 |
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180 /* Configure the SDRAM registers with their reset values */ |
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181 FMC_SDRAM_DeInit(hsdram->Instance, hsdram->Init.SDBank); |
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182 |
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183 /* Reset the SDRAM controller state */ |
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184 hsdram->State = HAL_SDRAM_STATE_RESET; |
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185 |
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186 /* Release Lock */ |
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187 __HAL_UNLOCK(hsdram); |
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188 |
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189 return HAL_OK; |
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190 } |
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191 |
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192 /** |
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193 * @brief SDRAM MSP Init. |
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194 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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195 * the configuration information for SDRAM module. |
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196 * @retval None |
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197 */ |
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198 __weak void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram) |
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199 { |
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200 /* Prevent unused argument(s) compilation warning */ |
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201 UNUSED(hsdram); |
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202 /* NOTE: This function Should not be modified, when the callback is needed, |
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203 the HAL_SDRAM_MspInit could be implemented in the user file |
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204 */ |
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205 } |
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206 |
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207 /** |
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208 * @brief SDRAM MSP DeInit. |
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209 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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210 * the configuration information for SDRAM module. |
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211 * @retval None |
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212 */ |
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213 __weak void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram) |
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214 { |
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215 /* Prevent unused argument(s) compilation warning */ |
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216 UNUSED(hsdram); |
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217 /* NOTE: This function Should not be modified, when the callback is needed, |
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218 the HAL_SDRAM_MspDeInit could be implemented in the user file |
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219 */ |
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220 } |
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221 |
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222 /** |
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223 * @brief This function handles SDRAM refresh error interrupt request. |
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224 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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225 * the configuration information for SDRAM module. |
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226 * @retval HAL status |
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227 */ |
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228 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram) |
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229 { |
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230 /* Check SDRAM interrupt Rising edge flag */ |
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231 if(__FMC_SDRAM_GET_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_IT)) |
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232 { |
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233 /* SDRAM refresh error interrupt callback */ |
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234 HAL_SDRAM_RefreshErrorCallback(hsdram); |
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235 |
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236 /* Clear SDRAM refresh error interrupt pending bit */ |
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237 __FMC_SDRAM_CLEAR_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_ERROR); |
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238 } |
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239 } |
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240 |
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241 /** |
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242 * @brief SDRAM Refresh error callback. |
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243 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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244 * the configuration information for SDRAM module. |
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245 * @retval None |
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246 */ |
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247 __weak void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram) |
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248 { |
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249 /* Prevent unused argument(s) compilation warning */ |
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250 UNUSED(hsdram); |
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251 /* NOTE: This function Should not be modified, when the callback is needed, |
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252 the HAL_SDRAM_RefreshErrorCallback could be implemented in the user file |
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253 */ |
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254 } |
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255 |
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256 /** |
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257 * @brief DMA transfer complete callback. |
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258 * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
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259 * the configuration information for the specified DMA module. |
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260 * @retval None |
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261 */ |
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262 __weak void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma) |
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263 { |
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264 /* Prevent unused argument(s) compilation warning */ |
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265 UNUSED(hdma); |
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266 /* NOTE: This function Should not be modified, when the callback is needed, |
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267 the HAL_SDRAM_DMA_XferCpltCallback could be implemented in the user file |
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268 */ |
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269 } |
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270 |
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271 /** |
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272 * @brief DMA transfer complete error callback. |
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273 * @param hdma DMA handle |
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274 * @retval None |
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275 */ |
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276 __weak void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma) |
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277 { |
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278 /* Prevent unused argument(s) compilation warning */ |
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279 UNUSED(hdma); |
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280 /* NOTE: This function Should not be modified, when the callback is needed, |
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281 the HAL_SDRAM_DMA_XferErrorCallback could be implemented in the user file |
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282 */ |
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283 } |
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284 /** |
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285 * @} |
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286 */ |
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287 |
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288 /** @defgroup SDRAM_Exported_Functions_Group2 Input and Output functions |
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289 * @brief Input Output and memory control functions |
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290 * |
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291 @verbatim |
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292 ============================================================================== |
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293 ##### SDRAM Input and Output functions ##### |
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294 ============================================================================== |
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295 [..] |
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296 This section provides functions allowing to use and control the SDRAM memory |
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297 |
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298 @endverbatim |
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299 * @{ |
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300 */ |
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301 |
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302 /** |
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303 * @brief Reads 8-bit data buffer from the SDRAM memory. |
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304 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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305 * the configuration information for SDRAM module. |
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306 * @param pAddress Pointer to read start address |
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307 * @param pDstBuffer Pointer to destination buffer |
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308 * @param BufferSize Size of the buffer to read from memory |
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309 * @retval HAL status |
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310 */ |
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311 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize) |
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312 { |
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313 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress; |
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314 |
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315 /* Process Locked */ |
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316 __HAL_LOCK(hsdram); |
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317 |
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318 /* Check the SDRAM controller state */ |
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319 if(hsdram->State == HAL_SDRAM_STATE_BUSY) |
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320 { |
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321 return HAL_BUSY; |
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322 } |
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323 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED) |
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324 { |
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325 return HAL_ERROR; |
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326 } |
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327 |
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328 /* Read data from source */ |
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329 for(; BufferSize != 0U; BufferSize--) |
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330 { |
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331 *pDstBuffer = *(__IO uint8_t *)pSdramAddress; |
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332 pDstBuffer++; |
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333 pSdramAddress++; |
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334 } |
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335 |
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336 /* Process Unlocked */ |
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337 __HAL_UNLOCK(hsdram); |
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338 |
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339 return HAL_OK; |
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340 } |
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341 |
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342 /** |
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343 * @brief Writes 8-bit data buffer to SDRAM memory. |
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344 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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345 * the configuration information for SDRAM module. |
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346 * @param pAddress Pointer to write start address |
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347 * @param pSrcBuffer Pointer to source buffer to write |
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348 * @param BufferSize Size of the buffer to write to memory |
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349 * @retval HAL status |
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350 */ |
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351 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize) |
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352 { |
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353 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress; |
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354 uint32_t tmp = 0U; |
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355 |
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356 /* Process Locked */ |
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357 __HAL_LOCK(hsdram); |
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358 |
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359 /* Check the SDRAM controller state */ |
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360 tmp = hsdram->State; |
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361 |
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362 if(tmp == HAL_SDRAM_STATE_BUSY) |
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363 { |
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364 return HAL_BUSY; |
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365 } |
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366 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED)) |
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367 { |
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368 return HAL_ERROR; |
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369 } |
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370 |
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371 /* Write data to memory */ |
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372 for(; BufferSize != 0U; BufferSize--) |
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373 { |
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374 *(__IO uint8_t *)pSdramAddress = *pSrcBuffer; |
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375 pSrcBuffer++; |
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376 pSdramAddress++; |
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377 } |
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378 |
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379 /* Process Unlocked */ |
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380 __HAL_UNLOCK(hsdram); |
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381 |
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382 return HAL_OK; |
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383 } |
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384 |
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385 /** |
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386 * @brief Reads 16-bit data buffer from the SDRAM memory. |
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387 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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388 * the configuration information for SDRAM module. |
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389 * @param pAddress Pointer to read start address |
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390 * @param pDstBuffer Pointer to destination buffer |
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391 * @param BufferSize Size of the buffer to read from memory |
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392 * @retval HAL status |
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393 */ |
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394 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize) |
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395 { |
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396 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress; |
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397 |
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398 /* Process Locked */ |
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399 __HAL_LOCK(hsdram); |
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400 |
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401 /* Check the SDRAM controller state */ |
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402 if(hsdram->State == HAL_SDRAM_STATE_BUSY) |
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403 { |
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404 return HAL_BUSY; |
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Added current STM32 standandard libraries in version independend folder structure
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405 } |
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406 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED) |
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407 { |
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Added current STM32 standandard libraries in version independend folder structure
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408 return HAL_ERROR; |
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409 } |
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410 |
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Added current STM32 standandard libraries in version independend folder structure
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411 /* Read data from source */ |
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412 for(; BufferSize != 0U; BufferSize--) |
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413 { |
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414 *pDstBuffer = *(__IO uint16_t *)pSdramAddress; |
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415 pDstBuffer++; |
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416 pSdramAddress++; |
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417 } |
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418 |
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419 /* Process Unlocked */ |
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420 __HAL_UNLOCK(hsdram); |
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421 |
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422 return HAL_OK; |
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423 } |
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424 |
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425 /** |
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426 * @brief Writes 16-bit data buffer to SDRAM memory. |
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427 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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428 * the configuration information for SDRAM module. |
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429 * @param pAddress Pointer to write start address |
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430 * @param pSrcBuffer Pointer to source buffer to write |
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431 * @param BufferSize Size of the buffer to write to memory |
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432 * @retval HAL status |
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433 */ |
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434 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize) |
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435 { |
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436 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress; |
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437 uint32_t tmp = 0U; |
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438 |
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439 /* Process Locked */ |
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440 __HAL_LOCK(hsdram); |
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441 |
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442 /* Check the SDRAM controller state */ |
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443 tmp = hsdram->State; |
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444 |
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445 if(tmp == HAL_SDRAM_STATE_BUSY) |
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446 { |
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447 return HAL_BUSY; |
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448 } |
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449 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED)) |
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450 { |
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451 return HAL_ERROR; |
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452 } |
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453 |
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454 /* Write data to memory */ |
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455 for(; BufferSize != 0U; BufferSize--) |
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456 { |
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457 *(__IO uint16_t *)pSdramAddress = *pSrcBuffer; |
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458 pSrcBuffer++; |
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459 pSdramAddress++; |
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460 } |
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461 |
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462 /* Process Unlocked */ |
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463 __HAL_UNLOCK(hsdram); |
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464 |
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465 return HAL_OK; |
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466 } |
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467 |
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468 /** |
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469 * @brief Reads 32-bit data buffer from the SDRAM memory. |
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470 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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471 * the configuration information for SDRAM module. |
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472 * @param pAddress Pointer to read start address |
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473 * @param pDstBuffer Pointer to destination buffer |
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474 * @param BufferSize Size of the buffer to read from memory |
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475 * @retval HAL status |
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476 */ |
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477 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize) |
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478 { |
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479 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress; |
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480 |
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481 /* Process Locked */ |
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482 __HAL_LOCK(hsdram); |
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483 |
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484 /* Check the SDRAM controller state */ |
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485 if(hsdram->State == HAL_SDRAM_STATE_BUSY) |
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486 { |
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487 return HAL_BUSY; |
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488 } |
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489 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED) |
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490 { |
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491 return HAL_ERROR; |
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|
492 } |
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|
493 |
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494 /* Read data from source */ |
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495 for(; BufferSize != 0U; BufferSize--) |
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496 { |
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497 *pDstBuffer = *(__IO uint32_t *)pSdramAddress; |
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498 pDstBuffer++; |
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499 pSdramAddress++; |
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Added current STM32 standandard libraries in version independend folder structure
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500 } |
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|
501 |
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|
502 /* Process Unlocked */ |
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503 __HAL_UNLOCK(hsdram); |
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|
504 |
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505 return HAL_OK; |
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|
506 } |
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|
507 |
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|
508 /** |
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509 * @brief Writes 32-bit data buffer to SDRAM memory. |
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510 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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511 * the configuration information for SDRAM module. |
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512 * @param pAddress Pointer to write start address |
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513 * @param pSrcBuffer Pointer to source buffer to write |
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Added current STM32 standandard libraries in version independend folder structure
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514 * @param BufferSize Size of the buffer to write to memory |
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515 * @retval HAL status |
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|
516 */ |
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517 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize) |
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Added current STM32 standandard libraries in version independend folder structure
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518 { |
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519 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress; |
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520 uint32_t tmp = 0U; |
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|
521 |
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522 /* Process Locked */ |
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523 __HAL_LOCK(hsdram); |
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|
524 |
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Added current STM32 standandard libraries in version independend folder structure
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|
525 /* Check the SDRAM controller state */ |
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526 tmp = hsdram->State; |
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|
527 |
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528 if(tmp == HAL_SDRAM_STATE_BUSY) |
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|
529 { |
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530 return HAL_BUSY; |
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Added current STM32 standandard libraries in version independend folder structure
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|
531 } |
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532 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED)) |
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|
533 { |
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534 return HAL_ERROR; |
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|
535 } |
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|
536 |
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Added current STM32 standandard libraries in version independend folder structure
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|
537 /* Write data to memory */ |
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|
538 for(; BufferSize != 0U; BufferSize--) |
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|
539 { |
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|
540 *(__IO uint32_t *)pSdramAddress = *pSrcBuffer; |
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541 pSrcBuffer++; |
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542 pSdramAddress++; |
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543 } |
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544 |
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545 /* Process Unlocked */ |
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546 __HAL_UNLOCK(hsdram); |
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547 |
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548 return HAL_OK; |
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549 } |
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550 |
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551 /** |
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552 * @brief Reads a Words data from the SDRAM memory using DMA transfer. |
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553 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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554 * the configuration information for SDRAM module. |
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555 * @param pAddress Pointer to read start address |
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556 * @param pDstBuffer Pointer to destination buffer |
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557 * @param BufferSize Size of the buffer to read from memory |
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558 * @retval HAL status |
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559 */ |
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560 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize) |
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561 { |
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562 uint32_t tmp = 0U; |
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563 |
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564 /* Process Locked */ |
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565 __HAL_LOCK(hsdram); |
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566 |
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567 /* Check the SDRAM controller state */ |
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568 tmp = hsdram->State; |
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569 |
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570 if(tmp == HAL_SDRAM_STATE_BUSY) |
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571 { |
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572 return HAL_BUSY; |
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573 } |
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574 else if(tmp == HAL_SDRAM_STATE_PRECHARGED) |
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575 { |
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576 return HAL_ERROR; |
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577 } |
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578 |
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579 /* Configure DMA user callbacks */ |
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580 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback; |
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581 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback; |
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582 |
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583 /* Enable the DMA Stream */ |
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584 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize); |
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585 |
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586 /* Process Unlocked */ |
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587 __HAL_UNLOCK(hsdram); |
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588 |
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589 return HAL_OK; |
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590 } |
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591 |
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592 /** |
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593 * @brief Writes a Words data buffer to SDRAM memory using DMA transfer. |
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594 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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595 * the configuration information for SDRAM module. |
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596 * @param pAddress Pointer to write start address |
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597 * @param pSrcBuffer Pointer to source buffer to write |
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598 * @param BufferSize Size of the buffer to write to memory |
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599 * @retval HAL status |
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600 */ |
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601 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize) |
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602 { |
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603 uint32_t tmp = 0U; |
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604 |
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605 /* Process Locked */ |
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606 __HAL_LOCK(hsdram); |
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607 |
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608 /* Check the SDRAM controller state */ |
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609 tmp = hsdram->State; |
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610 |
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611 if(tmp == HAL_SDRAM_STATE_BUSY) |
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612 { |
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613 return HAL_BUSY; |
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614 } |
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615 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED)) |
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616 { |
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617 return HAL_ERROR; |
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618 } |
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619 |
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620 /* Configure DMA user callbacks */ |
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621 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback; |
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622 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback; |
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623 |
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624 /* Enable the DMA Stream */ |
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625 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize); |
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626 |
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627 /* Process Unlocked */ |
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628 __HAL_UNLOCK(hsdram); |
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629 |
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630 return HAL_OK; |
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631 } |
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632 /** |
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633 * @} |
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634 */ |
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635 |
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636 /** @defgroup SDRAM_Exported_Functions_Group3 Control functions |
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637 * @brief management functions |
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638 * |
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639 @verbatim |
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640 ============================================================================== |
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641 ##### SDRAM Control functions ##### |
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642 ============================================================================== |
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643 [..] |
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644 This subsection provides a set of functions allowing to control dynamically |
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645 the SDRAM interface. |
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646 |
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647 @endverbatim |
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648 * @{ |
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649 */ |
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650 |
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651 /** |
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652 * @brief Enables dynamically SDRAM write protection. |
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653 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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654 * the configuration information for SDRAM module. |
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655 * @retval HAL status |
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656 */ |
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657 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram) |
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658 { |
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659 /* Check the SDRAM controller state */ |
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660 if(hsdram->State == HAL_SDRAM_STATE_BUSY) |
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661 { |
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662 return HAL_BUSY; |
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663 } |
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664 |
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665 /* Update the SDRAM state */ |
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666 hsdram->State = HAL_SDRAM_STATE_BUSY; |
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667 |
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668 /* Enable write protection */ |
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669 FMC_SDRAM_WriteProtection_Enable(hsdram->Instance, hsdram->Init.SDBank); |
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670 |
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671 /* Update the SDRAM state */ |
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672 hsdram->State = HAL_SDRAM_STATE_WRITE_PROTECTED; |
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673 |
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674 return HAL_OK; |
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675 } |
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676 |
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677 /** |
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678 * @brief Disables dynamically SDRAM write protection. |
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Added current STM32 standandard libraries in version independend folder structure
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679 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
680 * the configuration information for SDRAM module. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
681 * @retval HAL status |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
682 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
683 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
684 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
685 /* Check the SDRAM controller state */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
686 if(hsdram->State == HAL_SDRAM_STATE_BUSY) |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
687 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
688 return HAL_BUSY; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
689 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
changeset
|
690 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
691 /* Update the SDRAM state */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
changeset
|
692 hsdram->State = HAL_SDRAM_STATE_BUSY; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
693 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
694 /* Disable write protection */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
695 FMC_SDRAM_WriteProtection_Disable(hsdram->Instance, hsdram->Init.SDBank); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
696 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
697 /* Update the SDRAM state */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
698 hsdram->State = HAL_SDRAM_STATE_READY; |
c78bcbd5deda
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Ideenmodellierer
parents:
diff
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|
699 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
700 return HAL_OK; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
701 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
702 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
703 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
704 * @brief Sends Command to the SDRAM bank. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
705 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
706 * the configuration information for SDRAM module. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
707 * @param Command SDRAM command structure |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
708 * @param Timeout Timeout duration |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
709 * @retval HAL status |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
710 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
711 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
712 { |
c78bcbd5deda
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Ideenmodellierer
parents:
diff
changeset
|
713 /* Check the SDRAM controller state */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
714 if(hsdram->State == HAL_SDRAM_STATE_BUSY) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
715 { |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
716 return HAL_BUSY; |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
717 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
718 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
719 /* Update the SDRAM state */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
changeset
|
720 hsdram->State = HAL_SDRAM_STATE_BUSY; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
721 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
722 /* Send SDRAM command */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
723 FMC_SDRAM_SendCommand(hsdram->Instance, Command, Timeout); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
724 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
725 /* Update the SDRAM controller state */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
726 if(Command->CommandMode == FMC_SDRAM_CMD_PALL) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
727 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
728 hsdram->State = HAL_SDRAM_STATE_PRECHARGED; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
729 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
730 else |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
731 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
732 hsdram->State = HAL_SDRAM_STATE_READY; |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
changeset
|
733 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
734 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
735 return HAL_OK; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
736 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
737 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
changeset
|
738 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
739 * @brief Programs the SDRAM Memory Refresh rate. |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
740 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
741 * the configuration information for SDRAM module. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
742 * @param RefreshRate The SDRAM refresh rate value |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
743 * @retval HAL status |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
744 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
745 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
746 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
747 /* Check the SDRAM controller state */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
748 if(hsdram->State == HAL_SDRAM_STATE_BUSY) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
749 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
750 return HAL_BUSY; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
751 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
changeset
|
752 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
753 /* Update the SDRAM state */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
754 hsdram->State = HAL_SDRAM_STATE_BUSY; |
c78bcbd5deda
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|
755 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
756 /* Program the refresh rate */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
757 FMC_SDRAM_ProgramRefreshRate(hsdram->Instance ,RefreshRate); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
758 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
759 /* Update the SDRAM state */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
760 hsdram->State = HAL_SDRAM_STATE_READY; |
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Added current STM32 standandard libraries in version independend folder structure
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|
761 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
762 return HAL_OK; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
763 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
764 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
765 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
766 * @brief Sets the Number of consecutive SDRAM Memory auto Refresh commands. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
767 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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Added current STM32 standandard libraries in version independend folder structure
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|
768 * the configuration information for SDRAM module. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
769 * @param AutoRefreshNumber The SDRAM auto Refresh number |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
770 * @retval HAL status |
c78bcbd5deda
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|
771 */ |
c78bcbd5deda
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|
772 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber) |
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|
773 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
774 /* Check the SDRAM controller state */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
775 if(hsdram->State == HAL_SDRAM_STATE_BUSY) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
776 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
777 return HAL_BUSY; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
778 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
779 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
780 /* Update the SDRAM state */ |
c78bcbd5deda
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|
781 hsdram->State = HAL_SDRAM_STATE_BUSY; |
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|
782 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
783 /* Set the Auto-Refresh number */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
784 FMC_SDRAM_SetAutoRefreshNumber(hsdram->Instance ,AutoRefreshNumber); |
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|
785 |
c78bcbd5deda
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|
786 /* Update the SDRAM state */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
787 hsdram->State = HAL_SDRAM_STATE_READY; |
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|
788 |
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|
789 return HAL_OK; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
790 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
changeset
|
791 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
792 /** |
c78bcbd5deda
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|
793 * @brief Returns the SDRAM memory current mode. |
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Added current STM32 standandard libraries in version independend folder structure
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|
794 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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Added current STM32 standandard libraries in version independend folder structure
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|
795 * the configuration information for SDRAM module. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
796 * @retval The SDRAM memory mode. |
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Added current STM32 standandard libraries in version independend folder structure
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|
797 */ |
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|
798 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram) |
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|
799 { |
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|
800 /* Return the SDRAM memory current mode */ |
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|
801 return(FMC_SDRAM_GetModeStatus(hsdram->Instance, hsdram->Init.SDBank)); |
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Added current STM32 standandard libraries in version independend folder structure
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|
802 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
803 |
c78bcbd5deda
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|
804 /** |
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|
805 * @} |
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|
806 */ |
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|
807 |
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|
808 /** @defgroup SDRAM_Exported_Functions_Group4 State functions |
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|
809 * @brief Peripheral State functions |
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|
810 * |
c78bcbd5deda
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|
811 @verbatim |
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|
812 ============================================================================== |
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|
813 ##### SDRAM State functions ##### |
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|
814 ============================================================================== |
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815 [..] |
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816 This subsection permits to get in run-time the status of the SDRAM controller |
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817 and the data flow. |
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818 |
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819 @endverbatim |
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820 * @{ |
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821 */ |
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822 |
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823 /** |
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824 * @brief Returns the SDRAM state. |
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825 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains |
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826 * the configuration information for SDRAM module. |
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827 * @retval HAL state |
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828 */ |
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829 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram) |
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830 { |
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831 return hsdram->State; |
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832 } |
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833 |
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834 /** |
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835 * @} |
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836 */ |
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837 |
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838 /** |
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839 * @} |
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840 */ |
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841 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ |
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842 #endif /* HAL_SDRAM_MODULE_ENABLED */ |
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843 /** |
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844 * @} |
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845 */ |
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846 |
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847 /** |
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848 * @} |
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849 */ |
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850 |
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851 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |