Mercurial > public > ostc4
annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_sdmmc.h @ 929:63c340abd70e Evo_2_23
Add a line to the compass heading dive menu that shows the currently set heading to enable the
diver to confirm it / add it to notes.
Also add a log entry every time a new compass heading is set or the heading is cleared.
And add a way to add compass headings to the log without changing the currently set heading -
this was added after discussion with cave divers who are interested in recording headings
when mapping out caves.
From mikeller
author | heinrichsweikamp |
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date | Mon, 02 Dec 2024 11:16:10 +0100 |
parents | c78bcbd5deda |
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rev | line source |
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128
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_ll_sdmmc.h |
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4 * @author MCD Application Team |
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5 * @brief Header file of SDMMC HAL module. |
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6 ****************************************************************************** |
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7 * @attention |
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8 * |
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9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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10 * |
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11 * Redistribution and use in source and binary forms, with or without modification, |
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12 * are permitted provided that the following conditions are met: |
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13 * 1. Redistributions of source code must retain the above copyright notice, |
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14 * this list of conditions and the following disclaimer. |
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15 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 * this list of conditions and the following disclaimer in the documentation |
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17 * and/or other materials provided with the distribution. |
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 * may be used to endorse or promote products derived from this software |
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20 * without specific prior written permission. |
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21 * |
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 * |
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33 ****************************************************************************** |
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34 */ |
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35 |
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36 /* Define to prevent recursive inclusion -------------------------------------*/ |
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37 #ifndef __STM32F4xx_LL_SDMMC_H |
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38 #define __STM32F4xx_LL_SDMMC_H |
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39 |
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40 #ifdef __cplusplus |
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41 extern "C" { |
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42 #endif |
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43 |
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44 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ |
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45 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ |
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46 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \ |
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47 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ |
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48 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
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49 |
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50 /* Includes ------------------------------------------------------------------*/ |
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51 #include "stm32f4xx_hal_def.h" |
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52 |
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53 /** @addtogroup STM32F4xx_Driver |
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54 * @{ |
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55 */ |
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56 |
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57 /** @addtogroup SDMMC_LL |
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58 * @{ |
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59 */ |
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60 |
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61 /* Exported types ------------------------------------------------------------*/ |
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62 /** @defgroup SDMMC_LL_Exported_Types SDMMC_LL Exported Types |
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63 * @{ |
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64 */ |
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65 |
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66 /** |
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67 * @brief SDMMC Configuration Structure definition |
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68 */ |
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69 typedef struct |
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70 { |
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71 uint32_t ClockEdge; /*!< Specifies the clock transition on which the bit capture is made. |
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72 This parameter can be a value of @ref SDMMC_LL_Clock_Edge */ |
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73 |
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74 uint32_t ClockBypass; /*!< Specifies whether the SDMMC Clock divider bypass is |
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75 enabled or disabled. |
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76 This parameter can be a value of @ref SDMMC_LL_Clock_Bypass */ |
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77 |
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78 uint32_t ClockPowerSave; /*!< Specifies whether SDMMC Clock output is enabled or |
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79 disabled when the bus is idle. |
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80 This parameter can be a value of @ref SDMMC_LL_Clock_Power_Save */ |
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81 |
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82 uint32_t BusWide; /*!< Specifies the SDMMC bus width. |
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83 This parameter can be a value of @ref SDMMC_LL_Bus_Wide */ |
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84 |
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85 uint32_t HardwareFlowControl; /*!< Specifies whether the SDMMC hardware flow control is enabled or disabled. |
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86 This parameter can be a value of @ref SDMMC_LL_Hardware_Flow_Control */ |
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87 |
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88 uint32_t ClockDiv; /*!< Specifies the clock frequency of the SDMMC controller. |
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89 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */ |
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90 |
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91 }SDIO_InitTypeDef; |
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92 |
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93 |
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94 /** |
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95 * @brief SDMMC Command Control structure |
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96 */ |
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97 typedef struct |
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98 { |
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99 uint32_t Argument; /*!< Specifies the SDMMC command argument which is sent |
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100 to a card as part of a command message. If a command |
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101 contains an argument, it must be loaded into this register |
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102 before writing the command to the command register. */ |
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103 |
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104 uint32_t CmdIndex; /*!< Specifies the SDMMC command index. It must be Min_Data = 0 and |
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105 Max_Data = 64 */ |
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106 |
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107 uint32_t Response; /*!< Specifies the SDMMC response type. |
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108 This parameter can be a value of @ref SDMMC_LL_Response_Type */ |
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109 |
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110 uint32_t WaitForInterrupt; /*!< Specifies whether SDMMC wait for interrupt request is |
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111 enabled or disabled. |
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112 This parameter can be a value of @ref SDMMC_LL_Wait_Interrupt_State */ |
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113 |
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114 uint32_t CPSM; /*!< Specifies whether SDMMC Command path state machine (CPSM) |
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115 is enabled or disabled. |
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116 This parameter can be a value of @ref SDMMC_LL_CPSM_State */ |
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117 }SDIO_CmdInitTypeDef; |
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118 |
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119 |
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120 /** |
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121 * @brief SDMMC Data Control structure |
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122 */ |
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123 typedef struct |
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124 { |
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125 uint32_t DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */ |
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126 |
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127 uint32_t DataLength; /*!< Specifies the number of data bytes to be transferred. */ |
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128 |
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129 uint32_t DataBlockSize; /*!< Specifies the data block size for block transfer. |
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130 This parameter can be a value of @ref SDMMC_LL_Data_Block_Size */ |
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131 |
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132 uint32_t TransferDir; /*!< Specifies the data transfer direction, whether the transfer |
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133 is a read or write. |
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134 This parameter can be a value of @ref SDMMC_LL_Transfer_Direction */ |
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135 |
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136 uint32_t TransferMode; /*!< Specifies whether data transfer is in stream or block mode. |
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137 This parameter can be a value of @ref SDMMC_LL_Transfer_Type */ |
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138 |
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139 uint32_t DPSM; /*!< Specifies whether SDMMC Data path state machine (DPSM) |
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140 is enabled or disabled. |
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141 This parameter can be a value of @ref SDMMC_LL_DPSM_State */ |
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142 }SDIO_DataInitTypeDef; |
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143 |
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144 /** |
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145 * @} |
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146 */ |
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147 |
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148 /* Exported constants --------------------------------------------------------*/ |
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149 /** @defgroup SDMMC_LL_Exported_Constants SDMMC_LL Exported Constants |
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150 * @{ |
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151 */ |
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152 #define SDMMC_ERROR_NONE 0x00000000U /*!< No error */ |
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153 #define SDMMC_ERROR_CMD_CRC_FAIL 0x00000001U /*!< Command response received (but CRC check failed) */ |
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154 #define SDMMC_ERROR_DATA_CRC_FAIL 0x00000002U /*!< Data block sent/received (CRC check failed) */ |
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155 #define SDMMC_ERROR_CMD_RSP_TIMEOUT 0x00000004U /*!< Command response timeout */ |
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156 #define SDMMC_ERROR_DATA_TIMEOUT 0x00000008U /*!< Data timeout */ |
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157 #define SDMMC_ERROR_TX_UNDERRUN 0x00000010U /*!< Transmit FIFO underrun */ |
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158 #define SDMMC_ERROR_RX_OVERRUN 0x00000020U /*!< Receive FIFO overrun */ |
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159 #define SDMMC_ERROR_ADDR_MISALIGNED 0x00000040U /*!< Misaligned address */ |
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160 #define SDMMC_ERROR_BLOCK_LEN_ERR 0x00000080U /*!< Transferred block length is not allowed for the card or the |
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161 number of transferred bytes does not match the block length */ |
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162 #define SDMMC_ERROR_ERASE_SEQ_ERR 0x00000100U /*!< An error in the sequence of erase command occurs */ |
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163 #define SDMMC_ERROR_BAD_ERASE_PARAM 0x00000200U /*!< An invalid selection for erase groups */ |
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164 #define SDMMC_ERROR_WRITE_PROT_VIOLATION 0x00000400U /*!< Attempt to program a write protect block */ |
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165 #define SDMMC_ERROR_LOCK_UNLOCK_FAILED 0x00000800U /*!< Sequence or password error has been detected in unlock |
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166 command or if there was an attempt to access a locked card */ |
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167 #define SDMMC_ERROR_COM_CRC_FAILED 0x00001000U /*!< CRC check of the previous command failed */ |
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168 #define SDMMC_ERROR_ILLEGAL_CMD 0x00002000U /*!< Command is not legal for the card state */ |
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169 #define SDMMC_ERROR_CARD_ECC_FAILED 0x00004000U /*!< Card internal ECC was applied but failed to correct the data */ |
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170 #define SDMMC_ERROR_CC_ERR 0x00008000U /*!< Internal card controller error */ |
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171 #define SDMMC_ERROR_GENERAL_UNKNOWN_ERR 0x00010000U /*!< General or unknown error */ |
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172 #define SDMMC_ERROR_STREAM_READ_UNDERRUN 0x00020000U /*!< The card could not sustain data reading in stream rmode */ |
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173 #define SDMMC_ERROR_STREAM_WRITE_OVERRUN 0x00040000U /*!< The card could not sustain data programming in stream mode */ |
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174 #define SDMMC_ERROR_CID_CSD_OVERWRITE 0x00080000U /*!< CID/CSD overwrite error */ |
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175 #define SDMMC_ERROR_WP_ERASE_SKIP 0x00100000U /*!< Only partial address space was erased */ |
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176 #define SDMMC_ERROR_CARD_ECC_DISABLED 0x00200000U /*!< Command has been executed without using internal ECC */ |
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177 #define SDMMC_ERROR_ERASE_RESET 0x00400000U /*!< Erase sequence was cleared before executing because an out |
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178 of erase sequence command was received */ |
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179 #define SDMMC_ERROR_AKE_SEQ_ERR 0x00800000U /*!< Error in sequence of authentication */ |
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180 #define SDMMC_ERROR_INVALID_VOLTRANGE 0x01000000U /*!< Error in case of invalid voltage range */ |
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181 #define SDMMC_ERROR_ADDR_OUT_OF_RANGE 0x02000000U /*!< Error when addressed block is out of range */ |
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182 #define SDMMC_ERROR_REQUEST_NOT_APPLICABLE 0x04000000U /*!< Error when command request is not applicable */ |
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183 #define SDMMC_ERROR_INVALID_PARAMETER 0x08000000U /*!< the used parameter is not valid */ |
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184 #define SDMMC_ERROR_UNSUPPORTED_FEATURE 0x10000000U /*!< Error when feature is not insupported */ |
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185 #define SDMMC_ERROR_BUSY 0x20000000U /*!< Error when transfer process is busy */ |
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186 #define SDMMC_ERROR_DMA 0x40000000U /*!< Error while DMA transfer */ |
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187 #define SDMMC_ERROR_TIMEOUT 0x80000000U /*!< Timeout error */ |
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188 |
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189 /** |
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190 * @brief SDMMC Commands Index |
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191 */ |
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192 #define SDMMC_CMD_GO_IDLE_STATE ((uint8_t)0) /*!< Resets the SD memory card. */ |
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193 #define SDMMC_CMD_SEND_OP_COND ((uint8_t)1) /*!< Sends host capacity support information and activates the card's initialization process. */ |
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194 #define SDMMC_CMD_ALL_SEND_CID ((uint8_t)2) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */ |
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195 #define SDMMC_CMD_SET_REL_ADDR ((uint8_t)3) /*!< Asks the card to publish a new relative address (RCA). */ |
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196 #define SDMMC_CMD_SET_DSR ((uint8_t)4) /*!< Programs the DSR of all cards. */ |
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197 #define SDMMC_CMD_SDMMC_SEN_OP_COND ((uint8_t)5) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its |
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198 operating condition register (OCR) content in the response on the CMD line. */ |
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199 #define SDMMC_CMD_HS_SWITCH ((uint8_t)6) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */ |
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200 #define SDMMC_CMD_SEL_DESEL_CARD ((uint8_t)7) /*!< Selects the card by its own relative address and gets deselected by any other address */ |
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201 #define SDMMC_CMD_HS_SEND_EXT_CSD ((uint8_t)8) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information |
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202 and asks the card whether card supports voltage. */ |
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203 #define SDMMC_CMD_SEND_CSD ((uint8_t)9) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */ |
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204 #define SDMMC_CMD_SEND_CID ((uint8_t)10) /*!< Addressed card sends its card identification (CID) on the CMD line. */ |
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205 #define SDMMC_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD card doesn't support it. */ |
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206 #define SDMMC_CMD_STOP_TRANSMISSION ((uint8_t)12) /*!< Forces the card to stop transmission. */ |
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207 #define SDMMC_CMD_SEND_STATUS ((uint8_t)13) /*!< Addressed card sends its status register. */ |
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208 #define SDMMC_CMD_HS_BUSTEST_READ ((uint8_t)14) /*!< Reserved */ |
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209 #define SDMMC_CMD_GO_INACTIVE_STATE ((uint8_t)15) /*!< Sends an addressed card into the inactive state. */ |
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210 #define SDMMC_CMD_SET_BLOCKLEN ((uint8_t)16) /*!< Sets the block length (in bytes for SDSC) for all following block commands |
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211 (read, write, lock). Default block length is fixed to 512 Bytes. Not effective |
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212 for SDHS and SDXC. */ |
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213 #define SDMMC_CMD_READ_SINGLE_BLOCK ((uint8_t)17) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of |
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214 fixed 512 bytes in case of SDHC and SDXC. */ |
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215 #define SDMMC_CMD_READ_MULT_BLOCK ((uint8_t)18) /*!< Continuously transfers data blocks from card to host until interrupted by |
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216 STOP_TRANSMISSION command. */ |
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217 #define SDMMC_CMD_HS_BUSTEST_WRITE ((uint8_t)19) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */ |
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218 #define SDMMC_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< Speed class control command. */ |
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219 #define SDMMC_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< Specify block count for CMD18 and CMD25. */ |
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220 #define SDMMC_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of |
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221 fixed 512 bytes in case of SDHC and SDXC. */ |
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222 #define SDMMC_CMD_WRITE_MULT_BLOCK ((uint8_t)25) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */ |
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223 #define SDMMC_CMD_PROG_CID ((uint8_t)26) /*!< Reserved for manufacturers. */ |
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224 #define SDMMC_CMD_PROG_CSD ((uint8_t)27) /*!< Programming of the programmable bits of the CSD. */ |
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225 #define SDMMC_CMD_SET_WRITE_PROT ((uint8_t)28) /*!< Sets the write protection bit of the addressed group. */ |
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226 #define SDMMC_CMD_CLR_WRITE_PROT ((uint8_t)29) /*!< Clears the write protection bit of the addressed group. */ |
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227 #define SDMMC_CMD_SEND_WRITE_PROT ((uint8_t)30) /*!< Asks the card to send the status of the write protection bits. */ |
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228 #define SDMMC_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< Sets the address of the first write block to be erased. (For SD card only). */ |
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229 #define SDMMC_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< Sets the address of the last write block of the continuous range to be erased. */ |
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230 #define SDMMC_CMD_ERASE_GRP_START ((uint8_t)35) /*!< Sets the address of the first write block to be erased. Reserved for each command |
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231 system set by switch function command (CMD6). */ |
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232 #define SDMMC_CMD_ERASE_GRP_END ((uint8_t)36) /*!< Sets the address of the last write block of the continuous range to be erased. |
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233 Reserved for each command system set by switch function command (CMD6). */ |
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234 #define SDMMC_CMD_ERASE ((uint8_t)38) /*!< Reserved for SD security applications. */ |
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235 #define SDMMC_CMD_FAST_IO ((uint8_t)39) /*!< SD card doesn't support it (Reserved). */ |
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236 #define SDMMC_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD card doesn't support it (Reserved). */ |
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237 #define SDMMC_CMD_LOCK_UNLOCK ((uint8_t)42) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by |
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238 the SET_BLOCK_LEN command. */ |
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239 #define SDMMC_CMD_APP_CMD ((uint8_t)55) /*!< Indicates to the card that the next command is an application specific command rather |
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240 than a standard command. */ |
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241 #define SDMMC_CMD_GEN_CMD ((uint8_t)56) /*!< Used either to transfer a data block to the card or to get a data block from the card |
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242 for general purpose/application specific commands. */ |
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243 #define SDMMC_CMD_NO_CMD ((uint8_t)64) /*!< No command */ |
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244 |
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245 /** |
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246 * @brief Following commands are SD Card Specific commands. |
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247 * SDMMC_APP_CMD should be sent before sending these commands. |
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248 */ |
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249 #define SDMMC_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus |
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250 widths are given in SCR register. */ |
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251 #define SDMMC_CMD_SD_APP_STATUS ((uint8_t)13) /*!< (ACMD13) Sends the SD status. */ |
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252 #define SDMMC_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with |
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253 32bit+CRC data block. */ |
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254 #define SDMMC_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to |
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255 send its operating condition register (OCR) content in the response on the CMD line. */ |
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256 #define SDMMC_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< (ACMD42) Connect/Disconnect the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card */ |
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257 #define SDMMC_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< Reads the SD Configuration Register (SCR). */ |
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258 #define SDMMC_CMD_SDMMC_RW_DIRECT ((uint8_t)52) /*!< For SD I/O card only, reserved for security specification. */ |
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259 #define SDMMC_CMD_SDMMC_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O card only, reserved for security specification. */ |
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260 |
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261 /** |
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262 * @brief Following commands are SD Card Specific security commands. |
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263 * SDMMC_CMD_APP_CMD should be sent before sending these commands. |
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264 */ |
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265 #define SDMMC_CMD_SD_APP_GET_MKB ((uint8_t)43) |
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266 #define SDMMC_CMD_SD_APP_GET_MID ((uint8_t)44) |
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267 #define SDMMC_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) |
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268 #define SDMMC_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) |
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269 #define SDMMC_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) |
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270 #define SDMMC_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) |
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271 #define SDMMC_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) |
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272 #define SDMMC_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) |
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273 #define SDMMC_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) |
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274 #define SDMMC_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) |
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275 #define SDMMC_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) |
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276 |
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277 /** |
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278 * @brief Masks for errors Card Status R1 (OCR Register) |
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279 */ |
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280 #define SDMMC_OCR_ADDR_OUT_OF_RANGE 0x80000000U |
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281 #define SDMMC_OCR_ADDR_MISALIGNED 0x40000000U |
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282 #define SDMMC_OCR_BLOCK_LEN_ERR 0x20000000U |
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283 #define SDMMC_OCR_ERASE_SEQ_ERR 0x10000000U |
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284 #define SDMMC_OCR_BAD_ERASE_PARAM 0x08000000U |
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285 #define SDMMC_OCR_WRITE_PROT_VIOLATION 0x04000000U |
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286 #define SDMMC_OCR_LOCK_UNLOCK_FAILED 0x01000000U |
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287 #define SDMMC_OCR_COM_CRC_FAILED 0x00800000U |
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288 #define SDMMC_OCR_ILLEGAL_CMD 0x00400000U |
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289 #define SDMMC_OCR_CARD_ECC_FAILED 0x00200000U |
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290 #define SDMMC_OCR_CC_ERROR 0x00100000U |
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291 #define SDMMC_OCR_GENERAL_UNKNOWN_ERROR 0x00080000U |
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292 #define SDMMC_OCR_STREAM_READ_UNDERRUN 0x00040000U |
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293 #define SDMMC_OCR_STREAM_WRITE_OVERRUN 0x00020000U |
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294 #define SDMMC_OCR_CID_CSD_OVERWRITE 0x00010000U |
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295 #define SDMMC_OCR_WP_ERASE_SKIP 0x00008000U |
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296 #define SDMMC_OCR_CARD_ECC_DISABLED 0x00004000U |
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297 #define SDMMC_OCR_ERASE_RESET 0x00002000U |
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298 #define SDMMC_OCR_AKE_SEQ_ERROR 0x00000008U |
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299 #define SDMMC_OCR_ERRORBITS 0xFDFFE008U |
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300 |
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301 /** |
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302 * @brief Masks for R6 Response |
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303 */ |
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304 #define SDMMC_R6_GENERAL_UNKNOWN_ERROR 0x00002000U |
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305 #define SDMMC_R6_ILLEGAL_CMD 0x00004000U |
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306 #define SDMMC_R6_COM_CRC_FAILED 0x00008000U |
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307 |
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308 #define SDMMC_VOLTAGE_WINDOW_SD 0x80100000U |
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309 #define SDMMC_HIGH_CAPACITY 0x40000000U |
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310 #define SDMMC_STD_CAPACITY 0x00000000U |
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311 #define SDMMC_CHECK_PATTERN 0x000001AAU |
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312 |
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313 #define SDMMC_MAX_VOLT_TRIAL 0x0000FFFFU |
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314 |
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315 #define SDMMC_MAX_TRIAL 0x0000FFFFU |
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316 |
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317 #define SDMMC_ALLZERO 0x00000000U |
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318 |
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319 #define SDMMC_WIDE_BUS_SUPPORT 0x00040000U |
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320 #define SDMMC_SINGLE_BUS_SUPPORT 0x00010000U |
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321 #define SDMMC_CARD_LOCKED 0x02000000U |
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322 |
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323 #define SDMMC_DATATIMEOUT 0xFFFFFFFFU |
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324 |
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325 #define SDMMC_0TO7BITS 0x000000FFU |
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326 #define SDMMC_8TO15BITS 0x0000FF00U |
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327 #define SDMMC_16TO23BITS 0x00FF0000U |
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328 #define SDMMC_24TO31BITS 0xFF000000U |
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329 #define SDMMC_MAX_DATA_LENGTH 0x01FFFFFFU |
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330 |
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331 #define SDMMC_HALFFIFO 0x00000008U |
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332 #define SDMMC_HALFFIFOBYTES 0x00000020U |
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333 |
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334 /** |
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335 * @brief Command Class supported |
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336 */ |
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337 #define SDIO_CCCC_ERASE 0x00000020U |
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338 |
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339 #define SDIO_CMDTIMEOUT 5000U /* Command send and response timeout */ |
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340 #define SDIO_MAXERASETIMEOUT 63000U /* Max erase Timeout 63 s */ |
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341 |
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342 |
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343 /** @defgroup SDIO_LL_Clock_Edge Clock Edge |
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344 * @{ |
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345 */ |
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346 #define SDIO_CLOCK_EDGE_RISING 0x00000000U |
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347 #define SDIO_CLOCK_EDGE_FALLING SDIO_CLKCR_NEGEDGE |
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348 |
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349 #define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_CLOCK_EDGE_RISING) || \ |
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350 ((EDGE) == SDIO_CLOCK_EDGE_FALLING)) |
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351 /** |
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352 * @} |
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353 */ |
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354 |
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355 /** @defgroup SDIO_LL_Clock_Bypass Clock Bypass |
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356 * @{ |
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357 */ |
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358 #define SDIO_CLOCK_BYPASS_DISABLE 0x00000000U |
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359 #define SDIO_CLOCK_BYPASS_ENABLE SDIO_CLKCR_BYPASS |
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360 |
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361 #define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_CLOCK_BYPASS_DISABLE) || \ |
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362 ((BYPASS) == SDIO_CLOCK_BYPASS_ENABLE)) |
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363 /** |
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364 * @} |
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365 */ |
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366 |
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367 /** @defgroup SDIO_LL_Clock_Power_Save Clock Power Saving |
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368 * @{ |
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369 */ |
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370 #define SDIO_CLOCK_POWER_SAVE_DISABLE 0x00000000U |
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371 #define SDIO_CLOCK_POWER_SAVE_ENABLE SDIO_CLKCR_PWRSAV |
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372 |
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373 #define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_CLOCK_POWER_SAVE_DISABLE) || \ |
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374 ((SAVE) == SDIO_CLOCK_POWER_SAVE_ENABLE)) |
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375 /** |
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376 * @} |
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377 */ |
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378 |
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379 /** @defgroup SDIO_LL_Bus_Wide Bus Width |
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380 * @{ |
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381 */ |
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382 #define SDIO_BUS_WIDE_1B 0x00000000U |
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383 #define SDIO_BUS_WIDE_4B SDIO_CLKCR_WIDBUS_0 |
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384 #define SDIO_BUS_WIDE_8B SDIO_CLKCR_WIDBUS_1 |
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385 |
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386 #define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BUS_WIDE_1B) || \ |
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387 ((WIDE) == SDIO_BUS_WIDE_4B) || \ |
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388 ((WIDE) == SDIO_BUS_WIDE_8B)) |
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389 /** |
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390 * @} |
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391 */ |
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392 |
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393 /** @defgroup SDIO_LL_Hardware_Flow_Control Hardware Flow Control |
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394 * @{ |
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395 */ |
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396 #define SDIO_HARDWARE_FLOW_CONTROL_DISABLE 0x00000000U |
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397 #define SDIO_HARDWARE_FLOW_CONTROL_ENABLE SDIO_CLKCR_HWFC_EN |
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398 |
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399 #define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HARDWARE_FLOW_CONTROL_DISABLE) || \ |
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400 ((CONTROL) == SDIO_HARDWARE_FLOW_CONTROL_ENABLE)) |
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401 /** |
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402 * @} |
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403 */ |
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404 |
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405 /** @defgroup SDIO_LL_Clock_Division Clock Division |
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406 * @{ |
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407 */ |
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408 #define IS_SDIO_CLKDIV(DIV) ((DIV) <= 0xFFU) |
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409 /** |
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410 * @} |
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411 */ |
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412 |
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413 /** @defgroup SDIO_LL_Command_Index Command Index |
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414 * @{ |
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415 */ |
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416 #define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40U) |
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417 /** |
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418 * @} |
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419 */ |
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420 |
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421 /** @defgroup SDIO_LL_Response_Type Response Type |
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422 * @{ |
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423 */ |
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424 #define SDIO_RESPONSE_NO 0x00000000U |
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425 #define SDIO_RESPONSE_SHORT SDIO_CMD_WAITRESP_0 |
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426 #define SDIO_RESPONSE_LONG SDIO_CMD_WAITRESP |
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427 |
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428 #define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_RESPONSE_NO) || \ |
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429 ((RESPONSE) == SDIO_RESPONSE_SHORT) || \ |
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430 ((RESPONSE) == SDIO_RESPONSE_LONG)) |
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431 /** |
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432 * @} |
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433 */ |
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434 |
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435 /** @defgroup SDIO_LL_Wait_Interrupt_State Wait Interrupt |
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436 * @{ |
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437 */ |
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438 #define SDIO_WAIT_NO 0x00000000U |
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439 #define SDIO_WAIT_IT SDIO_CMD_WAITINT |
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440 #define SDIO_WAIT_PEND SDIO_CMD_WAITPEND |
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441 |
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442 #define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_WAIT_NO) || \ |
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443 ((WAIT) == SDIO_WAIT_IT) || \ |
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444 ((WAIT) == SDIO_WAIT_PEND)) |
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445 /** |
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446 * @} |
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447 */ |
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448 |
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449 /** @defgroup SDIO_LL_CPSM_State CPSM State |
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450 * @{ |
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451 */ |
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452 #define SDIO_CPSM_DISABLE 0x00000000U |
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453 #define SDIO_CPSM_ENABLE SDIO_CMD_CPSMEN |
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454 |
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455 #define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_DISABLE) || \ |
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456 ((CPSM) == SDIO_CPSM_ENABLE)) |
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457 /** |
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458 * @} |
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459 */ |
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460 |
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461 /** @defgroup SDIO_LL_Response_Registers Response Register |
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462 * @{ |
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463 */ |
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464 #define SDIO_RESP1 0x00000000U |
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465 #define SDIO_RESP2 0x00000004U |
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466 #define SDIO_RESP3 0x00000008U |
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467 #define SDIO_RESP4 0x0000000CU |
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468 |
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469 #define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || \ |
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470 ((RESP) == SDIO_RESP2) || \ |
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471 ((RESP) == SDIO_RESP3) || \ |
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472 ((RESP) == SDIO_RESP4)) |
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473 /** |
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474 * @} |
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475 */ |
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476 |
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477 /** @defgroup SDIO_LL_Data_Length Data Lenght |
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478 * @{ |
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479 */ |
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480 #define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFFU) |
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481 /** |
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482 * @} |
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483 */ |
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484 |
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485 /** @defgroup SDIO_LL_Data_Block_Size Data Block Size |
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486 * @{ |
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487 */ |
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488 #define SDIO_DATABLOCK_SIZE_1B 0x00000000U |
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489 #define SDIO_DATABLOCK_SIZE_2B SDIO_DCTRL_DBLOCKSIZE_0 |
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490 #define SDIO_DATABLOCK_SIZE_4B SDIO_DCTRL_DBLOCKSIZE_1 |
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491 #define SDIO_DATABLOCK_SIZE_8B (SDIO_DCTRL_DBLOCKSIZE_0|SDIO_DCTRL_DBLOCKSIZE_1) |
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492 #define SDIO_DATABLOCK_SIZE_16B SDIO_DCTRL_DBLOCKSIZE_2 |
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493 #define SDIO_DATABLOCK_SIZE_32B (SDIO_DCTRL_DBLOCKSIZE_0|SDIO_DCTRL_DBLOCKSIZE_2) |
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494 #define SDIO_DATABLOCK_SIZE_64B (SDIO_DCTRL_DBLOCKSIZE_1|SDIO_DCTRL_DBLOCKSIZE_2) |
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495 #define SDIO_DATABLOCK_SIZE_128B (SDIO_DCTRL_DBLOCKSIZE_0|SDIO_DCTRL_DBLOCKSIZE_1|SDIO_DCTRL_DBLOCKSIZE_2) |
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496 #define SDIO_DATABLOCK_SIZE_256B SDIO_DCTRL_DBLOCKSIZE_3 |
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497 #define SDIO_DATABLOCK_SIZE_512B (SDIO_DCTRL_DBLOCKSIZE_0|SDIO_DCTRL_DBLOCKSIZE_3) |
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498 #define SDIO_DATABLOCK_SIZE_1024B (SDIO_DCTRL_DBLOCKSIZE_1|SDIO_DCTRL_DBLOCKSIZE_3) |
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499 #define SDIO_DATABLOCK_SIZE_2048B (SDIO_DCTRL_DBLOCKSIZE_0|SDIO_DCTRL_DBLOCKSIZE_1|SDIO_DCTRL_DBLOCKSIZE_3) |
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500 #define SDIO_DATABLOCK_SIZE_4096B (SDIO_DCTRL_DBLOCKSIZE_2|SDIO_DCTRL_DBLOCKSIZE_3) |
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501 #define SDIO_DATABLOCK_SIZE_8192B (SDIO_DCTRL_DBLOCKSIZE_0|SDIO_DCTRL_DBLOCKSIZE_2|SDIO_DCTRL_DBLOCKSIZE_3) |
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502 #define SDIO_DATABLOCK_SIZE_16384B (SDIO_DCTRL_DBLOCKSIZE_1|SDIO_DCTRL_DBLOCKSIZE_2|SDIO_DCTRL_DBLOCKSIZE_3) |
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503 |
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504 #define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DATABLOCK_SIZE_1B) || \ |
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505 ((SIZE) == SDIO_DATABLOCK_SIZE_2B) || \ |
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506 ((SIZE) == SDIO_DATABLOCK_SIZE_4B) || \ |
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507 ((SIZE) == SDIO_DATABLOCK_SIZE_8B) || \ |
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508 ((SIZE) == SDIO_DATABLOCK_SIZE_16B) || \ |
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509 ((SIZE) == SDIO_DATABLOCK_SIZE_32B) || \ |
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510 ((SIZE) == SDIO_DATABLOCK_SIZE_64B) || \ |
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511 ((SIZE) == SDIO_DATABLOCK_SIZE_128B) || \ |
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512 ((SIZE) == SDIO_DATABLOCK_SIZE_256B) || \ |
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513 ((SIZE) == SDIO_DATABLOCK_SIZE_512B) || \ |
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514 ((SIZE) == SDIO_DATABLOCK_SIZE_1024B) || \ |
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515 ((SIZE) == SDIO_DATABLOCK_SIZE_2048B) || \ |
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516 ((SIZE) == SDIO_DATABLOCK_SIZE_4096B) || \ |
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517 ((SIZE) == SDIO_DATABLOCK_SIZE_8192B) || \ |
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518 ((SIZE) == SDIO_DATABLOCK_SIZE_16384B)) |
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519 /** |
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520 * @} |
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521 */ |
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522 |
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523 /** @defgroup SDIO_LL_Transfer_Direction Transfer Direction |
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524 * @{ |
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525 */ |
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526 #define SDIO_TRANSFER_DIR_TO_CARD 0x00000000U |
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527 #define SDIO_TRANSFER_DIR_TO_SDIO SDIO_DCTRL_DTDIR |
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528 |
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529 #define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TRANSFER_DIR_TO_CARD) || \ |
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530 ((DIR) == SDIO_TRANSFER_DIR_TO_SDIO)) |
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531 /** |
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532 * @} |
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533 */ |
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534 |
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535 /** @defgroup SDIO_LL_Transfer_Type Transfer Type |
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536 * @{ |
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537 */ |
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538 #define SDIO_TRANSFER_MODE_BLOCK 0x00000000U |
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539 #define SDIO_TRANSFER_MODE_STREAM SDIO_DCTRL_DTMODE |
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540 |
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541 #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TRANSFER_MODE_BLOCK) || \ |
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542 ((MODE) == SDIO_TRANSFER_MODE_STREAM)) |
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543 /** |
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544 * @} |
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545 */ |
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546 |
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547 /** @defgroup SDIO_LL_DPSM_State DPSM State |
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548 * @{ |
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549 */ |
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550 #define SDIO_DPSM_DISABLE 0x00000000U |
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551 #define SDIO_DPSM_ENABLE SDIO_DCTRL_DTEN |
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552 |
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553 #define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_DISABLE) ||\ |
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554 ((DPSM) == SDIO_DPSM_ENABLE)) |
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555 /** |
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556 * @} |
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557 */ |
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558 |
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559 /** @defgroup SDIO_LL_Read_Wait_Mode Read Wait Mode |
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560 * @{ |
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561 */ |
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562 #define SDIO_READ_WAIT_MODE_DATA2 0x00000000U |
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563 #define SDIO_READ_WAIT_MODE_CLK (SDIO_DCTRL_RWMOD) |
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564 |
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565 #define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_READ_WAIT_MODE_CLK) || \ |
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566 ((MODE) == SDIO_READ_WAIT_MODE_DATA2)) |
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567 /** |
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568 * @} |
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569 */ |
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570 |
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571 /** @defgroup SDIO_LL_Interrupt_sources Interrupt Sources |
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572 * @{ |
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573 */ |
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574 #define SDIO_IT_CCRCFAIL SDIO_STA_CCRCFAIL |
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575 #define SDIO_IT_DCRCFAIL SDIO_STA_DCRCFAIL |
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576 #define SDIO_IT_CTIMEOUT SDIO_STA_CTIMEOUT |
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577 #define SDIO_IT_DTIMEOUT SDIO_STA_DTIMEOUT |
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578 #define SDIO_IT_TXUNDERR SDIO_STA_TXUNDERR |
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579 #define SDIO_IT_RXOVERR SDIO_STA_RXOVERR |
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580 #define SDIO_IT_CMDREND SDIO_STA_CMDREND |
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581 #define SDIO_IT_CMDSENT SDIO_STA_CMDSENT |
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582 #define SDIO_IT_DATAEND SDIO_STA_DATAEND |
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583 #define SDIO_IT_STBITERR SDIO_STA_STBITERR |
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584 #define SDIO_IT_DBCKEND SDIO_STA_DBCKEND |
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585 #define SDIO_IT_CMDACT SDIO_STA_CMDACT |
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586 #define SDIO_IT_TXACT SDIO_STA_TXACT |
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587 #define SDIO_IT_RXACT SDIO_STA_RXACT |
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588 #define SDIO_IT_TXFIFOHE SDIO_STA_TXFIFOHE |
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589 #define SDIO_IT_RXFIFOHF SDIO_STA_RXFIFOHF |
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590 #define SDIO_IT_TXFIFOF SDIO_STA_TXFIFOF |
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591 #define SDIO_IT_RXFIFOF SDIO_STA_RXFIFOF |
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592 #define SDIO_IT_TXFIFOE SDIO_STA_TXFIFOE |
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593 #define SDIO_IT_RXFIFOE SDIO_STA_RXFIFOE |
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594 #define SDIO_IT_TXDAVL SDIO_STA_TXDAVL |
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595 #define SDIO_IT_RXDAVL SDIO_STA_RXDAVL |
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596 #define SDIO_IT_SDIOIT SDIO_STA_SDIOIT |
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597 #define SDIO_IT_CEATAEND SDIO_STA_CEATAEND |
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598 /** |
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599 * @} |
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|
600 */ |
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601 |
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|
602 /** @defgroup SDIO_LL_Flags Flags |
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|
603 * @{ |
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604 */ |
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605 #define SDIO_FLAG_CCRCFAIL SDIO_STA_CCRCFAIL |
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606 #define SDIO_FLAG_DCRCFAIL SDIO_STA_DCRCFAIL |
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607 #define SDIO_FLAG_CTIMEOUT SDIO_STA_CTIMEOUT |
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608 #define SDIO_FLAG_DTIMEOUT SDIO_STA_DTIMEOUT |
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609 #define SDIO_FLAG_TXUNDERR SDIO_STA_TXUNDERR |
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610 #define SDIO_FLAG_RXOVERR SDIO_STA_RXOVERR |
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611 #define SDIO_FLAG_CMDREND SDIO_STA_CMDREND |
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612 #define SDIO_FLAG_CMDSENT SDIO_STA_CMDSENT |
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613 #define SDIO_FLAG_DATAEND SDIO_STA_DATAEND |
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614 #define SDIO_FLAG_STBITERR SDIO_STA_STBITERR |
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615 #define SDIO_FLAG_DBCKEND SDIO_STA_DBCKEND |
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616 #define SDIO_FLAG_CMDACT SDIO_STA_CMDACT |
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617 #define SDIO_FLAG_TXACT SDIO_STA_TXACT |
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618 #define SDIO_FLAG_RXACT SDIO_STA_RXACT |
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619 #define SDIO_FLAG_TXFIFOHE SDIO_STA_TXFIFOHE |
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620 #define SDIO_FLAG_RXFIFOHF SDIO_STA_RXFIFOHF |
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621 #define SDIO_FLAG_TXFIFOF SDIO_STA_TXFIFOF |
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622 #define SDIO_FLAG_RXFIFOF SDIO_STA_RXFIFOF |
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623 #define SDIO_FLAG_TXFIFOE SDIO_STA_TXFIFOE |
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624 #define SDIO_FLAG_RXFIFOE SDIO_STA_RXFIFOE |
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625 #define SDIO_FLAG_TXDAVL SDIO_STA_TXDAVL |
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626 #define SDIO_FLAG_RXDAVL SDIO_STA_RXDAVL |
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627 #define SDIO_FLAG_SDIOIT SDIO_STA_SDIOIT |
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628 #define SDIO_FLAG_CEATAEND SDIO_STA_CEATAEND |
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629 #define SDIO_STATIC_FLAGS ((uint32_t)(SDIO_FLAG_CCRCFAIL | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_CTIMEOUT |\ |
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630 SDIO_FLAG_DTIMEOUT | SDIO_FLAG_TXUNDERR | SDIO_FLAG_RXOVERR |\ |
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631 SDIO_FLAG_CMDREND | SDIO_FLAG_CMDSENT | SDIO_FLAG_DATAEND |\ |
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632 SDIO_FLAG_DBCKEND)) |
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633 /** |
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634 * @} |
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635 */ |
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636 |
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637 /** |
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638 * @} |
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639 */ |
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640 |
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641 /* Exported macro ------------------------------------------------------------*/ |
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642 /** @defgroup SDIO_LL_Exported_macros SDIO_LL Exported Macros |
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643 * @{ |
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644 */ |
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645 |
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646 /** @defgroup SDMMC_LL_Alias_Region Bit Address in the alias region |
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647 * @{ |
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648 */ |
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649 /* ------------ SDIO registers bit address in the alias region -------------- */ |
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650 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE) |
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651 |
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652 /* --- CLKCR Register ---*/ |
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653 /* Alias word address of CLKEN bit */ |
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654 #define CLKCR_OFFSET (SDIO_OFFSET + 0x04U) |
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655 #define CLKEN_BITNUMBER 0x08U |
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656 #define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32U) + (CLKEN_BITNUMBER * 4U)) |
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657 |
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658 /* --- CMD Register ---*/ |
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659 /* Alias word address of SDIOSUSPEND bit */ |
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660 #define CMD_OFFSET (SDIO_OFFSET + 0x0CU) |
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661 #define SDIOSUSPEND_BITNUMBER 0x0BU |
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662 #define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32U) + (SDIOSUSPEND_BITNUMBER * 4U)) |
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663 |
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664 /* Alias word address of ENCMDCOMPL bit */ |
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665 #define ENCMDCOMPL_BITNUMBER 0x0CU |
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666 #define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32U) + (ENCMDCOMPL_BITNUMBER * 4U)) |
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667 |
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668 /* Alias word address of NIEN bit */ |
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669 #define NIEN_BITNUMBER 0x0DU |
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670 #define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32U) + (NIEN_BITNUMBER * 4U)) |
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671 |
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672 /* Alias word address of ATACMD bit */ |
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673 #define ATACMD_BITNUMBER 0x0EU |
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674 #define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32U) + (ATACMD_BITNUMBER * 4U)) |
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675 |
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676 /* --- DCTRL Register ---*/ |
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677 /* Alias word address of DMAEN bit */ |
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678 #define DCTRL_OFFSET (SDIO_OFFSET + 0x2CU) |
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679 #define DMAEN_BITNUMBER 0x03U |
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680 #define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (DMAEN_BITNUMBER * 4U)) |
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681 |
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682 /* Alias word address of RWSTART bit */ |
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683 #define RWSTART_BITNUMBER 0x08U |
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684 #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (RWSTART_BITNUMBER * 4U)) |
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685 |
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686 /* Alias word address of RWSTOP bit */ |
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687 #define RWSTOP_BITNUMBER 0x09U |
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688 #define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (RWSTOP_BITNUMBER * 4U)) |
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689 |
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|
690 /* Alias word address of RWMOD bit */ |
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|
691 #define RWMOD_BITNUMBER 0x0AU |
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692 #define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (RWMOD_BITNUMBER * 4U)) |
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693 |
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694 /* Alias word address of SDIOEN bit */ |
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695 #define SDIOEN_BITNUMBER 0x0BU |
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696 #define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (SDIOEN_BITNUMBER * 4U)) |
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697 /** |
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698 * @} |
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699 */ |
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700 |
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701 /** @defgroup SDIO_LL_Register Bits And Addresses Definitions |
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702 * @brief SDIO_LL registers bit address in the alias region |
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703 * @{ |
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704 */ |
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705 /* ---------------------- SDIO registers bit mask --------------------------- */ |
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706 /* --- CLKCR Register ---*/ |
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707 /* CLKCR register clear mask */ |
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708 #define CLKCR_CLEAR_MASK ((uint32_t)(SDIO_CLKCR_CLKDIV | SDIO_CLKCR_PWRSAV |\ |
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709 SDIO_CLKCR_BYPASS | SDIO_CLKCR_WIDBUS |\ |
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710 SDIO_CLKCR_NEGEDGE | SDIO_CLKCR_HWFC_EN)) |
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711 |
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712 /* --- DCTRL Register ---*/ |
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713 /* SDIO DCTRL Clear Mask */ |
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714 #define DCTRL_CLEAR_MASK ((uint32_t)(SDIO_DCTRL_DTEN | SDIO_DCTRL_DTDIR |\ |
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715 SDIO_DCTRL_DTMODE | SDIO_DCTRL_DBLOCKSIZE)) |
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716 |
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717 /* --- CMD Register ---*/ |
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718 /* CMD Register clear mask */ |
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719 #define CMD_CLEAR_MASK ((uint32_t)(SDIO_CMD_CMDINDEX | SDIO_CMD_WAITRESP |\ |
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720 SDIO_CMD_WAITINT | SDIO_CMD_WAITPEND |\ |
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721 SDIO_CMD_CPSMEN | SDIO_CMD_SDIOSUSPEND)) |
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722 |
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723 /* SDIO Initialization Frequency (400KHz max) */ |
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724 #define SDIO_INIT_CLK_DIV ((uint8_t)0x76) |
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725 |
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726 /* SDIO Data Transfer Frequency (25MHz max) */ |
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727 #define SDIO_TRANSFER_CLK_DIV ((uint8_t)0x0) |
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728 |
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729 /** |
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730 * @} |
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731 */ |
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732 |
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733 /** @defgroup SDIO_LL_Interrupt_Clock Interrupt And Clock Configuration |
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734 * @brief macros to handle interrupts and specific clock configurations |
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735 * @{ |
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736 */ |
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737 |
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|
738 /** |
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|
739 * @brief Enable the SDIO device. |
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Added current STM32 standandard libraries in version independend folder structure
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|
740 * @param __INSTANCE__ SDIO Instance |
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|
741 * @retval None |
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|
742 */ |
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|
743 #define __SDIO_ENABLE(__INSTANCE__) (*(__IO uint32_t *)CLKCR_CLKEN_BB = ENABLE) |
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Added current STM32 standandard libraries in version independend folder structure
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744 |
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|
745 /** |
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|
746 * @brief Disable the SDIO device. |
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Added current STM32 standandard libraries in version independend folder structure
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|
747 * @param __INSTANCE__ SDIO Instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
748 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
749 */ |
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|
750 #define __SDIO_DISABLE(__INSTANCE__) (*(__IO uint32_t *)CLKCR_CLKEN_BB = DISABLE) |
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Added current STM32 standandard libraries in version independend folder structure
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|
751 |
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Added current STM32 standandard libraries in version independend folder structure
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|
752 /** |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
753 * @brief Enable the SDIO DMA transfer. |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
754 * @param __INSTANCE__ SDIO Instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
755 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
756 */ |
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|
757 #define __SDIO_DMA_ENABLE(__INSTANCE__) (*(__IO uint32_t *)DCTRL_DMAEN_BB = ENABLE) |
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Added current STM32 standandard libraries in version independend folder structure
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|
758 /** |
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|
759 * @brief Disable the SDIO DMA transfer. |
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|
760 * @param __INSTANCE__ SDIO Instance |
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|
761 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
762 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
763 #define __SDIO_DMA_DISABLE(__INSTANCE__) (*(__IO uint32_t *)DCTRL_DMAEN_BB = DISABLE) |
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Added current STM32 standandard libraries in version independend folder structure
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|
764 |
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|
765 /** |
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|
766 * @brief Enable the SDIO device interrupt. |
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Added current STM32 standandard libraries in version independend folder structure
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|
767 * @param __INSTANCE__ Pointer to SDIO register base |
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Added current STM32 standandard libraries in version independend folder structure
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|
768 * @param __INTERRUPT__ specifies the SDIO interrupt sources to be enabled. |
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Added current STM32 standandard libraries in version independend folder structure
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|
769 * This parameter can be one or a combination of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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|
770 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
771 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
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|
772 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
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|
773 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
774 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
775 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
776 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
777 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
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|
778 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
779 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
780 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
781 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
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|
782 * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
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|
783 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
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|
784 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
785 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
786 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
787 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
788 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
789 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
790 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
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|
791 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
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|
792 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
793 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
794 #define __SDIO_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK |= (__INTERRUPT__)) |
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Added current STM32 standandard libraries in version independend folder structure
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|
795 |
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|
796 /** |
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|
797 * @brief Disable the SDIO device interrupt. |
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Added current STM32 standandard libraries in version independend folder structure
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|
798 * @param __INSTANCE__ Pointer to SDIO register base |
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Added current STM32 standandard libraries in version independend folder structure
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|
799 * @param __INTERRUPT__ specifies the SDIO interrupt sources to be disabled. |
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Added current STM32 standandard libraries in version independend folder structure
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|
800 * This parameter can be one or a combination of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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|
801 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
802 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
803 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
804 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
805 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
806 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
807 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
808 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
809 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
810 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
811 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
812 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
813 * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
814 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
815 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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816 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
817 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
818 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
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|
819 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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820 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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821 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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822 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
823 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
824 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
825 #define __SDIO_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK &= ~(__INTERRUPT__)) |
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Added current STM32 standandard libraries in version independend folder structure
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|
826 |
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Added current STM32 standandard libraries in version independend folder structure
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|
827 /** |
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|
828 * @brief Checks whether the specified SDIO flag is set or not. |
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Added current STM32 standandard libraries in version independend folder structure
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829 * @param __INSTANCE__ Pointer to SDIO register base |
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Added current STM32 standandard libraries in version independend folder structure
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830 * @param __FLAG__ specifies the flag to check. |
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Added current STM32 standandard libraries in version independend folder structure
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831 * This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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832 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
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Added current STM32 standandard libraries in version independend folder structure
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833 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
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Added current STM32 standandard libraries in version independend folder structure
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834 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
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Added current STM32 standandard libraries in version independend folder structure
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835 * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
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Added current STM32 standandard libraries in version independend folder structure
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836 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
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Added current STM32 standandard libraries in version independend folder structure
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837 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
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Added current STM32 standandard libraries in version independend folder structure
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838 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
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839 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
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Added current STM32 standandard libraries in version independend folder structure
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840 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
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Added current STM32 standandard libraries in version independend folder structure
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841 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
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Added current STM32 standandard libraries in version independend folder structure
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842 * @arg SDIO_FLAG_CMDACT: Command transfer in progress |
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Added current STM32 standandard libraries in version independend folder structure
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843 * @arg SDIO_FLAG_TXACT: Data transmit in progress |
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Added current STM32 standandard libraries in version independend folder structure
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|
844 * @arg SDIO_FLAG_RXACT: Data receive in progress |
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Added current STM32 standandard libraries in version independend folder structure
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845 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty |
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Added current STM32 standandard libraries in version independend folder structure
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846 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full |
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Added current STM32 standandard libraries in version independend folder structure
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|
847 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full |
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Added current STM32 standandard libraries in version independend folder structure
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|
848 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full |
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Added current STM32 standandard libraries in version independend folder structure
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|
849 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty |
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850 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty |
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Added current STM32 standandard libraries in version independend folder structure
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851 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO |
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Added current STM32 standandard libraries in version independend folder structure
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852 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO |
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Added current STM32 standandard libraries in version independend folder structure
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853 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
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Added current STM32 standandard libraries in version independend folder structure
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|
854 * @retval The new state of SDIO_FLAG (SET or RESET). |
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Added current STM32 standandard libraries in version independend folder structure
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|
855 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
856 #define __SDIO_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->STA &(__FLAG__)) != RESET) |
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Added current STM32 standandard libraries in version independend folder structure
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|
857 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
858 |
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Added current STM32 standandard libraries in version independend folder structure
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|
859 /** |
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parents:
diff
changeset
|
860 * @brief Clears the SDIO pending flags. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
861 * @param __INSTANCE__ Pointer to SDIO register base |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
862 * @param __FLAG__ specifies the flag to clear. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
863 * This parameter can be one or a combination of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
864 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
865 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
866 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
867 * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
868 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
869 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
870 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
871 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
872 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
873 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
874 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
875 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
876 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
877 #define __SDIO_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->ICR = (__FLAG__)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
878 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
879 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
880 * @brief Checks whether the specified SDIO interrupt has occurred or not. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
881 * @param __INSTANCE__ Pointer to SDIO register base |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
882 * @param __INTERRUPT__ specifies the SDIO interrupt source to check. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
883 * This parameter can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
884 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
885 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
886 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
887 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
888 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
889 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
890 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
891 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
892 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
893 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
894 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
895 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
896 * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
897 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
898 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
899 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
900 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
901 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
902 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
903 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
904 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
905 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
906 * @retval The new state of SDIO_IT (SET or RESET). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
907 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
908 #define __SDIO_GET_IT (__INSTANCE__, __INTERRUPT__) (((__INSTANCE__)->STA &(__INTERRUPT__)) == (__INTERRUPT__)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
909 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
910 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
911 * @brief Clears the SDIO's interrupt pending bits. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
912 * @param __INSTANCE__ Pointer to SDIO register base |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
913 * @param __INTERRUPT__ specifies the interrupt pending bit to clear. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
914 * This parameter can be one or a combination of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
915 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
916 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
917 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
918 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
919 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
920 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
921 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
922 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
923 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
924 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
925 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
926 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
927 #define __SDIO_CLEAR_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->ICR = (__INTERRUPT__)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
928 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
929 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
930 * @brief Enable Start the SD I/O Read Wait operation. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
931 * @param __INSTANCE__ Pointer to SDIO register base |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
932 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
933 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
934 #define __SDIO_START_READWAIT_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTART_BB = ENABLE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
935 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
936 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
937 * @brief Disable Start the SD I/O Read Wait operations. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
938 * @param __INSTANCE__ Pointer to SDIO register base |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
939 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
940 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
941 #define __SDIO_START_READWAIT_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTART_BB = DISABLE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
942 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
943 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
944 * @brief Enable Start the SD I/O Read Wait operation. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
945 * @param __INSTANCE__ Pointer to SDIO register base |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
946 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
947 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
948 #define __SDIO_STOP_READWAIT_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTOP_BB = ENABLE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
949 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
950 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
951 * @brief Disable Stop the SD I/O Read Wait operations. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
952 * @param __INSTANCE__ Pointer to SDIO register base |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
953 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
954 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
955 #define __SDIO_STOP_READWAIT_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTOP_BB = DISABLE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
956 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
957 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
958 * @brief Enable the SD I/O Mode Operation. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
959 * @param __INSTANCE__ Pointer to SDIO register base |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
960 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
961 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
962 #define __SDIO_OPERATION_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_SDIOEN_BB = ENABLE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
963 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
964 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
965 * @brief Disable the SD I/O Mode Operation. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
966 * @param __INSTANCE__ Pointer to SDIO register base |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
967 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
968 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
969 #define __SDIO_OPERATION_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_SDIOEN_BB = DISABLE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
970 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
971 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
972 * @brief Enable the SD I/O Suspend command sending. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
973 * @param __INSTANCE__ Pointer to SDIO register base |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
974 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
975 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
976 #define __SDIO_SUSPEND_CMD_ENABLE(__INSTANCE__) (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = ENABLE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
977 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
978 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
979 * @brief Disable the SD I/O Suspend command sending. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
980 * @param __INSTANCE__ Pointer to SDIO register base |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
981 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
982 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
983 #define __SDIO_SUSPEND_CMD_DISABLE(__INSTANCE__) (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = DISABLE) |
c78bcbd5deda
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984 |
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985 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ |
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986 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
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987 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) |
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988 /** |
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989 * @brief Enable the command completion signal. |
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990 * @retval None |
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991 */ |
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992 #define __SDIO_CEATA_CMD_COMPLETION_ENABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = ENABLE) |
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993 |
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994 /** |
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995 * @brief Disable the command completion signal. |
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996 * @retval None |
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997 */ |
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998 #define __SDIO_CEATA_CMD_COMPLETION_DISABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = DISABLE) |
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999 |
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1000 /** |
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1001 * @brief Enable the CE-ATA interrupt. |
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1002 * @retval None |
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1003 */ |
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1004 #define __SDIO_CEATA_ENABLE_IT() (*(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)0U) |
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1005 |
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1006 /** |
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1007 * @brief Disable the CE-ATA interrupt. |
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1008 * @retval None |
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1009 */ |
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1010 #define __SDIO_CEATA_DISABLE_IT() (*(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)1U) |
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1011 |
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1012 /** |
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1013 * @brief Enable send CE-ATA command (CMD61). |
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1014 * @retval None |
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1015 */ |
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1016 #define __SDIO_CEATA_SENDCMD_ENABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = ENABLE) |
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1017 |
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1018 /** |
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1019 * @brief Disable send CE-ATA command (CMD61). |
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1020 * @retval None |
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1021 */ |
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1022 #define __SDIO_CEATA_SENDCMD_DISABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = DISABLE) |
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1023 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE ||\ |
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1024 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
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1025 |
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1026 /** |
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1027 * @} |
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1028 */ |
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1029 |
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1030 /** |
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1031 * @} |
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1032 */ |
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1033 |
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1034 /* Exported functions --------------------------------------------------------*/ |
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1035 /** @addtogroup SDMMC_LL_Exported_Functions |
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1036 * @{ |
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1037 */ |
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1038 |
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1039 /* Initialization/de-initialization functions **********************************/ |
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1040 /** @addtogroup HAL_SDMMC_LL_Group1 |
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1041 * @{ |
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1042 */ |
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1043 HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init); |
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1044 /** |
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1045 * @} |
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1046 */ |
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1047 |
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1048 /* I/O operation functions *****************************************************/ |
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1049 /** @addtogroup HAL_SDMMC_LL_Group2 |
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1050 * @{ |
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1051 */ |
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1052 uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx); |
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1053 HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData); |
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1054 /** |
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1055 * @} |
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1056 */ |
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1057 |
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1058 /* Peripheral Control functions ************************************************/ |
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1059 /** @addtogroup HAL_SDMMC_LL_Group3 |
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1060 * @{ |
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1061 */ |
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1062 HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx); |
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1063 HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx); |
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1064 uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx); |
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1065 |
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1066 /* Command path state machine (CPSM) management functions */ |
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1067 HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *Command); |
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1068 uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx); |
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1069 uint32_t SDIO_GetResponse(SDIO_TypeDef *SDIOx, uint32_t Response); |
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1070 |
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1071 /* Data path state machine (DPSM) management functions */ |
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1072 HAL_StatusTypeDef SDIO_ConfigData(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* Data); |
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1073 uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx); |
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1074 uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx); |
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1075 |
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1076 /* SDMMC Cards mode management functions */ |
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1077 HAL_StatusTypeDef SDIO_SetSDMMCReadWaitMode(SDIO_TypeDef *SDIOx, uint32_t SDIO_ReadWaitMode); |
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1078 |
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1079 /* SDMMC Commands management functions */ |
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1080 uint32_t SDMMC_CmdBlockLength(SDIO_TypeDef *SDIOx, uint32_t BlockSize); |
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1081 uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd); |
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1082 uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd); |
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1083 uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd); |
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1084 uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd); |
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1085 uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd); |
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1086 uint32_t SDMMC_CmdSDEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd); |
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1087 uint32_t SDMMC_CmdErase(SDIO_TypeDef *SDIOx); |
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1088 uint32_t SDMMC_CmdStopTransfer(SDIO_TypeDef *SDIOx); |
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1089 uint32_t SDMMC_CmdSelDesel(SDIO_TypeDef *SDIOx, uint64_t Addr); |
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1090 uint32_t SDMMC_CmdGoIdleState(SDIO_TypeDef *SDIOx); |
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1091 uint32_t SDMMC_CmdOperCond(SDIO_TypeDef *SDIOx); |
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1092 uint32_t SDMMC_CmdAppCommand(SDIO_TypeDef *SDIOx, uint32_t Argument); |
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1093 uint32_t SDMMC_CmdAppOperCommand(SDIO_TypeDef *SDIOx, uint32_t SdType); |
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1094 uint32_t SDMMC_CmdBusWidth(SDIO_TypeDef *SDIOx, uint32_t BusWidth); |
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1095 uint32_t SDMMC_CmdSendSCR(SDIO_TypeDef *SDIOx); |
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1096 uint32_t SDMMC_CmdSendCID(SDIO_TypeDef *SDIOx); |
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1097 uint32_t SDMMC_CmdSendCSD(SDIO_TypeDef *SDIOx, uint32_t Argument); |
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1098 uint32_t SDMMC_CmdSetRelAdd(SDIO_TypeDef *SDIOx, uint16_t *pRCA); |
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1099 uint32_t SDMMC_CmdSendStatus(SDIO_TypeDef *SDIOx, uint32_t Argument); |
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1100 uint32_t SDMMC_CmdStatusRegister(SDIO_TypeDef *SDIOx); |
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1101 |
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1102 uint32_t SDMMC_CmdOpCondition(SDIO_TypeDef *SDIOx, uint32_t Argument); |
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1103 uint32_t SDMMC_CmdSwitch(SDIO_TypeDef *SDIOx, uint32_t Argument); |
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1104 uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd); |
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1105 uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd); |
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1106 |
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1107 /** |
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1108 * @} |
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1109 */ |
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1110 |
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1111 /** |
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1112 * @} |
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1113 */ |
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1114 |
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1115 /** |
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1116 * @} |
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1117 */ |
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1118 |
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1119 /** |
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1120 * @} |
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1121 */ |
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1122 |
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1123 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || |
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1124 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || |
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1125 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ |
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1126 |
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1127 #ifdef __cplusplus |
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1128 } |
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1129 #endif |
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1130 |
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1131 #endif /* __STM32F4xx_LL_SDMMC_H */ |
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1132 |
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1133 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |