annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_can.h @ 929:63c340abd70e Evo_2_23

Add a line to the compass heading dive menu that shows the currently set heading to enable the diver to confirm it / add it to notes. Also add a log entry every time a new compass heading is set or the heading is cleared. And add a way to add compass headings to the log without changing the currently set heading - this was added after discussion with cave divers who are interested in recording headings when mapping out caves. From mikeller
author heinrichsweikamp
date Mon, 02 Dec 2024 11:16:10 +0100
parents c78bcbd5deda
children
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_can.h
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4 * @author MCD Application Team
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5 * @brief Header file of CAN HAL module.
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6 ******************************************************************************
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7 * @attention
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8 *
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9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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10 *
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11 * Redistribution and use in source and binary forms, with or without modification,
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12 * are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright notice,
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16 * this list of conditions and the following disclaimer in the documentation
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17 * and/or other materials provided with the distribution.
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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19 * may be used to endorse or promote products derived from this software
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20 * without specific prior written permission.
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21 *
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 *
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33 ******************************************************************************
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34 */
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35
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36 /* Define to prevent recursive inclusion -------------------------------------*/
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37 #ifndef STM32F4xx_HAL_CAN_H
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38 #define STM32F4xx_HAL_CAN_H
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39
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40 #ifdef __cplusplus
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41 extern "C" {
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42 #endif
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43
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44 /* Includes ------------------------------------------------------------------*/
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45 #include "stm32f4xx_hal_def.h"
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46
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47 /** @addtogroup STM32F4xx_HAL_Driver
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48 * @{
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49 */
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50
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51 #if defined (CAN1)
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52 /** @addtogroup CAN
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53 * @{
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54 */
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55
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56 /* Exported types ------------------------------------------------------------*/
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57 /** @defgroup CAN_Exported_Types CAN Exported Types
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58 * @{
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59 */
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60 /**
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61 * @brief HAL State structures definition
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62 */
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63 typedef enum
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64 {
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65 HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */
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66 HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */
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67 HAL_CAN_STATE_LISTENING = 0x02U, /*!< CAN receive process is ongoing */
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68 HAL_CAN_STATE_SLEEP_PENDING = 0x03U, /*!< CAN sleep request is pending */
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69 HAL_CAN_STATE_SLEEP_ACTIVE = 0x04U, /*!< CAN sleep mode is active */
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70 HAL_CAN_STATE_ERROR = 0x05U /*!< CAN error state */
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71
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72 } HAL_CAN_StateTypeDef;
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73
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74 /**
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75 * @brief CAN init structure definition
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76 */
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77 typedef struct
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78 {
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79 uint32_t Prescaler; /*!< Specifies the length of a time quantum.
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80 This parameter must be a number between Min_Data = 1 and Max_Data = 1024. */
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81
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82 uint32_t Mode; /*!< Specifies the CAN operating mode.
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83 This parameter can be a value of @ref CAN_operating_mode */
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84
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85 uint32_t SyncJumpWidth; /*!< Specifies the maximum number of time quanta the CAN hardware
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86 is allowed to lengthen or shorten a bit to perform resynchronization.
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87 This parameter can be a value of @ref CAN_synchronisation_jump_width */
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88
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89 uint32_t TimeSeg1; /*!< Specifies the number of time quanta in Bit Segment 1.
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90 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
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91
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92 uint32_t TimeSeg2; /*!< Specifies the number of time quanta in Bit Segment 2.
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93 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
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94
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95 FunctionalState TimeTriggeredMode; /*!< Enable or disable the time triggered communication mode.
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96 This parameter can be set to ENABLE or DISABLE. */
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97
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98 FunctionalState AutoBusOff; /*!< Enable or disable the automatic bus-off management.
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99 This parameter can be set to ENABLE or DISABLE. */
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100
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101 FunctionalState AutoWakeUp; /*!< Enable or disable the automatic wake-up mode.
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102 This parameter can be set to ENABLE or DISABLE. */
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103
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104 FunctionalState AutoRetransmission; /*!< Enable or disable the non-automatic retransmission mode.
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105 This parameter can be set to ENABLE or DISABLE. */
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106
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107 FunctionalState ReceiveFifoLocked; /*!< Enable or disable the Receive FIFO Locked mode.
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108 This parameter can be set to ENABLE or DISABLE. */
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109
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110 FunctionalState TransmitFifoPriority;/*!< Enable or disable the transmit FIFO priority.
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111 This parameter can be set to ENABLE or DISABLE. */
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112
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113 } CAN_InitTypeDef;
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114
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115 /**
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116 * @brief CAN filter configuration structure definition
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117 */
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118 typedef struct
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119 {
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120 uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
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121 configuration, first one for a 16-bit configuration).
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122 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
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123
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124 uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
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125 configuration, second one for a 16-bit configuration).
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126 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
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127
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128 uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
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129 according to the mode (MSBs for a 32-bit configuration,
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130 first one for a 16-bit configuration).
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131 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
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132
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133 uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
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134 according to the mode (LSBs for a 32-bit configuration,
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135 second one for a 16-bit configuration).
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136 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
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137
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138 uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1U) which will be assigned to the filter.
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139 This parameter can be a value of @ref CAN_filter_FIFO */
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140
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141 uint32_t FilterBank; /*!< Specifies the filter bank which will be initialized.
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142 For single CAN instance(14 dedicated filter banks),
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143 this parameter must be a number between Min_Data = 0 and Max_Data = 13.
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144 For dual CAN instances(28 filter banks shared),
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145 this parameter must be a number between Min_Data = 0 and Max_Data = 27. */
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146
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147 uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
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148 This parameter can be a value of @ref CAN_filter_mode */
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149
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150 uint32_t FilterScale; /*!< Specifies the filter scale.
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151 This parameter can be a value of @ref CAN_filter_scale */
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152
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153 uint32_t FilterActivation; /*!< Enable or disable the filter.
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154 This parameter can be set to ENABLE or DISABLE. */
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155
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156 uint32_t SlaveStartFilterBank; /*!< Select the start filter bank for the slave CAN instance.
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157 For single CAN instances, this parameter is meaningless.
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158 For dual CAN instances, all filter banks with lower index are assigned to master
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159 CAN instance, whereas all filter banks with greater index are assigned to slave
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160 CAN instance.
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161 This parameter must be a number between Min_Data = 0 and Max_Data = 27. */
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162
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163 } CAN_FilterTypeDef;
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164
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165 /**
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166 * @brief CAN Tx message header structure definition
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167 */
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168 typedef struct
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169 {
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170 uint32_t StdId; /*!< Specifies the standard identifier.
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171 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
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172
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173 uint32_t ExtId; /*!< Specifies the extended identifier.
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174 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
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175
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176 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
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177 This parameter can be a value of @ref CAN_identifier_type */
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178
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179 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
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180 This parameter can be a value of @ref CAN_remote_transmission_request */
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181
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182 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
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183 This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
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184
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185 FunctionalState TransmitGlobalTime; /*!< Specifies whether the timestamp counter value captured on start
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186 of frame transmission, is sent in DATA6 and DATA7 replacing pData[6] and pData[7].
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187 @note: Time Triggered Communication Mode must be enabled.
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188 @note: DLC must be programmed as 8 bytes, in order these 2 bytes are sent.
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189 This parameter can be set to ENABLE or DISABLE. */
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190
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191 } CAN_TxHeaderTypeDef;
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192
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193 /**
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194 * @brief CAN Rx message header structure definition
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195 */
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196 typedef struct
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197 {
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198 uint32_t StdId; /*!< Specifies the standard identifier.
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199 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
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200
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201 uint32_t ExtId; /*!< Specifies the extended identifier.
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202 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
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203
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204 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
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205 This parameter can be a value of @ref CAN_identifier_type */
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206
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207 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
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208 This parameter can be a value of @ref CAN_remote_transmission_request */
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209
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210 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
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211 This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
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212
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213 uint32_t Timestamp; /*!< Specifies the timestamp counter value captured on start of frame reception.
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214 @note: Time Triggered Communication Mode must be enabled.
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215 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFFFF. */
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216
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217 uint32_t FilterMatchIndex; /*!< Specifies the index of matching acceptance filter element.
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218 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
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219
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220 } CAN_RxHeaderTypeDef;
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221
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222 /**
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223 * @brief CAN handle Structure definition
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224 */
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225 typedef struct __CAN_HandleTypeDef
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226 {
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227 CAN_TypeDef *Instance; /*!< Register base address */
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228
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229 CAN_InitTypeDef Init; /*!< CAN required parameters */
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230
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231 __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */
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232
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233 __IO uint32_t ErrorCode; /*!< CAN Error code.
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234 This parameter can be a value of @ref CAN_Error_Code */
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235
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236 } CAN_HandleTypeDef;
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237
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238 /**
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239 * @}
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240 */
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241
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242 /* Exported constants --------------------------------------------------------*/
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243
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244 /** @defgroup CAN_Exported_Constants CAN Exported Constants
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245 * @{
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246 */
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247
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248 /** @defgroup CAN_Error_Code CAN Error Code
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249 * @{
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250 */
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251 #define HAL_CAN_ERROR_NONE (0x00000000U) /*!< No error */
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252 #define HAL_CAN_ERROR_EWG (0x00000001U) /*!< Protocol Error Warning */
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253 #define HAL_CAN_ERROR_EPV (0x00000002U) /*!< Error Passive */
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254 #define HAL_CAN_ERROR_BOF (0x00000004U) /*!< Bus-off error */
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255 #define HAL_CAN_ERROR_STF (0x00000008U) /*!< Stuff error */
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256 #define HAL_CAN_ERROR_FOR (0x00000010U) /*!< Form error */
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257 #define HAL_CAN_ERROR_ACK (0x00000020U) /*!< Acknowledgment error */
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258 #define HAL_CAN_ERROR_BR (0x00000040U) /*!< Bit recessive error */
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259 #define HAL_CAN_ERROR_BD (0x00000080U) /*!< Bit dominant error */
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260 #define HAL_CAN_ERROR_CRC (0x00000100U) /*!< CRC error */
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261 #define HAL_CAN_ERROR_RX_FOV0 (0x00000200U) /*!< Rx FIFO0 overrun error */
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262 #define HAL_CAN_ERROR_RX_FOV1 (0x00000400U) /*!< Rx FIFO1 overrun error */
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263 #define HAL_CAN_ERROR_TX_ALST0 (0x00000800U) /*!< TxMailbox 0 transmit failure due to arbitration lost */
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264 #define HAL_CAN_ERROR_TX_TERR0 (0x00001000U) /*!< TxMailbox 1 transmit failure due to tranmit error */
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265 #define HAL_CAN_ERROR_TX_ALST1 (0x00002000U) /*!< TxMailbox 0 transmit failure due to arbitration lost */
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266 #define HAL_CAN_ERROR_TX_TERR1 (0x00004000U) /*!< TxMailbox 1 transmit failure due to tranmit error */
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267 #define HAL_CAN_ERROR_TX_ALST2 (0x00008000U) /*!< TxMailbox 0 transmit failure due to arbitration lost */
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268 #define HAL_CAN_ERROR_TX_TERR2 (0x00010000U) /*!< TxMailbox 1 transmit failure due to tranmit error */
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269 #define HAL_CAN_ERROR_TIMEOUT (0x00020000U) /*!< Timeout error */
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270 #define HAL_CAN_ERROR_NOT_INITIALIZED (0x00040000U) /*!< Peripheral not initialized */
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271 #define HAL_CAN_ERROR_NOT_READY (0x00080000U) /*!< Peripheral not ready */
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272 #define HAL_CAN_ERROR_NOT_STARTED (0x00100000U) /*!< Peripheral not started */
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273 #define HAL_CAN_ERROR_PARAM (0x00200000U) /*!< Parameter error */
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274
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275 /**
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276 * @}
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277 */
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278
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279 /** @defgroup CAN_InitStatus CAN InitStatus
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280 * @{
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281 */
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282 #define CAN_INITSTATUS_FAILED (0x00000000U) /*!< CAN initialization failed */
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283 #define CAN_INITSTATUS_SUCCESS (0x00000001U) /*!< CAN initialization OK */
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284 /**
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285 * @}
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286 */
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287
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288 /** @defgroup CAN_operating_mode CAN Operating Mode
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289 * @{
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290 */
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291 #define CAN_MODE_NORMAL (0x00000000U) /*!< Normal mode */
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292 #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
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293 #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
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294 #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
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295 /**
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296 * @}
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297 */
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298
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299
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300 /** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width
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301 * @{
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302 */
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303 #define CAN_SJW_1TQ (0x00000000U) /*!< 1 time quantum */
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304 #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */
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305 #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */
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306 #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */
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307 /**
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308 * @}
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309 */
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310
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311 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1
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312 * @{
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313 */
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314 #define CAN_BS1_1TQ (0x00000000U) /*!< 1 time quantum */
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315 #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */
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316 #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */
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317 #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */
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318 #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */
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319 #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */
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320 #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */
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321 #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */
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322 #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */
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323 #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */
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324 #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */
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325 #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */
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326 #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */
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327 #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */
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328 #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */
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329 #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
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330 /**
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331 * @}
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332 */
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333
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334 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2
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335 * @{
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336 */
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337 #define CAN_BS2_1TQ (0x00000000U) /*!< 1 time quantum */
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338 #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */
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339 #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */
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340 #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */
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341 #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */
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342 #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */
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343 #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */
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344 #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */
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345 /**
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346 * @}
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347 */
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348
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349 /** @defgroup CAN_filter_mode CAN Filter Mode
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350 * @{
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351 */
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352 #define CAN_FILTERMODE_IDMASK (0x00000000U) /*!< Identifier mask mode */
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353 #define CAN_FILTERMODE_IDLIST (0x00000001U) /*!< Identifier list mode */
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354 /**
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355 * @}
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356 */
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357
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358 /** @defgroup CAN_filter_scale CAN Filter Scale
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359 * @{
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360 */
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361 #define CAN_FILTERSCALE_16BIT (0x00000000U) /*!< Two 16-bit filters */
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362 #define CAN_FILTERSCALE_32BIT (0x00000001U) /*!< One 32-bit filter */
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363 /**
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364 * @}
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365 */
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366
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367 /** @defgroup CAN_filter_FIFO CAN Filter FIFO
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368 * @{
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369 */
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370 #define CAN_FILTER_FIFO0 (0x00000000U) /*!< Filter FIFO 0 assignment for filter x */
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371 #define CAN_FILTER_FIFO1 (0x00000001U) /*!< Filter FIFO 1 assignment for filter x */
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372 /**
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373 * @}
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374 */
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375
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376 /** @defgroup CAN_identifier_type CAN Identifier Type
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377 * @{
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378 */
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379 #define CAN_ID_STD (0x00000000U) /*!< Standard Id */
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380 #define CAN_ID_EXT (0x00000004U) /*!< Extended Id */
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381 /**
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382 * @}
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383 */
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384
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385 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
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386 * @{
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387 */
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388 #define CAN_RTR_DATA (0x00000000U) /*!< Data frame */
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389 #define CAN_RTR_REMOTE (0x00000002U) /*!< Remote frame */
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390 /**
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391 * @}
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392 */
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393
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394 /** @defgroup CAN_receive_FIFO_number CAN Receive FIFO Number
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395 * @{
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396 */
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397 #define CAN_RX_FIFO0 (0x00000000U) /*!< CAN receive FIFO 0 */
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398 #define CAN_RX_FIFO1 (0x00000001U) /*!< CAN receive FIFO 1 */
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399 /**
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400 * @}
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401 */
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402
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403 /** @defgroup CAN_Tx_Mailboxes CAN Tx Mailboxes
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404 * @{
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405 */
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406 #define CAN_TX_MAILBOX0 (0x00000001U) /*!< Tx Mailbox 0 */
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407 #define CAN_TX_MAILBOX1 (0x00000002U) /*!< Tx Mailbox 1 */
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408 #define CAN_TX_MAILBOX2 (0x00000004U) /*!< Tx Mailbox 2 */
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409 /**
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410 * @}
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411 */
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412
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413 /** @defgroup CAN_flags CAN Flags
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414 * @{
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415 */
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416 /* Transmit Flags */
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417 #define CAN_FLAG_RQCP0 (0x00000500U) /*!< Request complete MailBox 0 flag */
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418 #define CAN_FLAG_TXOK0 (0x00000501U) /*!< Transmission OK MailBox 0 flag */
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419 #define CAN_FLAG_ALST0 (0x00000502U) /*!< Arbitration Lost MailBox 0 flag */
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420 #define CAN_FLAG_TERR0 (0x00000503U) /*!< Transmission error MailBox 0 flag */
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421 #define CAN_FLAG_RQCP1 (0x00000508U) /*!< Request complete MailBox1 flag */
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422 #define CAN_FLAG_TXOK1 (0x00000509U) /*!< Transmission OK MailBox 1 flag */
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423 #define CAN_FLAG_ALST1 (0x0000050AU) /*!< Arbitration Lost MailBox 1 flag */
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424 #define CAN_FLAG_TERR1 (0x0000050BU) /*!< Transmission error MailBox 1 flag */
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425 #define CAN_FLAG_RQCP2 (0x00000510U) /*!< Request complete MailBox2 flag */
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426 #define CAN_FLAG_TXOK2 (0x00000511U) /*!< Transmission OK MailBox 2 flag */
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427 #define CAN_FLAG_ALST2 (0x00000512U) /*!< Arbitration Lost MailBox 2 flag */
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428 #define CAN_FLAG_TERR2 (0x00000513U) /*!< Transmission error MailBox 2 flag */
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429 #define CAN_FLAG_TME0 (0x0000051AU) /*!< Transmit mailbox 0 empty flag */
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430 #define CAN_FLAG_TME1 (0x0000051BU) /*!< Transmit mailbox 1 empty flag */
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431 #define CAN_FLAG_TME2 (0x0000051CU) /*!< Transmit mailbox 2 empty flag */
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432 #define CAN_FLAG_LOW0 (0x0000051DU) /*!< Lowest priority mailbox 0 flag */
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433 #define CAN_FLAG_LOW1 (0x0000051EU) /*!< Lowest priority mailbox 1 flag */
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434 #define CAN_FLAG_LOW2 (0x0000051FU) /*!< Lowest priority mailbox 2 flag */
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435
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436 /* Receive Flags */
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437 #define CAN_FLAG_FF0 (0x00000203U) /*!< RX FIFO 0 Full flag */
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438 #define CAN_FLAG_FOV0 (0x00000204U) /*!< RX FIFO 0 Overrun flag */
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439 #define CAN_FLAG_FF1 (0x00000403U) /*!< RX FIFO 1 Full flag */
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440 #define CAN_FLAG_FOV1 (0x00000404U) /*!< RX FIFO 1 Overrun flag */
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441
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442 /* Operating Mode Flags */
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443 #define CAN_FLAG_INAK (0x00000100U) /*!< Initialization acknowledge flag */
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444 #define CAN_FLAG_SLAK (0x00000101U) /*!< Sleep acknowledge flag */
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445 #define CAN_FLAG_ERRI (0x00000102U) /*!< Error flag */
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446 #define CAN_FLAG_WKU (0x00000103U) /*!< Wake up interrupt flag */
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447 #define CAN_FLAG_SLAKI (0x00000104U) /*!< Sleep acknowledge interrupt flag */
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448
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449 /* Error Flags */
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450 #define CAN_FLAG_EWG (0x00000300U) /*!< Error warning flag */
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451 #define CAN_FLAG_EPV (0x00000301U) /*!< Error passive flag */
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452 #define CAN_FLAG_BOF (0x00000302U) /*!< Bus-Off flag */
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453 /**
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454 * @}
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455 */
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456
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457
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458 /** @defgroup CAN_Interrupts CAN Interrupts
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459 * @{
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460 */
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461 /* Transmit Interrupt */
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462 #define CAN_IT_TX_MAILBOX_EMPTY ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */
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463
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464 /* Receive Interrupts */
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465 #define CAN_IT_RX_FIFO0_MSG_PENDING ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */
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466 #define CAN_IT_RX_FIFO0_FULL ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */
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467 #define CAN_IT_RX_FIFO0_OVERRUN ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */
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468 #define CAN_IT_RX_FIFO1_MSG_PENDING ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */
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469 #define CAN_IT_RX_FIFO1_FULL ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */
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470 #define CAN_IT_RX_FIFO1_OVERRUN ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */
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471
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472 /* Operating Mode Interrupts */
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473 #define CAN_IT_WAKEUP ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */
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474 #define CAN_IT_SLEEP_ACK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */
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475
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476 /* Error Interrupts */
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477 #define CAN_IT_ERROR_WARNING ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */
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478 #define CAN_IT_ERROR_PASSIVE ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */
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479 #define CAN_IT_BUSOFF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */
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480 #define CAN_IT_LAST_ERROR_CODE ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
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481 #define CAN_IT_ERROR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */
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482 /**
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483 * @}
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484 */
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485
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486 /**
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487 * @}
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488 */
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489
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490 /* Exported macros -----------------------------------------------------------*/
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491 /** @defgroup CAN_Exported_Macros CAN Exported Macros
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492 * @{
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493 */
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494
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495 /** @brief Reset CAN handle state
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496 * @param __HANDLE__ CAN handle.
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497 * @retval None
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498 */
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499 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
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500
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501 /**
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502 * @brief Enable the specified CAN interrupts.
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503 * @param __HANDLE__ CAN handle.
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504 * @param __INTERRUPT__ CAN Interrupt sources to enable.
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505 * This parameter can be any combination of @arg CAN_Interrupts
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506 * @retval None
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507 */
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508 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
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509
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510 /**
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511 * @brief Disable the specified CAN interrupts.
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512 * @param __HANDLE__ CAN handle.
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513 * @param __INTERRUPT__ CAN Interrupt sources to disable.
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514 * This parameter can be any combination of @arg CAN_Interrupts
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515 * @retval None
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516 */
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517 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
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518
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519 /** @brief Check if the specified CAN interrupt source is enabled or disabled.
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520 * @param __HANDLE__ specifies the CAN Handle.
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521 * @param __INTERRUPT__ specifies the CAN interrupt source to check.
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522 * This parameter can be a value of @arg CAN_Interrupts
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523 * @retval The state of __IT__ (TRUE or FALSE).
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524 */
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525 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) & (__INTERRUPT__))
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526
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527 /** @brief Check whether the specified CAN flag is set or not.
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528 * @param __HANDLE__ specifies the CAN Handle.
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529 * @param __FLAG__ specifies the flag to check.
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530 * This parameter can be one of @arg CAN_flags
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531 * @retval The state of __FLAG__ (TRUE or FALSE).
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532 */
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533 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
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534 ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
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535 (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
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536 (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
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537 (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
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538 (((__FLAG__) >> 8U) == 3U)? ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U)
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539
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540 /** @brief Clear the specified CAN pending flag.
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541 * @param __HANDLE__ specifies the CAN Handle.
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542 * @param __FLAG__ specifies the flag to check.
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543 * This parameter can be one of the following values:
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544 * @arg CAN_FLAG_RQCP0: Request complete MailBox 0 Flag
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545 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox 0 Flag
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546 * @arg CAN_FLAG_ALST0: Arbitration Lost MailBox 0 Flag
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547 * @arg CAN_FLAG_TERR0: Transmission error MailBox 0 Flag
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548 * @arg CAN_FLAG_RQCP1: Request complete MailBox 1 Flag
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549 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox 1 Flag
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550 * @arg CAN_FLAG_ALST1: Arbitration Lost MailBox 1 Flag
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551 * @arg CAN_FLAG_TERR1: Transmission error MailBox 1 Flag
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552 * @arg CAN_FLAG_RQCP2: Request complete MailBox 2 Flag
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553 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox 2 Flag
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554 * @arg CAN_FLAG_ALST2: Arbitration Lost MailBox 2 Flag
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555 * @arg CAN_FLAG_TERR2: Transmission error MailBox 2 Flag
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556 * @arg CAN_FLAG_FF0: RX FIFO 0 Full Flag
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557 * @arg CAN_FLAG_FOV0: RX FIFO 0 Overrun Flag
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558 * @arg CAN_FLAG_FF1: RX FIFO 1 Full Flag
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559 * @arg CAN_FLAG_FOV1: RX FIFO 1 Overrun Flag
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560 * @arg CAN_FLAG_WKUI: Wake up Interrupt Flag
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561 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Interrupt Flag
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562 * @retval None
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563 */
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564 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
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565 ((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
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566 (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
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567 (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
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568 (((__FLAG__) >> 8U) == 1U)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U)
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569
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570 /**
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571 * @}
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572 */
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573
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574 /* Exported functions --------------------------------------------------------*/
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575 /** @addtogroup CAN_Exported_Functions CAN Exported Functions
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576 * @{
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577 */
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578
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579 /** @addtogroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
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580 * @brief Initialization and Configuration functions
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581 * @{
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582 */
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583
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584 /* Initialization and de-initialization functions *****************************/
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585 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan);
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586 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan);
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587 void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan);
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588 void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan);
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589
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590 /**
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591 * @}
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592 */
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593
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594 /** @addtogroup CAN_Exported_Functions_Group2 Configuration functions
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595 * @brief Configuration functions
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596 * @{
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597 */
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598
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599 /* Configuration functions ****************************************************/
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600 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, CAN_FilterTypeDef *sFilterConfig);
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601
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602 /**
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603 * @}
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604 */
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605
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606 /** @addtogroup CAN_Exported_Functions_Group3 Control functions
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607 * @brief Control functions
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608 * @{
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609 */
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610
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611 /* Control functions **********************************************************/
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612 HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan);
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613 HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan);
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614 HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan);
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615 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
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616 uint32_t HAL_CAN_IsSleepActive(CAN_HandleTypeDef *hcan);
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617 HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, CAN_TxHeaderTypeDef *pHeader, uint8_t aData[], uint32_t *pTxMailbox);
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618 HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes);
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619 uint32_t HAL_CAN_GetTxMailboxesFreeLevel(CAN_HandleTypeDef *hcan);
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620 uint32_t HAL_CAN_IsTxMessagePending(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes);
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621 uint32_t HAL_CAN_GetTxTimestamp(CAN_HandleTypeDef *hcan, uint32_t TxMailbox);
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622 HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]);
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623 uint32_t HAL_CAN_GetRxFifoFillLevel(CAN_HandleTypeDef *hcan, uint32_t RxFifo);
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624
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625 /**
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626 * @}
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627 */
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628
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629 /** @addtogroup CAN_Exported_Functions_Group4 Interrupts management
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630 * @brief Interrupts management
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631 * @{
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632 */
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633 /* Interrupts management ******************************************************/
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634 HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs);
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635 HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs);
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636 void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan);
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637
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638 /**
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639 * @}
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640 */
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641
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642 /** @addtogroup CAN_Exported_Functions_Group5 Callback functions
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643 * @brief Callback functions
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644 * @{
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645 */
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646 /* Callbacks functions ********************************************************/
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647
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648 void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan);
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649 void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan);
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650 void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan);
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651 void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan);
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652 void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan);
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653 void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan);
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654 void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan);
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655 void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan);
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656 void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan);
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657 void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan);
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658 void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan);
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659 void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan);
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660 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
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661
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662 /**
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663 * @}
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664 */
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665
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666 /** @addtogroup CAN_Exported_Functions_Group6 Peripheral State and Error functions
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667 * @brief CAN Peripheral State functions
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668 * @{
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669 */
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670 /* Peripheral State and Error functions ***************************************/
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671 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef *hcan);
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672 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
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673 HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan);
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674
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675 /**
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676 * @}
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677 */
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678
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679 /**
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680 * @}
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681 */
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682
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683 /* Private types -------------------------------------------------------------*/
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684 /** @defgroup CAN_Private_Types CAN Private Types
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685 * @{
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686 */
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687
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688 /**
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689 * @}
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690 */
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691
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692 /* Private variables ---------------------------------------------------------*/
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693 /** @defgroup CAN_Private_Variables CAN Private Variables
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694 * @{
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695 */
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696
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697 /**
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698 * @}
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699 */
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700
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701 /* Private constants ---------------------------------------------------------*/
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702 /** @defgroup CAN_Private_Constants CAN Private Constants
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703 * @{
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704 */
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705 #define CAN_FLAG_MASK (0x000000FFU)
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706 /**
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707 * @}
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708 */
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709
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710 /* Private Macros -----------------------------------------------------------*/
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711 /** @defgroup CAN_Private_Macros CAN Private Macros
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712 * @{
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713 */
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714
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715 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
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716 ((MODE) == CAN_MODE_LOOPBACK)|| \
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717 ((MODE) == CAN_MODE_SILENT) || \
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718 ((MODE) == CAN_MODE_SILENT_LOOPBACK))
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719 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ) || \
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720 ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
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721 #define IS_CAN_BS1(BS1) (((BS1) == CAN_BS1_1TQ) || ((BS1) == CAN_BS1_2TQ) || \
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722 ((BS1) == CAN_BS1_3TQ) || ((BS1) == CAN_BS1_4TQ) || \
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723 ((BS1) == CAN_BS1_5TQ) || ((BS1) == CAN_BS1_6TQ) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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724 ((BS1) == CAN_BS1_7TQ) || ((BS1) == CAN_BS1_8TQ) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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725 ((BS1) == CAN_BS1_9TQ) || ((BS1) == CAN_BS1_10TQ)|| \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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726 ((BS1) == CAN_BS1_11TQ)|| ((BS1) == CAN_BS1_12TQ)|| \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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727 ((BS1) == CAN_BS1_13TQ)|| ((BS1) == CAN_BS1_14TQ)|| \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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728 ((BS1) == CAN_BS1_15TQ)|| ((BS1) == CAN_BS1_16TQ))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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729 #define IS_CAN_BS2(BS2) (((BS2) == CAN_BS2_1TQ) || ((BS2) == CAN_BS2_2TQ) || \
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730 ((BS2) == CAN_BS2_3TQ) || ((BS2) == CAN_BS2_4TQ) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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731 ((BS2) == CAN_BS2_5TQ) || ((BS2) == CAN_BS2_6TQ) || \
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732 ((BS2) == CAN_BS2_7TQ) || ((BS2) == CAN_BS2_8TQ))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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733 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U))
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734 #define IS_CAN_FILTER_ID_HALFWORD(HALFWORD) ((HALFWORD) <= 0xFFFFU)
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735 #define IS_CAN_FILTER_BANK_DUAL(BANK) ((BANK) <= 27U)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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736 #define IS_CAN_FILTER_BANK_SINGLE(BANK) ((BANK) <= 13U)
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737 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
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738 ((MODE) == CAN_FILTERMODE_IDLIST))
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739 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
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740 ((SCALE) == CAN_FILTERSCALE_32BIT))
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741 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
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742 ((FIFO) == CAN_FILTER_FIFO1))
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743 #define IS_CAN_TX_MAILBOX(TRANSMITMAILBOX) (((TRANSMITMAILBOX) == CAN_TX_MAILBOX0 ) || \
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744 ((TRANSMITMAILBOX) == CAN_TX_MAILBOX1 ) || \
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745 ((TRANSMITMAILBOX) == CAN_TX_MAILBOX2 ))
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746 #define IS_CAN_TX_MAILBOX_LIST(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= (CAN_TX_MAILBOX0 | CAN_TX_MAILBOX1 | CAN_TX_MAILBOX2))
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747 #define IS_CAN_STDID(STDID) ((STDID) <= 0x7FFU)
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748 #define IS_CAN_EXTID(EXTID) ((EXTID) <= 0x1FFFFFFFU)
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749 #define IS_CAN_DLC(DLC) ((DLC) <= 8U)
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750 #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
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751 ((IDTYPE) == CAN_ID_EXT))
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752 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
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753 #define IS_CAN_RX_FIFO(FIFO) (((FIFO) == CAN_RX_FIFO0) || ((FIFO) == CAN_RX_FIFO1))
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754 #define IS_CAN_IT(IT) ((IT) <= (CAN_IT_TX_MAILBOX_EMPTY | CAN_IT_RX_FIFO0_MSG_PENDING | \
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755 CAN_IT_RX_FIFO0_FULL | CAN_IT_RX_FIFO0_OVERRUN | \
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756 CAN_IT_RX_FIFO1_MSG_PENDING | CAN_IT_RX_FIFO1_FULL | \
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757 CAN_IT_RX_FIFO1_OVERRUN | CAN_IT_WAKEUP | \
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758 CAN_IT_SLEEP_ACK | CAN_IT_ERROR_WARNING | \
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759 CAN_IT_ERROR_PASSIVE | CAN_IT_BUSOFF | \
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760 CAN_IT_LAST_ERROR_CODE | CAN_IT_ERROR))
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761
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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762 /**
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763 * @}
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764 */
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765 /* End of private macros -----------------------------------------------------*/
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766
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767 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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768 * @}
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769 */
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770
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771
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772 #endif /* CAN1 */
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773 /**
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774 * @}
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775 */
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776
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777 #ifdef __cplusplus
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778 }
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779 #endif
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780
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781 #endif /* STM32F4xx_HAL_CAN_H */
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782
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783
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784 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/