Mercurial > public > ostc4
annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac.c @ 240:625d20070261 div-fixes-5
Improvement SPI stability/recoverability
The core part of this commit comes from careful code reading. The core is the
swap of Scheduler_Request_sync_with_SPI(SPI_SYNC_METHOD_SOFT) and
SPI_Start_single_TxRx_with_Master(). This code is sitting in an if-clause
that is triggered on SPI comms failure. Instead of blindly trying to
communicate again (which will very likely fail again), first try to reset
the comms link, and then try to communicate again. That simply makes
more sense in this case.
This is heavily tested, on 2 simple dives, and 5 very long deco schedules
from the simulator (10+ hour deco's), and a lot of small simulated dives
(upto 2h runtime). Of all these tests, only one long session failed after
9 out of 11h runtime. Analyzing that one failure, suggests that the
RTE is looping in some error handler, which (obviously) results in
a SPI comms failure as a result. I consider this not part of this change.
Additionally, some more cleanup is done in this code.
Signed-off-by: Jan Mulder <jlmulder@xs4all.nl>
author | Jan Mulder <jlmulder@xs4all.nl> |
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date | Mon, 08 Apr 2019 11:49:13 +0200 |
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128
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_hal_dac.c |
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4 * @author MCD Application Team |
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5 * @brief DAC HAL module driver. |
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6 * This file provides firmware functions to manage the following |
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7 * functionalities of the Digital to Analog Converter (DAC) peripheral: |
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8 * + Initialization and de-initialization functions |
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9 * + IO operation functions |
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10 * + Peripheral Control functions |
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11 * + Peripheral State and Errors functions |
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12 * |
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13 * |
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14 @verbatim |
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15 ============================================================================== |
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16 ##### DAC Peripheral features ##### |
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17 ============================================================================== |
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18 [..] |
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19 *** DAC Channels *** |
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20 ==================== |
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21 [..] |
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22 The device integrates two 12-bit Digital Analog Converters that can |
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23 be used independently or simultaneously (dual mode): |
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24 (#) DAC channel1 with DAC_OUT1 (PA4) as output |
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25 (#) DAC channel2 with DAC_OUT2 (PA5) as output |
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26 |
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27 *** DAC Triggers *** |
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28 ==================== |
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29 [..] |
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30 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE |
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31 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. |
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32 [..] |
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33 Digital to Analog conversion can be triggered by: |
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34 (#) External event: EXTI Line 9 (any GPIOx_Pin9) using DAC_TRIGGER_EXT_IT9. |
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35 The used pin (GPIOx_Pin9) must be configured in input mode. |
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36 |
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37 (#) Timers TRGO: TIM2, TIM4, TIM5, TIM6, TIM7 and TIM8 |
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38 (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T4_TRGO...) |
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39 |
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40 (#) Software using DAC_TRIGGER_SOFTWARE |
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41 |
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42 *** DAC Buffer mode feature *** |
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43 =============================== |
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44 [..] |
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45 Each DAC channel integrates an output buffer that can be used to |
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46 reduce the output impedance, and to drive external loads directly |
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47 without having to add an external operational amplifier. |
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48 To enable, the output buffer use |
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49 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; |
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50 [..] |
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51 (@) Refer to the device datasheet for more details about output |
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52 impedance value with and without output buffer. |
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53 |
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54 *** DAC wave generation feature *** |
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55 =================================== |
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56 [..] |
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57 Both DAC channels can be used to generate |
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58 (#) Noise wave |
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59 (#) Triangle wave |
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60 |
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61 *** DAC data format *** |
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62 ======================= |
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63 [..] |
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64 The DAC data format can be: |
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65 (#) 8-bit right alignment using DAC_ALIGN_8B_R |
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66 (#) 12-bit left alignment using DAC_ALIGN_12B_L |
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67 (#) 12-bit right alignment using DAC_ALIGN_12B_R |
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68 |
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69 *** DAC data value to voltage correspondence *** |
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70 ================================================ |
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71 [..] |
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72 The analog output voltage on each DAC channel pin is determined |
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73 by the following equation: |
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74 DAC_OUTx = VREF+ * DOR / 4095 |
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75 with DOR is the Data Output Register |
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76 VEF+ is the input voltage reference (refer to the device datasheet) |
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77 e.g. To set DAC_OUT1 to 0.7V, use |
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78 Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V |
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79 |
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80 *** DMA requests *** |
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81 ===================== |
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82 [..] |
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83 A DMA1 request can be generated when an external trigger (but not |
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84 a software trigger) occurs if DMA1 requests are enabled using |
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85 HAL_DAC_Start_DMA() |
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86 [..] |
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87 DMA1 requests are mapped as following: |
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88 (#) DAC channel1 : mapped on DMA1 Stream5 channel7 which must be |
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89 already configured |
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90 (#) DAC channel2 : mapped on DMA1 Stream6 channel7 which must be |
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91 already configured |
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92 |
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93 -@- For Dual mode and specific signal (Triangle and noise) generation please |
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94 refer to Extension Features Driver description |
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95 |
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96 |
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97 ##### How to use this driver ##### |
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98 ============================================================================== |
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99 [..] |
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100 (+) DAC APB clock must be enabled to get write access to DAC |
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101 registers using HAL_DAC_Init() |
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102 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode. |
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103 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function. |
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104 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA functions |
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105 |
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106 *** Polling mode IO operation *** |
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107 ================================= |
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108 [..] |
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109 (+) Start the DAC peripheral using HAL_DAC_Start() |
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110 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function. |
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111 (+) Stop the DAC peripheral using HAL_DAC_Stop() |
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112 |
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113 *** DMA mode IO operation *** |
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114 ============================== |
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115 [..] |
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116 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length |
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117 of data to be transferred at each end of conversion |
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118 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1()or HAL_DAC_ConvCpltCallbackCh2() |
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119 function is executed and user can add his own code by customization of function pointer |
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120 HAL_DAC_ConvCpltCallbackCh1 or HAL_DAC_ConvCpltCallbackCh2 |
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121 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can |
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122 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 |
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123 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA() |
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124 |
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125 *** DAC HAL driver macros list *** |
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126 ============================================= |
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127 [..] |
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128 Below the list of most used macros in DAC HAL driver. |
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129 |
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130 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral |
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131 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral |
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132 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags |
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133 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status |
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134 |
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135 [..] |
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136 (@) You can refer to the DAC HAL driver header file for more useful macros |
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137 |
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138 @endverbatim |
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139 ****************************************************************************** |
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140 * @attention |
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141 * |
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142 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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143 * |
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144 * Redistribution and use in source and binary forms, with or without modification, |
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145 * are permitted provided that the following conditions are met: |
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146 * 1. Redistributions of source code must retain the above copyright notice, |
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147 * this list of conditions and the following disclaimer. |
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148 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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149 * this list of conditions and the following disclaimer in the documentation |
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150 * and/or other materials provided with the distribution. |
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151 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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152 * may be used to endorse or promote products derived from this software |
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153 * without specific prior written permission. |
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154 * |
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155 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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156 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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157 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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158 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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159 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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160 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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161 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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162 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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163 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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164 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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165 * |
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166 ****************************************************************************** |
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167 */ |
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168 |
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169 |
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170 /* Includes ------------------------------------------------------------------*/ |
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171 #include "stm32f4xx_hal.h" |
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172 |
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173 /** @addtogroup STM32F4xx_HAL_Driver |
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174 * @{ |
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175 */ |
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176 |
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177 /** @defgroup DAC DAC |
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178 * @brief DAC driver modules |
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179 * @{ |
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180 */ |
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181 |
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182 #ifdef HAL_DAC_MODULE_ENABLED |
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183 |
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184 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ |
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185 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
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186 defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) ||\ |
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187 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || defined(STM32F423xx) |
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188 /* Private typedef -----------------------------------------------------------*/ |
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189 /* Private define ------------------------------------------------------------*/ |
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190 /* Private macro -------------------------------------------------------------*/ |
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191 /* Private variables ---------------------------------------------------------*/ |
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192 /** @addtogroup DAC_Private_Functions |
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193 * @{ |
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194 */ |
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195 /* Private function prototypes -----------------------------------------------*/ |
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196 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma); |
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197 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma); |
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198 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); |
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199 /** |
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200 * @} |
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201 */ |
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202 |
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203 /* Exported functions --------------------------------------------------------*/ |
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204 /** @defgroup DAC_Exported_Functions DAC Exported Functions |
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205 * @{ |
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206 */ |
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207 |
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208 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions |
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209 * @brief Initialization and Configuration functions |
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210 * |
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211 @verbatim |
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212 ============================================================================== |
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213 ##### Initialization and de-initialization functions ##### |
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214 ============================================================================== |
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215 [..] This section provides functions allowing to: |
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216 (+) Initialize and configure the DAC. |
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217 (+) De-initialize the DAC. |
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218 |
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219 @endverbatim |
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220 * @{ |
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221 */ |
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222 |
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223 /** |
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224 * @brief Initializes the DAC peripheral according to the specified parameters |
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225 * in the DAC_InitStruct. |
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226 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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227 * the configuration information for the specified DAC. |
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228 * @retval HAL status |
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229 */ |
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230 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac) |
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231 { |
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232 /* Check DAC handle */ |
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233 if(hdac == NULL) |
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234 { |
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235 return HAL_ERROR; |
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236 } |
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237 /* Check the parameters */ |
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238 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
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239 |
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240 if(hdac->State == HAL_DAC_STATE_RESET) |
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241 { |
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242 /* Allocate lock resource and initialize it */ |
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243 hdac->Lock = HAL_UNLOCKED; |
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244 /* Init the low level hardware */ |
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245 HAL_DAC_MspInit(hdac); |
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246 } |
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247 |
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248 /* Initialize the DAC state*/ |
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249 hdac->State = HAL_DAC_STATE_BUSY; |
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250 |
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251 /* Set DAC error code to none */ |
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252 hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
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253 |
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254 /* Initialize the DAC state*/ |
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255 hdac->State = HAL_DAC_STATE_READY; |
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256 |
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257 /* Return function status */ |
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258 return HAL_OK; |
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259 } |
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260 |
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261 /** |
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262 * @brief Deinitializes the DAC peripheral registers to their default reset values. |
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263 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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264 * the configuration information for the specified DAC. |
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265 * @retval HAL status |
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266 */ |
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267 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac) |
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268 { |
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269 /* Check DAC handle */ |
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270 if(hdac == NULL) |
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271 { |
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272 return HAL_ERROR; |
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273 } |
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274 |
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275 /* Check the parameters */ |
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276 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
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277 |
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278 /* Change DAC state */ |
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279 hdac->State = HAL_DAC_STATE_BUSY; |
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280 |
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281 /* DeInit the low level hardware */ |
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282 HAL_DAC_MspDeInit(hdac); |
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283 |
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284 /* Set DAC error code to none */ |
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285 hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
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286 |
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287 /* Change DAC state */ |
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288 hdac->State = HAL_DAC_STATE_RESET; |
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289 |
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290 /* Release Lock */ |
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291 __HAL_UNLOCK(hdac); |
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292 |
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293 /* Return function status */ |
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294 return HAL_OK; |
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295 } |
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296 |
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297 /** |
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298 * @brief Initializes the DAC MSP. |
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299 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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300 * the configuration information for the specified DAC. |
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301 * @retval None |
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302 */ |
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303 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac) |
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304 { |
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305 /* Prevent unused argument(s) compilation warning */ |
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306 UNUSED(hdac); |
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307 /* NOTE : This function Should not be modified, when the callback is needed, |
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308 the HAL_DAC_MspInit could be implemented in the user file |
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309 */ |
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310 } |
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311 |
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312 /** |
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313 * @brief DeInitializes the DAC MSP. |
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314 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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315 * the configuration information for the specified DAC. |
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316 * @retval None |
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317 */ |
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318 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac) |
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319 { |
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320 /* Prevent unused argument(s) compilation warning */ |
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321 UNUSED(hdac); |
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322 /* NOTE : This function Should not be modified, when the callback is needed, |
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323 the HAL_DAC_MspDeInit could be implemented in the user file |
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324 */ |
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325 } |
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326 |
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327 /** |
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328 * @} |
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329 */ |
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330 |
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331 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions |
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332 * @brief IO operation functions |
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333 * |
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334 @verbatim |
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335 ============================================================================== |
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336 ##### IO operation functions ##### |
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337 ============================================================================== |
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338 [..] This section provides functions allowing to: |
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339 (+) Start conversion. |
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340 (+) Stop conversion. |
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341 (+) Start conversion and enable DMA transfer. |
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342 (+) Stop conversion and disable DMA transfer. |
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343 (+) Get result of conversion. |
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344 |
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345 @endverbatim |
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346 * @{ |
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347 */ |
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348 |
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349 /** |
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350 * @brief Enables DAC and starts conversion of channel. |
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351 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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352 * the configuration information for the specified DAC. |
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353 * @param Channel The selected DAC channel. |
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354 * This parameter can be one of the following values: |
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355 * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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356 * @arg DAC_CHANNEL_2: DAC Channel2 selected |
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357 * @retval HAL status |
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358 */ |
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359 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel) |
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360 { |
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361 uint32_t tmp1 = 0U, tmp2 = 0U; |
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362 |
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363 /* Check the parameters */ |
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364 assert_param(IS_DAC_CHANNEL(Channel)); |
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365 |
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366 /* Process locked */ |
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367 __HAL_LOCK(hdac); |
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368 |
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369 /* Change DAC state */ |
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370 hdac->State = HAL_DAC_STATE_BUSY; |
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371 |
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372 /* Enable the Peripheral */ |
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373 __HAL_DAC_ENABLE(hdac, Channel); |
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374 |
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375 if(Channel == DAC_CHANNEL_1) |
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376 { |
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377 tmp1 = hdac->Instance->CR & DAC_CR_TEN1; |
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378 tmp2 = hdac->Instance->CR & DAC_CR_TSEL1; |
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379 /* Check if software trigger enabled */ |
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380 if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1)) |
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381 { |
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382 /* Enable the selected DAC software conversion */ |
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383 hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1; |
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384 } |
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385 } |
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386 else |
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387 { |
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388 tmp1 = hdac->Instance->CR & DAC_CR_TEN2; |
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389 tmp2 = hdac->Instance->CR & DAC_CR_TSEL2; |
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390 /* Check if software trigger enabled */ |
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391 if((tmp1 == DAC_CR_TEN2) && (tmp2 == DAC_CR_TSEL2)) |
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392 { |
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393 /* Enable the selected DAC software conversion*/ |
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394 hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG2; |
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395 } |
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396 } |
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397 |
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398 /* Change DAC state */ |
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399 hdac->State = HAL_DAC_STATE_READY; |
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400 |
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401 /* Process unlocked */ |
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402 __HAL_UNLOCK(hdac); |
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403 |
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404 /* Return function status */ |
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405 return HAL_OK; |
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406 } |
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407 |
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408 /** |
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409 * @brief Disables DAC and stop conversion of channel. |
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410 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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411 * the configuration information for the specified DAC. |
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Added current STM32 standandard libraries in version independend folder structure
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412 * @param Channel The selected DAC channel. |
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413 * This parameter can be one of the following values: |
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414 * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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415 * @arg DAC_CHANNEL_2: DAC Channel2 selected |
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416 * @retval HAL status |
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417 */ |
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418 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel) |
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419 { |
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420 /* Check the parameters */ |
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421 assert_param(IS_DAC_CHANNEL(Channel)); |
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422 |
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423 /* Disable the Peripheral */ |
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424 __HAL_DAC_DISABLE(hdac, Channel); |
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425 |
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426 /* Change DAC state */ |
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427 hdac->State = HAL_DAC_STATE_READY; |
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428 |
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429 /* Return function status */ |
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430 return HAL_OK; |
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431 } |
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|
432 |
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433 /** |
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434 * @brief Enables DAC and starts conversion of channel. |
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435 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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436 * the configuration information for the specified DAC. |
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437 * @param Channel The selected DAC channel. |
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438 * This parameter can be one of the following values: |
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439 * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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440 * @arg DAC_CHANNEL_2: DAC Channel2 selected |
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441 * @param pData The destination peripheral Buffer address. |
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442 * @param Length The length of data to be transferred from memory to DAC peripheral |
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443 * @param Alignment Specifies the data alignment for DAC channel. |
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444 * This parameter can be one of the following values: |
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445 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
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446 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
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447 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
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448 * @retval HAL status |
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449 */ |
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450 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment) |
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451 { |
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452 uint32_t tmpreg = 0U; |
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453 |
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454 /* Check the parameters */ |
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455 assert_param(IS_DAC_CHANNEL(Channel)); |
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456 assert_param(IS_DAC_ALIGN(Alignment)); |
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|
457 |
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458 /* Process locked */ |
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459 __HAL_LOCK(hdac); |
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460 |
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461 /* Change DAC state */ |
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462 hdac->State = HAL_DAC_STATE_BUSY; |
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463 |
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464 if(Channel == DAC_CHANNEL_1) |
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465 { |
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466 /* Set the DMA transfer complete callback for channel1 */ |
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467 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; |
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468 |
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469 /* Set the DMA half transfer complete callback for channel1 */ |
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470 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; |
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471 |
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472 /* Set the DMA error callback for channel1 */ |
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473 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; |
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474 |
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475 /* Enable the selected DAC channel1 DMA request */ |
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476 hdac->Instance->CR |= DAC_CR_DMAEN1; |
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|
477 |
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478 /* Case of use of channel 1 */ |
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479 switch(Alignment) |
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480 { |
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481 case DAC_ALIGN_12B_R: |
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482 /* Get DHR12R1 address */ |
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483 tmpreg = (uint32_t)&hdac->Instance->DHR12R1; |
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484 break; |
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485 case DAC_ALIGN_12B_L: |
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486 /* Get DHR12L1 address */ |
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487 tmpreg = (uint32_t)&hdac->Instance->DHR12L1; |
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488 break; |
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489 case DAC_ALIGN_8B_R: |
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490 /* Get DHR8R1 address */ |
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491 tmpreg = (uint32_t)&hdac->Instance->DHR8R1; |
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492 break; |
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493 default: |
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494 break; |
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|
495 } |
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496 } |
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497 else |
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|
498 { |
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499 /* Set the DMA transfer complete callback for channel2 */ |
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500 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; |
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501 |
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502 /* Set the DMA half transfer complete callback for channel2 */ |
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503 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; |
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504 |
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505 /* Set the DMA error callback for channel2 */ |
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506 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; |
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|
507 |
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508 /* Enable the selected DAC channel2 DMA request */ |
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509 hdac->Instance->CR |= DAC_CR_DMAEN2; |
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|
510 |
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511 /* Case of use of channel 2 */ |
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512 switch(Alignment) |
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|
513 { |
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514 case DAC_ALIGN_12B_R: |
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515 /* Get DHR12R2 address */ |
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516 tmpreg = (uint32_t)&hdac->Instance->DHR12R2; |
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517 break; |
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|
518 case DAC_ALIGN_12B_L: |
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519 /* Get DHR12L2 address */ |
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520 tmpreg = (uint32_t)&hdac->Instance->DHR12L2; |
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|
521 break; |
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522 case DAC_ALIGN_8B_R: |
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523 /* Get DHR8R2 address */ |
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524 tmpreg = (uint32_t)&hdac->Instance->DHR8R2; |
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|
525 break; |
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|
526 default: |
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|
527 break; |
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|
528 } |
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|
529 } |
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|
530 |
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|
531 /* Enable the DMA Stream */ |
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|
532 if(Channel == DAC_CHANNEL_1) |
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|
533 { |
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|
534 /* Enable the DAC DMA underrun interrupt */ |
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535 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); |
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|
536 |
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537 /* Enable the DMA Stream */ |
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538 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
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539 } |
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|
540 else |
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|
541 { |
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parents:
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|
542 /* Enable the DAC DMA underrun interrupt */ |
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|
543 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); |
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544 |
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|
545 /* Enable the DMA Stream */ |
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|
546 HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); |
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547 } |
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548 |
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parents:
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|
549 /* Enable the Peripheral */ |
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parents:
diff
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|
550 __HAL_DAC_ENABLE(hdac, Channel); |
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551 |
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parents:
diff
changeset
|
552 /* Process Unlocked */ |
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|
553 __HAL_UNLOCK(hdac); |
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|
554 |
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parents:
diff
changeset
|
555 /* Return function status */ |
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|
556 return HAL_OK; |
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|
557 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
558 |
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Added current STM32 standandard libraries in version independend folder structure
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|
559 /** |
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Added current STM32 standandard libraries in version independend folder structure
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560 * @brief Disables DAC and stop conversion of channel. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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561 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
562 * the configuration information for the specified DAC. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
563 * @param Channel The selected DAC channel. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
564 * This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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diff
changeset
|
565 * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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|
566 * @arg DAC_CHANNEL_2: DAC Channel2 selected |
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|
567 * @retval HAL status |
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parents:
diff
changeset
|
568 */ |
c78bcbd5deda
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changeset
|
569 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel) |
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Ideenmodellierer
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570 { |
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|
571 HAL_StatusTypeDef status = HAL_OK; |
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|
572 |
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parents:
diff
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|
573 /* Check the parameters */ |
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|
574 assert_param(IS_DAC_CHANNEL(Channel)); |
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|
575 |
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changeset
|
576 /* Disable the selected DAC channel DMA request */ |
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|
577 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << Channel); |
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578 |
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parents:
diff
changeset
|
579 /* Disable the Peripheral */ |
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580 __HAL_DAC_DISABLE(hdac, Channel); |
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581 |
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parents:
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changeset
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582 /* Disable the DMA Channel */ |
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diff
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|
583 /* Channel1 is used */ |
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parents:
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|
584 if(Channel == DAC_CHANNEL_1) |
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585 { |
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|
586 status = HAL_DMA_Abort(hdac->DMA_Handle1); |
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587 } |
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parents:
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|
588 else /* Channel2 is used for */ |
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parents:
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|
589 { |
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|
590 status = HAL_DMA_Abort(hdac->DMA_Handle2); |
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|
591 } |
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|
592 |
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parents:
diff
changeset
|
593 /* Check if DMA Channel effectively disabled */ |
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parents:
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changeset
|
594 if(status != HAL_OK) |
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|
595 { |
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changeset
|
596 /* Update DAC state machine to error */ |
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|
597 hdac->State = HAL_DAC_STATE_ERROR; |
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changeset
|
598 } |
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|
599 else |
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changeset
|
600 { |
c78bcbd5deda
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|
601 /* Change DAC state */ |
c78bcbd5deda
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|
602 hdac->State = HAL_DAC_STATE_READY; |
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|
603 } |
c78bcbd5deda
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|
604 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
605 /* Return function status */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
606 return status; |
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Added current STM32 standandard libraries in version independend folder structure
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|
607 } |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
608 |
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Ideenmodellierer
parents:
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|
609 /** |
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|
610 * @brief Returns the last data output value of the selected DAC channel. |
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611 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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Ideenmodellierer
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612 * the configuration information for the specified DAC. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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613 * @param Channel The selected DAC channel. |
c78bcbd5deda
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614 * This parameter can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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615 * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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Added current STM32 standandard libraries in version independend folder structure
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616 * @arg DAC_CHANNEL_2: DAC Channel2 selected |
c78bcbd5deda
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617 * @retval The selected DAC channel data output value. |
c78bcbd5deda
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|
618 */ |
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619 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel) |
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|
620 { |
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621 /* Check the parameters */ |
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|
622 assert_param(IS_DAC_CHANNEL(Channel)); |
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|
623 |
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|
624 /* Returns the DAC channel data output register value */ |
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|
625 if(Channel == DAC_CHANNEL_1) |
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diff
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|
626 { |
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|
627 return hdac->Instance->DOR1; |
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|
628 } |
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629 else |
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|
630 { |
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|
631 return hdac->Instance->DOR2; |
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|
632 } |
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|
633 } |
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|
634 |
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|
635 /** |
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|
636 * @brief Handles DAC interrupt request |
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Added current STM32 standandard libraries in version independend folder structure
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637 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
c78bcbd5deda
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638 * the configuration information for the specified DAC. |
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|
639 * @retval None |
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|
640 */ |
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641 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac) |
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Added current STM32 standandard libraries in version independend folder structure
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|
642 { |
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|
643 /* Check underrun channel 1 flag */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
644 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1)) |
c78bcbd5deda
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|
645 { |
c78bcbd5deda
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|
646 /* Change DAC state to error state */ |
c78bcbd5deda
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647 hdac->State = HAL_DAC_STATE_ERROR; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
648 |
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Added current STM32 standandard libraries in version independend folder structure
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|
649 /* Set DAC error code to channel1 DMA underrun error */ |
c78bcbd5deda
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|
650 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1; |
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|
651 |
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|
652 /* Clear the underrun flag */ |
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|
653 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1); |
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diff
changeset
|
654 |
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|
655 /* Disable the selected DAC channel1 DMA request */ |
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|
656 hdac->Instance->CR &= ~DAC_CR_DMAEN1; |
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|
657 |
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|
658 /* Error callback */ |
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|
659 HAL_DAC_DMAUnderrunCallbackCh1(hdac); |
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|
660 } |
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|
661 /* Check underrun channel 2 flag */ |
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|
662 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2)) |
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|
663 { |
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|
664 /* Change DAC state to error state */ |
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|
665 hdac->State = HAL_DAC_STATE_ERROR; |
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|
666 |
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|
667 /* Set DAC error code to channel2 DMA underrun error */ |
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668 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2; |
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|
669 |
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|
670 /* Clear the underrun flag */ |
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|
671 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2); |
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|
672 |
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|
673 /* Disable the selected DAC channel1 DMA request */ |
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|
674 hdac->Instance->CR &= ~DAC_CR_DMAEN2; |
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675 |
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676 /* Error callback */ |
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677 HAL_DACEx_DMAUnderrunCallbackCh2(hdac); |
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678 } |
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679 } |
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680 |
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681 /** |
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682 * @brief Conversion complete callback in non blocking mode for Channel1 |
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683 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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684 * the configuration information for the specified DAC. |
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685 * @retval None |
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686 */ |
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687 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac) |
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688 { |
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689 /* Prevent unused argument(s) compilation warning */ |
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|
690 UNUSED(hdac); |
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691 /* NOTE : This function Should not be modified, when the callback is needed, |
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|
692 the HAL_DAC_ConvCpltCallback could be implemented in the user file |
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|
693 */ |
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|
694 } |
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|
695 |
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696 /** |
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697 * @brief Conversion half DMA transfer callback in non blocking mode for Channel1 |
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698 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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|
699 * the configuration information for the specified DAC. |
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700 * @retval None |
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|
701 */ |
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|
702 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac) |
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|
703 { |
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704 /* Prevent unused argument(s) compilation warning */ |
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|
705 UNUSED(hdac); |
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706 /* NOTE : This function Should not be modified, when the callback is needed, |
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|
707 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file |
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|
708 */ |
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709 } |
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710 |
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711 /** |
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|
712 * @brief Error DAC callback for Channel1. |
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713 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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714 * the configuration information for the specified DAC. |
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|
715 * @retval None |
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716 */ |
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717 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac) |
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718 { |
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719 /* Prevent unused argument(s) compilation warning */ |
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|
720 UNUSED(hdac); |
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721 /* NOTE : This function Should not be modified, when the callback is needed, |
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722 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file |
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723 */ |
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|
724 } |
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|
725 |
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|
726 /** |
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|
727 * @brief DMA underrun DAC callback for channel1. |
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728 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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|
729 * the configuration information for the specified DAC. |
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|
730 * @retval None |
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|
731 */ |
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|
732 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) |
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|
733 { |
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|
734 /* Prevent unused argument(s) compilation warning */ |
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|
735 UNUSED(hdac); |
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736 /* NOTE : This function Should not be modified, when the callback is needed, |
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737 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file |
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|
738 */ |
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|
739 } |
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740 |
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|
741 /** |
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742 * @} |
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|
743 */ |
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|
744 |
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745 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions |
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746 * @brief Peripheral Control functions |
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|
747 * |
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|
748 @verbatim |
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|
749 ============================================================================== |
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750 ##### Peripheral Control functions ##### |
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|
751 ============================================================================== |
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|
752 [..] This section provides functions allowing to: |
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753 (+) Configure channels. |
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754 (+) Set the specified data holding register value for DAC channel. |
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755 |
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756 @endverbatim |
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757 * @{ |
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758 */ |
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759 |
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760 /** |
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|
761 * @brief Configures the selected DAC channel. |
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762 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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763 * the configuration information for the specified DAC. |
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764 * @param sConfig DAC configuration structure. |
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765 * @param Channel The selected DAC channel. |
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766 * This parameter can be one of the following values: |
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767 * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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768 * @arg DAC_CHANNEL_2: DAC Channel2 selected |
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769 * @retval HAL status |
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770 */ |
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771 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel) |
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772 { |
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773 uint32_t tmpreg1 = 0U, tmpreg2 = 0U; |
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|
774 |
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775 /* Check the DAC parameters */ |
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776 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); |
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777 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); |
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778 assert_param(IS_DAC_CHANNEL(Channel)); |
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779 |
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780 /* Process locked */ |
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781 __HAL_LOCK(hdac); |
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782 |
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783 /* Change DAC state */ |
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784 hdac->State = HAL_DAC_STATE_BUSY; |
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785 |
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786 /* Get the DAC CR value */ |
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787 tmpreg1 = hdac->Instance->CR; |
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788 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ |
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789 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel); |
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790 /* Configure for the selected DAC channel: buffer output, trigger */ |
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791 /* Set TSELx and TENx bits according to DAC_Trigger value */ |
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792 /* Set BOFFx bit according to DAC_OutputBuffer value */ |
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793 tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer); |
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794 /* Calculate CR register value depending on DAC_Channel */ |
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795 tmpreg1 |= tmpreg2 << Channel; |
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796 /* Write to DAC CR */ |
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797 hdac->Instance->CR = tmpreg1; |
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798 /* Disable wave generation */ |
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799 hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel); |
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800 |
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801 /* Change DAC state */ |
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802 hdac->State = HAL_DAC_STATE_READY; |
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803 |
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804 /* Process unlocked */ |
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805 __HAL_UNLOCK(hdac); |
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|
806 |
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807 /* Return function status */ |
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808 return HAL_OK; |
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809 } |
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810 |
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811 /** |
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812 * @brief Set the specified data holding register value for DAC channel. |
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813 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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814 * the configuration information for the specified DAC. |
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815 * @param Channel The selected DAC channel. |
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816 * This parameter can be one of the following values: |
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817 * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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818 * @arg DAC_CHANNEL_2: DAC Channel2 selected |
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819 * @param Alignment Specifies the data alignment. |
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820 * This parameter can be one of the following values: |
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821 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
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822 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
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823 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
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824 * @param Data Data to be loaded in the selected data holding register. |
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825 * @retval HAL status |
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826 */ |
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827 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data) |
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828 { |
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829 __IO uint32_t tmp = 0U; |
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830 |
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831 /* Check the parameters */ |
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832 assert_param(IS_DAC_CHANNEL(Channel)); |
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833 assert_param(IS_DAC_ALIGN(Alignment)); |
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834 assert_param(IS_DAC_DATA(Data)); |
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835 |
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836 tmp = (uint32_t)hdac->Instance; |
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837 if(Channel == DAC_CHANNEL_1) |
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838 { |
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839 tmp += DAC_DHR12R1_ALIGNMENT(Alignment); |
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840 } |
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841 else |
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842 { |
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843 tmp += DAC_DHR12R2_ALIGNMENT(Alignment); |
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844 } |
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845 |
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846 /* Set the DAC channel1 selected data holding register */ |
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847 *(__IO uint32_t *) tmp = Data; |
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848 |
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849 /* Return function status */ |
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850 return HAL_OK; |
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851 } |
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852 |
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853 /** |
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854 * @} |
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855 */ |
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856 |
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857 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions |
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858 * @brief Peripheral State and Errors functions |
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859 * |
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860 @verbatim |
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861 ============================================================================== |
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862 ##### Peripheral State and Errors functions ##### |
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863 ============================================================================== |
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864 [..] |
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865 This subsection provides functions allowing to |
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866 (+) Check the DAC state. |
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867 (+) Check the DAC Errors. |
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868 |
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869 @endverbatim |
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870 * @{ |
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871 */ |
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872 |
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873 /** |
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874 * @brief return the DAC state |
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875 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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876 * the configuration information for the specified DAC. |
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877 * @retval HAL state |
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878 */ |
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879 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac) |
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880 { |
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881 /* Return DAC state */ |
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882 return hdac->State; |
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883 } |
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884 |
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885 |
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886 /** |
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887 * @brief Return the DAC error code |
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888 * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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889 * the configuration information for the specified DAC. |
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890 * @retval DAC Error Code |
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891 */ |
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892 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac) |
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893 { |
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894 return hdac->ErrorCode; |
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895 } |
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896 |
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897 /** |
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898 * @} |
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899 */ |
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900 |
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901 /** |
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902 * @brief DMA conversion complete callback. |
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903 * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
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904 * the configuration information for the specified DMA module. |
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905 * @retval None |
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906 */ |
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907 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma) |
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908 { |
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909 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
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910 |
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911 HAL_DAC_ConvCpltCallbackCh1(hdac); |
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912 |
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913 hdac->State= HAL_DAC_STATE_READY; |
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914 } |
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915 |
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916 /** |
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917 * @brief DMA half transfer complete callback. |
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918 * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
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919 * the configuration information for the specified DMA module. |
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920 * @retval None |
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921 */ |
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922 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma) |
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923 { |
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924 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
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925 /* Conversion complete callback */ |
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926 HAL_DAC_ConvHalfCpltCallbackCh1(hdac); |
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927 } |
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928 |
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929 /** |
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930 * @brief DMA error callback |
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931 * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
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932 * the configuration information for the specified DMA module. |
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933 * @retval None |
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934 */ |
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935 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) |
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936 { |
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937 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
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938 |
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939 /* Set DAC error code to DMA error */ |
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940 hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
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941 |
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942 HAL_DAC_ErrorCallbackCh1(hdac); |
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943 |
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944 hdac->State= HAL_DAC_STATE_READY; |
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945 } |
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946 |
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947 /** |
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948 * @} |
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949 */ |
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950 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\ |
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951 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\ |
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952 STM32F410xx || STM32F446xx || STM32F469xx || STM32F479xx ||\ |
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953 STM32F413xx || STM32F423xx */ |
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954 #endif /* HAL_DAC_MODULE_ENABLED */ |
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955 |
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956 /** |
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957 * @} |
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958 */ |
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959 |
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960 /** |
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961 * @} |
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962 */ |
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963 |
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964 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |