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annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dcmi.h @ 507:5e3b830b955f

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author Ideenmodellierer
date Sun, 30 Aug 2020 17:20:16 +0200
parents c78bcbd5deda
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128
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_dcmi.h
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4 * @author MCD Application Team
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5 * @brief Header file of DCMI HAL module.
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6 ******************************************************************************
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7 * @attention
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8 *
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9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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10 *
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11 * Redistribution and use in source and binary forms, with or without modification,
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12 * are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright notice,
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16 * this list of conditions and the following disclaimer in the documentation
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17 * and/or other materials provided with the distribution.
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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19 * may be used to endorse or promote products derived from this software
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20 * without specific prior written permission.
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21 *
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 *
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33 ******************************************************************************
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34 */
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35
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36 /* Define to prevent recursive inclusion -------------------------------------*/
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37 #ifndef __STM32F4xx_HAL_DCMI_H
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38 #define __STM32F4xx_HAL_DCMI_H
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39
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40 #ifdef __cplusplus
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41 extern "C" {
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42 #endif
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43
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44 #if defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) ||\
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45 defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F469xx) ||\
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46 defined(STM32F479xx)
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47 /* Includes ------------------------------------------------------------------*/
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48 #include "stm32f4xx_hal_def.h"
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49
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50 /* Include DCMI HAL Extended module */
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51 /* (include on top of file since DCMI structures are defined in extended file) */
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52 #include "stm32f4xx_hal_dcmi_ex.h"
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53
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54 /** @addtogroup STM32F4xx_HAL_Driver
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55 * @{
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56 */
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57
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58 /** @addtogroup DCMI DCMI
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59 * @brief DCMI HAL module driver
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60 * @{
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61 */
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62
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63 /* Exported types ------------------------------------------------------------*/
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64 /** @defgroup DCMI_Exported_Types DCMI Exported Types
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65 * @{
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66 */
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67 /**
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68 * @brief HAL DCMI State structures definition
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69 */
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70 typedef enum
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71 {
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72 HAL_DCMI_STATE_RESET = 0x00U, /*!< DCMI not yet initialized or disabled */
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73 HAL_DCMI_STATE_READY = 0x01U, /*!< DCMI initialized and ready for use */
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74 HAL_DCMI_STATE_BUSY = 0x02U, /*!< DCMI internal processing is ongoing */
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75 HAL_DCMI_STATE_TIMEOUT = 0x03U, /*!< DCMI timeout state */
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76 HAL_DCMI_STATE_ERROR = 0x04U, /*!< DCMI error state */
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77 HAL_DCMI_STATE_SUSPENDED = 0x05U /*!< DCMI suspend state */
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78 }HAL_DCMI_StateTypeDef;
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79
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80 /**
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81 * @brief DCMI handle Structure definition
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82 */
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83 typedef struct
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84 {
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85 DCMI_TypeDef *Instance; /*!< DCMI Register base address */
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86
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87 DCMI_InitTypeDef Init; /*!< DCMI parameters */
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88
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89 HAL_LockTypeDef Lock; /*!< DCMI locking object */
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90
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91 __IO HAL_DCMI_StateTypeDef State; /*!< DCMI state */
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92
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93 __IO uint32_t XferCount; /*!< DMA transfer counter */
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94
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95 __IO uint32_t XferSize; /*!< DMA transfer size */
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96
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97 uint32_t XferTransferNumber; /*!< DMA transfer number */
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98
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99 uint32_t pBuffPtr; /*!< Pointer to DMA output buffer */
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100
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101 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer to the DMA handler */
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102
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103 __IO uint32_t ErrorCode; /*!< DCMI Error code */
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104
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105 }DCMI_HandleTypeDef;
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106 /**
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107 * @}
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108 */
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109
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110 /* Exported constants --------------------------------------------------------*/
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111 /** @defgroup DCMI_Exported_Constants DCMI Exported Constants
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112 * @{
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113 */
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114
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115 /** @defgroup DCMI_Error_Code DCMI Error Code
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116 * @{
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117 */
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118 #define HAL_DCMI_ERROR_NONE 0x00000000U /*!< No error */
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119 #define HAL_DCMI_ERROR_OVR 0x00000001U /*!< Overrun error */
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120 #define HAL_DCMI_ERROR_SYNC 0x00000002U /*!< Synchronization error */
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121 #define HAL_DCMI_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */
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122 #define HAL_DCMI_ERROR_DMA 0x00000040U /*!< DMA error */
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123 /**
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124 * @}
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125 */
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126
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127 /** @defgroup DCMI_Capture_Mode DCMI Capture Mode
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128 * @{
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129 */
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130 #define DCMI_MODE_CONTINUOUS 0x00000000U /*!< The received data are transferred continuously
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131 into the destination memory through the DMA */
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132 #define DCMI_MODE_SNAPSHOT ((uint32_t)DCMI_CR_CM) /*!< Once activated, the interface waits for the start of
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133 frame and then transfers a single frame through the DMA */
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134 /**
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135 * @}
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136 */
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137
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138 /** @defgroup DCMI_Synchronization_Mode DCMI Synchronization Mode
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139 * @{
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140 */
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141 #define DCMI_SYNCHRO_HARDWARE 0x00000000U /*!< Hardware synchronization data capture (frame/line start/stop)
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142 is synchronized with the HSYNC/VSYNC signals */
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143 #define DCMI_SYNCHRO_EMBEDDED ((uint32_t)DCMI_CR_ESS) /*!< Embedded synchronization data capture is synchronized with
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144 synchronization codes embedded in the data flow */
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145
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146 /**
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147 * @}
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148 */
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149
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150 /** @defgroup DCMI_PIXCK_Polarity DCMI PIXCK Polarity
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151 * @{
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152 */
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153 #define DCMI_PCKPOLARITY_FALLING 0x00000000U /*!< Pixel clock active on Falling edge */
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154 #define DCMI_PCKPOLARITY_RISING ((uint32_t)DCMI_CR_PCKPOL) /*!< Pixel clock active on Rising edge */
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155
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156 /**
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157 * @}
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158 */
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159
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160 /** @defgroup DCMI_VSYNC_Polarity DCMI VSYNC Polarity
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161 * @{
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162 */
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163 #define DCMI_VSPOLARITY_LOW 0x00000000U /*!< Vertical synchronization active Low */
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164 #define DCMI_VSPOLARITY_HIGH ((uint32_t)DCMI_CR_VSPOL) /*!< Vertical synchronization active High */
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165
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166 /**
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167 * @}
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168 */
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169
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170 /** @defgroup DCMI_HSYNC_Polarity DCMI HSYNC Polarity
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171 * @{
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172 */
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173 #define DCMI_HSPOLARITY_LOW 0x00000000U /*!< Horizontal synchronization active Low */
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174 #define DCMI_HSPOLARITY_HIGH ((uint32_t)DCMI_CR_HSPOL) /*!< Horizontal synchronization active High */
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175
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176 /**
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177 * @}
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178 */
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179
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180 /** @defgroup DCMI_MODE_JPEG DCMI MODE JPEG
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181 * @{
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182 */
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183 #define DCMI_JPEG_DISABLE 0x00000000U /*!< Mode JPEG Disabled */
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184 #define DCMI_JPEG_ENABLE ((uint32_t)DCMI_CR_JPEG) /*!< Mode JPEG Enabled */
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185
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186 /**
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187 * @}
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188 */
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189
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190 /** @defgroup DCMI_Capture_Rate DCMI Capture Rate
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191 * @{
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192 */
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193 #define DCMI_CR_ALL_FRAME 0x00000000U /*!< All frames are captured */
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194 #define DCMI_CR_ALTERNATE_2_FRAME ((uint32_t)DCMI_CR_FCRC_0) /*!< Every alternate frame captured */
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195 #define DCMI_CR_ALTERNATE_4_FRAME ((uint32_t)DCMI_CR_FCRC_1) /*!< One frame in 4 frames captured */
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196
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197 /**
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198 * @}
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199 */
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200
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201 /** @defgroup DCMI_Extended_Data_Mode DCMI Extended Data Mode
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202 * @{
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203 */
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204 #define DCMI_EXTEND_DATA_8B 0x00000000U /*!< Interface captures 8-bit data on every pixel clock */
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205 #define DCMI_EXTEND_DATA_10B ((uint32_t)DCMI_CR_EDM_0) /*!< Interface captures 10-bit data on every pixel clock */
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206 #define DCMI_EXTEND_DATA_12B ((uint32_t)DCMI_CR_EDM_1) /*!< Interface captures 12-bit data on every pixel clock */
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207 #define DCMI_EXTEND_DATA_14B ((uint32_t)(DCMI_CR_EDM_0 | DCMI_CR_EDM_1)) /*!< Interface captures 14-bit data on every pixel clock */
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208
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209 /**
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210 * @}
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211 */
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212
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213 /** @defgroup DCMI_Window_Coordinate DCMI Window Coordinate
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214 * @{
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215 */
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216 #define DCMI_WINDOW_COORDINATE 0x3FFFU /*!< Window coordinate */
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217
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218 /**
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219 * @}
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220 */
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221
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222 /** @defgroup DCMI_Window_Height DCMI Window Height
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223 * @{
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224 */
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225 #define DCMI_WINDOW_HEIGHT 0x1FFFU /*!< Window Height */
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226
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227 /**
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228 * @}
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229 */
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230
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231 /** @defgroup DCMI_Window_Vertical_Line DCMI Window Vertical Line
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232 * @{
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233 */
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234 #define DCMI_POSITION_CWSIZE_VLINE (uint32_t)DCMI_CWSIZE_VLINE_Pos /*!< Required left shift to set crop window vertical line count */
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235 #define DCMI_POSITION_CWSTRT_VST (uint32_t)DCMI_CWSTRT_VST_Pos /*!< Required left shift to set crop window vertical start line count */
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236
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237 /**
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238 * @}
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239 */
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240
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241 /** @defgroup DCMI_interrupt_sources DCMI interrupt sources
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242 * @{
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243 */
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244 #define DCMI_IT_FRAME ((uint32_t)DCMI_IER_FRAME_IE) /*!< Capture complete interrupt */
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245 #define DCMI_IT_OVR ((uint32_t)DCMI_IER_OVR_IE) /*!< Overrun interrupt */
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246 #define DCMI_IT_ERR ((uint32_t)DCMI_IER_ERR_IE) /*!< Synchronization error interrupt */
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247 #define DCMI_IT_VSYNC ((uint32_t)DCMI_IER_VSYNC_IE) /*!< VSYNC interrupt */
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248 #define DCMI_IT_LINE ((uint32_t)DCMI_IER_LINE_IE) /*!< Line interrupt */
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249 /**
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250 * @}
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251 */
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252
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253 /** @defgroup DCMI_Flags DCMI Flags
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254 * @{
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255 */
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256
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257 /**
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258 * @brief DCMI SR register
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259 */
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260 #define DCMI_FLAG_HSYNC ((uint32_t)DCMI_SR_INDEX|DCMI_SR_HSYNC) /*!< HSYNC pin state (active line / synchronization between lines) */
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261 #define DCMI_FLAG_VSYNC ((uint32_t)DCMI_SR_INDEX|DCMI_SR_VSYNC) /*!< VSYNC pin state (active frame / synchronization between frames) */
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262 #define DCMI_FLAG_FNE ((uint32_t)DCMI_SR_INDEX|DCMI_SR_FNE) /*!< FIFO not empty flag */
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263 /**
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264 * @brief DCMI RIS register
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265 */
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266 #define DCMI_FLAG_FRAMERI ((uint32_t)DCMI_RISR_FRAME_RIS) /*!< Frame capture complete interrupt flag */
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267 #define DCMI_FLAG_OVRRI ((uint32_t)DCMI_RISR_OVR_RIS) /*!< Overrun interrupt flag */
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268 #define DCMI_FLAG_ERRRI ((uint32_t)DCMI_RISR_ERR_RIS) /*!< Synchronization error interrupt flag */
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269 #define DCMI_FLAG_VSYNCRI ((uint32_t)DCMI_RISR_VSYNC_RIS) /*!< VSYNC interrupt flag */
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270 #define DCMI_FLAG_LINERI ((uint32_t)DCMI_RISR_LINE_RIS) /*!< Line interrupt flag */
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271 /**
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272 * @brief DCMI MIS register
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273 */
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274 #define DCMI_FLAG_FRAMEMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_FRAME_MIS) /*!< DCMI Frame capture complete masked interrupt status */
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275 #define DCMI_FLAG_OVRMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_OVR_MIS ) /*!< DCMI Overrun masked interrupt status */
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276 #define DCMI_FLAG_ERRMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_ERR_MIS ) /*!< DCMI Synchronization error masked interrupt status */
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277 #define DCMI_FLAG_VSYNCMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_VSYNC_MIS) /*!< DCMI VSYNC masked interrupt status */
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278 #define DCMI_FLAG_LINEMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_LINE_MIS ) /*!< DCMI Line masked interrupt status */
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279 /**
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280 * @}
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281 */
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282
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283 /**
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284 * @}
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285 */
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286
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287 /* Exported macro ------------------------------------------------------------*/
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288 /** @defgroup DCMI_Exported_Macros DCMI Exported Macros
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289 * @{
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290 */
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291
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292 /** @brief Reset DCMI handle state
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293 * @param __HANDLE__ specifies the DCMI handle.
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294 * @retval None
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295 */
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296 #define __HAL_DCMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DCMI_STATE_RESET)
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297
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298 /**
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299 * @brief Enable the DCMI.
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300 * @param __HANDLE__ DCMI handle
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301 * @retval None
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302 */
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303 #define __HAL_DCMI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DCMI_CR_ENABLE)
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304
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305 /**
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306 * @brief Disable the DCMI.
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307 * @param __HANDLE__ DCMI handle
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308 * @retval None
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309 */
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310 #define __HAL_DCMI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(DCMI_CR_ENABLE))
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311
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312 /* Interrupt & Flag management */
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313 /**
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314 * @brief Get the DCMI pending flag.
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315 * @param __HANDLE__ DCMI handle
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316 * @param __FLAG__ Get the specified flag.
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317 * This parameter can be one of the following values (no combination allowed)
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318 * @arg DCMI_FLAG_HSYNC: HSYNC pin state (active line / synchronization between lines)
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319 * @arg DCMI_FLAG_VSYNC: VSYNC pin state (active frame / synchronization between frames)
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320 * @arg DCMI_FLAG_FNE: FIFO empty flag
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321 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
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322 * @arg DCMI_FLAG_OVRRI: Overrun flag mask
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323 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
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324 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
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325 * @arg DCMI_FLAG_LINERI: Line flag mask
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326 * @arg DCMI_FLAG_FRAMEMI: DCMI Capture complete masked interrupt status
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327 * @arg DCMI_FLAG_OVRMI: DCMI Overrun masked interrupt status
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328 * @arg DCMI_FLAG_ERRMI: DCMI Synchronization error masked interrupt status
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329 * @arg DCMI_FLAG_VSYNCMI: DCMI VSYNC masked interrupt status
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330 * @arg DCMI_FLAG_LINEMI: DCMI Line masked interrupt status
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331 * @retval The state of FLAG.
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332 */
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333 #define __HAL_DCMI_GET_FLAG(__HANDLE__, __FLAG__)\
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334 ((((__FLAG__) & (DCMI_SR_INDEX|DCMI_MIS_INDEX)) == 0x0U)? ((__HANDLE__)->Instance->RISR & (__FLAG__)) :\
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335 (((__FLAG__) & DCMI_SR_INDEX) == 0x0U)? ((__HANDLE__)->Instance->MISR & (__FLAG__)) : ((__HANDLE__)->Instance->SR & (__FLAG__)))
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336
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337 /**
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338 * @brief Clear the DCMI pending flags.
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339 * @param __HANDLE__ DCMI handle
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340 * @param __FLAG__ specifies the flag to clear.
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341 * This parameter can be any combination of the following values:
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342 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
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343 * @arg DCMI_FLAG_OVRRI: Overrun flag mask
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344 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
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345 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
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346 * @arg DCMI_FLAG_LINERI: Line flag mask
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347 * @retval None
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348 */
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349 #define __HAL_DCMI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
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350
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351 /**
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352 * @brief Enable the specified DCMI interrupts.
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353 * @param __HANDLE__ DCMI handle
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354 * @param __INTERRUPT__ specifies the DCMI interrupt sources to be enabled.
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355 * This parameter can be any combination of the following values:
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356 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
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357 * @arg DCMI_IT_OVR: Overrun interrupt mask
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358 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
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359 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
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360 * @arg DCMI_IT_LINE: Line interrupt mask
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361 * @retval None
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362 */
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363 #define __HAL_DCMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
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364
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365 /**
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366 * @brief Disable the specified DCMI interrupts.
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367 * @param __HANDLE__ DCMI handle
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368 * @param __INTERRUPT__ specifies the DCMI interrupt sources to be enabled.
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369 * This parameter can be any combination of the following values:
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370 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
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371 * @arg DCMI_IT_OVR: Overrun interrupt mask
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372 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
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373 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
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374 * @arg DCMI_IT_LINE: Line interrupt mask
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375 * @retval None
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376 */
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377 #define __HAL_DCMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__))
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378
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379 /**
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380 * @brief Check whether the specified DCMI interrupt has occurred or not.
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381 * @param __HANDLE__ DCMI handle
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382 * @param __INTERRUPT__ specifies the DCMI interrupt source to check.
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383 * This parameter can be one of the following values:
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384 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
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385 * @arg DCMI_IT_OVR: Overrun interrupt mask
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386 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
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387 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
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388 * @arg DCMI_IT_LINE: Line interrupt mask
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389 * @retval The state of INTERRUPT.
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390 */
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391 #define __HAL_DCMI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MISR & (__INTERRUPT__))
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392
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393 /**
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394 * @}
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395 */
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396
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397 /* Exported functions --------------------------------------------------------*/
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398 /** @addtogroup DCMI_Exported_Functions DCMI Exported Functions
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399 * @{
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400 */
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401
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402 /** @addtogroup DCMI_Exported_Functions_Group1 Initialization and Configuration functions
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403 * @{
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404 */
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405 /* Initialization and de-initialization functions *****************************/
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406 HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi);
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407 HAL_StatusTypeDef HAL_DCMI_DeInit(DCMI_HandleTypeDef *hdcmi);
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408 void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi);
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409 void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi);
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410 /**
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411 * @}
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412 */
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413
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414 /** @addtogroup DCMI_Exported_Functions_Group2 IO operation functions
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415 * @{
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416 */
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417 /* IO operation functions *****************************************************/
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418 HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mode, uint32_t pData, uint32_t Length);
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419 HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef* hdcmi);
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420 HAL_StatusTypeDef HAL_DCMI_Suspend(DCMI_HandleTypeDef* hdcmi);
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421 HAL_StatusTypeDef HAL_DCMI_Resume(DCMI_HandleTypeDef* hdcmi);
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422 void HAL_DCMI_ErrorCallback(DCMI_HandleTypeDef *hdcmi);
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423 void HAL_DCMI_LineEventCallback(DCMI_HandleTypeDef *hdcmi);
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424 void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi);
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425 void HAL_DCMI_VsyncEventCallback(DCMI_HandleTypeDef *hdcmi);
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426 void HAL_DCMI_VsyncCallback(DCMI_HandleTypeDef *hdcmi);
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427 void HAL_DCMI_HsyncCallback(DCMI_HandleTypeDef *hdcmi);
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428 void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi);
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429 /**
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430 * @}
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431 */
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432
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433 /** @addtogroup DCMI_Exported_Functions_Group3 Peripheral Control functions
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434 * @{
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435 */
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436 /* Peripheral Control functions ***********************************************/
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437 HAL_StatusTypeDef HAL_DCMI_ConfigCrop(DCMI_HandleTypeDef *hdcmi, uint32_t X0, uint32_t Y0, uint32_t XSize, uint32_t YSize);
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438 HAL_StatusTypeDef HAL_DCMI_EnableCrop(DCMI_HandleTypeDef *hdcmi);
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439 HAL_StatusTypeDef HAL_DCMI_DisableCrop(DCMI_HandleTypeDef *hdcmi);
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440 /**
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441 * @}
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442 */
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443
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444 /** @addtogroup DCMI_Exported_Functions_Group4 Peripheral State functions
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445 * @{
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446 */
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447 /* Peripheral State functions *************************************************/
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448 HAL_DCMI_StateTypeDef HAL_DCMI_GetState(DCMI_HandleTypeDef *hdcmi);
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449 uint32_t HAL_DCMI_GetError(DCMI_HandleTypeDef *hdcmi);
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450 /**
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451 * @}
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452 */
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453
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454 /**
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455 * @}
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456 */
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457
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458 /* Private types -------------------------------------------------------------*/
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459 /* Private variables ---------------------------------------------------------*/
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460 /* Private constants ---------------------------------------------------------*/
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461 /** @defgroup DCMI_Private_Constants DCMI Private Constants
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462 * @{
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463 */
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464 #define DCMI_MIS_INDEX 0x1000U /*!< DCMI MIS register index */
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465 #define DCMI_SR_INDEX 0x2000U /*!< DCMI SR register index */
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466 /**
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467 * @}
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468 */
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469 /* Private macro -------------------------------------------------------------*/
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470 /** @defgroup DCMI_Private_Macros DCMI Private Macros
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471 * @{
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472 */
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473 #define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_MODE_CONTINUOUS) || \
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474 ((MODE) == DCMI_MODE_SNAPSHOT))
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475
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476 #define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SYNCHRO_HARDWARE) || \
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477 ((MODE) == DCMI_SYNCHRO_EMBEDDED))
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478
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479 #define IS_DCMI_PCKPOLARITY(POLARITY)(((POLARITY) == DCMI_PCKPOLARITY_FALLING) || \
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480 ((POLARITY) == DCMI_PCKPOLARITY_RISING))
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481
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482 #define IS_DCMI_VSPOLARITY(POLARITY)(((POLARITY) == DCMI_VSPOLARITY_LOW) || \
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483 ((POLARITY) == DCMI_VSPOLARITY_HIGH))
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484
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485 #define IS_DCMI_HSPOLARITY(POLARITY)(((POLARITY) == DCMI_HSPOLARITY_LOW) || \
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486 ((POLARITY) == DCMI_HSPOLARITY_HIGH))
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487
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488 #define IS_DCMI_MODE_JPEG(JPEG_MODE)(((JPEG_MODE) == DCMI_JPEG_DISABLE) || \
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489 ((JPEG_MODE) == DCMI_JPEG_ENABLE))
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490
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491 #define IS_DCMI_CAPTURE_RATE(RATE) (((RATE) == DCMI_CR_ALL_FRAME) || \
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492 ((RATE) == DCMI_CR_ALTERNATE_2_FRAME) || \
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493 ((RATE) == DCMI_CR_ALTERNATE_4_FRAME))
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494
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495 #define IS_DCMI_EXTENDED_DATA(DATA)(((DATA) == DCMI_EXTEND_DATA_8B) || \
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496 ((DATA) == DCMI_EXTEND_DATA_10B) || \
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497 ((DATA) == DCMI_EXTEND_DATA_12B) || \
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498 ((DATA) == DCMI_EXTEND_DATA_14B))
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499
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500 #define IS_DCMI_WINDOW_COORDINATE(COORDINATE) ((COORDINATE) <= DCMI_WINDOW_COORDINATE)
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501
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502 #define IS_DCMI_WINDOW_HEIGHT(HEIGHT) ((HEIGHT) <= DCMI_WINDOW_HEIGHT)
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503
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504 /**
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505 * @}
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506 */
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507
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508 /* Private functions ---------------------------------------------------------*/
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509 /** @addtogroup DCMI_Private_Functions DCMI Private Functions
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510 * @{
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511 */
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512
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513 /**
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514 * @}
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515 */
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516
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517 #endif /* STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
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518 STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
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519 STM32F479xx */
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520
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521 /**
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522 * @}
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523 */
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524
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525 /**
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526 * @}
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527 */
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528
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529 #ifdef __cplusplus
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530 }
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531 #endif
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532
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533 #endif /* __STM32F4xx_HAL_DCMI_H */
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534
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535 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/