annotate Small_CPU/Src/spi.c @ 155:4fd8bbc7d841 FlipDisplay

Do hard sync after communication timeout > 1 second
author Ideenmodellierer
date Sun, 03 Mar 2019 17:46:50 +0100
parents ee744c7160ce
children 9fc06e1e0f66
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1 /**
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2 ******************************************************************************
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3 * @file spi.c
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4 * @author heinrichs weikamp gmbh
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5 * @version V0.0.1
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6 * @date 16-Sept-2014
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7 * @brief Source code for spi control
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8 *
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9 @verbatim
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10 ==============================================================================
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11 ##### How to use #####
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12 ==============================================================================
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13 @endverbatim
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14 ******************************************************************************
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15 * @attention
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16 *
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17 * <h2><center>&copy; COPYRIGHT(c) 2014 heinrichs weikamp</center></h2>
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18 *
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19 ******************************************************************************
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20 */
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22 /* Includes ------------------------------------------------------------------*/
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23
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24 #include "global_constants.h"
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25 #include "spi.h"
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26 #include "dma.h"
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27
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28 //#include "gpio.h"
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30 /* USER CODE BEGIN 0 */
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31 #include "scheduler.h"
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32
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33 #ifdef DEBUG_GPIO
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34 extern void GPIO_new_DEBUG_LOW(void);
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35 extern void GPIO_new_DEBUG_HIGH(void);
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36 #endif
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37
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38 // SPI header by index used for synchronization check (package sequence counter)
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39 #define SPI_HEADER_INDEX_MASTER 1
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40 #define SPI_HEADER_INDEX_SLAVE 2
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41
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42 uint8_t data_error = 0;
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43 uint32_t data_error_time = 0;
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44 uint8_t SPIDataRX = 0; /* Flag to signal that SPI RX callback has been triggered */
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45
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46 extern void HardSyncToSPI(void);
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47 static void SPI_Error_Handler(void);
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48
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49 /* USER CODE END 0 */
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50
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51 static uint8_t SPI_check_header_and_footer_ok(void);
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52 static uint8_t DataEX_check_header_and_footer_shifted(void);
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53
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54 SPI_HandleTypeDef hspi1;
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55 SPI_HandleTypeDef hspi3;
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56
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57 DMA_HandleTypeDef hdma_tx;
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58 DMA_HandleTypeDef hdma_rx;
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59
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60 // SPI3 init function
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61 void MX_SPI3_Init(void) {
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62 hspi3.Instance = SPI3;
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63 hspi3.Init.Mode = SPI_MODE_MASTER;
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64 hspi3.Init.Direction = SPI_DIRECTION_2LINES;
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65 hspi3.Init.DataSize = SPI_DATASIZE_8BIT;
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66 hspi3.Init.CLKPolarity = SPI_POLARITY_HIGH;
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67 hspi3.Init.CLKPhase = SPI_PHASE_1EDGE;
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68 hspi3.Init.NSS = SPI_NSS_SOFT;
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69 hspi3.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
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70 hspi3.Init.FirstBit = SPI_FIRSTBIT_MSB;
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71 hspi3.Init.TIMode = SPI_TIMODE_DISABLED;
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72 hspi3.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
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73 hspi3.Init.CRCPolynomial = 7;
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74 HAL_SPI_Init(&hspi3);
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75 }
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76
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77 void MX_SPI3_DeInit(void) {
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78 HAL_SPI_DeInit(&hspi3);
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79 }
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80
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81 uint8_t SPI3_ButtonAdjust(uint8_t *arrayInput, uint8_t *arrayOutput) {
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82 HAL_StatusTypeDef status;
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83 uint8_t answer[10];
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84 uint8_t rework[10];
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85
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86 rework[0] = 0xFF;
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87 for (int i = 0; i < 3; i++) {
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88 // limiter
89
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89 if (arrayInput[i] == 0xFF)
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90 arrayInput[i] = 0xFE;
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91 if (arrayInput[i] >= 15) {
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92 // copy - ausl�se-schwelle
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93 rework[i + 1] = arrayInput[i];
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94 // wieder-scharf-schalte-schwelle
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95 rework[i + 3 + 1] = arrayInput[i] - 10;
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96 } else if (arrayInput[i] >= 10) {
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97 // copy - ausl�se-schwelle
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98 rework[i + 1] = arrayInput[i];
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99 // wieder-scharf-schalte-schwelle
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100 rework[i + 3 + 1] = arrayInput[i] - 5;
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101 } else {
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102 // copy - ausl�se-schwelle
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103 rework[i + 1] = 7;
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104 // wieder-scharf-schalte-schwelle
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105 rework[i + 3 + 1] = 6;
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106 }
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107 }
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109 status = HAL_OK; /* = 0 */
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110 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_SET);
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111 for (int i = 0; i < 7; i++) {
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112 HAL_Delay(10);
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113 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_RESET);
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114 HAL_Delay(10);
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115 status += HAL_SPI_TransmitReceive(&hspi3, &rework[i], &answer[i], 1,
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116 20);
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117 HAL_Delay(10);
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118 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_SET);
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119 }
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120
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121 if (status == HAL_OK) {
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122 for (int i = 0; i < 3; i++) {
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123 arrayOutput[i] = answer[i + 2]; // first not, return of 0xFF not
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124 }
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125 return 1;
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126 } else
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127
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128 return 0;
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129 }
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130
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131 // SPI5 init function
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132 void MX_SPI1_Init(void) {
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133 hspi1.Instance = SPI1;
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134 hspi1.Init.Mode = SPI_MODE_SLAVE;
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135 hspi1.Init.Direction = SPI_DIRECTION_2LINES;
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136 hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
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137 hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
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138 hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
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139 hspi1.Init.NSS = SPI_NSS_HARD_INPUT; //SPI_NSS_SOFT;
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140 hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128;
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141 hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
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142 hspi1.Init.TIMode = SPI_TIMODE_DISABLED;
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143 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED; //_DISABLED; _ENABLED;
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144 hspi1.Init.CRCPolynomial = 7;
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145 HAL_SPI_Init(&hspi1);
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146 }
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147
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148 void MX_SPI_DeInit(void) {
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149 HAL_SPI_DeInit(&hspi1);
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150 }
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151
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152 void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) {
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153
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154 GPIO_InitTypeDef GPIO_InitStruct;
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155
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156 if (hspi->Instance == SPI1) {
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157 SPIDataRX = 0;
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158 // Peripheral clock enable
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159 __SPI1_CLK_ENABLE();
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160 __GPIOA_CLK_ENABLE();
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161 //SPI1 GPIO Configuration
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162 //PA4 ------> SPI1_CS
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163 //PA5 ------> SPI1_SCK
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164 //PA6 ------> SPI1_MISO
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165 //PA7 ------> SPI1_MOSI
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166
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167 GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7;
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168 // GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
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169 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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170 GPIO_InitStruct.Pull = GPIO_PULLUP;
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171 GPIO_InitStruct.Speed = GPIO_SPEED_FAST; /* Decision is based on errata which recommends FAST for GPIO at 90Mhz */
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172 GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
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173 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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174
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175 //##-3- Configure the DMA streams ##########################################
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176 // Configure the DMA handler for Transmission process
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177 hdma_tx.Instance = DMA2_Stream3;
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178 hdma_tx.Init.Channel = DMA_CHANNEL_3;
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179 hdma_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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180 hdma_tx.Init.PeriphInc = DMA_PINC_DISABLE;
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181 hdma_tx.Init.MemInc = DMA_MINC_ENABLE;
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182 hdma_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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183 hdma_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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184 hdma_tx.Init.Mode = DMA_NORMAL;
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185 hdma_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
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186 hdma_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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187 hdma_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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188 hdma_tx.Init.MemBurst = DMA_MBURST_INC4;
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189 hdma_tx.Init.PeriphBurst = DMA_PBURST_INC4;
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190
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191 HAL_DMA_Init(&hdma_tx);
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192
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193 // Associate the initialized DMA handle to the the SPI handle
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194 __HAL_LINKDMA(hspi, hdmatx, hdma_tx);
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195
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196 // Configure the DMA handler for Transmission process
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197 hdma_rx.Instance = DMA2_Stream0;
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198 hdma_rx.Init.Channel = DMA_CHANNEL_3;
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199 hdma_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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200 hdma_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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201 hdma_rx.Init.MemInc = DMA_MINC_ENABLE;
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202 hdma_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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203 hdma_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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204 hdma_rx.Init.Mode = DMA_NORMAL;
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205 hdma_rx.Init.Priority = DMA_PRIORITY_HIGH;
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206 hdma_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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207 hdma_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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208 hdma_rx.Init.MemBurst = DMA_MBURST_INC4;
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209 hdma_rx.Init.PeriphBurst = DMA_PBURST_INC4;
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210
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211 HAL_DMA_Init(&hdma_rx);
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212
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213 // Associate the initialized DMA handle to the the SPI handle
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214 __HAL_LINKDMA(hspi, hdmarx, hdma_rx);
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215
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216 //##-4- Configure the NVIC for DMA #########################################
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217 //NVIC configuration for DMA transfer complete interrupt (SPI3_RX)
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218 HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 1, 0);
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219 HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
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220
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221 // NVIC configuration for DMA transfer complete interrupt (SPI1_TX)
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222 HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 1, 1);
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223 HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
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224 } else if (hspi->Instance == SPI3) {
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225 __GPIOC_CLK_ENABLE();
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226 __SPI3_CLK_ENABLE();
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227
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228 //SPI1 GPIO Configuration
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229 //PC10 ------> SPI3_SCK
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230 //PC11 ------> SPI3_MISO
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231 //PC12 ------> SPI3_MOSI
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232 //PA15 ------> SPI3_NSS (official)
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233 //PC9 ------> SPI3_NSS (hw)
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234
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235 GPIO_InitStruct.Pin = GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12;
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236 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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237 GPIO_InitStruct.Pull = GPIO_PULLUP;
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238 GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
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239 GPIO_InitStruct.Alternate = GPIO_AF6_SPI3;
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240 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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241
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242 GPIO_InitStruct.Pin = GPIO_PIN_9;
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243 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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244 GPIO_InitStruct.Pull = GPIO_PULLUP;
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245 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
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246 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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247
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248 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_SET);
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249 }
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250 }
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251
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252 void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) {
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253 if (hspi->Instance == SPI1) {
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254 __SPI1_FORCE_RESET();
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255 __SPI1_RELEASE_RESET();
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256
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257 //SPI1 GPIO Configuration
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258 //PA5 ------> SPI1_SCK
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259 //PA6 ------> SPI1_MISO
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260 //PA7 ------> SPI1_MOSI
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261
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262 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7);
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263
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264 HAL_DMA_DeInit(&hdma_tx);
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265 HAL_DMA_DeInit(&hdma_rx);
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266
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267 HAL_NVIC_DisableIRQ(DMA2_Stream3_IRQn);
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268 HAL_NVIC_DisableIRQ(DMA2_Stream0_IRQn);
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269 } else if (hspi->Instance == SPI3) {
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270 __SPI3_FORCE_RESET();
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271 __SPI3_RELEASE_RESET();
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272
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273 //SPI1 GPIO Configuration
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274 //PC10 ------> SPI3_SCK
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275 //PC11 ------> SPI3_MISO
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276 //PC12 ------> SPI3_MOSI
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277 //PA15 ------> SPI3_NSS (official)
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278 //PC9 ------> SPI3_NSS (hw)
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279 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12);
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280 }
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281 }
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282
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283 void SPI_synchronize_with_Master(void) {
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284 #ifdef USE_OLD_SYNC_METHOD
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285 GPIO_InitTypeDef GPIO_InitStruct;
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286 //
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287 __GPIOA_CLK_ENABLE();
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288 /**SPI1 GPIO Configuration
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289 PA5 ------> SPI1_SCK
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290 */
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291 GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5;
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292 GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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293 GPIO_InitStruct.Pull = GPIO_PULLUP;
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294 GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
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295 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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296 //
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297 HAL_Delay(10);
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298 while (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_4) == 0);
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299 HAL_Delay(10);
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300 while (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_5) == 1);
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301 HAL_Delay(50);
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302 #endif
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303 }
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304
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305 void SPI_Start_single_TxRx_with_Master(void) {
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306 uint8_t * pOutput;
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307 HAL_StatusTypeDef retval;
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308
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309 if (global.dataSendToSlave.getDeviceDataNow) {
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310 global.dataSendToSlave.getDeviceDataNow = 0;
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311 pOutput = (uint8_t*) &(global.deviceDataSendToMaster);
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312 } else {
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313 pOutput = (uint8_t*) &(global.dataSendToMaster);
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314 }
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315 retval = HAL_SPI_TransmitReceive_DMA(&hspi1, pOutput,(uint8_t*) &(global.dataSendToSlave), EXCHANGE_BUFFERSIZE);
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316 if ( retval!= HAL_OK) {
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317 SPI_Error_Handler();
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318 }
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319 }
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320
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321 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi) {
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322 /* restart SPI */
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323 if (hspi == &hspi1)
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324 {
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325 HardSyncToSPI();
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326 SPIDataRX = 1;
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327
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328 global.check_sync_not_running = 0;
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329 /* stop data exchange? */
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330 if (global.mode == MODE_SHUTDOWN) {
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331 global.mode = MODE_SLEEP;
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332 global.dataSendToSlavePending = 0;
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333 global.dataSendToSlaveIsValid = 1;
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334 global.dataSendToSlaveIsNotValidCount = 0;
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335 }
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336 }
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337 }
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338
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339 void SPI_Evaluate_RX_Data()
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340 {
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341 if ((global.mode != MODE_SHUTDOWN) && ( global.mode != MODE_SLEEP) && (SPIDataRX))
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342 {
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343 SPIDataRX = 0;
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344 /* data consistent? */
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345 if (SPI_check_header_and_footer_ok()) {
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346 // GPIO_new_DEBUG_HIGH(); //For debug.
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347 global.dataSendToSlaveIsValid = 1;
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348 global.dataSendToSlaveIsNotValidCount = 0;
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349 /* use sequence index from master to indicate correct reception */
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350 if(global.dataSendToSlave.header.checkCode[SPI_HEADER_INDEX_SLAVE] > 0x7F)
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351 {
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352 HAL_SPI_Abort_IT(&hspi1);
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353 global.dataSendToMaster.header.checkCode[SPI_HEADER_INDEX_SLAVE] = global.dataSendToSlave.header.checkCode[SPI_HEADER_INDEX_MASTER];
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354 global.dataSendToSlave.header.checkCode[SPI_HEADER_INDEX_SLAVE] = 0;
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355 }
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356 else
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357 {
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358 global.dataSendToMaster.header.checkCode[SPI_HEADER_INDEX_SLAVE] = global.dataSendToSlave.header.checkCode[SPI_HEADER_INDEX_MASTER];
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359 }
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360 } else {
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361 // GPIO_new_DEBUG_LOW(); //For debug.
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362 global.dataSendToSlaveIsValid = 0;
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363 global.dataSendToSlaveIsNotValidCount++;
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364 if(DataEX_check_header_and_footer_shifted())
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365 {
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366 if (global.dataSendToSlaveIsNotValidCount == 1)
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367 {
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368 HAL_SPI_Abort_IT(&hspi1); /* reset DMA only once */
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369 }
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370 }
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371 }
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372
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373 global.dataSendToMaster.power_on_reset = 0;
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374 global.deviceDataSendToMaster.power_on_reset = 0;
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375
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376 //TODO:REMOVE
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377 // if ( !global.dataSendToSlaveStopEval ) {
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378 // scheduleSpecial_Evaluate_DataSendToSlave();
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379 // }
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380 scheduleSpecial_Evaluate_DataSendToSlave();
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381
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382 SPI_Start_single_TxRx_with_Master(); //Send data always.
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383 }
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384 }
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385
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386 static uint8_t SPI_check_header_and_footer_ok(void) {
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387 if (global.dataSendToSlave.header.checkCode[0] != 0xBB)
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388 return 0;
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389 #ifdef USE_OLD_HEADER_FORMAT
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390 if (global.dataSendToSlave.header.checkCode[1] != 0x01)
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391 return 0;
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392 if (global.dataSendToSlave.header.checkCode[2] != 0x01)
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393 return 0;
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394 #endif
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395 if (global.dataSendToSlave.header.checkCode[3] != 0xBB)
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396 return 0;
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397 if (global.dataSendToSlave.footer.checkCode[0] != 0xF4)
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398 return 0;
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399 if (global.dataSendToSlave.footer.checkCode[1] != 0xF3)
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400 return 0;
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401 if (global.dataSendToSlave.footer.checkCode[2] != 0xF2)
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402 return 0;
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403 if (global.dataSendToSlave.footer.checkCode[3] != 0xF1)
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404 return 0;
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405
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406 return 1;
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407 }
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408
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409
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410 /* Check if there is an empty frame providec by RTE (all 0) or even no data provided by RTE (all 0xFF)
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411 * If that is not the case the DMA is somehow not in sync
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412 */
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413 uint8_t DataEX_check_header_and_footer_shifted()
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414 {
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415 uint8_t ret = 1;
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416 if((global.dataSendToSlave.footer.checkCode[0] == 0x00)
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417 && (global.dataSendToSlave.footer.checkCode[1] == 0x00)
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418 && (global.dataSendToSlave.footer.checkCode[2] == 0x00)
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419 && (global.dataSendToSlave.footer.checkCode[3] == 0x00)) { ret = 0; }
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420
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421 if((global.dataSendToSlave.footer.checkCode[0] == 0xff)
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422 && (global.dataSendToSlave.footer.checkCode[1] == 0xff)
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423 && (global.dataSendToSlave.footer.checkCode[2] == 0xff)
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424 && (global.dataSendToSlave.footer.checkCode[3] == 0xff)) { ret = 0; }
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425
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426 return ret;
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427 }
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428
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429 static void SPI_Error_Handler(void) {
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430 //The device is locks. Hard to recover.
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431 // while(1)
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432 // {
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433 // }
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434 }
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435
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436 /**
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437 * @}
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438 */
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439
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440 /**
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441 * @}
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442 */
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443
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444 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/