Mercurial > public > ostc4
annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_nor.h @ 479:4b9427ae0a65 Improve_Button_Sleep
Bugfix unintended else condition:
Most likely copy past error in preparation of last commit...
author | ideenmodellierer |
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date | Wed, 13 May 2020 21:27:30 +0200 |
parents | c78bcbd5deda |
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rev | line source |
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_hal_nor.h |
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4 * @author MCD Application Team |
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5 * @brief Header file of NOR HAL module. |
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6 ****************************************************************************** |
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7 * @attention |
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8 * |
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9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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10 * |
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11 * Redistribution and use in source and binary forms, with or without modification, |
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12 * are permitted provided that the following conditions are met: |
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13 * 1. Redistributions of source code must retain the above copyright notice, |
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14 * this list of conditions and the following disclaimer. |
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15 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 * this list of conditions and the following disclaimer in the documentation |
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17 * and/or other materials provided with the distribution. |
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 * may be used to endorse or promote products derived from this software |
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20 * without specific prior written permission. |
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21 * |
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 * |
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33 ****************************************************************************** |
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34 */ |
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35 |
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36 /* Define to prevent recursive inclusion -------------------------------------*/ |
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37 #ifndef __STM32F4xx_HAL_NOR_H |
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38 #define __STM32F4xx_HAL_NOR_H |
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39 |
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40 #ifdef __cplusplus |
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41 extern "C" { |
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42 #endif |
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43 |
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44 /* Includes ------------------------------------------------------------------*/ |
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45 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\ |
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46 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx) |
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47 #include "stm32f4xx_ll_fsmc.h" |
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48 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx || STM32F423xx */ |
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49 |
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50 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
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51 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) |
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52 #include "stm32f4xx_ll_fmc.h" |
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53 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ |
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54 |
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55 /** @addtogroup STM32F4xx_HAL_Driver |
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56 * @{ |
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57 */ |
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58 |
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59 /** @addtogroup NOR |
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60 * @{ |
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61 */ |
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62 |
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63 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ |
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64 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
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65 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\ |
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66 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx) |
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67 |
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68 /* Exported typedef ----------------------------------------------------------*/ |
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69 /** @defgroup NOR_Exported_Types NOR Exported Types |
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70 * @{ |
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71 */ |
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72 |
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73 /** |
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74 * @brief HAL SRAM State structures definition |
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75 */ |
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76 typedef enum |
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77 { |
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78 HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */ |
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79 HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */ |
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80 HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */ |
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81 HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */ |
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82 HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */ |
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83 }HAL_NOR_StateTypeDef; |
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84 |
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85 /** |
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86 * @brief FMC NOR Status typedef |
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87 */ |
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88 typedef enum |
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89 { |
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90 HAL_NOR_STATUS_SUCCESS = 0U, |
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91 HAL_NOR_STATUS_ONGOING, |
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92 HAL_NOR_STATUS_ERROR, |
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93 HAL_NOR_STATUS_TIMEOUT |
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94 }HAL_NOR_StatusTypeDef; |
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95 |
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96 /** |
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97 * @brief FMC NOR ID typedef |
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98 */ |
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99 typedef struct |
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100 { |
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101 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */ |
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102 |
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103 uint16_t Device_Code1; |
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104 |
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105 uint16_t Device_Code2; |
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106 |
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107 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory. |
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108 These codes can be accessed by performing read operations with specific |
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109 control signals and addresses set.They can also be accessed by issuing |
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110 an Auto Select command */ |
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111 }NOR_IDTypeDef; |
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112 |
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113 /** |
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114 * @brief FMC NOR CFI typedef |
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115 */ |
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116 typedef struct |
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117 { |
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118 /*!< Defines the information stored in the memory's Common flash interface |
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119 which contains a description of various electrical and timing parameters, |
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120 density information and functions supported by the memory */ |
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121 |
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122 uint16_t CFI_1; |
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123 |
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124 uint16_t CFI_2; |
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125 |
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126 uint16_t CFI_3; |
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127 |
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128 uint16_t CFI_4; |
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129 }NOR_CFITypeDef; |
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130 |
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131 /** |
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132 * @brief NOR handle Structure definition |
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133 */ |
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134 typedef struct |
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135 { |
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136 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ |
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137 |
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138 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ |
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139 |
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140 FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */ |
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141 |
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142 HAL_LockTypeDef Lock; /*!< NOR locking object */ |
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143 |
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144 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */ |
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145 |
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146 }NOR_HandleTypeDef; |
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147 /** |
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148 * @} |
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149 */ |
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150 |
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151 /* Exported constants --------------------------------------------------------*/ |
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152 /* Exported macros ------------------------------------------------------------*/ |
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153 /** @defgroup NOR_Exported_Macros NOR Exported Macros |
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154 * @{ |
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155 */ |
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156 /** @brief Reset NOR handle state |
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157 * @param __HANDLE__ specifies the NOR handle. |
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158 * @retval None |
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159 */ |
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160 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET) |
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161 /** |
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162 * @} |
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163 */ |
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164 |
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165 /* Exported functions --------------------------------------------------------*/ |
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166 /** @addtogroup NOR_Exported_Functions |
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167 * @{ |
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168 */ |
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169 |
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170 /** @addtogroup NOR_Exported_Functions_Group1 |
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171 * @{ |
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172 */ |
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173 /* Initialization/de-initialization functions ********************************/ |
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174 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming); |
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175 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor); |
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176 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor); |
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177 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor); |
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178 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout); |
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179 /** |
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180 * @} |
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181 */ |
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182 |
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183 /** @addtogroup NOR_Exported_Functions_Group2 |
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184 * @{ |
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185 */ |
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186 /* I/O operation functions ***************************************************/ |
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187 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID); |
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188 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor); |
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189 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); |
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190 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); |
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191 |
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192 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize); |
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193 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize); |
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194 |
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195 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address); |
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196 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address); |
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197 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI); |
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198 /** |
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199 * @} |
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200 */ |
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201 |
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202 /** @addtogroup NOR_Exported_Functions_Group3 |
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203 * @{ |
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204 */ |
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205 /* NOR Control functions *****************************************************/ |
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206 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor); |
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207 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor); |
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208 /** |
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209 * @} |
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210 */ |
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211 |
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212 /** @addtogroup NOR_Exported_Functions_Group4 |
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213 * @{ |
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214 */ |
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215 /* NOR State functions ********************************************************/ |
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216 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor); |
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217 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout); |
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218 /** |
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219 * @} |
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220 */ |
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221 |
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222 /** |
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223 * @} |
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224 */ |
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225 |
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226 /* Private types -------------------------------------------------------------*/ |
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227 /* Private variables ---------------------------------------------------------*/ |
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228 /* Private constants ---------------------------------------------------------*/ |
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229 /** @defgroup NOR_Private_Constants NOR Private Constants |
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230 * @{ |
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231 */ |
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232 /* NOR device IDs addresses */ |
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233 #define MC_ADDRESS ((uint16_t)0x0000) |
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234 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001) |
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235 #define DEVICE_CODE2_ADDR ((uint16_t)0x000E) |
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236 #define DEVICE_CODE3_ADDR ((uint16_t)0x000F) |
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237 |
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238 /* NOR CFI IDs addresses */ |
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239 #define CFI1_ADDRESS ((uint16_t)0x0061) |
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240 #define CFI2_ADDRESS ((uint16_t)0x0062) |
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241 #define CFI3_ADDRESS ((uint16_t)0x0063) |
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242 #define CFI4_ADDRESS ((uint16_t)0x0064) |
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243 |
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244 /* NOR operation wait timeout */ |
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245 #define NOR_TMEOUT ((uint16_t)0xFFFF) |
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246 |
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247 /* NOR memory data width */ |
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248 #define NOR_MEMORY_8B ((uint8_t)0x00) |
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249 #define NOR_MEMORY_16B ((uint8_t)0x01) |
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250 |
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251 /* NOR memory device read/write start address */ |
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252 #define NOR_MEMORY_ADRESS1 0x60000000U |
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253 #define NOR_MEMORY_ADRESS2 0x64000000U |
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254 #define NOR_MEMORY_ADRESS3 0x68000000U |
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255 #define NOR_MEMORY_ADRESS4 0x6C000000U |
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256 /** |
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257 * @} |
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258 */ |
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259 |
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260 /* Private macros ------------------------------------------------------------*/ |
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261 /** @defgroup NOR_Private_Macros NOR Private Macros |
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262 * @{ |
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263 */ |
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264 /** |
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265 * @brief NOR memory address shifting. |
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266 * @param __NOR_ADDRESS__ NOR base address |
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267 * @param NOR_MEMORY_WIDTH NOR memory width |
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268 * @param ADDRESS NOR memory address |
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269 * @retval NOR shifted address value |
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270 */ |
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271 #define NOR_ADDR_SHIFT(__NOR_ADDRESS__, NOR_MEMORY_WIDTH, ADDRESS) (uint32_t)(((NOR_MEMORY_WIDTH) == NOR_MEMORY_16B)? ((uint32_t)((__NOR_ADDRESS__) + (2U * (ADDRESS)))):\ |
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272 ((uint32_t)((__NOR_ADDRESS__) + (ADDRESS)))) |
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273 |
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274 /** |
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275 * @brief NOR memory write data to specified address. |
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276 * @param ADDRESS NOR memory address |
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277 * @param DATA Data to write |
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278 * @retval None |
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279 */ |
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280 #define NOR_WRITE(ADDRESS, DATA) (*(__IO uint16_t *)((uint32_t)(ADDRESS)) = (DATA)) |
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281 |
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282 /** |
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283 * @} |
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284 */ |
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285 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\ |
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286 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\ |
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287 STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\ |
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288 STM32F412Vx || STM32F412Rx || STM32F413xx || STM32F423xx */ |
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289 /** |
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290 * @} |
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291 */ |
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292 |
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293 /** |
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294 * @} |
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295 */ |
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296 |
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297 #ifdef __cplusplus |
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298 } |
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299 #endif |
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300 |
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301 #endif /* __STM32F4xx_HAL_NOR_H */ |
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302 |
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303 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |