38
|
1 /**
|
|
2 ******************************************************************************
|
|
3 * @file stm32f4xx_hal_flash_ex.h
|
|
4 * @author MCD Application Team
|
|
5 * @version V1.2.0
|
|
6 * @date 26-December-2014
|
|
7 * @brief Header file of FLASH HAL Extension module.
|
|
8 ******************************************************************************
|
|
9 * @attention
|
|
10 *
|
|
11 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
|
12 *
|
|
13 * Redistribution and use in source and binary forms, with or without modification,
|
|
14 * are permitted provided that the following conditions are met:
|
|
15 * 1. Redistributions of source code must retain the above copyright notice,
|
|
16 * this list of conditions and the following disclaimer.
|
|
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
18 * this list of conditions and the following disclaimer in the documentation
|
|
19 * and/or other materials provided with the distribution.
|
|
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
21 * may be used to endorse or promote products derived from this software
|
|
22 * without specific prior written permission.
|
|
23 *
|
|
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
34 *
|
|
35 ******************************************************************************
|
|
36 */
|
|
37
|
|
38 /* Define to prevent recursive inclusion -------------------------------------*/
|
|
39 #ifndef __STM32F4xx_HAL_FLASH_EX_H
|
|
40 #define __STM32F4xx_HAL_FLASH_EX_H
|
|
41
|
|
42 #ifdef __cplusplus
|
|
43 extern "C" {
|
|
44 #endif
|
|
45
|
|
46 /* Includes ------------------------------------------------------------------*/
|
|
47 #include "stm32f4xx_hal_def.h"
|
|
48
|
|
49 /** @addtogroup STM32F4xx_HAL_Driver
|
|
50 * @{
|
|
51 */
|
|
52
|
|
53 /** @addtogroup FLASHEx
|
|
54 * @{
|
|
55 */
|
|
56
|
|
57 /* Exported types ------------------------------------------------------------*/
|
|
58 /** @defgroup FLASHEx_Exported_Types FLASH Exported Types
|
|
59 * @{
|
|
60 */
|
|
61
|
|
62 /**
|
|
63 * @brief FLASH Erase structure definition
|
|
64 */
|
|
65 typedef struct
|
|
66 {
|
|
67 uint32_t TypeErase; /*!< Mass erase or sector Erase.
|
|
68 This parameter can be a value of @ref FLASHEx_Type_Erase */
|
|
69
|
|
70 uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled.
|
|
71 This parameter must be a value of @ref FLASHEx_Banks */
|
|
72
|
|
73 uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled
|
|
74 This parameter must be a value of @ref FLASHEx_Sectors */
|
|
75
|
|
76 uint32_t NbSectors; /*!< Number of sectors to be erased.
|
|
77 This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/
|
|
78
|
|
79 uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism
|
|
80 This parameter must be a value of @ref FLASHEx_Voltage_Range */
|
|
81
|
|
82 } FLASH_EraseInitTypeDef;
|
|
83
|
|
84 /**
|
|
85 * @brief FLASH Option Bytes Program structure definition
|
|
86 */
|
|
87 typedef struct
|
|
88 {
|
|
89 uint32_t OptionType; /*!< Option byte to be configured.
|
|
90 This parameter can be a value of @ref FLASHEx_Option_Type */
|
|
91
|
|
92 uint32_t WRPState; /*!< Write protection activation or deactivation.
|
|
93 This parameter can be a value of @ref FLASHEx_WRP_State */
|
|
94
|
|
95 uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected.
|
|
96 The value of this parameter depend on device used within the same series */
|
|
97
|
|
98 uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors.
|
|
99 This parameter must be a value of @ref FLASHEx_Banks */
|
|
100
|
|
101 uint32_t RDPLevel; /*!< Set the read protection level.
|
|
102 This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */
|
|
103
|
|
104 uint32_t BORLevel; /*!< Set the BOR Level.
|
|
105 This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */
|
|
106
|
|
107 uint8_t USERConfig; /*!< Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. */
|
|
108
|
|
109 } FLASH_OBProgramInitTypeDef;
|
|
110
|
|
111 /**
|
|
112 * @brief FLASH Advanced Option Bytes Program structure definition
|
|
113 */
|
|
114 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
|
|
115 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
116 typedef struct
|
|
117 {
|
|
118 uint32_t OptionType; /*!< Option byte to be configured for extension.
|
|
119 This parameter can be a value of @ref FLASHEx_Advanced_Option_Type */
|
|
120
|
|
121 uint32_t PCROPState; /*!< PCROP activation or deactivation.
|
|
122 This parameter can be a value of @ref FLASHEx_PCROP_State */
|
|
123
|
|
124 #if defined (STM32F401xC) || defined (STM32F401xE) || defined (STM32F411xE)
|
|
125 uint16_t Sectors; /*!< specifies the sector(s) set for PCROP.
|
|
126 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
|
|
127 #endif /* STM32F401xC || STM32F401xE || STM32F411xE */
|
|
128
|
|
129 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
|
|
130 uint32_t Banks; /*!< Select banks for PCROP activation/deactivation of all sectors.
|
|
131 This parameter must be a value of @ref FLASHEx_Banks */
|
|
132
|
|
133 uint16_t SectorsBank1; /*!< Specifies the sector(s) set for PCROP for Bank1.
|
|
134 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
|
|
135
|
|
136 uint16_t SectorsBank2; /*!< Specifies the sector(s) set for PCROP for Bank2.
|
|
137 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
|
|
138
|
|
139 uint8_t BootConfig; /*!< Specifies Option bytes for boot config.
|
|
140 This parameter can be a value of @ref FLASHEx_Dual_Boot */
|
|
141
|
|
142 #endif /*STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
|
143 } FLASH_AdvOBProgramInitTypeDef;
|
|
144 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
|
145 /**
|
|
146 * @}
|
|
147 */
|
|
148
|
|
149 /* Exported constants --------------------------------------------------------*/
|
|
150
|
|
151 /** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants
|
|
152 * @{
|
|
153 */
|
|
154
|
|
155 /** @defgroup FLASHEx_Type_Erase FLASH Type Erase
|
|
156 * @{
|
|
157 */
|
|
158 #define FLASH_TYPEERASE_SECTORS ((uint32_t)0x00) /*!< Sectors erase only */
|
|
159 #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01) /*!< Flash Mass erase activation */
|
|
160 /**
|
|
161 * @}
|
|
162 */
|
|
163
|
|
164 /** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range
|
|
165 * @{
|
|
166 */
|
|
167 #define FLASH_VOLTAGE_RANGE_1 ((uint32_t)0x00) /*!< Device operating range: 1.8V to 2.1V */
|
|
168 #define FLASH_VOLTAGE_RANGE_2 ((uint32_t)0x01) /*!< Device operating range: 2.1V to 2.7V */
|
|
169 #define FLASH_VOLTAGE_RANGE_3 ((uint32_t)0x02) /*!< Device operating range: 2.7V to 3.6V */
|
|
170 #define FLASH_VOLTAGE_RANGE_4 ((uint32_t)0x03) /*!< Device operating range: 2.7V to 3.6V + External Vpp */
|
|
171 /**
|
|
172 * @}
|
|
173 */
|
|
174
|
|
175 /** @defgroup FLASHEx_WRP_State FLASH WRP State
|
|
176 * @{
|
|
177 */
|
|
178 #define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!< Disable the write protection of the desired bank 1 sectors */
|
|
179 #define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!< Enable the write protection of the desired bank 1 sectors */
|
|
180 /**
|
|
181 * @}
|
|
182 */
|
|
183
|
|
184 /** @defgroup FLASHEx_Option_Type FLASH Option Type
|
|
185 * @{
|
|
186 */
|
|
187 #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!< WRP option byte configuration */
|
|
188 #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!< RDP option byte configuration */
|
|
189 #define OPTIONBYTE_USER ((uint32_t)0x04) /*!< USER option byte configuration */
|
|
190 #define OPTIONBYTE_BOR ((uint32_t)0x08) /*!< BOR option byte configuration */
|
|
191 /**
|
|
192 * @}
|
|
193 */
|
|
194
|
|
195 /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection
|
|
196 * @{
|
|
197 */
|
|
198 #define OB_RDP_LEVEL_0 ((uint8_t)0xAA)
|
|
199 #define OB_RDP_LEVEL_1 ((uint8_t)0x55)
|
|
200 /*#define OB_RDP_LEVEL_2 ((uint8_t)0xCC)*/ /*!< Warning: When enabling read protection level 2
|
|
201 it s no more possible to go back to level 1 or 0 */
|
|
202 /**
|
|
203 * @}
|
|
204 */
|
|
205
|
|
206 /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog
|
|
207 * @{
|
|
208 */
|
|
209 #define OB_IWDG_SW ((uint8_t)0x20) /*!< Software IWDG selected */
|
|
210 #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */
|
|
211 /**
|
|
212 * @}
|
|
213 */
|
|
214
|
|
215 /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP
|
|
216 * @{
|
|
217 */
|
|
218 #define OB_STOP_NO_RST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */
|
|
219 #define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */
|
|
220 /**
|
|
221 * @}
|
|
222 */
|
|
223
|
|
224
|
|
225 /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY
|
|
226 * @{
|
|
227 */
|
|
228 #define OB_STDBY_NO_RST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */
|
|
229 #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
|
|
230 /**
|
|
231 * @}
|
|
232 */
|
|
233
|
|
234 /** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level
|
|
235 * @{
|
|
236 */
|
|
237 #define OB_BOR_LEVEL3 ((uint8_t)0x00) /*!< Supply voltage ranges from 2.70 to 3.60 V */
|
|
238 #define OB_BOR_LEVEL2 ((uint8_t)0x04) /*!< Supply voltage ranges from 2.40 to 2.70 V */
|
|
239 #define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< Supply voltage ranges from 2.10 to 2.40 V */
|
|
240 #define OB_BOR_OFF ((uint8_t)0x0C) /*!< Supply voltage ranges from 1.62 to 2.10 V */
|
|
241 /**
|
|
242 * @}
|
|
243 */
|
|
244
|
|
245 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
|
|
246 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
247 /** @defgroup FLASHEx_PCROP_State FLASH PCROP State
|
|
248 * @{
|
|
249 */
|
|
250 #define OB_PCROP_STATE_DISABLE ((uint32_t)0x00) /*!< Disable PCROP */
|
|
251 #define OB_PCROP_STATE_ENABLE ((uint32_t)0x01) /*!< Enable PCROP */
|
|
252 /**
|
|
253 * @}
|
|
254 */
|
|
255 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
|
256
|
|
257 /** @defgroup FLASHEx_Advanced_Option_Type FLASH Advanced Option Type
|
|
258 * @{
|
|
259 */
|
|
260 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
|
|
261 #define OPTIONBYTE_PCROP ((uint32_t)0x01) /*!< PCROP option byte configuration */
|
|
262 #define OPTIONBYTE_BOOTCONFIG ((uint32_t)0x02) /*!< BOOTConfig option byte configuration */
|
|
263 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
|
264
|
|
265 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
266 #define OPTIONBYTE_PCROP ((uint32_t)0x01) /*!<PCROP option byte configuration */
|
|
267 #endif /* STM32F401xC || STM32F401xE || STM32F411xE */
|
|
268 /**
|
|
269 * @}
|
|
270 */
|
|
271
|
|
272 /** @defgroup FLASH_Latency FLASH Latency
|
|
273 * @{
|
|
274 */
|
|
275 /*------------------------------------------- STM32F42xxx/STM32F43xxx------------------------------------------*/
|
|
276 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
277 #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */
|
|
278 #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */
|
|
279 #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */
|
|
280 #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */
|
|
281 #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */
|
|
282 #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */
|
|
283 #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */
|
|
284 #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */
|
|
285 #define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /*!< FLASH Eight Latency cycles */
|
|
286 #define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /*!< FLASH Nine Latency cycles */
|
|
287 #define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH Ten Latency cycles */
|
|
288 #define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH Eleven Latency cycles */
|
|
289 #define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH Twelve Latency cycles */
|
|
290 #define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH Thirteen Latency cycles */
|
|
291 #define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /*!< FLASH Fourteen Latency cycles */
|
|
292 #define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /*!< FLASH Fifteen Latency cycles */
|
|
293 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
294 /*--------------------------------------------------------------------------------------------------------------*/
|
|
295
|
|
296 /*-------------------------- STM32F40xxx/STM32F41xxx/STM32F401xx/STM32F411xx -----------------------------------*/
|
|
297 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
|
|
298 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
299 #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */
|
|
300 #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */
|
|
301 #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */
|
|
302 #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */
|
|
303 #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */
|
|
304 #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */
|
|
305 #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */
|
|
306 #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */
|
|
307 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
|
308 /*--------------------------------------------------------------------------------------------------------------*/
|
|
309
|
|
310 /**
|
|
311 * @}
|
|
312 */
|
|
313
|
|
314
|
|
315 /** @defgroup FLASHEx_Banks FLASH Banks
|
|
316 * @{
|
|
317 */
|
|
318 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
319 #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */
|
|
320 #define FLASH_BANK_2 ((uint32_t)2) /*!< Bank 2 */
|
|
321 #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */
|
|
322 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
323
|
|
324 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
|
|
325 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
326 #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */
|
|
327 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
|
328 /**
|
|
329 * @}
|
|
330 */
|
|
331
|
|
332 /** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit
|
|
333 * @{
|
|
334 */
|
|
335 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
336 #define FLASH_MER_BIT (FLASH_CR_MER1 | FLASH_CR_MER2) /*!< 2 MER bits here to clear */
|
|
337 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
338
|
|
339 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
|
|
340 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
341 #define FLASH_MER_BIT (FLASH_CR_MER) /*!< only 1 MER Bit */
|
|
342 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
|
343 /**
|
|
344 * @}
|
|
345 */
|
|
346
|
|
347 /** @defgroup FLASHEx_Sectors FLASH Sectors
|
|
348 * @{
|
|
349 */
|
|
350 /*------------------------------------------ STM32F42xxx/STM32F43xxx--------------------------------------*/
|
|
351 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
352 #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */
|
|
353 #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */
|
|
354 #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */
|
|
355 #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */
|
|
356 #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */
|
|
357 #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */
|
|
358 #define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */
|
|
359 #define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */
|
|
360 #define FLASH_SECTOR_8 ((uint32_t)8) /*!< Sector Number 8 */
|
|
361 #define FLASH_SECTOR_9 ((uint32_t)9) /*!< Sector Number 9 */
|
|
362 #define FLASH_SECTOR_10 ((uint32_t)10) /*!< Sector Number 10 */
|
|
363 #define FLASH_SECTOR_11 ((uint32_t)11) /*!< Sector Number 11 */
|
|
364 #define FLASH_SECTOR_12 ((uint32_t)12) /*!< Sector Number 12 */
|
|
365 #define FLASH_SECTOR_13 ((uint32_t)13) /*!< Sector Number 13 */
|
|
366 #define FLASH_SECTOR_14 ((uint32_t)14) /*!< Sector Number 14 */
|
|
367 #define FLASH_SECTOR_15 ((uint32_t)15) /*!< Sector Number 15 */
|
|
368 #define FLASH_SECTOR_16 ((uint32_t)16) /*!< Sector Number 16 */
|
|
369 #define FLASH_SECTOR_17 ((uint32_t)17) /*!< Sector Number 17 */
|
|
370 #define FLASH_SECTOR_18 ((uint32_t)18) /*!< Sector Number 18 */
|
|
371 #define FLASH_SECTOR_19 ((uint32_t)19) /*!< Sector Number 19 */
|
|
372 #define FLASH_SECTOR_20 ((uint32_t)20) /*!< Sector Number 20 */
|
|
373 #define FLASH_SECTOR_21 ((uint32_t)21) /*!< Sector Number 21 */
|
|
374 #define FLASH_SECTOR_22 ((uint32_t)22) /*!< Sector Number 22 */
|
|
375 #define FLASH_SECTOR_23 ((uint32_t)23) /*!< Sector Number 23 */
|
|
376 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
377 /*-----------------------------------------------------------------------------------------------------*/
|
|
378
|
|
379 /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/
|
|
380 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
|
|
381 #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */
|
|
382 #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */
|
|
383 #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */
|
|
384 #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */
|
|
385 #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */
|
|
386 #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */
|
|
387 #define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */
|
|
388 #define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */
|
|
389 #define FLASH_SECTOR_8 ((uint32_t)8) /*!< Sector Number 8 */
|
|
390 #define FLASH_SECTOR_9 ((uint32_t)9) /*!< Sector Number 9 */
|
|
391 #define FLASH_SECTOR_10 ((uint32_t)10) /*!< Sector Number 10 */
|
|
392 #define FLASH_SECTOR_11 ((uint32_t)11) /*!< Sector Number 11 */
|
|
393 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
|
|
394 /*-----------------------------------------------------------------------------------------------------*/
|
|
395
|
|
396 /*--------------------------------------------- STM32F401xC -------------------------------------------*/
|
|
397 #if defined(STM32F401xC)
|
|
398 #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */
|
|
399 #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */
|
|
400 #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */
|
|
401 #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */
|
|
402 #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */
|
|
403 #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */
|
|
404 #endif /* STM32F401xC */
|
|
405 /*-----------------------------------------------------------------------------------------------------*/
|
|
406
|
|
407 /*--------------------------------------- STM32F401xE/STM32F411xE -------------------------------------*/
|
|
408 #if defined(STM32F401xE) || defined(STM32F411xE)
|
|
409 #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */
|
|
410 #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */
|
|
411 #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */
|
|
412 #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */
|
|
413 #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */
|
|
414 #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */
|
|
415 #define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */
|
|
416 #define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */
|
|
417 #endif /* STM32F401xE || STM32F411xE */
|
|
418 /*-----------------------------------------------------------------------------------------------------*/
|
|
419
|
|
420 /**
|
|
421 * @}
|
|
422 */
|
|
423
|
|
424 /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection
|
|
425 * @{
|
|
426 */
|
|
427 /*----------------------------------------- STM32F42xxx/STM32F43xxx-------------------------------------*/
|
|
428 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
429 #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
|
|
430 #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
|
|
431 #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
|
|
432 #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
|
|
433 #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
|
|
434 #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */
|
|
435 #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */
|
|
436 #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */
|
|
437 #define OB_WRP_SECTOR_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */
|
|
438 #define OB_WRP_SECTOR_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */
|
|
439 #define OB_WRP_SECTOR_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */
|
|
440 #define OB_WRP_SECTOR_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */
|
|
441 #define OB_WRP_SECTOR_12 ((uint32_t)0x00000001 << 12) /*!< Write protection of Sector12 */
|
|
442 #define OB_WRP_SECTOR_13 ((uint32_t)0x00000002 << 12) /*!< Write protection of Sector13 */
|
|
443 #define OB_WRP_SECTOR_14 ((uint32_t)0x00000004 << 12) /*!< Write protection of Sector14 */
|
|
444 #define OB_WRP_SECTOR_15 ((uint32_t)0x00000008 << 12) /*!< Write protection of Sector15 */
|
|
445 #define OB_WRP_SECTOR_16 ((uint32_t)0x00000010 << 12) /*!< Write protection of Sector16 */
|
|
446 #define OB_WRP_SECTOR_17 ((uint32_t)0x00000020 << 12) /*!< Write protection of Sector17 */
|
|
447 #define OB_WRP_SECTOR_18 ((uint32_t)0x00000040 << 12) /*!< Write protection of Sector18 */
|
|
448 #define OB_WRP_SECTOR_19 ((uint32_t)0x00000080 << 12) /*!< Write protection of Sector19 */
|
|
449 #define OB_WRP_SECTOR_20 ((uint32_t)0x00000100 << 12) /*!< Write protection of Sector20 */
|
|
450 #define OB_WRP_SECTOR_21 ((uint32_t)0x00000200 << 12) /*!< Write protection of Sector21 */
|
|
451 #define OB_WRP_SECTOR_22 ((uint32_t)0x00000400 << 12) /*!< Write protection of Sector22 */
|
|
452 #define OB_WRP_SECTOR_23 ((uint32_t)0x00000800 << 12) /*!< Write protection of Sector23 */
|
|
453 #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF << 12) /*!< Write protection of all Sectors */
|
|
454 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
455 /*-----------------------------------------------------------------------------------------------------*/
|
|
456
|
|
457 /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/
|
|
458 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
|
|
459 #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
|
|
460 #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
|
|
461 #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
|
|
462 #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
|
|
463 #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
|
|
464 #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */
|
|
465 #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */
|
|
466 #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */
|
|
467 #define OB_WRP_SECTOR_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */
|
|
468 #define OB_WRP_SECTOR_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */
|
|
469 #define OB_WRP_SECTOR_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */
|
|
470 #define OB_WRP_SECTOR_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */
|
|
471 #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */
|
|
472 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
|
|
473 /*-----------------------------------------------------------------------------------------------------*/
|
|
474
|
|
475 /*--------------------------------------------- STM32F401xC -------------------------------------------*/
|
|
476 #if defined(STM32F401xC)
|
|
477 #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
|
|
478 #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
|
|
479 #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
|
|
480 #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
|
|
481 #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
|
|
482 #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */
|
|
483 #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */
|
|
484 #endif /* STM32F401xC */
|
|
485 /*-----------------------------------------------------------------------------------------------------*/
|
|
486
|
|
487 /*--------------------------------------- STM32F401xE/STM32F411xE -------------------------------------*/
|
|
488 #if defined(STM32F401xE) || defined(STM32F411xE)
|
|
489 #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
|
|
490 #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
|
|
491 #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
|
|
492 #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
|
|
493 #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
|
|
494 #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */
|
|
495 #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */
|
|
496 #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */
|
|
497 #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */
|
|
498 #endif /* STM32F401xE || STM32F411xE */
|
|
499 /*-----------------------------------------------------------------------------------------------------*/
|
|
500 /**
|
|
501 * @}
|
|
502 */
|
|
503
|
|
504 /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection FLASH Option Bytes PC ReadWrite Protection
|
|
505 * @{
|
|
506 */
|
|
507 /*----------------------------------------- STM32F42xxx/STM32F43xxx-------------------------------------*/
|
|
508 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
509 #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */
|
|
510 #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */
|
|
511 #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */
|
|
512 #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */
|
|
513 #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */
|
|
514 #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */
|
|
515 #define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */
|
|
516 #define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */
|
|
517 #define OB_PCROP_SECTOR_8 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector8 */
|
|
518 #define OB_PCROP_SECTOR_9 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector9 */
|
|
519 #define OB_PCROP_SECTOR_10 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector10 */
|
|
520 #define OB_PCROP_SECTOR_11 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector11 */
|
|
521 #define OB_PCROP_SECTOR_12 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector12 */
|
|
522 #define OB_PCROP_SECTOR_13 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector13 */
|
|
523 #define OB_PCROP_SECTOR_14 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector14 */
|
|
524 #define OB_PCROP_SECTOR_15 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector15 */
|
|
525 #define OB_PCROP_SECTOR_16 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector16 */
|
|
526 #define OB_PCROP_SECTOR_17 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector17 */
|
|
527 #define OB_PCROP_SECTOR_18 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector18 */
|
|
528 #define OB_PCROP_SECTOR_19 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector19 */
|
|
529 #define OB_PCROP_SECTOR_20 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector20 */
|
|
530 #define OB_PCROP_SECTOR_21 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector21 */
|
|
531 #define OB_PCROP_SECTOR_22 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector22 */
|
|
532 #define OB_PCROP_SECTOR_23 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector23 */
|
|
533 #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */
|
|
534 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
535 /*-----------------------------------------------------------------------------------------------------*/
|
|
536
|
|
537 /*--------------------------------------------- STM32F401xC -------------------------------------------*/
|
|
538 #if defined(STM32F401xC)
|
|
539 #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */
|
|
540 #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */
|
|
541 #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */
|
|
542 #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */
|
|
543 #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */
|
|
544 #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */
|
|
545 #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */
|
|
546 #endif /* STM32F401xC */
|
|
547 /*-----------------------------------------------------------------------------------------------------*/
|
|
548
|
|
549 /*--------------------------------------- STM32F401xE/STM32F411xE -------------------------------------*/
|
|
550 #if defined(STM32F401xE) || defined(STM32F411xE)
|
|
551 #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */
|
|
552 #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */
|
|
553 #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */
|
|
554 #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */
|
|
555 #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */
|
|
556 #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */
|
|
557 #define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */
|
|
558 #define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */
|
|
559 #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */
|
|
560 #endif /* STM32F401xE || STM32F411xE */
|
|
561 /*-----------------------------------------------------------------------------------------------------*/
|
|
562
|
|
563 /**
|
|
564 * @}
|
|
565 */
|
|
566
|
|
567 /** @defgroup FLASHEx_Dual_Boot FLASH Dual Boot
|
|
568 * @{
|
|
569 */
|
|
570 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
571 #define OB_DUAL_BOOT_ENABLE ((uint8_t)0x10) /*!< Dual Bank Boot Enable */
|
|
572 #define OB_DUAL_BOOT_DISABLE ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */
|
|
573 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
574 /**
|
|
575 * @}
|
|
576 */
|
|
577
|
|
578 /** @defgroup FLASHEx_Selection_Protection_Mode FLASH Selection Protection Mode
|
|
579 * @{
|
|
580 */
|
|
581 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
|
|
582 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
583 #define OB_PCROP_DESELECTED ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */
|
|
584 #define OB_PCROP_SELECTED ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */
|
|
585 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
|
586 /**
|
|
587 * @}
|
|
588 */
|
|
589
|
|
590 /**
|
|
591 * @}
|
|
592 */
|
|
593
|
|
594 /* Exported macro ------------------------------------------------------------*/
|
|
595
|
|
596 /* Exported functions --------------------------------------------------------*/
|
|
597 /** @addtogroup FLASHEx_Exported_Functions
|
|
598 * @{
|
|
599 */
|
|
600
|
|
601 /** @addtogroup FLASHEx_Exported_Functions_Group1
|
|
602 * @{
|
|
603 */
|
|
604 /* Extension Program operation functions *************************************/
|
|
605 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError);
|
|
606 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
|
|
607 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
|
|
608 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
|
|
609
|
|
610 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
|
|
611 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
612 HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
|
|
613 void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
|
|
614 HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void);
|
|
615 HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void);
|
|
616 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
|
617
|
|
618 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
619 uint16_t HAL_FLASHEx_OB_GetBank2WRP(void);
|
|
620 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
621 /**
|
|
622 * @}
|
|
623 */
|
|
624
|
|
625 /**
|
|
626 * @}
|
|
627 */
|
|
628 /* Private types -------------------------------------------------------------*/
|
|
629 /* Private variables ---------------------------------------------------------*/
|
|
630 /* Private constants ---------------------------------------------------------*/
|
|
631 /** @defgroup FLASHEx_Private_Constants FLASH Private Constants
|
|
632 * @{
|
|
633 */
|
|
634 /*--------------------------------------- STM32F42xxx/STM32F43xxx--------------------------------------*/
|
|
635 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
636 #define FLASH_SECTOR_TOTAL 24
|
|
637 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
638
|
|
639 /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/
|
|
640 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
|
|
641 #define FLASH_SECTOR_TOTAL 12
|
|
642 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
|
|
643
|
|
644 /*--------------------------------------------- STM32F401xC -------------------------------------------*/
|
|
645 #if defined(STM32F401xC)
|
|
646 #define FLASH_SECTOR_TOTAL 6
|
|
647 #endif /* STM32F401xC */
|
|
648
|
|
649 /*--------------------------------------- STM32F401xE/STM32F411xE -------------------------------------*/
|
|
650 #if defined(STM32F401xE) || defined(STM32F411xE)
|
|
651 #define FLASH_SECTOR_TOTAL 8
|
|
652 #endif /* STM32F401xE || STM32F411xE */
|
|
653
|
|
654 /**
|
|
655 * @brief OPTCR1 register byte 2 (Bits[23:16]) base address
|
|
656 */
|
|
657 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
658 #define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A)
|
|
659 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
660
|
|
661 /**
|
|
662 * @}
|
|
663 */
|
|
664
|
|
665 /* Private macros ------------------------------------------------------------*/
|
|
666 /** @defgroup FLASHEx_Private_Macros FLASH Private Macros
|
|
667 * @{
|
|
668 */
|
|
669
|
|
670 /** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters
|
|
671 * @{
|
|
672 */
|
|
673
|
|
674 #define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \
|
|
675 ((VALUE) == FLASH_TYPEERASE_MASSERASE))
|
|
676
|
|
677 #define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) || \
|
|
678 ((RANGE) == FLASH_VOLTAGE_RANGE_2) || \
|
|
679 ((RANGE) == FLASH_VOLTAGE_RANGE_3) || \
|
|
680 ((RANGE) == FLASH_VOLTAGE_RANGE_4))
|
|
681
|
|
682 #define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \
|
|
683 ((VALUE) == OB_WRPSTATE_ENABLE))
|
|
684
|
|
685 #define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR)))
|
|
686
|
|
687 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\
|
|
688 ((LEVEL) == OB_RDP_LEVEL_1))/*||\
|
|
689 ((LEVEL) == OB_RDP_LEVEL_2))*/
|
|
690
|
|
691 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
|
|
692
|
|
693 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST))
|
|
694
|
|
695 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST))
|
|
696
|
|
697 #define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\
|
|
698 ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF))
|
|
699
|
|
700 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
|
|
701 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
702 #define IS_PCROPSTATE(VALUE)(((VALUE) == OB_PCROP_STATE_DISABLE) || \
|
|
703 ((VALUE) == OB_PCROP_STATE_ENABLE))
|
|
704 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
|
705
|
|
706 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
|
|
707 #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP) || \
|
|
708 ((VALUE) == OPTIONBYTE_BOOTCONFIG))
|
|
709 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
|
710
|
|
711 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
712 #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP))
|
|
713 #endif /* STM32F401xC || STM32F401xE || STM32F411xE */
|
|
714
|
|
715 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
716 #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \
|
|
717 ((LATENCY) == FLASH_LATENCY_1) || \
|
|
718 ((LATENCY) == FLASH_LATENCY_2) || \
|
|
719 ((LATENCY) == FLASH_LATENCY_3) || \
|
|
720 ((LATENCY) == FLASH_LATENCY_4) || \
|
|
721 ((LATENCY) == FLASH_LATENCY_5) || \
|
|
722 ((LATENCY) == FLASH_LATENCY_6) || \
|
|
723 ((LATENCY) == FLASH_LATENCY_7) || \
|
|
724 ((LATENCY) == FLASH_LATENCY_8) || \
|
|
725 ((LATENCY) == FLASH_LATENCY_9) || \
|
|
726 ((LATENCY) == FLASH_LATENCY_10) || \
|
|
727 ((LATENCY) == FLASH_LATENCY_11) || \
|
|
728 ((LATENCY) == FLASH_LATENCY_12) || \
|
|
729 ((LATENCY) == FLASH_LATENCY_13) || \
|
|
730 ((LATENCY) == FLASH_LATENCY_14) || \
|
|
731 ((LATENCY) == FLASH_LATENCY_15))
|
|
732 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
733
|
|
734 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
|
|
735 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
736 #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \
|
|
737 ((LATENCY) == FLASH_LATENCY_1) || \
|
|
738 ((LATENCY) == FLASH_LATENCY_2) || \
|
|
739 ((LATENCY) == FLASH_LATENCY_3) || \
|
|
740 ((LATENCY) == FLASH_LATENCY_4) || \
|
|
741 ((LATENCY) == FLASH_LATENCY_5) || \
|
|
742 ((LATENCY) == FLASH_LATENCY_6) || \
|
|
743 ((LATENCY) == FLASH_LATENCY_7))
|
|
744 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
|
745
|
|
746 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
747 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \
|
|
748 ((BANK) == FLASH_BANK_2) || \
|
|
749 ((BANK) == FLASH_BANK_BOTH))
|
|
750 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
751
|
|
752 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
|
|
753 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
754 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1))
|
|
755 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
|
756
|
|
757
|
|
758 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
759 #define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
|
|
760 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
|
|
761 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
|
|
762 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\
|
|
763 ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\
|
|
764 ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11) ||\
|
|
765 ((SECTOR) == FLASH_SECTOR_12) || ((SECTOR) == FLASH_SECTOR_13) ||\
|
|
766 ((SECTOR) == FLASH_SECTOR_14) || ((SECTOR) == FLASH_SECTOR_15) ||\
|
|
767 ((SECTOR) == FLASH_SECTOR_16) || ((SECTOR) == FLASH_SECTOR_17) ||\
|
|
768 ((SECTOR) == FLASH_SECTOR_18) || ((SECTOR) == FLASH_SECTOR_19) ||\
|
|
769 ((SECTOR) == FLASH_SECTOR_20) || ((SECTOR) == FLASH_SECTOR_21) ||\
|
|
770 ((SECTOR) == FLASH_SECTOR_22) || ((SECTOR) == FLASH_SECTOR_23))
|
|
771 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
772
|
|
773 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
|
|
774 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
|
|
775 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
|
|
776 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
|
|
777 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\
|
|
778 ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\
|
|
779 ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11))
|
|
780 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
|
|
781
|
|
782 #if defined(STM32F401xC)
|
|
783 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
|
|
784 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
|
|
785 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5))
|
|
786 #endif /* STM32F401xC */
|
|
787
|
|
788 #if defined(STM32F401xE) || defined(STM32F411xE)
|
|
789 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
|
|
790 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
|
|
791 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
|
|
792 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7))
|
|
793 #endif /* STM32F401xE || STM32F411xE */
|
|
794
|
|
795 #define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END))
|
|
796 #define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL))
|
|
797
|
|
798 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
799 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFF000000) == 0x00000000) && ((SECTOR) != 0x00000000))
|
|
800 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
801
|
|
802 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
|
|
803 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
|
|
804 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
|
|
805
|
|
806 #if defined(STM32F401xC)
|
|
807 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
|
|
808 #endif /* STM32F401xC */
|
|
809
|
|
810 #if defined(STM32F401xE) || defined(STM32F411xE)
|
|
811 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
|
|
812 #endif /* STM32F401xE || STM32F411xE */
|
|
813
|
|
814 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
815 #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
|
|
816 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
817
|
|
818 #if defined(STM32F401xC)
|
|
819 #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
|
|
820 #endif /* STM32F401xC */
|
|
821
|
|
822 #if defined(STM32F401xE) || defined(STM32F411xE)
|
|
823 #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
|
|
824 #endif /* STM32F401xE || STM32F411xE */
|
|
825
|
|
826 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
827 #define IS_OB_BOOT(BOOT) (((BOOT) == OB_DUAL_BOOT_ENABLE) || ((BOOT) == OB_DUAL_BOOT_DISABLE))
|
|
828 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
829
|
|
830 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
|
|
831 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
832 #define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PCROP_SELECTED) || ((PCROP) == OB_PCROP_DESELECTED))
|
|
833 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
|
834 /**
|
|
835 * @}
|
|
836 */
|
|
837
|
|
838 /**
|
|
839 * @}
|
|
840 */
|
|
841
|
|
842 /* Private functions ---------------------------------------------------------*/
|
|
843 /** @defgroup FLASHEx_Private_Functions FLASH Private Functions
|
|
844 * @{
|
|
845 */
|
|
846 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange);
|
|
847 /**
|
|
848 * @}
|
|
849 */
|
|
850
|
|
851 /**
|
|
852 * @}
|
|
853 */
|
|
854
|
|
855 /**
|
|
856 * @}
|
|
857 */
|
|
858
|
|
859 #ifdef __cplusplus
|
|
860 }
|
|
861 #endif
|
|
862
|
|
863 #endif /* __STM32F4xx_HAL_FLASH_EX_H */
|
|
864
|
|
865 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|