Mercurial > public > ostc4
annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dac.h @ 638:4532953ac1a0
Added last measured PPO2 value to sensor selection dialog:
In the divemenu => setpoint => UseSensor menu just the number of the sensor was as label. To have a better base for the selection decision the last measured value is now added to the label.
author | Ideenmodellierer |
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date | Wed, 24 Feb 2021 21:45:35 +0100 |
parents | c78bcbd5deda |
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rev | line source |
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_ll_dac.h |
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4 * @author MCD Application Team |
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5 * @brief Header file of DAC LL module. |
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6 ****************************************************************************** |
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7 * @attention |
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8 * |
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9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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10 * |
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11 * Redistribution and use in source and binary forms, with or without modification, |
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12 * are permitted provided that the following conditions are met: |
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13 * 1. Redistributions of source code must retain the above copyright notice, |
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14 * this list of conditions and the following disclaimer. |
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15 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 * this list of conditions and the following disclaimer in the documentation |
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17 * and/or other materials provided with the distribution. |
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 * may be used to endorse or promote products derived from this software |
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20 * without specific prior written permission. |
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21 * |
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 * |
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33 ****************************************************************************** |
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34 */ |
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35 |
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36 /* Define to prevent recursive inclusion -------------------------------------*/ |
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37 #ifndef __STM32F4xx_LL_DAC_H |
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38 #define __STM32F4xx_LL_DAC_H |
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39 |
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40 #ifdef __cplusplus |
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41 extern "C" { |
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42 #endif |
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43 |
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44 /* Includes ------------------------------------------------------------------*/ |
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45 #include "stm32f4xx.h" |
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46 |
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47 /** @addtogroup STM32F4xx_LL_Driver |
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48 * @{ |
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49 */ |
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50 |
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51 #if defined(DAC) |
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52 |
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53 /** @defgroup DAC_LL DAC |
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54 * @{ |
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55 */ |
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56 |
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57 /* Private types -------------------------------------------------------------*/ |
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58 /* Private variables ---------------------------------------------------------*/ |
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59 |
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60 /* Private constants ---------------------------------------------------------*/ |
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61 /** @defgroup DAC_LL_Private_Constants DAC Private Constants |
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62 * @{ |
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63 */ |
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64 |
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65 /* Internal masks for DAC channels definition */ |
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66 /* To select into literal LL_DAC_CHANNEL_x the relevant bits for: */ |
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67 /* - channel bits position into register CR */ |
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68 /* - channel bits position into register SWTRIG */ |
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69 /* - channel register offset of data holding register DHRx */ |
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70 /* - channel register offset of data output register DORx */ |
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71 #define DAC_CR_CH1_BITOFFSET 0U /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 1 */ |
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72 #define DAC_CR_CH2_BITOFFSET 16U /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 2 */ |
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73 #define DAC_CR_CHX_BITOFFSET_MASK (DAC_CR_CH1_BITOFFSET | DAC_CR_CH2_BITOFFSET) |
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74 |
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75 #define DAC_SWTR_CH1 (DAC_SWTRIGR_SWTRIG1) /* Channel bit into register SWTRIGR of channel 1. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHX_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */ |
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76 #if defined(DAC_CHANNEL2_SUPPORT) |
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77 #define DAC_SWTR_CH2 (DAC_SWTRIGR_SWTRIG2) /* Channel bit into register SWTRIGR of channel 2. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHX_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */ |
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78 #define DAC_SWTR_CHX_MASK (DAC_SWTR_CH1 | DAC_SWTR_CH2) |
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79 #else |
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80 #define DAC_SWTR_CHX_MASK (DAC_SWTR_CH1) |
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81 #endif /* DAC_CHANNEL2_SUPPORT */ |
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82 |
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83 #define DAC_REG_DHR12R1_REGOFFSET 0x00000000U /* Register DHR12Rx channel 1 taken as reference */ |
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84 #define DAC_REG_DHR12L1_REGOFFSET 0x00100000U /* Register offset of DHR12Lx channel 1 versus DHR12Rx channel 1 (shifted left of 20 bits) */ |
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85 #define DAC_REG_DHR8R1_REGOFFSET 0x02000000U /* Register offset of DHR8Rx channel 1 versus DHR12Rx channel 1 (shifted left of 24 bits) */ |
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86 #if defined(DAC_CHANNEL2_SUPPORT) |
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87 #define DAC_REG_DHR12R2_REGOFFSET 0x00030000U /* Register offset of DHR12Rx channel 2 versus DHR12Rx channel 1 (shifted left of 16 bits) */ |
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88 #define DAC_REG_DHR12L2_REGOFFSET 0x00400000U /* Register offset of DHR12Lx channel 2 versus DHR12Rx channel 1 (shifted left of 20 bits) */ |
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89 #define DAC_REG_DHR8R2_REGOFFSET 0x05000000U /* Register offset of DHR8Rx channel 2 versus DHR12Rx channel 1 (shifted left of 24 bits) */ |
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90 #endif /* DAC_CHANNEL2_SUPPORT */ |
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91 #define DAC_REG_DHR12RX_REGOFFSET_MASK 0x000F0000U |
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92 #define DAC_REG_DHR12LX_REGOFFSET_MASK 0x00F00000U |
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93 #define DAC_REG_DHR8RX_REGOFFSET_MASK 0x0F000000U |
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94 #define DAC_REG_DHRX_REGOFFSET_MASK (DAC_REG_DHR12RX_REGOFFSET_MASK | DAC_REG_DHR12LX_REGOFFSET_MASK | DAC_REG_DHR8RX_REGOFFSET_MASK) |
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95 |
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96 #define DAC_REG_DOR1_REGOFFSET 0x00000000U /* Register DORx channel 1 taken as reference */ |
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97 #if defined(DAC_CHANNEL2_SUPPORT) |
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98 #define DAC_REG_DOR2_REGOFFSET 0x10000000U /* Register offset of DORx channel 1 versus DORx channel 2 (shifted left of 28 bits) */ |
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99 #define DAC_REG_DORX_REGOFFSET_MASK (DAC_REG_DOR1_REGOFFSET | DAC_REG_DOR2_REGOFFSET) |
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100 #else |
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101 #define DAC_REG_DORX_REGOFFSET_MASK (DAC_REG_DOR1_REGOFFSET) |
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102 #endif /* DAC_CHANNEL2_SUPPORT */ |
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103 |
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104 /* DAC registers bits positions */ |
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105 #if defined(DAC_CHANNEL2_SUPPORT) |
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106 #define DAC_DHR12RD_DACC2DHR_BITOFFSET_POS 16U /* Value equivalent to POSITION_VAL(DAC_DHR12RD_DACC2DHR) */ |
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107 #define DAC_DHR12LD_DACC2DHR_BITOFFSET_POS 20U /* Value equivalent to POSITION_VAL(DAC_DHR12LD_DACC2DHR) */ |
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108 #define DAC_DHR8RD_DACC2DHR_BITOFFSET_POS 8U /* Value equivalent to POSITION_VAL(DAC_DHR8RD_DACC2DHR) */ |
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109 #endif /* DAC_CHANNEL2_SUPPORT */ |
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110 |
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111 /* Miscellaneous data */ |
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112 #define DAC_DIGITAL_SCALE_12BITS 4095U /* Full-scale digital value with a resolution of 12 bits (voltage range determined by analog voltage references Vref+ and Vref-, refer to reference manual) */ |
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113 |
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114 /** |
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115 * @} |
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116 */ |
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117 |
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118 |
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119 /* Private macros ------------------------------------------------------------*/ |
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120 /** @defgroup DAC_LL_Private_Macros DAC Private Macros |
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121 * @{ |
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122 */ |
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123 |
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124 /** |
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125 * @brief Driver macro reserved for internal use: isolate bits with the |
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126 * selected mask and shift them to the register LSB |
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127 * (shift mask on register position bit 0). |
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128 * @param __BITS__ Bits in register 32 bits |
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129 * @param __MASK__ Mask in register 32 bits |
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130 * @retval Bits in register 32 bits |
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131 */ |
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132 #define __DAC_MASK_SHIFT(__BITS__, __MASK__) \ |
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133 (((__BITS__) & (__MASK__)) >> POSITION_VAL((__MASK__))) |
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134 |
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135 /** |
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136 * @brief Driver macro reserved for internal use: set a pointer to |
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137 * a register from a register basis from which an offset |
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138 * is applied. |
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139 * @param __REG__ Register basis from which the offset is applied. |
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140 * @param __REG_OFFFSET__ Offset to be applied (unit number of registers). |
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141 * @retval Pointer to register address |
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142 */ |
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143 #define __DAC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ |
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144 ((uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2U)))) |
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145 |
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146 /** |
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147 * @} |
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148 */ |
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149 |
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150 |
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151 /* Exported types ------------------------------------------------------------*/ |
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152 #if defined(USE_FULL_LL_DRIVER) |
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153 /** @defgroup DAC_LL_ES_INIT DAC Exported Init structure |
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154 * @{ |
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155 */ |
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156 |
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157 /** |
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158 * @brief Structure definition of some features of DAC instance. |
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159 */ |
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160 typedef struct |
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161 { |
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162 uint32_t TriggerSource; /*!< Set the conversion trigger source for the selected DAC channel: internal (SW start) or from external IP (timer event, external interrupt line). |
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163 This parameter can be a value of @ref DAC_LL_EC_TRIGGER_SOURCE |
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164 |
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165 This feature can be modified afterwards using unitary function @ref LL_DAC_SetTriggerSource(). */ |
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166 |
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167 uint32_t WaveAutoGeneration; /*!< Set the waveform automatic generation mode for the selected DAC channel. |
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168 This parameter can be a value of @ref DAC_LL_EC_WAVE_AUTO_GENERATION_MODE |
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169 |
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170 This feature can be modified afterwards using unitary function @ref LL_DAC_SetWaveAutoGeneration(). */ |
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171 |
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172 uint32_t WaveAutoGenerationConfig; /*!< Set the waveform automatic generation mode for the selected DAC channel. |
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173 If waveform automatic generation mode is set to noise, this parameter can be a value of @ref DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS |
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174 If waveform automatic generation mode is set to triangle, this parameter can be a value of @ref DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE |
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175 @note If waveform automatic generation mode is disabled, this parameter is discarded. |
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176 |
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177 This feature can be modified afterwards using unitary function @ref LL_DAC_SetWaveNoiseLFSR() or @ref LL_DAC_SetWaveTriangleAmplitude(), depending on the wave automatic generation selected. */ |
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178 |
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179 uint32_t OutputBuffer; /*!< Set the output buffer for the selected DAC channel. |
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180 This parameter can be a value of @ref DAC_LL_EC_OUTPUT_BUFFER |
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181 |
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182 This feature can be modified afterwards using unitary function @ref LL_DAC_SetOutputBuffer(). */ |
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183 |
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184 } LL_DAC_InitTypeDef; |
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185 |
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186 /** |
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187 * @} |
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188 */ |
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189 #endif /* USE_FULL_LL_DRIVER */ |
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190 |
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191 /* Exported constants --------------------------------------------------------*/ |
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192 /** @defgroup DAC_LL_Exported_Constants DAC Exported Constants |
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193 * @{ |
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194 */ |
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195 |
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196 /** @defgroup DAC_LL_EC_GET_FLAG DAC flags |
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197 * @brief Flags defines which can be used with LL_DAC_ReadReg function |
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198 * @{ |
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199 */ |
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200 /* DAC channel 1 flags */ |
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201 #define LL_DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1) /*!< DAC channel 1 flag DMA underrun */ |
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202 |
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203 #if defined(DAC_CHANNEL2_SUPPORT) |
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204 /* DAC channel 2 flags */ |
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205 #define LL_DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2) /*!< DAC channel 2 flag DMA underrun */ |
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206 #endif /* DAC_CHANNEL2_SUPPORT */ |
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207 /** |
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208 * @} |
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209 */ |
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210 |
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211 /** @defgroup DAC_LL_EC_IT DAC interruptions |
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212 * @brief IT defines which can be used with LL_DAC_ReadReg and LL_DAC_WriteReg functions |
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213 * @{ |
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214 */ |
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215 #define LL_DAC_IT_DMAUDRIE1 (DAC_CR_DMAUDRIE1) /*!< DAC channel 1 interruption DMA underrun */ |
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216 #if defined(DAC_CHANNEL2_SUPPORT) |
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217 #define LL_DAC_IT_DMAUDRIE2 (DAC_CR_DMAUDRIE2) /*!< DAC channel 2 interruption DMA underrun */ |
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218 #endif /* DAC_CHANNEL2_SUPPORT */ |
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219 /** |
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220 * @} |
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221 */ |
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222 |
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223 /** @defgroup DAC_LL_EC_CHANNEL DAC channels |
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224 * @{ |
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225 */ |
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226 #define LL_DAC_CHANNEL_1 (DAC_REG_DOR1_REGOFFSET | DAC_REG_DHR12R1_REGOFFSET | DAC_REG_DHR12L1_REGOFFSET | DAC_REG_DHR8R1_REGOFFSET | DAC_CR_CH1_BITOFFSET | DAC_SWTR_CH1) /*!< DAC channel 1 */ |
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227 #if defined(DAC_CHANNEL2_SUPPORT) |
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228 #define LL_DAC_CHANNEL_2 (DAC_REG_DOR2_REGOFFSET | DAC_REG_DHR12R2_REGOFFSET | DAC_REG_DHR12L2_REGOFFSET | DAC_REG_DHR8R2_REGOFFSET | DAC_CR_CH2_BITOFFSET | DAC_SWTR_CH2) /*!< DAC channel 2 */ |
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229 #endif /* DAC_CHANNEL2_SUPPORT */ |
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230 /** |
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231 * @} |
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232 */ |
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233 |
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234 /** @defgroup DAC_LL_EC_TRIGGER_SOURCE DAC trigger source |
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235 * @{ |
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236 */ |
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237 #define LL_DAC_TRIG_SOFTWARE (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger internal (SW start) */ |
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238 #define LL_DAC_TRIG_EXT_TIM2_TRGO (DAC_CR_TSEL1_2 ) /*!< DAC channel conversion trigger from external IP: TIM2 TRGO. */ |
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239 #define LL_DAC_TRIG_EXT_TIM8_TRGO ( DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM8 TRGO. */ |
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240 #define LL_DAC_TRIG_EXT_TIM4_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM4 TRGO. */ |
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241 #define LL_DAC_TRIG_EXT_TIM6_TRGO 0x00000000U /*!< DAC channel conversion trigger from external IP: TIM6 TRGO. */ |
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242 #define LL_DAC_TRIG_EXT_TIM7_TRGO ( DAC_CR_TSEL1_1 ) /*!< DAC channel conversion trigger from external IP: TIM7 TRGO. */ |
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243 #define LL_DAC_TRIG_EXT_TIM5_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0) /*!< DAC channel conversion trigger from external IP: TIM5 TRGO. */ |
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244 #define LL_DAC_TRIG_EXT_EXTI_LINE9 (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 ) /*!< DAC channel conversion trigger from external IP: external interrupt line 9. */ |
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245 /** |
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246 * @} |
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247 */ |
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248 |
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249 /** @defgroup DAC_LL_EC_WAVE_AUTO_GENERATION_MODE DAC waveform automatic generation mode |
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250 * @{ |
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251 */ |
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252 #define LL_DAC_WAVE_AUTO_GENERATION_NONE 0x00000000U /*!< DAC channel wave auto generation mode disabled. */ |
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253 #define LL_DAC_WAVE_AUTO_GENERATION_NOISE (DAC_CR_WAVE1_0) /*!< DAC channel wave auto generation mode enabled, set generated noise waveform. */ |
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254 #define LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE (DAC_CR_WAVE1_1) /*!< DAC channel wave auto generation mode enabled, set generated triangle waveform. */ |
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255 /** |
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256 * @} |
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257 */ |
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258 |
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259 /** @defgroup DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS DAC wave generation - Noise LFSR unmask bits |
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260 * @{ |
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261 */ |
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262 #define LL_DAC_NOISE_LFSR_UNMASK_BIT0 0x00000000U /*!< Noise wave generation, unmask LFSR bit0, for the selected DAC channel */ |
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263 #define LL_DAC_NOISE_LFSR_UNMASK_BITS1_0 ( DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[1:0], for the selected DAC channel */ |
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264 #define LL_DAC_NOISE_LFSR_UNMASK_BITS2_0 ( DAC_CR_MAMP1_1 ) /*!< Noise wave generation, unmask LFSR bits[2:0], for the selected DAC channel */ |
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265 #define LL_DAC_NOISE_LFSR_UNMASK_BITS3_0 ( DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[3:0], for the selected DAC channel */ |
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266 #define LL_DAC_NOISE_LFSR_UNMASK_BITS4_0 ( DAC_CR_MAMP1_2 ) /*!< Noise wave generation, unmask LFSR bits[4:0], for the selected DAC channel */ |
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267 #define LL_DAC_NOISE_LFSR_UNMASK_BITS5_0 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[5:0], for the selected DAC channel */ |
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268 #define LL_DAC_NOISE_LFSR_UNMASK_BITS6_0 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 ) /*!< Noise wave generation, unmask LFSR bits[6:0], for the selected DAC channel */ |
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269 #define LL_DAC_NOISE_LFSR_UNMASK_BITS7_0 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[7:0], for the selected DAC channel */ |
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270 #define LL_DAC_NOISE_LFSR_UNMASK_BITS8_0 (DAC_CR_MAMP1_3 ) /*!< Noise wave generation, unmask LFSR bits[8:0], for the selected DAC channel */ |
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271 #define LL_DAC_NOISE_LFSR_UNMASK_BITS9_0 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[9:0], for the selected DAC channel */ |
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272 #define LL_DAC_NOISE_LFSR_UNMASK_BITS10_0 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 ) /*!< Noise wave generation, unmask LFSR bits[10:0], for the selected DAC channel */ |
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273 #define LL_DAC_NOISE_LFSR_UNMASK_BITS11_0 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Noise wave generation, unmask LFSR bits[11:0], for the selected DAC channel */ |
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274 /** |
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275 * @} |
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276 */ |
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277 |
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278 /** @defgroup DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE DAC wave generation - Triangle amplitude |
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279 * @{ |
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280 */ |
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281 #define LL_DAC_TRIANGLE_AMPLITUDE_1 0x00000000U /*!< Triangle wave generation, amplitude of 1 LSB of DAC output range, for the selected DAC channel */ |
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282 #define LL_DAC_TRIANGLE_AMPLITUDE_3 ( DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 3 LSB of DAC output range, for the selected DAC channel */ |
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283 #define LL_DAC_TRIANGLE_AMPLITUDE_7 ( DAC_CR_MAMP1_1 ) /*!< Triangle wave generation, amplitude of 7 LSB of DAC output range, for the selected DAC channel */ |
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284 #define LL_DAC_TRIANGLE_AMPLITUDE_15 ( DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 15 LSB of DAC output range, for the selected DAC channel */ |
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285 #define LL_DAC_TRIANGLE_AMPLITUDE_31 ( DAC_CR_MAMP1_2 ) /*!< Triangle wave generation, amplitude of 31 LSB of DAC output range, for the selected DAC channel */ |
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286 #define LL_DAC_TRIANGLE_AMPLITUDE_63 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 63 LSB of DAC output range, for the selected DAC channel */ |
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287 #define LL_DAC_TRIANGLE_AMPLITUDE_127 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 ) /*!< Triangle wave generation, amplitude of 127 LSB of DAC output range, for the selected DAC channel */ |
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288 #define LL_DAC_TRIANGLE_AMPLITUDE_255 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 255 LSB of DAC output range, for the selected DAC channel */ |
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289 #define LL_DAC_TRIANGLE_AMPLITUDE_511 (DAC_CR_MAMP1_3 ) /*!< Triangle wave generation, amplitude of 512 LSB of DAC output range, for the selected DAC channel */ |
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290 #define LL_DAC_TRIANGLE_AMPLITUDE_1023 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 1023 LSB of DAC output range, for the selected DAC channel */ |
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291 #define LL_DAC_TRIANGLE_AMPLITUDE_2047 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 ) /*!< Triangle wave generation, amplitude of 2047 LSB of DAC output range, for the selected DAC channel */ |
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292 #define LL_DAC_TRIANGLE_AMPLITUDE_4095 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Triangle wave generation, amplitude of 4095 LSB of DAC output range, for the selected DAC channel */ |
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293 /** |
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294 * @} |
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295 */ |
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296 |
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297 /** @defgroup DAC_LL_EC_OUTPUT_BUFFER DAC channel output buffer |
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298 * @{ |
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299 */ |
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300 #define LL_DAC_OUTPUT_BUFFER_ENABLE 0x00000000U /*!< The selected DAC channel output is buffered: higher drive current capability, but also higher current consumption */ |
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301 #define LL_DAC_OUTPUT_BUFFER_DISABLE (DAC_CR_BOFF1) /*!< The selected DAC channel output is not buffered: lower drive current capability, but also lower current consumption */ |
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302 /** |
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303 * @} |
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304 */ |
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305 |
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306 |
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307 /** @defgroup DAC_LL_EC_RESOLUTION DAC channel output resolution |
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308 * @{ |
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309 */ |
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310 #define LL_DAC_RESOLUTION_12B 0x00000000U /*!< DAC channel resolution 12 bits */ |
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311 #define LL_DAC_RESOLUTION_8B 0x00000002U /*!< DAC channel resolution 8 bits */ |
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312 /** |
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313 * @} |
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314 */ |
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315 |
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316 /** @defgroup DAC_LL_EC_REGISTERS DAC registers compliant with specific purpose |
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317 * @{ |
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318 */ |
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319 /* List of DAC registers intended to be used (most commonly) with */ |
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320 /* DMA transfer. */ |
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321 /* Refer to function @ref LL_DAC_DMA_GetRegAddr(). */ |
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322 #define LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED DAC_REG_DHR12RX_REGOFFSET_MASK /*!< DAC channel data holding register 12 bits right aligned */ |
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323 #define LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED DAC_REG_DHR12LX_REGOFFSET_MASK /*!< DAC channel data holding register 12 bits left aligned */ |
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324 #define LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED DAC_REG_DHR8RX_REGOFFSET_MASK /*!< DAC channel data holding register 8 bits right aligned */ |
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325 /** |
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326 * @} |
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327 */ |
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328 |
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329 /** @defgroup DAC_LL_EC_HW_DELAYS Definitions of DAC hardware constraints delays |
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330 * @note Only DAC IP HW delays are defined in DAC LL driver driver, |
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331 * not timeout values. |
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332 * For details on delays values, refer to descriptions in source code |
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333 * above each literal definition. |
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334 * @{ |
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335 */ |
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336 |
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337 /* Delay for DAC channel voltage settling time from DAC channel startup */ |
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338 /* (transition from disable to enable). */ |
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339 /* Note: DAC channel startup time depends on board application environment: */ |
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340 /* impedance connected to DAC channel output. */ |
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341 /* The delay below is specified under conditions: */ |
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342 /* - voltage maximum transition (lowest to highest value) */ |
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343 /* - until voltage reaches final value +-1LSB */ |
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344 /* - DAC channel output buffer enabled */ |
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345 /* - load impedance of 5kOhm (min), 50pF (max) */ |
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346 /* Literal set to maximum value (refer to device datasheet, */ |
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347 /* parameter "tWAKEUP"). */ |
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348 /* Unit: us */ |
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349 #define LL_DAC_DELAY_STARTUP_VOLTAGE_SETTLING_US 15U /*!< Delay for DAC channel voltage settling time from DAC channel startup (transition from disable to enable) */ |
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350 |
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351 /* Delay for DAC channel voltage settling time. */ |
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352 /* Note: DAC channel startup time depends on board application environment: */ |
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353 /* impedance connected to DAC channel output. */ |
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354 /* The delay below is specified under conditions: */ |
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355 /* - voltage maximum transition (lowest to highest value) */ |
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356 /* - until voltage reaches final value +-1LSB */ |
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357 /* - DAC channel output buffer enabled */ |
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358 /* - load impedance of 5kOhm min, 50pF max */ |
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359 /* Literal set to maximum value (refer to device datasheet, */ |
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360 /* parameter "tSETTLING"). */ |
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361 /* Unit: us */ |
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362 #define LL_DAC_DELAY_VOLTAGE_SETTLING_US 12U /*!< Delay for DAC channel voltage settling time */ |
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363 /** |
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364 * @} |
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365 */ |
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366 |
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367 /** |
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368 * @} |
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369 */ |
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370 |
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371 /* Exported macro ------------------------------------------------------------*/ |
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372 /** @defgroup DAC_LL_Exported_Macros DAC Exported Macros |
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373 * @{ |
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374 */ |
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375 |
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376 /** @defgroup DAC_LL_EM_WRITE_READ Common write and read registers macros |
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377 * @{ |
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378 */ |
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379 |
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380 /** |
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381 * @brief Write a value in DAC register |
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382 * @param __INSTANCE__ DAC Instance |
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383 * @param __REG__ Register to be written |
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384 * @param __VALUE__ Value to be written in the register |
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385 * @retval None |
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386 */ |
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387 #define LL_DAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
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388 |
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389 /** |
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390 * @brief Read a value in DAC register |
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391 * @param __INSTANCE__ DAC Instance |
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392 * @param __REG__ Register to be read |
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393 * @retval Register value |
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394 */ |
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395 #define LL_DAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
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396 |
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397 /** |
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398 * @} |
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399 */ |
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400 |
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401 /** @defgroup DAC_LL_EM_HELPER_MACRO DAC helper macro |
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402 * @{ |
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403 */ |
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404 |
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405 /** |
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406 * @brief Helper macro to get DAC channel number in decimal format |
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407 * from literals LL_DAC_CHANNEL_x. |
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408 * Example: |
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409 * __LL_DAC_CHANNEL_TO_DECIMAL_NB(LL_DAC_CHANNEL_1) |
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410 * will return decimal number "1". |
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411 * @note The input can be a value from functions where a channel |
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412 * number is returned. |
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413 * @param __CHANNEL__ This parameter can be one of the following values: |
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414 * @arg @ref LL_DAC_CHANNEL_1 |
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415 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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416 * |
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417 * (1) On this STM32 serie, parameter not available on all devices. |
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418 * Refer to device datasheet for channels availability. |
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419 * @retval 1...2 (value "2" depending on DAC channel 2 availability) |
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420 */ |
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421 #define __LL_DAC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \ |
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422 ((__CHANNEL__) & DAC_SWTR_CHX_MASK) |
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423 |
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424 /** |
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425 * @brief Helper macro to get DAC channel in literal format LL_DAC_CHANNEL_x |
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426 * from number in decimal format. |
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427 * Example: |
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428 * __LL_DAC_DECIMAL_NB_TO_CHANNEL(1) |
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429 * will return a data equivalent to "LL_DAC_CHANNEL_1". |
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430 * @note If the input parameter does not correspond to a DAC channel, |
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431 * this macro returns value '0'. |
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432 * @param __DECIMAL_NB__ 1...2 (value "2" depending on DAC channel 2 availability) |
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433 * @retval Returned value can be one of the following values: |
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434 * @arg @ref LL_DAC_CHANNEL_1 |
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435 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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436 * |
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437 * (1) On this STM32 serie, parameter not available on all devices. |
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438 * Refer to device datasheet for channels availability. |
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439 */ |
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440 #if defined(DAC_CHANNEL2_SUPPORT) |
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441 #define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \ |
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442 (((__DECIMAL_NB__) == 1U) \ |
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443 ? ( \ |
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444 LL_DAC_CHANNEL_1 \ |
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445 ) \ |
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446 : \ |
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447 (((__DECIMAL_NB__) == 2U) \ |
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448 ? ( \ |
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449 LL_DAC_CHANNEL_2 \ |
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450 ) \ |
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451 : \ |
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452 ( \ |
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453 0 \ |
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454 ) \ |
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455 ) \ |
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456 ) |
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457 #else |
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458 #define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \ |
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459 (((__DECIMAL_NB__) == 1U) \ |
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460 ? ( \ |
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461 LL_DAC_CHANNEL_1 \ |
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462 ) \ |
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463 : \ |
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464 ( \ |
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465 0 \ |
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466 ) \ |
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467 ) |
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468 #endif /* DAC_CHANNEL2_SUPPORT */ |
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469 |
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470 /** |
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471 * @brief Helper macro to define the DAC conversion data full-scale digital |
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472 * value corresponding to the selected DAC resolution. |
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473 * @note DAC conversion data full-scale corresponds to voltage range |
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474 * determined by analog voltage references Vref+ and Vref- |
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475 * (refer to reference manual). |
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476 * @param __DAC_RESOLUTION__ This parameter can be one of the following values: |
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477 * @arg @ref LL_DAC_RESOLUTION_12B |
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478 * @arg @ref LL_DAC_RESOLUTION_8B |
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479 * @retval ADC conversion data equivalent voltage value (unit: mVolt) |
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480 */ |
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481 #define __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \ |
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482 ((0x00000FFFU) >> ((__DAC_RESOLUTION__) << 1U)) |
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483 |
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484 /** |
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485 * @brief Helper macro to calculate the DAC conversion data (unit: digital |
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486 * value) corresponding to a voltage (unit: mVolt). |
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487 * @note This helper macro is intended to provide input data in voltage |
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488 * rather than digital value, |
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489 * to be used with LL DAC functions such as |
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490 * @ref LL_DAC_ConvertData12RightAligned(). |
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491 * @note Analog reference voltage (Vref+) must be either known from |
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492 * user board environment or can be calculated using ADC measurement |
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493 * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE(). |
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494 * @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit mV) |
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495 * @param __DAC_VOLTAGE__ Voltage to be generated by DAC channel |
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496 * (unit: mVolt). |
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497 * @param __DAC_RESOLUTION__ This parameter can be one of the following values: |
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498 * @arg @ref LL_DAC_RESOLUTION_12B |
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499 * @arg @ref LL_DAC_RESOLUTION_8B |
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500 * @retval DAC conversion data (unit: digital value) |
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501 */ |
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502 #define __LL_DAC_CALC_VOLTAGE_TO_DATA(__VREFANALOG_VOLTAGE__,\ |
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503 __DAC_VOLTAGE__,\ |
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504 __DAC_RESOLUTION__) \ |
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505 ((__DAC_VOLTAGE__) * __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \ |
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506 / (__VREFANALOG_VOLTAGE__) \ |
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507 ) |
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508 |
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509 /** |
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510 * @} |
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511 */ |
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512 |
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513 /** |
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514 * @} |
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515 */ |
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516 |
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517 |
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518 /* Exported functions --------------------------------------------------------*/ |
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519 /** @defgroup DAC_LL_Exported_Functions DAC Exported Functions |
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520 * @{ |
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521 */ |
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522 /** @defgroup DAC_LL_EF_Configuration Configuration of DAC channels |
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523 * @{ |
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524 */ |
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525 |
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526 /** |
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527 * @brief Set the conversion trigger source for the selected DAC channel. |
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528 * @note For conversion trigger source to be effective, DAC trigger |
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529 * must be enabled using function @ref LL_DAC_EnableTrigger(). |
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530 * @note To set conversion trigger source, DAC channel must be disabled. |
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531 * Otherwise, the setting is discarded. |
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532 * @note Availability of parameters of trigger sources from timer |
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533 * depends on timers availability on the selected device. |
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534 * @rmtoll CR TSEL1 LL_DAC_SetTriggerSource\n |
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535 * CR TSEL2 LL_DAC_SetTriggerSource |
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536 * @param DACx DAC instance |
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537 * @param DAC_Channel This parameter can be one of the following values: |
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538 * @arg @ref LL_DAC_CHANNEL_1 |
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539 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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540 * |
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541 * (1) On this STM32 serie, parameter not available on all devices. |
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542 * Refer to device datasheet for channels availability. |
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543 * @param TriggerSource This parameter can be one of the following values: |
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544 * @arg @ref LL_DAC_TRIG_SOFTWARE |
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545 * @arg @ref LL_DAC_TRIG_EXT_TIM8_TRGO |
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546 * @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO |
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547 * @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO |
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548 * @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO |
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549 * @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO |
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550 * @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO |
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551 * @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9 |
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552 * @retval None |
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553 */ |
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554 __STATIC_INLINE void LL_DAC_SetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriggerSource) |
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555 { |
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556 MODIFY_REG(DACx->CR, |
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557 DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK), |
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558 TriggerSource << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
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559 } |
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560 |
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561 /** |
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562 * @brief Get the conversion trigger source for the selected DAC channel. |
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563 * @note For conversion trigger source to be effective, DAC trigger |
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564 * must be enabled using function @ref LL_DAC_EnableTrigger(). |
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565 * @note Availability of parameters of trigger sources from timer |
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566 * depends on timers availability on the selected device. |
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567 * @rmtoll CR TSEL1 LL_DAC_GetTriggerSource\n |
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568 * CR TSEL2 LL_DAC_GetTriggerSource |
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569 * @param DACx DAC instance |
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570 * @param DAC_Channel This parameter can be one of the following values: |
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571 * @arg @ref LL_DAC_CHANNEL_1 |
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572 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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573 * |
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574 * (1) On this STM32 serie, parameter not available on all devices. |
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575 * Refer to device datasheet for channels availability. |
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576 * @retval Returned value can be one of the following values: |
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577 * @arg @ref LL_DAC_TRIG_SOFTWARE |
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578 * @arg @ref LL_DAC_TRIG_EXT_TIM8_TRGO |
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579 * @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO |
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580 * @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO |
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581 * @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO |
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582 * @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO |
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583 * @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO |
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584 * @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9 |
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585 */ |
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586 __STATIC_INLINE uint32_t LL_DAC_GetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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587 { |
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588 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
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589 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK) |
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590 ); |
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591 } |
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592 |
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593 /** |
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594 * @brief Set the waveform automatic generation mode |
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595 * for the selected DAC channel. |
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596 * @rmtoll CR WAVE1 LL_DAC_SetWaveAutoGeneration\n |
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597 * CR WAVE2 LL_DAC_SetWaveAutoGeneration |
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598 * @param DACx DAC instance |
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599 * @param DAC_Channel This parameter can be one of the following values: |
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600 * @arg @ref LL_DAC_CHANNEL_1 |
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601 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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602 * |
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603 * (1) On this STM32 serie, parameter not available on all devices. |
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604 * Refer to device datasheet for channels availability. |
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605 * @param WaveAutoGeneration This parameter can be one of the following values: |
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606 * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE |
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607 * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE |
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608 * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE |
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609 * @retval None |
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610 */ |
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611 __STATIC_INLINE void LL_DAC_SetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t WaveAutoGeneration) |
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612 { |
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613 MODIFY_REG(DACx->CR, |
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614 DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK), |
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615 WaveAutoGeneration << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
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616 } |
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617 |
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618 /** |
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619 * @brief Get the waveform automatic generation mode |
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620 * for the selected DAC channel. |
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621 * @rmtoll CR WAVE1 LL_DAC_GetWaveAutoGeneration\n |
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622 * CR WAVE2 LL_DAC_GetWaveAutoGeneration |
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623 * @param DACx DAC instance |
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624 * @param DAC_Channel This parameter can be one of the following values: |
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625 * @arg @ref LL_DAC_CHANNEL_1 |
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626 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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627 * |
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628 * (1) On this STM32 serie, parameter not available on all devices. |
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629 * Refer to device datasheet for channels availability. |
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630 * @retval Returned value can be one of the following values: |
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631 * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE |
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632 * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE |
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633 * @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE |
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634 */ |
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635 __STATIC_INLINE uint32_t LL_DAC_GetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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636 { |
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637 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
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638 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK) |
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639 ); |
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640 } |
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641 |
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642 /** |
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643 * @brief Set the noise waveform generation for the selected DAC channel: |
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644 * Noise mode and parameters LFSR (linear feedback shift register). |
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645 * @note For wave generation to be effective, DAC channel |
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646 * wave generation mode must be enabled using |
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647 * function @ref LL_DAC_SetWaveAutoGeneration(). |
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648 * @note This setting can be set when the selected DAC channel is disabled |
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649 * (otherwise, the setting operation is ignored). |
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650 * @rmtoll CR MAMP1 LL_DAC_SetWaveNoiseLFSR\n |
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651 * CR MAMP2 LL_DAC_SetWaveNoiseLFSR |
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652 * @param DACx DAC instance |
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653 * @param DAC_Channel This parameter can be one of the following values: |
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654 * @arg @ref LL_DAC_CHANNEL_1 |
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655 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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656 * |
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657 * (1) On this STM32 serie, parameter not available on all devices. |
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658 * Refer to device datasheet for channels availability. |
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659 * @param NoiseLFSRMask This parameter can be one of the following values: |
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660 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0 |
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661 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0 |
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662 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0 |
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663 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0 |
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664 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0 |
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665 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0 |
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666 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0 |
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667 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0 |
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668 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0 |
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669 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0 |
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670 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0 |
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671 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0 |
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672 * @retval None |
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673 */ |
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674 __STATIC_INLINE void LL_DAC_SetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t NoiseLFSRMask) |
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675 { |
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676 MODIFY_REG(DACx->CR, |
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677 DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK), |
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678 NoiseLFSRMask << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
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679 } |
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680 |
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681 /** |
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682 * @brief Set the noise waveform generation for the selected DAC channel: |
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683 * Noise mode and parameters LFSR (linear feedback shift register). |
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684 * @rmtoll CR MAMP1 LL_DAC_GetWaveNoiseLFSR\n |
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685 * CR MAMP2 LL_DAC_GetWaveNoiseLFSR |
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686 * @param DACx DAC instance |
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687 * @param DAC_Channel This parameter can be one of the following values: |
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688 * @arg @ref LL_DAC_CHANNEL_1 |
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689 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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690 * |
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691 * (1) On this STM32 serie, parameter not available on all devices. |
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692 * Refer to device datasheet for channels availability. |
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693 * @retval Returned value can be one of the following values: |
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694 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0 |
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695 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0 |
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696 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0 |
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697 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0 |
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698 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0 |
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699 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0 |
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700 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0 |
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701 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0 |
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702 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0 |
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703 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0 |
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704 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0 |
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705 * @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0 |
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706 */ |
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|
707 __STATIC_INLINE uint32_t LL_DAC_GetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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708 { |
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709 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
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710 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK) |
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711 ); |
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712 } |
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713 |
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714 /** |
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|
715 * @brief Set the triangle waveform generation for the selected DAC channel: |
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716 * triangle mode and amplitude. |
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717 * @note For wave generation to be effective, DAC channel |
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718 * wave generation mode must be enabled using |
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|
719 * function @ref LL_DAC_SetWaveAutoGeneration(). |
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720 * @note This setting can be set when the selected DAC channel is disabled |
c78bcbd5deda
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721 * (otherwise, the setting operation is ignored). |
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Added current STM32 standandard libraries in version independend folder structure
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722 * @rmtoll CR MAMP1 LL_DAC_SetWaveTriangleAmplitude\n |
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723 * CR MAMP2 LL_DAC_SetWaveTriangleAmplitude |
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724 * @param DACx DAC instance |
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Added current STM32 standandard libraries in version independend folder structure
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725 * @param DAC_Channel This parameter can be one of the following values: |
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726 * @arg @ref LL_DAC_CHANNEL_1 |
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727 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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728 * |
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729 * (1) On this STM32 serie, parameter not available on all devices. |
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Added current STM32 standandard libraries in version independend folder structure
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730 * Refer to device datasheet for channels availability. |
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Added current STM32 standandard libraries in version independend folder structure
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731 * @param TriangleAmplitude This parameter can be one of the following values: |
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732 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1 |
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733 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3 |
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734 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7 |
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735 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15 |
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736 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31 |
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737 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63 |
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738 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127 |
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739 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255 |
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740 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511 |
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741 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023 |
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742 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047 |
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Added current STM32 standandard libraries in version independend folder structure
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743 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095 |
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|
744 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
745 */ |
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746 __STATIC_INLINE void LL_DAC_SetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriangleAmplitude) |
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|
747 { |
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|
748 MODIFY_REG(DACx->CR, |
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Ideenmodellierer
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|
749 DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK), |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
750 TriangleAmplitude << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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751 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
752 |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
753 /** |
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Ideenmodellierer
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diff
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|
754 * @brief Set the triangle waveform generation for the selected DAC channel: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
755 * triangle mode and amplitude. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
756 * @rmtoll CR MAMP1 LL_DAC_GetWaveTriangleAmplitude\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
757 * CR MAMP2 LL_DAC_GetWaveTriangleAmplitude |
c78bcbd5deda
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|
758 * @param DACx DAC instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
759 * @param DAC_Channel This parameter can be one of the following values: |
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|
760 * @arg @ref LL_DAC_CHANNEL_1 |
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|
761 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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|
762 * |
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|
763 * (1) On this STM32 serie, parameter not available on all devices. |
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Added current STM32 standandard libraries in version independend folder structure
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|
764 * Refer to device datasheet for channels availability. |
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Added current STM32 standandard libraries in version independend folder structure
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|
765 * @retval Returned value can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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|
766 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1 |
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|
767 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3 |
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Added current STM32 standandard libraries in version independend folder structure
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|
768 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7 |
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Added current STM32 standandard libraries in version independend folder structure
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|
769 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15 |
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Added current STM32 standandard libraries in version independend folder structure
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770 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31 |
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Added current STM32 standandard libraries in version independend folder structure
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771 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63 |
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|
772 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127 |
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|
773 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255 |
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|
774 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511 |
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775 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023 |
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776 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047 |
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777 * @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095 |
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|
778 */ |
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|
779 __STATIC_INLINE uint32_t LL_DAC_GetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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|
780 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
781 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
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Added current STM32 standandard libraries in version independend folder structure
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|
782 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK) |
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|
783 ); |
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|
784 } |
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|
785 |
c78bcbd5deda
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|
786 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
787 * @brief Set the output buffer for the selected DAC channel. |
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Added current STM32 standandard libraries in version independend folder structure
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|
788 * @rmtoll CR BOFF1 LL_DAC_SetOutputBuffer\n |
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|
789 * CR BOFF2 LL_DAC_SetOutputBuffer |
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|
790 * @param DACx DAC instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
791 * @param DAC_Channel This parameter can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
792 * @arg @ref LL_DAC_CHANNEL_1 |
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Added current STM32 standandard libraries in version independend folder structure
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|
793 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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Added current STM32 standandard libraries in version independend folder structure
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|
794 * |
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Added current STM32 standandard libraries in version independend folder structure
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|
795 * (1) On this STM32 serie, parameter not available on all devices. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
796 * Refer to device datasheet for channels availability. |
c78bcbd5deda
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|
797 * @param OutputBuffer This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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|
798 * @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE |
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Added current STM32 standandard libraries in version independend folder structure
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|
799 * @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE |
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|
800 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
801 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
802 __STATIC_INLINE void LL_DAC_SetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputBuffer) |
c78bcbd5deda
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|
803 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
804 MODIFY_REG(DACx->CR, |
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Added current STM32 standandard libraries in version independend folder structure
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|
805 DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK), |
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Added current STM32 standandard libraries in version independend folder structure
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|
806 OutputBuffer << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
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|
807 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
808 |
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Added current STM32 standandard libraries in version independend folder structure
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|
809 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
810 * @brief Get the output buffer state for the selected DAC channel. |
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Added current STM32 standandard libraries in version independend folder structure
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|
811 * @rmtoll CR BOFF1 LL_DAC_GetOutputBuffer\n |
c78bcbd5deda
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|
812 * CR BOFF2 LL_DAC_GetOutputBuffer |
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|
813 * @param DACx DAC instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
814 * @param DAC_Channel This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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|
815 * @arg @ref LL_DAC_CHANNEL_1 |
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Added current STM32 standandard libraries in version independend folder structure
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|
816 * @arg @ref LL_DAC_CHANNEL_2 (1) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
817 * |
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Added current STM32 standandard libraries in version independend folder structure
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|
818 * (1) On this STM32 serie, parameter not available on all devices. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
819 * Refer to device datasheet for channels availability. |
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Added current STM32 standandard libraries in version independend folder structure
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|
820 * @retval Returned value can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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821 * @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE |
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Added current STM32 standandard libraries in version independend folder structure
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|
822 * @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
823 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
824 __STATIC_INLINE uint32_t LL_DAC_GetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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|
825 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
826 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
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Added current STM32 standandard libraries in version independend folder structure
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|
827 >> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
828 ); |
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Added current STM32 standandard libraries in version independend folder structure
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|
829 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
830 |
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|
831 /** |
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|
832 * @} |
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|
833 */ |
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|
834 |
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Added current STM32 standandard libraries in version independend folder structure
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|
835 /** @defgroup DAC_LL_EF_DMA_Management DMA Management |
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|
836 * @{ |
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|
837 */ |
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|
838 |
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|
839 /** |
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|
840 * @brief Enable DAC DMA transfer request of the selected channel. |
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Added current STM32 standandard libraries in version independend folder structure
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|
841 * @note To configure DMA source address (peripheral address), |
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Added current STM32 standandard libraries in version independend folder structure
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|
842 * use function @ref LL_DAC_DMA_GetRegAddr(). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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843 * @rmtoll CR DMAEN1 LL_DAC_EnableDMAReq\n |
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Added current STM32 standandard libraries in version independend folder structure
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|
844 * CR DMAEN2 LL_DAC_EnableDMAReq |
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Added current STM32 standandard libraries in version independend folder structure
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845 * @param DACx DAC instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
846 * @param DAC_Channel This parameter can be one of the following values: |
c78bcbd5deda
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|
847 * @arg @ref LL_DAC_CHANNEL_1 |
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Added current STM32 standandard libraries in version independend folder structure
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|
848 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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|
849 * |
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850 * (1) On this STM32 serie, parameter not available on all devices. |
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Added current STM32 standandard libraries in version independend folder structure
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|
851 * Refer to device datasheet for channels availability. |
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Added current STM32 standandard libraries in version independend folder structure
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|
852 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
853 */ |
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|
854 __STATIC_INLINE void LL_DAC_EnableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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|
855 { |
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|
856 SET_BIT(DACx->CR, |
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Added current STM32 standandard libraries in version independend folder structure
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|
857 DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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858 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
859 |
c78bcbd5deda
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|
860 /** |
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|
861 * @brief Disable DAC DMA transfer request of the selected channel. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
862 * @note To configure DMA source address (peripheral address), |
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Added current STM32 standandard libraries in version independend folder structure
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|
863 * use function @ref LL_DAC_DMA_GetRegAddr(). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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864 * @rmtoll CR DMAEN1 LL_DAC_DisableDMAReq\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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865 * CR DMAEN2 LL_DAC_DisableDMAReq |
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|
866 * @param DACx DAC instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
867 * @param DAC_Channel This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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|
868 * @arg @ref LL_DAC_CHANNEL_1 |
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|
869 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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870 * |
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871 * (1) On this STM32 serie, parameter not available on all devices. |
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872 * Refer to device datasheet for channels availability. |
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873 * @retval None |
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874 */ |
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875 __STATIC_INLINE void LL_DAC_DisableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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876 { |
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877 CLEAR_BIT(DACx->CR, |
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878 DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
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879 } |
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880 |
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881 /** |
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882 * @brief Get DAC DMA transfer request state of the selected channel. |
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883 * (0: DAC DMA transfer request is disabled, 1: DAC DMA transfer request is enabled) |
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884 * @rmtoll CR DMAEN1 LL_DAC_IsDMAReqEnabled\n |
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885 * CR DMAEN2 LL_DAC_IsDMAReqEnabled |
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886 * @param DACx DAC instance |
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887 * @param DAC_Channel This parameter can be one of the following values: |
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888 * @arg @ref LL_DAC_CHANNEL_1 |
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889 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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890 * |
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891 * (1) On this STM32 serie, parameter not available on all devices. |
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892 * Refer to device datasheet for channels availability. |
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893 * @retval State of bit (1 or 0). |
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894 */ |
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895 __STATIC_INLINE uint32_t LL_DAC_IsDMAReqEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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896 { |
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897 return (READ_BIT(DACx->CR, |
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898 DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
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899 == (DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))); |
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900 } |
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901 |
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902 /** |
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903 * @brief Function to help to configure DMA transfer to DAC: retrieve the |
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904 * DAC register address from DAC instance and a list of DAC registers |
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905 * intended to be used (most commonly) with DMA transfer. |
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906 * @note These DAC registers are data holding registers: |
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907 * when DAC conversion is requested, DAC generates a DMA transfer |
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908 * request to have data available in DAC data holding registers. |
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909 * @note This macro is intended to be used with LL DMA driver, refer to |
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910 * function "LL_DMA_ConfigAddresses()". |
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911 * Example: |
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912 * LL_DMA_ConfigAddresses(DMA1, |
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913 * LL_DMA_CHANNEL_1, |
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914 * (uint32_t)&< array or variable >, |
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915 * LL_DAC_DMA_GetRegAddr(DAC1, LL_DAC_CHANNEL_1, LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED), |
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916 * LL_DMA_DIRECTION_MEMORY_TO_PERIPH); |
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917 * @rmtoll DHR12R1 DACC1DHR LL_DAC_DMA_GetRegAddr\n |
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918 * DHR12L1 DACC1DHR LL_DAC_DMA_GetRegAddr\n |
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919 * DHR8R1 DACC1DHR LL_DAC_DMA_GetRegAddr\n |
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920 * DHR12R2 DACC2DHR LL_DAC_DMA_GetRegAddr\n |
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921 * DHR12L2 DACC2DHR LL_DAC_DMA_GetRegAddr\n |
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922 * DHR8R2 DACC2DHR LL_DAC_DMA_GetRegAddr |
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923 * @param DACx DAC instance |
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924 * @param DAC_Channel This parameter can be one of the following values: |
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925 * @arg @ref LL_DAC_CHANNEL_1 |
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926 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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927 * |
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928 * (1) On this STM32 serie, parameter not available on all devices. |
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929 * Refer to device datasheet for channels availability. |
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930 * @param Register This parameter can be one of the following values: |
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931 * @arg @ref LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED |
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932 * @arg @ref LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED |
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933 * @arg @ref LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED |
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934 * @retval DAC register address |
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935 */ |
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|
936 __STATIC_INLINE uint32_t LL_DAC_DMA_GetRegAddr(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Register) |
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937 { |
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938 /* Retrieve address of register DHR12Rx, DHR12Lx or DHR8Rx depending on */ |
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939 /* DAC channel selected. */ |
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940 return ((uint32_t)(__DAC_PTR_REG_OFFSET((DACx)->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, Register)))); |
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|
941 } |
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942 /** |
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943 * @} |
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944 */ |
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945 |
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946 /** @defgroup DAC_LL_EF_Operation Operation on DAC channels |
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947 * @{ |
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948 */ |
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949 |
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950 /** |
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951 * @brief Enable DAC selected channel. |
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952 * @rmtoll CR EN1 LL_DAC_Enable\n |
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953 * CR EN2 LL_DAC_Enable |
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954 * @note After enable from off state, DAC channel requires a delay |
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955 * for output voltage to reach accuracy +/- 1 LSB. |
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956 * Refer to device datasheet, parameter "tWAKEUP". |
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957 * @param DACx DAC instance |
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958 * @param DAC_Channel This parameter can be one of the following values: |
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959 * @arg @ref LL_DAC_CHANNEL_1 |
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960 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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961 * |
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962 * (1) On this STM32 serie, parameter not available on all devices. |
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963 * Refer to device datasheet for channels availability. |
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964 * @retval None |
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965 */ |
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966 __STATIC_INLINE void LL_DAC_Enable(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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967 { |
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968 SET_BIT(DACx->CR, |
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969 DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
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970 } |
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971 |
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972 /** |
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973 * @brief Disable DAC selected channel. |
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974 * @rmtoll CR EN1 LL_DAC_Disable\n |
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975 * CR EN2 LL_DAC_Disable |
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976 * @param DACx DAC instance |
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977 * @param DAC_Channel This parameter can be one of the following values: |
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978 * @arg @ref LL_DAC_CHANNEL_1 |
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979 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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980 * |
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981 * (1) On this STM32 serie, parameter not available on all devices. |
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982 * Refer to device datasheet for channels availability. |
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983 * @retval None |
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984 */ |
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985 __STATIC_INLINE void LL_DAC_Disable(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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986 { |
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987 CLEAR_BIT(DACx->CR, |
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988 DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
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989 } |
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990 |
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991 /** |
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992 * @brief Get DAC enable state of the selected channel. |
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993 * (0: DAC channel is disabled, 1: DAC channel is enabled) |
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994 * @rmtoll CR EN1 LL_DAC_IsEnabled\n |
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995 * CR EN2 LL_DAC_IsEnabled |
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996 * @param DACx DAC instance |
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997 * @param DAC_Channel This parameter can be one of the following values: |
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998 * @arg @ref LL_DAC_CHANNEL_1 |
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999 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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1000 * |
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1001 * (1) On this STM32 serie, parameter not available on all devices. |
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1002 * Refer to device datasheet for channels availability. |
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1003 * @retval State of bit (1 or 0). |
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1004 */ |
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1005 __STATIC_INLINE uint32_t LL_DAC_IsEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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1006 { |
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1007 return (READ_BIT(DACx->CR, |
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1008 DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
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1009 == (DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))); |
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1010 } |
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1011 |
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1012 /** |
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1013 * @brief Enable DAC trigger of the selected channel. |
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1014 * @note - If DAC trigger is disabled, DAC conversion is performed |
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1015 * automatically once the data holding register is updated, |
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1016 * using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()": |
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1017 * @ref LL_DAC_ConvertData12RightAligned(), ... |
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1018 * - If DAC trigger is enabled, DAC conversion is performed |
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1019 * only when a hardware of software trigger event is occurring. |
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1020 * Select trigger source using |
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1021 * function @ref LL_DAC_SetTriggerSource(). |
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1022 * @rmtoll CR TEN1 LL_DAC_EnableTrigger\n |
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1023 * CR TEN2 LL_DAC_EnableTrigger |
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1024 * @param DACx DAC instance |
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1025 * @param DAC_Channel This parameter can be one of the following values: |
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1026 * @arg @ref LL_DAC_CHANNEL_1 |
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1027 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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1028 * |
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1029 * (1) On this STM32 serie, parameter not available on all devices. |
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1030 * Refer to device datasheet for channels availability. |
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1031 * @retval None |
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1032 */ |
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1033 __STATIC_INLINE void LL_DAC_EnableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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1034 { |
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1035 SET_BIT(DACx->CR, |
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1036 DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
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1037 } |
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1038 |
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1039 /** |
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1040 * @brief Disable DAC trigger of the selected channel. |
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1041 * @rmtoll CR TEN1 LL_DAC_DisableTrigger\n |
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1042 * CR TEN2 LL_DAC_DisableTrigger |
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1043 * @param DACx DAC instance |
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1044 * @param DAC_Channel This parameter can be one of the following values: |
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1045 * @arg @ref LL_DAC_CHANNEL_1 |
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1046 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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1047 * |
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1048 * (1) On this STM32 serie, parameter not available on all devices. |
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1049 * Refer to device datasheet for channels availability. |
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1050 * @retval None |
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1051 */ |
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1052 __STATIC_INLINE void LL_DAC_DisableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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1053 { |
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1054 CLEAR_BIT(DACx->CR, |
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1055 DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)); |
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1056 } |
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1057 |
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1058 /** |
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1059 * @brief Get DAC trigger state of the selected channel. |
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1060 * (0: DAC trigger is disabled, 1: DAC trigger is enabled) |
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1061 * @rmtoll CR TEN1 LL_DAC_IsTriggerEnabled\n |
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1062 * CR TEN2 LL_DAC_IsTriggerEnabled |
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1063 * @param DACx DAC instance |
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1064 * @param DAC_Channel This parameter can be one of the following values: |
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1065 * @arg @ref LL_DAC_CHANNEL_1 |
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1066 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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1067 * |
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1068 * (1) On this STM32 serie, parameter not available on all devices. |
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1069 * Refer to device datasheet for channels availability. |
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1070 * @retval State of bit (1 or 0). |
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1071 */ |
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1072 __STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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1073 { |
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1074 return (READ_BIT(DACx->CR, |
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1075 DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) |
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1076 == (DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))); |
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1077 } |
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1078 |
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1079 /** |
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1080 * @brief Trig DAC conversion by software for the selected DAC channel. |
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1081 * @note Preliminarily, DAC trigger must be set to software trigger |
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1082 * using function @ref LL_DAC_SetTriggerSource() |
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1083 * with parameter "LL_DAC_TRIGGER_SOFTWARE". |
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1084 * and DAC trigger must be enabled using |
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1085 * function @ref LL_DAC_EnableTrigger(). |
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1086 * @note For devices featuring DAC with 2 channels: this function |
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1087 * can perform a SW start of both DAC channels simultaneously. |
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1088 * Two channels can be selected as parameter. |
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1089 * Example: (LL_DAC_CHANNEL_1 | LL_DAC_CHANNEL_2) |
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1090 * @rmtoll SWTRIGR SWTRIG1 LL_DAC_TrigSWConversion\n |
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1091 * SWTRIGR SWTRIG2 LL_DAC_TrigSWConversion |
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1092 * @param DACx DAC instance |
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1093 * @param DAC_Channel This parameter can a combination of the following values: |
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1094 * @arg @ref LL_DAC_CHANNEL_1 |
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1095 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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1096 * |
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1097 * (1) On this STM32 serie, parameter not available on all devices. |
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1098 * Refer to device datasheet for channels availability. |
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1099 * @retval None |
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1100 */ |
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1101 __STATIC_INLINE void LL_DAC_TrigSWConversion(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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1102 { |
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1103 SET_BIT(DACx->SWTRIGR, |
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1104 (DAC_Channel & DAC_SWTR_CHX_MASK)); |
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1105 } |
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1106 |
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1107 /** |
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1108 * @brief Set the data to be loaded in the data holding register |
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1109 * in format 12 bits left alignment (LSB aligned on bit 0), |
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1110 * for the selected DAC channel. |
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1111 * @rmtoll DHR12R1 DACC1DHR LL_DAC_ConvertData12RightAligned\n |
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1112 * DHR12R2 DACC2DHR LL_DAC_ConvertData12RightAligned |
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1113 * @param DACx DAC instance |
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1114 * @param DAC_Channel This parameter can be one of the following values: |
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1115 * @arg @ref LL_DAC_CHANNEL_1 |
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1116 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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1117 * |
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1118 * (1) On this STM32 serie, parameter not available on all devices. |
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1119 * Refer to device datasheet for channels availability. |
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1120 * @param Data Value between Min_Data=0x000 and Max_Data=0xFFF |
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1121 * @retval None |
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1122 */ |
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1123 __STATIC_INLINE void LL_DAC_ConvertData12RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data) |
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1124 { |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1125 register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR12RX_REGOFFSET_MASK)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1126 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1127 MODIFY_REG(*preg, |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1128 DAC_DHR12R1_DACC1DHR, |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1129 Data); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1130 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1131 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1132 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1133 * @brief Set the data to be loaded in the data holding register |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1134 * in format 12 bits left alignment (MSB aligned on bit 15), |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1135 * for the selected DAC channel. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1136 * @rmtoll DHR12L1 DACC1DHR LL_DAC_ConvertData12LeftAligned\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1137 * DHR12L2 DACC2DHR LL_DAC_ConvertData12LeftAligned |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1138 * @param DACx DAC instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1139 * @param DAC_Channel This parameter can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1140 * @arg @ref LL_DAC_CHANNEL_1 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1141 * @arg @ref LL_DAC_CHANNEL_2 (1) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1142 * |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1143 * (1) On this STM32 serie, parameter not available on all devices. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1144 * Refer to device datasheet for channels availability. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1145 * @param Data Value between Min_Data=0x000 and Max_Data=0xFFF |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1146 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1147 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1148 __STATIC_INLINE void LL_DAC_ConvertData12LeftAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1149 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1150 register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR12LX_REGOFFSET_MASK)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1151 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1152 MODIFY_REG(*preg, |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1153 DAC_DHR12L1_DACC1DHR, |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1154 Data); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1155 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1156 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1157 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1158 * @brief Set the data to be loaded in the data holding register |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1159 * in format 8 bits left alignment (LSB aligned on bit 0), |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1160 * for the selected DAC channel. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1161 * @rmtoll DHR8R1 DACC1DHR LL_DAC_ConvertData8RightAligned\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1162 * DHR8R2 DACC2DHR LL_DAC_ConvertData8RightAligned |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1163 * @param DACx DAC instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1164 * @param DAC_Channel This parameter can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1165 * @arg @ref LL_DAC_CHANNEL_1 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1166 * @arg @ref LL_DAC_CHANNEL_2 (1) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1167 * |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1168 * (1) On this STM32 serie, parameter not available on all devices. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1169 * Refer to device datasheet for channels availability. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1170 * @param Data Value between Min_Data=0x00 and Max_Data=0xFF |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1171 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1172 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1173 __STATIC_INLINE void LL_DAC_ConvertData8RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1174 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1175 register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR8RX_REGOFFSET_MASK)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1176 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1177 MODIFY_REG(*preg, |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1178 DAC_DHR8R1_DACC1DHR, |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1179 Data); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1180 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1181 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1182 #if defined(DAC_CHANNEL2_SUPPORT) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1183 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1184 * @brief Set the data to be loaded in the data holding register |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1185 * in format 12 bits left alignment (LSB aligned on bit 0), |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1186 * for both DAC channels. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1187 * @rmtoll DHR12RD DACC1DHR LL_DAC_ConvertDualData12RightAligned\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1188 * DHR12RD DACC2DHR LL_DAC_ConvertDualData12RightAligned |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1189 * @param DACx DAC instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1190 * @param DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1191 * @param DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1192 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1193 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1194 __STATIC_INLINE void LL_DAC_ConvertDualData12RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1195 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1196 MODIFY_REG(DACx->DHR12RD, |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1197 (DAC_DHR12RD_DACC2DHR | DAC_DHR12RD_DACC1DHR), |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1198 ((DataChannel2 << DAC_DHR12RD_DACC2DHR_BITOFFSET_POS) | DataChannel1)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1199 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1200 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1201 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1202 * @brief Set the data to be loaded in the data holding register |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1203 * in format 12 bits left alignment (MSB aligned on bit 15), |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1204 * for both DAC channels. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1205 * @rmtoll DHR12LD DACC1DHR LL_DAC_ConvertDualData12LeftAligned\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1206 * DHR12LD DACC2DHR LL_DAC_ConvertDualData12LeftAligned |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1207 * @param DACx DAC instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1208 * @param DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1209 * @param DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1210 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1211 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1212 __STATIC_INLINE void LL_DAC_ConvertDualData12LeftAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1213 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1214 /* Note: Data of DAC channel 2 shift value subtracted of 4 because */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1215 /* data on 16 bits and DAC channel 2 bits field is on the 12 MSB, */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1216 /* the 4 LSB must be taken into account for the shift value. */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1217 MODIFY_REG(DACx->DHR12LD, |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1218 (DAC_DHR12LD_DACC2DHR | DAC_DHR12LD_DACC1DHR), |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1219 ((DataChannel2 << (DAC_DHR12LD_DACC2DHR_BITOFFSET_POS - 4U)) | DataChannel1)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1220 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1221 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1222 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1223 * @brief Set the data to be loaded in the data holding register |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1224 * in format 8 bits left alignment (LSB aligned on bit 0), |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1225 * for both DAC channels. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1226 * @rmtoll DHR8RD DACC1DHR LL_DAC_ConvertDualData8RightAligned\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1227 * DHR8RD DACC2DHR LL_DAC_ConvertDualData8RightAligned |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
1228 * @param DACx DAC instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1229 * @param DataChannel1 Value between Min_Data=0x00 and Max_Data=0xFF |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1230 * @param DataChannel2 Value between Min_Data=0x00 and Max_Data=0xFF |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1231 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1232 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1233 __STATIC_INLINE void LL_DAC_ConvertDualData8RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1234 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1235 MODIFY_REG(DACx->DHR8RD, |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1236 (DAC_DHR8RD_DACC2DHR | DAC_DHR8RD_DACC1DHR), |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1237 ((DataChannel2 << DAC_DHR8RD_DACC2DHR_BITOFFSET_POS) | DataChannel1)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1238 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1239 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1240 #endif /* DAC_CHANNEL2_SUPPORT */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1241 /** |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1242 * @brief Retrieve output data currently generated for the selected DAC channel. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1243 * @note Whatever alignment and resolution settings |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1244 * (using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()": |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1245 * @ref LL_DAC_ConvertData12RightAligned(), ...), |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1246 * output data format is 12 bits right aligned (LSB aligned on bit 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1247 * @rmtoll DOR1 DACC1DOR LL_DAC_RetrieveOutputData\n |
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Added current STM32 standandard libraries in version independend folder structure
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1248 * DOR2 DACC2DOR LL_DAC_RetrieveOutputData |
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Added current STM32 standandard libraries in version independend folder structure
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1249 * @param DACx DAC instance |
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Added current STM32 standandard libraries in version independend folder structure
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1250 * @param DAC_Channel This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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1251 * @arg @ref LL_DAC_CHANNEL_1 |
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Added current STM32 standandard libraries in version independend folder structure
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1252 * @arg @ref LL_DAC_CHANNEL_2 (1) |
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1253 * |
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Added current STM32 standandard libraries in version independend folder structure
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1254 * (1) On this STM32 serie, parameter not available on all devices. |
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Added current STM32 standandard libraries in version independend folder structure
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1255 * Refer to device datasheet for channels availability. |
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Added current STM32 standandard libraries in version independend folder structure
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1256 * @retval Value between Min_Data=0x000 and Max_Data=0xFFF |
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Added current STM32 standandard libraries in version independend folder structure
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1257 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1258 __STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(DAC_TypeDef *DACx, uint32_t DAC_Channel) |
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Added current STM32 standandard libraries in version independend folder structure
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1259 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
1260 register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DOR1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DORX_REGOFFSET_MASK)); |
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Added current STM32 standandard libraries in version independend folder structure
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1261 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1262 return (uint16_t) READ_BIT(*preg, DAC_DOR1_DACC1DOR); |
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Added current STM32 standandard libraries in version independend folder structure
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|
1263 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
1264 |
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Added current STM32 standandard libraries in version independend folder structure
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1265 /** |
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1266 * @} |
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1267 */ |
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|
1268 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1269 /** @defgroup DAC_LL_EF_FLAG_Management FLAG Management |
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Added current STM32 standandard libraries in version independend folder structure
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1270 * @{ |
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1271 */ |
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1272 /** |
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1273 * @brief Get DAC underrun flag for DAC channel 1 |
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Added current STM32 standandard libraries in version independend folder structure
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1274 * @rmtoll SR DMAUDR1 LL_DAC_IsActiveFlag_DMAUDR1 |
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1275 * @param DACx DAC instance |
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1276 * @retval State of bit (1 or 0). |
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1277 */ |
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1278 __STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR1(DAC_TypeDef *DACx) |
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1279 { |
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1280 return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR1) == (LL_DAC_FLAG_DMAUDR1)); |
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1281 } |
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1282 |
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1283 #if defined(DAC_CHANNEL2_SUPPORT) |
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1284 /** |
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1285 * @brief Get DAC underrun flag for DAC channel 2 |
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Added current STM32 standandard libraries in version independend folder structure
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1286 * @rmtoll SR DMAUDR2 LL_DAC_IsActiveFlag_DMAUDR2 |
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1287 * @param DACx DAC instance |
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1288 * @retval State of bit (1 or 0). |
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1289 */ |
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1290 __STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR2(DAC_TypeDef *DACx) |
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1291 { |
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1292 return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR2) == (LL_DAC_FLAG_DMAUDR2)); |
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|
1293 } |
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1294 #endif /* DAC_CHANNEL2_SUPPORT */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1295 |
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|
1296 /** |
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|
1297 * @brief Clear DAC underrun flag for DAC channel 1 |
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Added current STM32 standandard libraries in version independend folder structure
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1298 * @rmtoll SR DMAUDR1 LL_DAC_ClearFlag_DMAUDR1 |
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1299 * @param DACx DAC instance |
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|
1300 * @retval None |
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|
1301 */ |
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|
1302 __STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR1(DAC_TypeDef *DACx) |
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1303 { |
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|
1304 WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR1); |
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1305 } |
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1306 |
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1307 #if defined(DAC_CHANNEL2_SUPPORT) |
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|
1308 /** |
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1309 * @brief Clear DAC underrun flag for DAC channel 2 |
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1310 * @rmtoll SR DMAUDR2 LL_DAC_ClearFlag_DMAUDR2 |
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1311 * @param DACx DAC instance |
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1312 * @retval None |
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1313 */ |
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1314 __STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR2(DAC_TypeDef *DACx) |
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1315 { |
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|
1316 WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR2); |
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1317 } |
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1318 #endif /* DAC_CHANNEL2_SUPPORT */ |
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|
1319 |
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1320 /** |
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|
1321 * @} |
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1322 */ |
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|
1323 |
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1324 /** @defgroup DAC_LL_EF_IT_Management IT management |
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1325 * @{ |
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|
1326 */ |
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|
1327 |
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|
1328 /** |
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1329 * @brief Enable DMA underrun interrupt for DAC channel 1 |
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1330 * @rmtoll CR DMAUDRIE1 LL_DAC_EnableIT_DMAUDR1 |
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1331 * @param DACx DAC instance |
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|
1332 * @retval None |
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|
1333 */ |
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|
1334 __STATIC_INLINE void LL_DAC_EnableIT_DMAUDR1(DAC_TypeDef *DACx) |
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1335 { |
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1336 SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1); |
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|
1337 } |
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|
1338 |
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1339 #if defined(DAC_CHANNEL2_SUPPORT) |
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1340 /** |
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|
1341 * @brief Enable DMA underrun interrupt for DAC channel 2 |
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1342 * @rmtoll CR DMAUDRIE2 LL_DAC_EnableIT_DMAUDR2 |
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1343 * @param DACx DAC instance |
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|
1344 * @retval None |
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|
1345 */ |
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1346 __STATIC_INLINE void LL_DAC_EnableIT_DMAUDR2(DAC_TypeDef *DACx) |
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1347 { |
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1348 SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2); |
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1349 } |
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1350 #endif /* DAC_CHANNEL2_SUPPORT */ |
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|
1351 |
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1352 /** |
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1353 * @brief Disable DMA underrun interrupt for DAC channel 1 |
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1354 * @rmtoll CR DMAUDRIE1 LL_DAC_DisableIT_DMAUDR1 |
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1355 * @param DACx DAC instance |
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1356 * @retval None |
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1357 */ |
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1358 __STATIC_INLINE void LL_DAC_DisableIT_DMAUDR1(DAC_TypeDef *DACx) |
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1359 { |
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1360 CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1); |
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1361 } |
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1362 |
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1363 #if defined(DAC_CHANNEL2_SUPPORT) |
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1364 /** |
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1365 * @brief Disable DMA underrun interrupt for DAC channel 2 |
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1366 * @rmtoll CR DMAUDRIE2 LL_DAC_DisableIT_DMAUDR2 |
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1367 * @param DACx DAC instance |
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1368 * @retval None |
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1369 */ |
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1370 __STATIC_INLINE void LL_DAC_DisableIT_DMAUDR2(DAC_TypeDef *DACx) |
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1371 { |
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1372 CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2); |
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1373 } |
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1374 #endif /* DAC_CHANNEL2_SUPPORT */ |
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1375 |
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1376 /** |
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1377 * @brief Get DMA underrun interrupt for DAC channel 1 |
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1378 * @rmtoll CR DMAUDRIE1 LL_DAC_IsEnabledIT_DMAUDR1 |
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1379 * @param DACx DAC instance |
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1380 * @retval State of bit (1 or 0). |
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1381 */ |
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1382 __STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR1(DAC_TypeDef *DACx) |
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1383 { |
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1384 return (READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1) == (LL_DAC_IT_DMAUDRIE1)); |
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1385 } |
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1386 |
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1387 #if defined(DAC_CHANNEL2_SUPPORT) |
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1388 /** |
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1389 * @brief Get DMA underrun interrupt for DAC channel 2 |
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1390 * @rmtoll CR DMAUDRIE2 LL_DAC_IsEnabledIT_DMAUDR2 |
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1391 * @param DACx DAC instance |
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1392 * @retval State of bit (1 or 0). |
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1393 */ |
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1394 __STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR2(DAC_TypeDef *DACx) |
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1395 { |
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1396 return (READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2) == (LL_DAC_IT_DMAUDRIE2)); |
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1397 } |
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1398 #endif /* DAC_CHANNEL2_SUPPORT */ |
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1399 |
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1400 /** |
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1401 * @} |
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1402 */ |
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1403 |
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1404 #if defined(USE_FULL_LL_DRIVER) |
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1405 /** @defgroup DAC_LL_EF_Init Initialization and de-initialization functions |
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1406 * @{ |
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1407 */ |
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1408 |
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1409 ErrorStatus LL_DAC_DeInit(DAC_TypeDef* DACx); |
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1410 ErrorStatus LL_DAC_Init(DAC_TypeDef* DACx, uint32_t DAC_Channel, LL_DAC_InitTypeDef* DAC_InitStruct); |
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1411 void LL_DAC_StructInit(LL_DAC_InitTypeDef* DAC_InitStruct); |
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1412 |
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1413 /** |
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1414 * @} |
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1415 */ |
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1416 #endif /* USE_FULL_LL_DRIVER */ |
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1417 |
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1418 /** |
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1419 * @} |
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1420 */ |
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1421 |
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1422 /** |
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1423 * @} |
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1424 */ |
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1425 |
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1426 #endif /* DAC */ |
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1427 |
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1428 /** |
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1429 * @} |
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1430 */ |
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1431 |
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1432 #ifdef __cplusplus |
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1433 } |
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1434 #endif |
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1435 |
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1436 #endif /* __STM32F4xx_LL_DAC_H */ |
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1437 |
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1438 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |