annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_fmpi2c.h @ 638:4532953ac1a0

Added last measured PPO2 value to sensor selection dialog: In the divemenu => setpoint => UseSensor menu just the number of the sensor was as label. To have a better base for the selection decision the last measured value is now added to the label.
author Ideenmodellierer
date Wed, 24 Feb 2021 21:45:35 +0100
parents c78bcbd5deda
children
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_fmpi2c.h
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4 * @author MCD Application Team
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5 * @brief Header file of FMPI2C HAL module.
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6 ******************************************************************************
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7 * @attention
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8 *
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9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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10 *
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11 * Redistribution and use in source and binary forms, with or without modification,
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12 * are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright notice,
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16 * this list of conditions and the following disclaimer in the documentation
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17 * and/or other materials provided with the distribution.
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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19 * may be used to endorse or promote products derived from this software
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20 * without specific prior written permission.
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21 *
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 *
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33 ******************************************************************************
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34 */
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35
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36 /* Define to prevent recursive inclusion -------------------------------------*/
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37 #ifndef __STM32F4xx_HAL_FMPI2C_H
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38 #define __STM32F4xx_HAL_FMPI2C_H
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39
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40 #ifdef __cplusplus
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41 extern "C" {
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42 #endif
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43
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44 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
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45 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
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46
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47 /* Includes ------------------------------------------------------------------*/
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48 #include "stm32f4xx_hal_def.h"
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49
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50 /** @addtogroup STM32F4xx_HAL_Driver
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51 * @{
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52 */
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53
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54 /** @addtogroup FMPI2C
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55 * @{
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56 */
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57
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58 /* Exported types ------------------------------------------------------------*/
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59 /** @defgroup FMPI2C_Exported_Types FMPI2C Exported Types
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60 * @{
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61 */
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62
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63 /** @defgroup FMPI2C_Configuration_Structure_definition FMPI2C Configuration Structure definition
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64 * @brief FMPI2C Configuration Structure definition
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65 * @{
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66 */
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67 typedef struct
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68 {
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69 uint32_t Timing; /*!< Specifies the FMPI2C_TIMINGR_register value.
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70 This parameter calculated by referring to FMPI2C initialization
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71 section in Reference manual */
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72
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73 uint32_t OwnAddress1; /*!< Specifies the first device own address.
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74 This parameter can be a 7-bit or 10-bit address. */
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75
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76 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
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77 This parameter can be a value of @ref FMPI2C_ADDRESSING_MODE */
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78
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79 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
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80 This parameter can be a value of @ref FMPI2C_DUAL_ADDRESSING_MODE */
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81
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82 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
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83 This parameter can be a 7-bit address. */
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84
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85 uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected
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86 This parameter can be a value of @ref FMPI2C_OWN_ADDRESS2_MASKS */
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87
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88 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
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89 This parameter can be a value of @ref FMPI2C_GENERAL_CALL_ADDRESSING_MODE */
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90
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91 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
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92 This parameter can be a value of @ref FMPI2C_NOSTRETCH_MODE */
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93
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94 } FMPI2C_InitTypeDef;
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95
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96 /**
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97 * @}
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98 */
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99
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100 /** @defgroup HAL_state_structure_definition HAL state structure definition
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101 * @brief HAL State structure definition
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102 * @note HAL FMPI2C State value coding follow below described bitmap :\n
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103 * b7-b6 Error information\n
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104 * 00 : No Error\n
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105 * 01 : Abort (Abort user request on going)\n
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106 * 10 : Timeout\n
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107 * 11 : Error\n
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108 * b5 IP initilisation status\n
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109 * 0 : Reset (IP not initialized)\n
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110 * 1 : Init done (IP initialized and ready to use. HAL FMPI2C Init function called)\n
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111 * b4 (not used)\n
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112 * x : Should be set to 0\n
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113 * b3\n
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114 * 0 : Ready or Busy (No Listen mode ongoing)\n
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115 * 1 : Listen (IP in Address Listen Mode)\n
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116 * b2 Intrinsic process state\n
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117 * 0 : Ready\n
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118 * 1 : Busy (IP busy with some configuration or internal operations)\n
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119 * b1 Rx state\n
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120 * 0 : Ready (no Rx operation ongoing)\n
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121 * 1 : Busy (Rx operation ongoing)\n
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122 * b0 Tx state\n
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123 * 0 : Ready (no Tx operation ongoing)\n
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124 * 1 : Busy (Tx operation ongoing)
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125 * @{
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126 */
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127 typedef enum
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128 {
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129 HAL_FMPI2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
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130 HAL_FMPI2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
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131 HAL_FMPI2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
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132 HAL_FMPI2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
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133 HAL_FMPI2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
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134 HAL_FMPI2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
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135 HAL_FMPI2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
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136 process is ongoing */
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137 HAL_FMPI2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
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138 process is ongoing */
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139 HAL_FMPI2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
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140 HAL_FMPI2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
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141 HAL_FMPI2C_STATE_ERROR = 0xE0U /*!< Error */
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142
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143 } HAL_FMPI2C_StateTypeDef;
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144
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145 /**
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146 * @}
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147 */
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148
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149 /** @defgroup HAL_mode_structure_definition HAL mode structure definition
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150 * @brief HAL Mode structure definition
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151 * @note HAL FMPI2C Mode value coding follow below described bitmap :\n
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152 * b7 (not used)\n
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153 * x : Should be set to 0\n
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154 * b6\n
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155 * 0 : None\n
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156 * 1 : Memory (HAL FMPI2C communication is in Memory Mode)\n
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157 * b5\n
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158 * 0 : None\n
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159 * 1 : Slave (HAL FMPI2C communication is in Slave Mode)\n
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160 * b4\n
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161 * 0 : None\n
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162 * 1 : Master (HAL FMPI2C communication is in Master Mode)\n
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163 * b3-b2-b1-b0 (not used)\n
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164 * xxxx : Should be set to 0000
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165 * @{
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166 */
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167 typedef enum
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168 {
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169 HAL_FMPI2C_MODE_NONE = 0x00U, /*!< No FMPI2C communication on going */
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170 HAL_FMPI2C_MODE_MASTER = 0x10U, /*!< FMPI2C communication is in Master Mode */
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171 HAL_FMPI2C_MODE_SLAVE = 0x20U, /*!< FMPI2C communication is in Slave Mode */
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172 HAL_FMPI2C_MODE_MEM = 0x40U /*!< FMPI2C communication is in Memory Mode */
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173
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174 } HAL_FMPI2C_ModeTypeDef;
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175
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176 /**
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177 * @}
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178 */
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179
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180 /** @defgroup FMPI2C_Error_Code_definition FMPI2C Error Code definition
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181 * @brief FMPI2C Error Code definition
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182 * @{
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183 */
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184 #define HAL_FMPI2C_ERROR_NONE (0x00000000U) /*!< No error */
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185 #define HAL_FMPI2C_ERROR_BERR (0x00000001U) /*!< BERR error */
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186 #define HAL_FMPI2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */
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187 #define HAL_FMPI2C_ERROR_AF (0x00000004U) /*!< ACKF error */
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188 #define HAL_FMPI2C_ERROR_OVR (0x00000008U) /*!< OVR error */
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189 #define HAL_FMPI2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
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190 #define HAL_FMPI2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */
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191 #define HAL_FMPI2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */
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192 /**
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193 * @}
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194 */
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195
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196 /** @defgroup FMPI2C_handle_Structure_definition FMPI2C handle Structure definition
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197 * @brief FMPI2C handle Structure definition
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198 * @{
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199 */
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200 typedef struct __FMPI2C_HandleTypeDef
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201 {
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202 FMPI2C_TypeDef *Instance; /*!< FMPI2C registers base address */
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203
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204 FMPI2C_InitTypeDef Init; /*!< FMPI2C communication parameters */
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205
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206 uint8_t *pBuffPtr; /*!< Pointer to FMPI2C transfer buffer */
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207
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208 uint16_t XferSize; /*!< FMPI2C transfer size */
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209
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210 __IO uint16_t XferCount; /*!< FMPI2C transfer counter */
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211
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212 __IO uint32_t XferOptions; /*!< FMPI2C sequantial transfer options, this parameter can
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213 be a value of @ref FMPI2C_XFEROPTIONS */
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214
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215 __IO uint32_t PreviousState; /*!< FMPI2C communication Previous state */
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216
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217 HAL_StatusTypeDef(*XferISR)(struct __FMPI2C_HandleTypeDef *hfmpi2c, uint32_t ITFlags, uint32_t ITSources); /*!< FMPI2C transfer IRQ handler function pointer */
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218
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219 DMA_HandleTypeDef *hdmatx; /*!< FMPI2C Tx DMA handle parameters */
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220
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221 DMA_HandleTypeDef *hdmarx; /*!< FMPI2C Rx DMA handle parameters */
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222
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223 HAL_LockTypeDef Lock; /*!< FMPI2C locking object */
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224
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225 __IO HAL_FMPI2C_StateTypeDef State; /*!< FMPI2C communication state */
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226
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227 __IO HAL_FMPI2C_ModeTypeDef Mode; /*!< FMPI2C communication mode */
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228
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229 __IO uint32_t ErrorCode; /*!< FMPI2C Error code */
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230
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231 __IO uint32_t AddrEventCount; /*!< FMPI2C Address Event counter */
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232 } FMPI2C_HandleTypeDef;
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233 /**
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234 * @}
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235 */
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236
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237 /**
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238 * @}
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239 */
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240 /* Exported constants --------------------------------------------------------*/
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241
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242 /** @defgroup FMPI2C_Exported_Constants FMPI2C Exported Constants
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243 * @{
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244 */
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245
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246 /** @defgroup FMPI2C_XFEROPTIONS FMPI2C Sequential Transfer Options
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247 * @{
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248 */
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249 #define FMPI2C_FIRST_FRAME ((uint32_t)FMPI2C_SOFTEND_MODE)
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250 #define FMPI2C_FIRST_AND_NEXT_FRAME ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE))
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251 #define FMPI2C_NEXT_FRAME ((uint32_t)(FMPI2C_RELOAD_MODE | FMPI2C_SOFTEND_MODE))
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252 #define FMPI2C_FIRST_AND_LAST_FRAME ((uint32_t)FMPI2C_AUTOEND_MODE)
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253 #define FMPI2C_LAST_FRAME ((uint32_t)FMPI2C_AUTOEND_MODE)
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254 #define FMPI2C_LAST_FRAME_NO_STOP ((uint32_t)FMPI2C_SOFTEND_MODE)
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255 /**
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256 * @}
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257 */
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258
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259 /** @defgroup FMPI2C_ADDRESSING_MODE FMPI2C Addressing Mode
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260 * @{
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261 */
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262 #define FMPI2C_ADDRESSINGMODE_7BIT (0x00000001U)
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263 #define FMPI2C_ADDRESSINGMODE_10BIT (0x00000002U)
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264 /**
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265 * @}
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266 */
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267
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268 /** @defgroup FMPI2C_DUAL_ADDRESSING_MODE FMPI2C Dual Addressing Mode
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269 * @{
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270 */
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271 #define FMPI2C_DUALADDRESS_DISABLE (0x00000000U)
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272 #define FMPI2C_DUALADDRESS_ENABLE FMPI2C_OAR2_OA2EN
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273 /**
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274 * @}
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275 */
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276
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277 /** @defgroup FMPI2C_OWN_ADDRESS2_MASKS FMPI2C Own Address2 Masks
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278 * @{
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279 */
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280 #define FMPI2C_OA2_NOMASK ((uint8_t)0x00)
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281 #define FMPI2C_OA2_MASK01 ((uint8_t)0x01)
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282 #define FMPI2C_OA2_MASK02 ((uint8_t)0x02)
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283 #define FMPI2C_OA2_MASK03 ((uint8_t)0x03)
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284 #define FMPI2C_OA2_MASK04 ((uint8_t)0x04)
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285 #define FMPI2C_OA2_MASK05 ((uint8_t)0x05)
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286 #define FMPI2C_OA2_MASK06 ((uint8_t)0x06)
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287 #define FMPI2C_OA2_MASK07 ((uint8_t)0x07)
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288 /**
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289 * @}
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290 */
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291
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292 /** @defgroup FMPI2C_GENERAL_CALL_ADDRESSING_MODE FMPI2C General Call Addressing Mode
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293 * @{
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294 */
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295 #define FMPI2C_GENERALCALL_DISABLE (0x00000000U)
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296 #define FMPI2C_GENERALCALL_ENABLE FMPI2C_CR1_GCEN
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297 /**
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298 * @}
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299 */
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300
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301 /** @defgroup FMPI2C_NOSTRETCH_MODE FMPI2C No-Stretch Mode
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302 * @{
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303 */
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304 #define FMPI2C_NOSTRETCH_DISABLE (0x00000000U)
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305 #define FMPI2C_NOSTRETCH_ENABLE FMPI2C_CR1_NOSTRETCH
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306 /**
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307 * @}
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308 */
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309
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310 /** @defgroup FMPI2C_MEMORY_ADDRESS_SIZE FMPI2C Memory Address Size
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311 * @{
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312 */
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313 #define FMPI2C_MEMADD_SIZE_8BIT (0x00000001U)
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314 #define FMPI2C_MEMADD_SIZE_16BIT (0x00000002U)
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315 /**
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316 * @}
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317 */
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318
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319 /** @defgroup FMPI2C_XFERDIRECTION FMPI2C Transfer Direction Master Point of View
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320 * @{
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321 */
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322 #define FMPI2C_DIRECTION_TRANSMIT (0x00000000U)
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323 #define FMPI2C_DIRECTION_RECEIVE (0x00000001U)
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324 /**
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325 * @}
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326 */
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327
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328 /** @defgroup FMPI2C_RELOAD_END_MODE FMPI2C Reload End Mode
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329 * @{
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330 */
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331 #define FMPI2C_RELOAD_MODE FMPI2C_CR2_RELOAD
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332 #define FMPI2C_AUTOEND_MODE FMPI2C_CR2_AUTOEND
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333 #define FMPI2C_SOFTEND_MODE (0x00000000U)
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334 /**
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335 * @}
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336 */
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337
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338 /** @defgroup FMPI2C_START_STOP_MODE FMPI2C Start or Stop Mode
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339 * @{
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340 */
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341 #define FMPI2C_NO_STARTSTOP (0x00000000U)
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342 #define FMPI2C_GENERATE_STOP (uint32_t)(0x80000000U | FMPI2C_CR2_STOP)
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343 #define FMPI2C_GENERATE_START_READ (uint32_t)(0x80000000U | FMPI2C_CR2_START | FMPI2C_CR2_RD_WRN)
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344 #define FMPI2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | FMPI2C_CR2_START)
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345 /**
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346 * @}
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347 */
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348
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349 /** @defgroup FMPI2C_Interrupt_configuration_definition FMPI2C Interrupt configuration definition
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350 * @brief FMPI2C Interrupt definition
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351 * Elements values convention: 0xXXXXXXXX
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352 * - XXXXXXXX : Interrupt control mask
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353 * @{
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354 */
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355 #define FMPI2C_IT_ERRI FMPI2C_CR1_ERRIE
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356 #define FMPI2C_IT_TCI FMPI2C_CR1_TCIE
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357 #define FMPI2C_IT_STOPI FMPI2C_CR1_STOPIE
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358 #define FMPI2C_IT_NACKI FMPI2C_CR1_NACKIE
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359 #define FMPI2C_IT_ADDRI FMPI2C_CR1_ADDRIE
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360 #define FMPI2C_IT_RXI FMPI2C_CR1_RXIE
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361 #define FMPI2C_IT_TXI FMPI2C_CR1_TXIE
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362 /**
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363 * @}
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364 */
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365
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366 /** @defgroup FMPI2C_Flag_definition FMPI2C Flag definition
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367 * @{
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368 */
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369 #define FMPI2C_FLAG_TXE FMPI2C_ISR_TXE
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370 #define FMPI2C_FLAG_TXIS FMPI2C_ISR_TXIS
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371 #define FMPI2C_FLAG_RXNE FMPI2C_ISR_RXNE
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372 #define FMPI2C_FLAG_ADDR FMPI2C_ISR_ADDR
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373 #define FMPI2C_FLAG_AF FMPI2C_ISR_NACKF
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374 #define FMPI2C_FLAG_STOPF FMPI2C_ISR_STOPF
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375 #define FMPI2C_FLAG_TC FMPI2C_ISR_TC
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376 #define FMPI2C_FLAG_TCR FMPI2C_ISR_TCR
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377 #define FMPI2C_FLAG_BERR FMPI2C_ISR_BERR
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378 #define FMPI2C_FLAG_ARLO FMPI2C_ISR_ARLO
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379 #define FMPI2C_FLAG_OVR FMPI2C_ISR_OVR
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380 #define FMPI2C_FLAG_PECERR FMPI2C_ISR_PECERR
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381 #define FMPI2C_FLAG_TIMEOUT FMPI2C_ISR_TIMEOUT
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382 #define FMPI2C_FLAG_ALERT FMPI2C_ISR_ALERT
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383 #define FMPI2C_FLAG_BUSY FMPI2C_ISR_BUSY
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384 #define FMPI2C_FLAG_DIR FMPI2C_ISR_DIR
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385 /**
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386 * @}
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387 */
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388
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389 /**
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390 * @}
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391 */
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392
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393 /* Exported macros -----------------------------------------------------------*/
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394
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395 /** @defgroup FMPI2C_Exported_Macros FMPI2C Exported Macros
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396 * @{
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397 */
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398
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399 /** @brief Reset FMPI2C handle state.
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400 * @param __HANDLE__ specifies the FMPI2C Handle.
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401 * @retval None
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402 */
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403 #define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_FMPI2C_STATE_RESET)
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404
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405 /** @brief Enable the specified FMPI2C interrupt.
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406 * @param __HANDLE__ specifies the FMPI2C Handle.
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407 * @param __INTERRUPT__ specifies the interrupt source to enable.
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408 * This parameter can be one of the following values:
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409 * @arg @ref FMPI2C_IT_ERRI Errors interrupt enable
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410 * @arg @ref FMPI2C_IT_TCI Transfer complete interrupt enable
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411 * @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable
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412 * @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable
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413 * @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable
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414 * @arg @ref FMPI2C_IT_RXI RX interrupt enable
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415 * @arg @ref FMPI2C_IT_TXI TX interrupt enable
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416 *
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417 * @retval None
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418 */
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419 #define __HAL_FMPI2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
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420
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421 /** @brief Disable the specified FMPI2C interrupt.
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422 * @param __HANDLE__ specifies the FMPI2C Handle.
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423 * @param __INTERRUPT__ specifies the interrupt source to disable.
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424 * This parameter can be one of the following values:
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425 * @arg @ref FMPI2C_IT_ERRI Errors interrupt enable
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426 * @arg @ref FMPI2C_IT_TCI Transfer complete interrupt enable
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427 * @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable
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428 * @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable
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429 * @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable
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430 * @arg @ref FMPI2C_IT_RXI RX interrupt enable
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431 * @arg @ref FMPI2C_IT_TXI TX interrupt enable
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432 *
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433 * @retval None
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434 */
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435 #define __HAL_FMPI2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
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436
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437 /** @brief Check whether the specified FMPI2C interrupt source is enabled or not.
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438 * @param __HANDLE__ specifies the FMPI2C Handle.
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439 * @param __INTERRUPT__ specifies the FMPI2C interrupt source to check.
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440 * This parameter can be one of the following values:
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441 * @arg @ref FMPI2C_IT_ERRI Errors interrupt enable
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442 * @arg @ref FMPI2C_IT_TCI Transfer complete interrupt enable
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443 * @arg @ref FMPI2C_IT_STOPI STOP detection interrupt enable
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444 * @arg @ref FMPI2C_IT_NACKI NACK received interrupt enable
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445 * @arg @ref FMPI2C_IT_ADDRI Address match interrupt enable
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446 * @arg @ref FMPI2C_IT_RXI RX interrupt enable
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447 * @arg @ref FMPI2C_IT_TXI TX interrupt enable
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448 *
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449 * @retval The new state of __INTERRUPT__ (SET or RESET).
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450 */
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451 #define __HAL_FMPI2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
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452
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453 /** @brief Check whether the specified FMPI2C flag is set or not.
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454 * @param __HANDLE__ specifies the FMPI2C Handle.
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455 * @param __FLAG__ specifies the flag to check.
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456 * This parameter can be one of the following values:
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457 * @arg @ref FMPI2C_FLAG_TXE Transmit data register empty
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458 * @arg @ref FMPI2C_FLAG_TXIS Transmit interrupt status
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459 * @arg @ref FMPI2C_FLAG_RXNE Receive data register not empty
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460 * @arg @ref FMPI2C_FLAG_ADDR Address matched (slave mode)
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461 * @arg @ref FMPI2C_FLAG_AF Acknowledge failure received flag
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462 * @arg @ref FMPI2C_FLAG_STOPF STOP detection flag
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463 * @arg @ref FMPI2C_FLAG_TC Transfer complete (master mode)
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464 * @arg @ref FMPI2C_FLAG_TCR Transfer complete reload
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465 * @arg @ref FMPI2C_FLAG_BERR Bus error
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466 * @arg @ref FMPI2C_FLAG_ARLO Arbitration lost
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467 * @arg @ref FMPI2C_FLAG_OVR Overrun/Underrun
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468 * @arg @ref FMPI2C_FLAG_PECERR PEC error in reception
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469 * @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag
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470 * @arg @ref FMPI2C_FLAG_ALERT SMBus alert
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471 * @arg @ref FMPI2C_FLAG_BUSY Bus busy
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472 * @arg @ref FMPI2C_FLAG_DIR Transfer direction (slave mode)
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473 *
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474 * @retval The new state of __FLAG__ (SET or RESET).
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475 */
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476 #define __HAL_FMPI2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
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477
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478 /** @brief Clear the FMPI2C pending flags which are cleared by writing 1 in a specific bit.
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479 * @param __HANDLE__ specifies the FMPI2C Handle.
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480 * @param __FLAG__ specifies the flag to clear.
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481 * This parameter can be any combination of the following values:
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482 * @arg @ref FMPI2C_FLAG_TXE Transmit data register empty
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483 * @arg @ref FMPI2C_FLAG_ADDR Address matched (slave mode)
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484 * @arg @ref FMPI2C_FLAG_AF Acknowledge failure received flag
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485 * @arg @ref FMPI2C_FLAG_STOPF STOP detection flag
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486 * @arg @ref FMPI2C_FLAG_BERR Bus error
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487 * @arg @ref FMPI2C_FLAG_ARLO Arbitration lost
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488 * @arg @ref FMPI2C_FLAG_OVR Overrun/Underrun
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489 * @arg @ref FMPI2C_FLAG_PECERR PEC error in reception
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490 * @arg @ref FMPI2C_FLAG_TIMEOUT Timeout or Tlow detection flag
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491 * @arg @ref FMPI2C_FLAG_ALERT SMBus alert
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492 *
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493 * @retval None
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494 */
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495 #define __HAL_FMPI2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == FMPI2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \
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496 : ((__HANDLE__)->Instance->ICR = (__FLAG__)))
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497
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498 /** @brief Enable the specified FMPI2C peripheral.
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499 * @param __HANDLE__ specifies the FMPI2C Handle.
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500 * @retval None
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501 */
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502 #define __HAL_FMPI2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE))
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503
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504 /** @brief Disable the specified FMPI2C peripheral.
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505 * @param __HANDLE__ specifies the FMPI2C Handle.
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506 * @retval None
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507 */
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508 #define __HAL_FMPI2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, FMPI2C_CR1_PE))
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509
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510 /** @brief Generate a Non-Acknowledge FMPI2C peripheral in Slave mode.
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511 * @param __HANDLE__ specifies the FMPI2C Handle.
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512 * @retval None
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513 */
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514 #define __HAL_FMPI2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, FMPI2C_CR2_NACK))
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515 /**
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516 * @}
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517 */
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518
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519 /* Include FMPI2C HAL Extended module */
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520 #include "stm32f4xx_hal_fmpi2c_ex.h"
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521
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522 /* Exported functions --------------------------------------------------------*/
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523 /** @addtogroup FMPI2C_Exported_Functions
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524 * @{
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525 */
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526
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527 /** @addtogroup FMPI2C_Exported_Functions_Group1 Initialization and de-initialization functions
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528 * @{
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529 */
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530 /* Initialization and de-initialization functions******************************/
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531 HAL_StatusTypeDef HAL_FMPI2C_Init(FMPI2C_HandleTypeDef *hfmpi2c);
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532 HAL_StatusTypeDef HAL_FMPI2C_DeInit(FMPI2C_HandleTypeDef *hfmpi2c);
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533 void HAL_FMPI2C_MspInit(FMPI2C_HandleTypeDef *hfmpi2c);
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534 void HAL_FMPI2C_MspDeInit(FMPI2C_HandleTypeDef *hfmpi2c);
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535 /**
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536 * @}
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537 */
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538
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539 /** @addtogroup FMPI2C_Exported_Functions_Group2 Input and Output operation functions
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540 * @{
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541 */
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542 /* IO operation functions ****************************************************/
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543 /******* Blocking mode: Polling */
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544 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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545 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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546 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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547 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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548 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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549 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
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550 HAL_StatusTypeDef HAL_FMPI2C_IsDeviceReady(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
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551
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552 /******* Non-Blocking mode: Interrupt */
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553 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
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554 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
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555 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
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556 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
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557 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
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558 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
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559
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560 HAL_StatusTypeDef HAL_FMPI2C_Master_Sequential_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
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561 HAL_StatusTypeDef HAL_FMPI2C_Master_Sequential_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
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562 HAL_StatusTypeDef HAL_FMPI2C_Slave_Sequential_Transmit_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
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563 HAL_StatusTypeDef HAL_FMPI2C_Slave_Sequential_Receive_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
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564 HAL_StatusTypeDef HAL_FMPI2C_EnableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c);
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565 HAL_StatusTypeDef HAL_FMPI2C_DisableListen_IT(FMPI2C_HandleTypeDef *hfmpi2c);
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566 HAL_StatusTypeDef HAL_FMPI2C_Master_Abort_IT(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress);
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567
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
568 /******* Non-Blocking mode: DMA */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
569 HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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570 HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
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571 HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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572 HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t *pData, uint16_t Size);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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573 HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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574 HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_DMA(FMPI2C_HandleTypeDef *hfmpi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
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575 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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576 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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577 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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578
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
579 /** @addtogroup FMPI2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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580 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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581 */
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582 /******* FMPI2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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583 void HAL_FMPI2C_EV_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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584 void HAL_FMPI2C_ER_IRQHandler(FMPI2C_HandleTypeDef *hfmpi2c);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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585 void HAL_FMPI2C_MasterTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
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586 void HAL_FMPI2C_MasterRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
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587 void HAL_FMPI2C_SlaveTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
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588 void HAL_FMPI2C_SlaveRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
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589 void HAL_FMPI2C_AddrCallback(FMPI2C_HandleTypeDef *hfmpi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
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590 void HAL_FMPI2C_ListenCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
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591 void HAL_FMPI2C_MemTxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
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592 void HAL_FMPI2C_MemRxCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
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593 void HAL_FMPI2C_ErrorCallback(FMPI2C_HandleTypeDef *hfmpi2c);
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594 void HAL_FMPI2C_AbortCpltCallback(FMPI2C_HandleTypeDef *hfmpi2c);
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595 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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596 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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597 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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598
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599 /** @addtogroup FMPI2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
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600 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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601 */
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602 /* Peripheral State, Mode and Error functions *********************************/
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603 HAL_FMPI2C_StateTypeDef HAL_FMPI2C_GetState(FMPI2C_HandleTypeDef *hfmpi2c);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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604 HAL_FMPI2C_ModeTypeDef HAL_FMPI2C_GetMode(FMPI2C_HandleTypeDef *hfmpi2c);
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605 uint32_t HAL_FMPI2C_GetError(FMPI2C_HandleTypeDef *hfmpi2c);
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606
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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607 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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608 * @}
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609 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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610
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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611 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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612 * @}
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613 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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614
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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615 /* Private constants ---------------------------------------------------------*/
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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616 /** @defgroup FMPI2C_Private_Constants FMPI2C Private Constants
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617 * @{
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618 */
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619
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620 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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621 * @}
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622 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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623
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624 /* Private macros ------------------------------------------------------------*/
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625 /** @defgroup FMPI2C_Private_Macro FMPI2C Private Macros
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626 * @{
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627 */
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628
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629 #define IS_FMPI2C_ADDRESSING_MODE(MODE) (((MODE) == FMPI2C_ADDRESSINGMODE_7BIT) || \
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630 ((MODE) == FMPI2C_ADDRESSINGMODE_10BIT))
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631
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632 #define IS_FMPI2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == FMPI2C_DUALADDRESS_DISABLE) || \
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633 ((ADDRESS) == FMPI2C_DUALADDRESS_ENABLE))
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634
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635 #define IS_FMPI2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == FMPI2C_OA2_NOMASK) || \
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636 ((MASK) == FMPI2C_OA2_MASK01) || \
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637 ((MASK) == FMPI2C_OA2_MASK02) || \
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638 ((MASK) == FMPI2C_OA2_MASK03) || \
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639 ((MASK) == FMPI2C_OA2_MASK04) || \
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640 ((MASK) == FMPI2C_OA2_MASK05) || \
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641 ((MASK) == FMPI2C_OA2_MASK06) || \
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642 ((MASK) == FMPI2C_OA2_MASK07))
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643
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644 #define IS_FMPI2C_GENERAL_CALL(CALL) (((CALL) == FMPI2C_GENERALCALL_DISABLE) || \
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645 ((CALL) == FMPI2C_GENERALCALL_ENABLE))
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646
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647 #define IS_FMPI2C_NO_STRETCH(STRETCH) (((STRETCH) == FMPI2C_NOSTRETCH_DISABLE) || \
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648 ((STRETCH) == FMPI2C_NOSTRETCH_ENABLE))
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649
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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650 #define IS_FMPI2C_MEMADD_SIZE(SIZE) (((SIZE) == FMPI2C_MEMADD_SIZE_8BIT) || \
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651 ((SIZE) == FMPI2C_MEMADD_SIZE_16BIT))
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652
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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653 #define IS_TRANSFER_MODE(MODE) (((MODE) == FMPI2C_RELOAD_MODE) || \
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654 ((MODE) == FMPI2C_AUTOEND_MODE) || \
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655 ((MODE) == FMPI2C_SOFTEND_MODE))
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656
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657 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == FMPI2C_GENERATE_STOP) || \
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658 ((REQUEST) == FMPI2C_GENERATE_START_READ) || \
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659 ((REQUEST) == FMPI2C_GENERATE_START_WRITE) || \
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660 ((REQUEST) == FMPI2C_NO_STARTSTOP))
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661
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662 #define IS_FMPI2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == FMPI2C_FIRST_FRAME) || \
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663 ((REQUEST) == FMPI2C_FIRST_AND_NEXT_FRAME) || \
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664 ((REQUEST) == FMPI2C_NEXT_FRAME) || \
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665 ((REQUEST) == FMPI2C_FIRST_AND_LAST_FRAME) || \
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666 ((REQUEST) == FMPI2C_LAST_FRAME) || \
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667 ((REQUEST) == FMPI2C_LAST_FRAME_NO_STOP))
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668
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669 #define FMPI2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(FMPI2C_CR2_SADD | FMPI2C_CR2_HEAD10R | FMPI2C_CR2_NBYTES | FMPI2C_CR2_RELOAD | FMPI2C_CR2_RD_WRN)))
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670
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671 #define FMPI2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & FMPI2C_ISR_ADDCODE) >> 16)
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672 #define FMPI2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & FMPI2C_ISR_DIR) >> 16)
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673 #define FMPI2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & FMPI2C_CR2_AUTOEND)
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674 #define FMPI2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & FMPI2C_OAR1_OA1)
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675 #define FMPI2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & FMPI2C_OAR2_OA2)
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676
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677 #define IS_FMPI2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
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678 #define IS_FMPI2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF)
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679
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680 #define FMPI2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00))) >> 8U)))
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681 #define FMPI2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF))))
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682
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683 #define FMPI2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == FMPI2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | (FMPI2C_CR2_START) | (FMPI2C_CR2_AUTOEND)) & (~FMPI2C_CR2_RD_WRN)) : \
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684 (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | (FMPI2C_CR2_ADD10) | (FMPI2C_CR2_START)) & (~FMPI2C_CR2_RD_WRN)))
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685 /**
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686 * @}
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687 */
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688
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689 /* Private Functions ---------------------------------------------------------*/
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690 /** @defgroup FMPI2C_Private_Functions FMPI2C Private Functions
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691 * @{
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692 */
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693 /* Private functions are defined in stm32f4xx_hal_fmpi2c.c file */
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694 /**
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695 * @}
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696 */
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697
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698 /**
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699 * @}
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700 */
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701
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702 /**
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703 * @}
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704 */
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705 #endif /* STM32F410xx || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
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706 #ifdef __cplusplus
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707 }
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708 #endif
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709
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710
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711 #endif /* __STM32F4xx_HAL_FMPI2C_H */
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712
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713 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/