Mercurial > public > ostc4
annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_eth.h @ 638:4532953ac1a0
Added last measured PPO2 value to sensor selection dialog:
In the divemenu => setpoint => UseSensor menu just the number of the sensor was as label. To have a better base for the selection decision the last measured value is now added to the label.
author | Ideenmodellierer |
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date | Wed, 24 Feb 2021 21:45:35 +0100 |
parents | c78bcbd5deda |
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rev | line source |
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128
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_hal_eth.h |
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4 * @author MCD Application Team |
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5 * @brief Header file of ETH HAL module. |
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6 ****************************************************************************** |
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7 * @attention |
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8 * |
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9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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10 * |
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11 * Redistribution and use in source and binary forms, with or without modification, |
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12 * are permitted provided that the following conditions are met: |
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13 * 1. Redistributions of source code must retain the above copyright notice, |
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14 * this list of conditions and the following disclaimer. |
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15 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 * this list of conditions and the following disclaimer in the documentation |
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17 * and/or other materials provided with the distribution. |
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 * may be used to endorse or promote products derived from this software |
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20 * without specific prior written permission. |
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21 * |
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 * |
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33 ****************************************************************************** |
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34 */ |
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35 |
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36 /* Define to prevent recursive inclusion -------------------------------------*/ |
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37 #ifndef __STM32F4xx_HAL_ETH_H |
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38 #define __STM32F4xx_HAL_ETH_H |
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39 |
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40 #ifdef __cplusplus |
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41 extern "C" { |
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42 #endif |
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43 |
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44 #if defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) ||\ |
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45 defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) |
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46 /* Includes ------------------------------------------------------------------*/ |
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47 #include "stm32f4xx_hal_def.h" |
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48 |
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49 /** @addtogroup STM32F4xx_HAL_Driver |
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50 * @{ |
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51 */ |
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52 |
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53 /** @addtogroup ETH |
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54 * @{ |
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55 */ |
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56 |
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57 /** @addtogroup ETH_Private_Macros |
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58 * @{ |
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59 */ |
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60 #define IS_ETH_PHY_ADDRESS(ADDRESS) ((ADDRESS) <= 0x20U) |
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61 #define IS_ETH_AUTONEGOTIATION(CMD) (((CMD) == ETH_AUTONEGOTIATION_ENABLE) || \ |
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62 ((CMD) == ETH_AUTONEGOTIATION_DISABLE)) |
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63 #define IS_ETH_SPEED(SPEED) (((SPEED) == ETH_SPEED_10M) || \ |
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64 ((SPEED) == ETH_SPEED_100M)) |
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65 #define IS_ETH_DUPLEX_MODE(MODE) (((MODE) == ETH_MODE_FULLDUPLEX) || \ |
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66 ((MODE) == ETH_MODE_HALFDUPLEX)) |
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67 #define IS_ETH_RX_MODE(MODE) (((MODE) == ETH_RXPOLLING_MODE) || \ |
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68 ((MODE) == ETH_RXINTERRUPT_MODE)) |
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69 #define IS_ETH_CHECKSUM_MODE(MODE) (((MODE) == ETH_CHECKSUM_BY_HARDWARE) || \ |
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70 ((MODE) == ETH_CHECKSUM_BY_SOFTWARE)) |
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71 #define IS_ETH_MEDIA_INTERFACE(MODE) (((MODE) == ETH_MEDIA_INTERFACE_MII) || \ |
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72 ((MODE) == ETH_MEDIA_INTERFACE_RMII)) |
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73 #define IS_ETH_WATCHDOG(CMD) (((CMD) == ETH_WATCHDOG_ENABLE) || \ |
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74 ((CMD) == ETH_WATCHDOG_DISABLE)) |
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75 #define IS_ETH_JABBER(CMD) (((CMD) == ETH_JABBER_ENABLE) || \ |
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76 ((CMD) == ETH_JABBER_DISABLE)) |
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77 #define IS_ETH_INTER_FRAME_GAP(GAP) (((GAP) == ETH_INTERFRAMEGAP_96BIT) || \ |
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78 ((GAP) == ETH_INTERFRAMEGAP_88BIT) || \ |
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79 ((GAP) == ETH_INTERFRAMEGAP_80BIT) || \ |
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80 ((GAP) == ETH_INTERFRAMEGAP_72BIT) || \ |
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81 ((GAP) == ETH_INTERFRAMEGAP_64BIT) || \ |
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82 ((GAP) == ETH_INTERFRAMEGAP_56BIT) || \ |
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83 ((GAP) == ETH_INTERFRAMEGAP_48BIT) || \ |
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84 ((GAP) == ETH_INTERFRAMEGAP_40BIT)) |
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85 #define IS_ETH_CARRIER_SENSE(CMD) (((CMD) == ETH_CARRIERSENCE_ENABLE) || \ |
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86 ((CMD) == ETH_CARRIERSENCE_DISABLE)) |
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87 #define IS_ETH_RECEIVE_OWN(CMD) (((CMD) == ETH_RECEIVEOWN_ENABLE) || \ |
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88 ((CMD) == ETH_RECEIVEOWN_DISABLE)) |
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89 #define IS_ETH_LOOPBACK_MODE(CMD) (((CMD) == ETH_LOOPBACKMODE_ENABLE) || \ |
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90 ((CMD) == ETH_LOOPBACKMODE_DISABLE)) |
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91 #define IS_ETH_CHECKSUM_OFFLOAD(CMD) (((CMD) == ETH_CHECKSUMOFFLAOD_ENABLE) || \ |
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92 ((CMD) == ETH_CHECKSUMOFFLAOD_DISABLE)) |
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93 #define IS_ETH_RETRY_TRANSMISSION(CMD) (((CMD) == ETH_RETRYTRANSMISSION_ENABLE) || \ |
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94 ((CMD) == ETH_RETRYTRANSMISSION_DISABLE)) |
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95 #define IS_ETH_AUTOMATIC_PADCRC_STRIP(CMD) (((CMD) == ETH_AUTOMATICPADCRCSTRIP_ENABLE) || \ |
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96 ((CMD) == ETH_AUTOMATICPADCRCSTRIP_DISABLE)) |
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97 #define IS_ETH_BACKOFF_LIMIT(LIMIT) (((LIMIT) == ETH_BACKOFFLIMIT_10) || \ |
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98 ((LIMIT) == ETH_BACKOFFLIMIT_8) || \ |
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99 ((LIMIT) == ETH_BACKOFFLIMIT_4) || \ |
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100 ((LIMIT) == ETH_BACKOFFLIMIT_1)) |
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101 #define IS_ETH_DEFERRAL_CHECK(CMD) (((CMD) == ETH_DEFFERRALCHECK_ENABLE) || \ |
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102 ((CMD) == ETH_DEFFERRALCHECK_DISABLE)) |
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103 #define IS_ETH_RECEIVE_ALL(CMD) (((CMD) == ETH_RECEIVEALL_ENABLE) || \ |
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104 ((CMD) == ETH_RECEIVEAll_DISABLE)) |
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105 #define IS_ETH_SOURCE_ADDR_FILTER(CMD) (((CMD) == ETH_SOURCEADDRFILTER_NORMAL_ENABLE) || \ |
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106 ((CMD) == ETH_SOURCEADDRFILTER_INVERSE_ENABLE) || \ |
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107 ((CMD) == ETH_SOURCEADDRFILTER_DISABLE)) |
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108 #define IS_ETH_CONTROL_FRAMES(PASS) (((PASS) == ETH_PASSCONTROLFRAMES_BLOCKALL) || \ |
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109 ((PASS) == ETH_PASSCONTROLFRAMES_FORWARDALL) || \ |
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110 ((PASS) == ETH_PASSCONTROLFRAMES_FORWARDPASSEDADDRFILTER)) |
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111 #define IS_ETH_BROADCAST_FRAMES_RECEPTION(CMD) (((CMD) == ETH_BROADCASTFRAMESRECEPTION_ENABLE) || \ |
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112 ((CMD) == ETH_BROADCASTFRAMESRECEPTION_DISABLE)) |
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113 #define IS_ETH_DESTINATION_ADDR_FILTER(FILTER) (((FILTER) == ETH_DESTINATIONADDRFILTER_NORMAL) || \ |
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114 ((FILTER) == ETH_DESTINATIONADDRFILTER_INVERSE)) |
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115 #define IS_ETH_PROMISCUOUS_MODE(CMD) (((CMD) == ETH_PROMISCUOUS_MODE_ENABLE) || \ |
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116 ((CMD) == ETH_PROMISCUOUS_MODE_DISABLE)) |
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117 #define IS_ETH_MULTICAST_FRAMES_FILTER(FILTER) (((FILTER) == ETH_MULTICASTFRAMESFILTER_PERFECTHASHTABLE) || \ |
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118 ((FILTER) == ETH_MULTICASTFRAMESFILTER_HASHTABLE) || \ |
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119 ((FILTER) == ETH_MULTICASTFRAMESFILTER_PERFECT) || \ |
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120 ((FILTER) == ETH_MULTICASTFRAMESFILTER_NONE)) |
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121 #define IS_ETH_UNICAST_FRAMES_FILTER(FILTER) (((FILTER) == ETH_UNICASTFRAMESFILTER_PERFECTHASHTABLE) || \ |
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122 ((FILTER) == ETH_UNICASTFRAMESFILTER_HASHTABLE) || \ |
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123 ((FILTER) == ETH_UNICASTFRAMESFILTER_PERFECT)) |
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124 #define IS_ETH_PAUSE_TIME(TIME) ((TIME) <= 0xFFFFU) |
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125 #define IS_ETH_ZEROQUANTA_PAUSE(CMD) (((CMD) == ETH_ZEROQUANTAPAUSE_ENABLE) || \ |
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126 ((CMD) == ETH_ZEROQUANTAPAUSE_DISABLE)) |
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127 #define IS_ETH_PAUSE_LOW_THRESHOLD(THRESHOLD) (((THRESHOLD) == ETH_PAUSELOWTHRESHOLD_MINUS4) || \ |
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128 ((THRESHOLD) == ETH_PAUSELOWTHRESHOLD_MINUS28) || \ |
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129 ((THRESHOLD) == ETH_PAUSELOWTHRESHOLD_MINUS144) || \ |
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130 ((THRESHOLD) == ETH_PAUSELOWTHRESHOLD_MINUS256)) |
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131 #define IS_ETH_UNICAST_PAUSE_FRAME_DETECT(CMD) (((CMD) == ETH_UNICASTPAUSEFRAMEDETECT_ENABLE) || \ |
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132 ((CMD) == ETH_UNICASTPAUSEFRAMEDETECT_DISABLE)) |
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133 #define IS_ETH_RECEIVE_FLOWCONTROL(CMD) (((CMD) == ETH_RECEIVEFLOWCONTROL_ENABLE) || \ |
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134 ((CMD) == ETH_RECEIVEFLOWCONTROL_DISABLE)) |
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135 #define IS_ETH_TRANSMIT_FLOWCONTROL(CMD) (((CMD) == ETH_TRANSMITFLOWCONTROL_ENABLE) || \ |
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136 ((CMD) == ETH_TRANSMITFLOWCONTROL_DISABLE)) |
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137 #define IS_ETH_VLAN_TAG_COMPARISON(COMPARISON) (((COMPARISON) == ETH_VLANTAGCOMPARISON_12BIT) || \ |
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138 ((COMPARISON) == ETH_VLANTAGCOMPARISON_16BIT)) |
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139 #define IS_ETH_VLAN_TAG_IDENTIFIER(IDENTIFIER) ((IDENTIFIER) <= 0xFFFFU) |
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140 #define IS_ETH_MAC_ADDRESS0123(ADDRESS) (((ADDRESS) == ETH_MAC_ADDRESS0) || \ |
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141 ((ADDRESS) == ETH_MAC_ADDRESS1) || \ |
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142 ((ADDRESS) == ETH_MAC_ADDRESS2) || \ |
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143 ((ADDRESS) == ETH_MAC_ADDRESS3)) |
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144 #define IS_ETH_MAC_ADDRESS123(ADDRESS) (((ADDRESS) == ETH_MAC_ADDRESS1) || \ |
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145 ((ADDRESS) == ETH_MAC_ADDRESS2) || \ |
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146 ((ADDRESS) == ETH_MAC_ADDRESS3)) |
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147 #define IS_ETH_MAC_ADDRESS_FILTER(FILTER) (((FILTER) == ETH_MAC_ADDRESSFILTER_SA) || \ |
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148 ((FILTER) == ETH_MAC_ADDRESSFILTER_DA)) |
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149 #define IS_ETH_MAC_ADDRESS_MASK(MASK) (((MASK) == ETH_MAC_ADDRESSMASK_BYTE6) || \ |
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150 ((MASK) == ETH_MAC_ADDRESSMASK_BYTE5) || \ |
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151 ((MASK) == ETH_MAC_ADDRESSMASK_BYTE4) || \ |
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152 ((MASK) == ETH_MAC_ADDRESSMASK_BYTE3) || \ |
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153 ((MASK) == ETH_MAC_ADDRESSMASK_BYTE2) || \ |
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154 ((MASK) == ETH_MAC_ADDRESSMASK_BYTE1)) |
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155 #define IS_ETH_DROP_TCPIP_CHECKSUM_FRAME(CMD) (((CMD) == ETH_DROPTCPIPCHECKSUMERRORFRAME_ENABLE) || \ |
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156 ((CMD) == ETH_DROPTCPIPCHECKSUMERRORFRAME_DISABLE)) |
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157 #define IS_ETH_RECEIVE_STORE_FORWARD(CMD) (((CMD) == ETH_RECEIVESTOREFORWARD_ENABLE) || \ |
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158 ((CMD) == ETH_RECEIVESTOREFORWARD_DISABLE)) |
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159 #define IS_ETH_FLUSH_RECEIVE_FRAME(CMD) (((CMD) == ETH_FLUSHRECEIVEDFRAME_ENABLE) || \ |
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160 ((CMD) == ETH_FLUSHRECEIVEDFRAME_DISABLE)) |
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161 #define IS_ETH_TRANSMIT_STORE_FORWARD(CMD) (((CMD) == ETH_TRANSMITSTOREFORWARD_ENABLE) || \ |
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162 ((CMD) == ETH_TRANSMITSTOREFORWARD_DISABLE)) |
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163 #define IS_ETH_TRANSMIT_THRESHOLD_CONTROL(THRESHOLD) (((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_64BYTES) || \ |
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164 ((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_128BYTES) || \ |
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165 ((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_192BYTES) || \ |
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166 ((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_256BYTES) || \ |
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167 ((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_40BYTES) || \ |
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168 ((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_32BYTES) || \ |
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169 ((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_24BYTES) || \ |
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170 ((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_16BYTES)) |
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171 #define IS_ETH_FORWARD_ERROR_FRAMES(CMD) (((CMD) == ETH_FORWARDERRORFRAMES_ENABLE) || \ |
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172 ((CMD) == ETH_FORWARDERRORFRAMES_DISABLE)) |
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173 #define IS_ETH_FORWARD_UNDERSIZED_GOOD_FRAMES(CMD) (((CMD) == ETH_FORWARDUNDERSIZEDGOODFRAMES_ENABLE) || \ |
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174 ((CMD) == ETH_FORWARDUNDERSIZEDGOODFRAMES_DISABLE)) |
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175 #define IS_ETH_RECEIVE_THRESHOLD_CONTROL(THRESHOLD) (((THRESHOLD) == ETH_RECEIVEDTHRESHOLDCONTROL_64BYTES) || \ |
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176 ((THRESHOLD) == ETH_RECEIVEDTHRESHOLDCONTROL_32BYTES) || \ |
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177 ((THRESHOLD) == ETH_RECEIVEDTHRESHOLDCONTROL_96BYTES) || \ |
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178 ((THRESHOLD) == ETH_RECEIVEDTHRESHOLDCONTROL_128BYTES)) |
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179 #define IS_ETH_SECOND_FRAME_OPERATE(CMD) (((CMD) == ETH_SECONDFRAMEOPERARTE_ENABLE) || \ |
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180 ((CMD) == ETH_SECONDFRAMEOPERARTE_DISABLE)) |
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181 #define IS_ETH_ADDRESS_ALIGNED_BEATS(CMD) (((CMD) == ETH_ADDRESSALIGNEDBEATS_ENABLE) || \ |
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182 ((CMD) == ETH_ADDRESSALIGNEDBEATS_DISABLE)) |
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183 #define IS_ETH_FIXED_BURST(CMD) (((CMD) == ETH_FIXEDBURST_ENABLE) || \ |
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184 ((CMD) == ETH_FIXEDBURST_DISABLE)) |
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185 #define IS_ETH_RXDMA_BURST_LENGTH(LENGTH) (((LENGTH) == ETH_RXDMABURSTLENGTH_1BEAT) || \ |
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186 ((LENGTH) == ETH_RXDMABURSTLENGTH_2BEAT) || \ |
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187 ((LENGTH) == ETH_RXDMABURSTLENGTH_4BEAT) || \ |
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188 ((LENGTH) == ETH_RXDMABURSTLENGTH_8BEAT) || \ |
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189 ((LENGTH) == ETH_RXDMABURSTLENGTH_16BEAT) || \ |
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190 ((LENGTH) == ETH_RXDMABURSTLENGTH_32BEAT) || \ |
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191 ((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_4BEAT) || \ |
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192 ((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_8BEAT) || \ |
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193 ((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_16BEAT) || \ |
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194 ((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_32BEAT) || \ |
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195 ((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_64BEAT) || \ |
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196 ((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_128BEAT)) |
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197 #define IS_ETH_TXDMA_BURST_LENGTH(LENGTH) (((LENGTH) == ETH_TXDMABURSTLENGTH_1BEAT) || \ |
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198 ((LENGTH) == ETH_TXDMABURSTLENGTH_2BEAT) || \ |
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199 ((LENGTH) == ETH_TXDMABURSTLENGTH_4BEAT) || \ |
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200 ((LENGTH) == ETH_TXDMABURSTLENGTH_8BEAT) || \ |
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201 ((LENGTH) == ETH_TXDMABURSTLENGTH_16BEAT) || \ |
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202 ((LENGTH) == ETH_TXDMABURSTLENGTH_32BEAT) || \ |
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203 ((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_4BEAT) || \ |
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204 ((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_8BEAT) || \ |
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205 ((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_16BEAT) || \ |
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206 ((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_32BEAT) || \ |
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207 ((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_64BEAT) || \ |
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208 ((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_128BEAT)) |
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209 #define IS_ETH_DMA_DESC_SKIP_LENGTH(LENGTH) ((LENGTH) <= 0x1FU) |
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210 #define IS_ETH_DMA_ARBITRATION_ROUNDROBIN_RXTX(RATIO) (((RATIO) == ETH_DMAARBITRATION_ROUNDROBIN_RXTX_1_1) || \ |
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211 ((RATIO) == ETH_DMAARBITRATION_ROUNDROBIN_RXTX_2_1) || \ |
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212 ((RATIO) == ETH_DMAARBITRATION_ROUNDROBIN_RXTX_3_1) || \ |
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213 ((RATIO) == ETH_DMAARBITRATION_ROUNDROBIN_RXTX_4_1) || \ |
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214 ((RATIO) == ETH_DMAARBITRATION_RXPRIORTX)) |
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215 #define IS_ETH_DMATXDESC_GET_FLAG(FLAG) (((FLAG) == ETH_DMATXDESC_OWN) || \ |
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216 ((FLAG) == ETH_DMATXDESC_IC) || \ |
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217 ((FLAG) == ETH_DMATXDESC_LS) || \ |
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218 ((FLAG) == ETH_DMATXDESC_FS) || \ |
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219 ((FLAG) == ETH_DMATXDESC_DC) || \ |
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220 ((FLAG) == ETH_DMATXDESC_DP) || \ |
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221 ((FLAG) == ETH_DMATXDESC_TTSE) || \ |
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222 ((FLAG) == ETH_DMATXDESC_TER) || \ |
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223 ((FLAG) == ETH_DMATXDESC_TCH) || \ |
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224 ((FLAG) == ETH_DMATXDESC_TTSS) || \ |
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225 ((FLAG) == ETH_DMATXDESC_IHE) || \ |
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226 ((FLAG) == ETH_DMATXDESC_ES) || \ |
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227 ((FLAG) == ETH_DMATXDESC_JT) || \ |
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228 ((FLAG) == ETH_DMATXDESC_FF) || \ |
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229 ((FLAG) == ETH_DMATXDESC_PCE) || \ |
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230 ((FLAG) == ETH_DMATXDESC_LCA) || \ |
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231 ((FLAG) == ETH_DMATXDESC_NC) || \ |
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232 ((FLAG) == ETH_DMATXDESC_LCO) || \ |
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233 ((FLAG) == ETH_DMATXDESC_EC) || \ |
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234 ((FLAG) == ETH_DMATXDESC_VF) || \ |
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235 ((FLAG) == ETH_DMATXDESC_CC) || \ |
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236 ((FLAG) == ETH_DMATXDESC_ED) || \ |
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237 ((FLAG) == ETH_DMATXDESC_UF) || \ |
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238 ((FLAG) == ETH_DMATXDESC_DB)) |
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239 #define IS_ETH_DMA_TXDESC_SEGMENT(SEGMENT) (((SEGMENT) == ETH_DMATXDESC_LASTSEGMENTS) || \ |
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240 ((SEGMENT) == ETH_DMATXDESC_FIRSTSEGMENT)) |
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241 #define IS_ETH_DMA_TXDESC_CHECKSUM(CHECKSUM) (((CHECKSUM) == ETH_DMATXDESC_CHECKSUMBYPASS) || \ |
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242 ((CHECKSUM) == ETH_DMATXDESC_CHECKSUMIPV4HEADER) || \ |
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243 ((CHECKSUM) == ETH_DMATXDESC_CHECKSUMTCPUDPICMPSEGMENT) || \ |
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244 ((CHECKSUM) == ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL)) |
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245 #define IS_ETH_DMATXDESC_BUFFER_SIZE(SIZE) ((SIZE) <= 0x1FFFU) |
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246 #define IS_ETH_DMARXDESC_GET_FLAG(FLAG) (((FLAG) == ETH_DMARXDESC_OWN) || \ |
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247 ((FLAG) == ETH_DMARXDESC_AFM) || \ |
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248 ((FLAG) == ETH_DMARXDESC_ES) || \ |
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249 ((FLAG) == ETH_DMARXDESC_DE) || \ |
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250 ((FLAG) == ETH_DMARXDESC_SAF) || \ |
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251 ((FLAG) == ETH_DMARXDESC_LE) || \ |
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252 ((FLAG) == ETH_DMARXDESC_OE) || \ |
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253 ((FLAG) == ETH_DMARXDESC_VLAN) || \ |
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254 ((FLAG) == ETH_DMARXDESC_FS) || \ |
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255 ((FLAG) == ETH_DMARXDESC_LS) || \ |
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256 ((FLAG) == ETH_DMARXDESC_IPV4HCE) || \ |
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257 ((FLAG) == ETH_DMARXDESC_LC) || \ |
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258 ((FLAG) == ETH_DMARXDESC_FT) || \ |
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259 ((FLAG) == ETH_DMARXDESC_RWT) || \ |
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260 ((FLAG) == ETH_DMARXDESC_RE) || \ |
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261 ((FLAG) == ETH_DMARXDESC_DBE) || \ |
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262 ((FLAG) == ETH_DMARXDESC_CE) || \ |
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263 ((FLAG) == ETH_DMARXDESC_MAMPCE)) |
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264 #define IS_ETH_DMA_RXDESC_BUFFER(BUFFER) (((BUFFER) == ETH_DMARXDESC_BUFFER1) || \ |
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265 ((BUFFER) == ETH_DMARXDESC_BUFFER2)) |
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266 #define IS_ETH_PMT_GET_FLAG(FLAG) (((FLAG) == ETH_PMT_FLAG_WUFR) || \ |
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267 ((FLAG) == ETH_PMT_FLAG_MPR)) |
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268 #define IS_ETH_DMA_FLAG(FLAG) ((((FLAG) & 0xC7FE1800U) == 0x00U) && ((FLAG) != 0x00U)) |
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269 #define IS_ETH_DMA_GET_FLAG(FLAG) (((FLAG) == ETH_DMA_FLAG_TST) || ((FLAG) == ETH_DMA_FLAG_PMT) || \ |
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270 ((FLAG) == ETH_DMA_FLAG_MMC) || ((FLAG) == ETH_DMA_FLAG_DATATRANSFERERROR) || \ |
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271 ((FLAG) == ETH_DMA_FLAG_READWRITEERROR) || ((FLAG) == ETH_DMA_FLAG_ACCESSERROR) || \ |
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272 ((FLAG) == ETH_DMA_FLAG_NIS) || ((FLAG) == ETH_DMA_FLAG_AIS) || \ |
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273 ((FLAG) == ETH_DMA_FLAG_ER) || ((FLAG) == ETH_DMA_FLAG_FBE) || \ |
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274 ((FLAG) == ETH_DMA_FLAG_ET) || ((FLAG) == ETH_DMA_FLAG_RWT) || \ |
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275 ((FLAG) == ETH_DMA_FLAG_RPS) || ((FLAG) == ETH_DMA_FLAG_RBU) || \ |
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276 ((FLAG) == ETH_DMA_FLAG_R) || ((FLAG) == ETH_DMA_FLAG_TU) || \ |
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277 ((FLAG) == ETH_DMA_FLAG_RO) || ((FLAG) == ETH_DMA_FLAG_TJT) || \ |
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278 ((FLAG) == ETH_DMA_FLAG_TBU) || ((FLAG) == ETH_DMA_FLAG_TPS) || \ |
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279 ((FLAG) == ETH_DMA_FLAG_T)) |
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280 #define IS_ETH_MAC_IT(IT) ((((IT) & 0xFFFFFDF1U) == 0x00U) && ((IT) != 0x00U)) |
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281 #define IS_ETH_MAC_GET_IT(IT) (((IT) == ETH_MAC_IT_TST) || ((IT) == ETH_MAC_IT_MMCT) || \ |
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282 ((IT) == ETH_MAC_IT_MMCR) || ((IT) == ETH_MAC_IT_MMC) || \ |
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283 ((IT) == ETH_MAC_IT_PMT)) |
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284 #define IS_ETH_MAC_GET_FLAG(FLAG) (((FLAG) == ETH_MAC_FLAG_TST) || ((FLAG) == ETH_MAC_FLAG_MMCT) || \ |
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285 ((FLAG) == ETH_MAC_FLAG_MMCR) || ((FLAG) == ETH_MAC_FLAG_MMC) || \ |
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286 ((FLAG) == ETH_MAC_FLAG_PMT)) |
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287 #define IS_ETH_DMA_IT(IT) ((((IT) & 0xC7FE1800U) == 0x00U) && ((IT) != 0x00U)) |
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288 #define IS_ETH_DMA_GET_IT(IT) (((IT) == ETH_DMA_IT_TST) || ((IT) == ETH_DMA_IT_PMT) || \ |
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289 ((IT) == ETH_DMA_IT_MMC) || ((IT) == ETH_DMA_IT_NIS) || \ |
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290 ((IT) == ETH_DMA_IT_AIS) || ((IT) == ETH_DMA_IT_ER) || \ |
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291 ((IT) == ETH_DMA_IT_FBE) || ((IT) == ETH_DMA_IT_ET) || \ |
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292 ((IT) == ETH_DMA_IT_RWT) || ((IT) == ETH_DMA_IT_RPS) || \ |
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293 ((IT) == ETH_DMA_IT_RBU) || ((IT) == ETH_DMA_IT_R) || \ |
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294 ((IT) == ETH_DMA_IT_TU) || ((IT) == ETH_DMA_IT_RO) || \ |
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295 ((IT) == ETH_DMA_IT_TJT) || ((IT) == ETH_DMA_IT_TBU) || \ |
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296 ((IT) == ETH_DMA_IT_TPS) || ((IT) == ETH_DMA_IT_T)) |
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297 #define IS_ETH_DMA_GET_OVERFLOW(OVERFLOW) (((OVERFLOW) == ETH_DMA_OVERFLOW_RXFIFOCOUNTER) || \ |
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298 ((OVERFLOW) == ETH_DMA_OVERFLOW_MISSEDFRAMECOUNTER)) |
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299 #define IS_ETH_MMC_IT(IT) (((((IT) & 0xFFDF3FFFU) == 0x00U) || (((IT) & 0xEFFDFF9FU) == 0x00U)) && \ |
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300 ((IT) != 0x00U)) |
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301 #define IS_ETH_MMC_GET_IT(IT) (((IT) == ETH_MMC_IT_TGF) || ((IT) == ETH_MMC_IT_TGFMSC) || \ |
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302 ((IT) == ETH_MMC_IT_TGFSC) || ((IT) == ETH_MMC_IT_RGUF) || \ |
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303 ((IT) == ETH_MMC_IT_RFAE) || ((IT) == ETH_MMC_IT_RFCE)) |
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304 #define IS_ETH_ENHANCED_DESCRIPTOR_FORMAT(CMD) (((CMD) == ETH_DMAENHANCEDDESCRIPTOR_ENABLE) || \ |
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305 ((CMD) == ETH_DMAENHANCEDDESCRIPTOR_DISABLE)) |
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306 |
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307 /** |
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308 * @} |
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309 */ |
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310 |
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311 /** @addtogroup ETH_Private_Defines |
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312 * @{ |
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313 */ |
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314 /* Delay to wait when writing to some Ethernet registers */ |
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315 #define ETH_REG_WRITE_DELAY 0x00000001U |
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316 |
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317 /* ETHERNET Errors */ |
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318 #define ETH_SUCCESS 0U |
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319 #define ETH_ERROR 1U |
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320 |
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321 /* ETHERNET DMA Tx descriptors Collision Count Shift */ |
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322 #define ETH_DMATXDESC_COLLISION_COUNTSHIFT 3U |
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323 |
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324 /* ETHERNET DMA Tx descriptors Buffer2 Size Shift */ |
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325 #define ETH_DMATXDESC_BUFFER2_SIZESHIFT 16U |
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326 |
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327 /* ETHERNET DMA Rx descriptors Frame Length Shift */ |
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328 #define ETH_DMARXDESC_FRAME_LENGTHSHIFT 16U |
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329 |
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330 /* ETHERNET DMA Rx descriptors Buffer2 Size Shift */ |
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331 #define ETH_DMARXDESC_BUFFER2_SIZESHIFT 16U |
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332 |
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333 /* ETHERNET DMA Rx descriptors Frame length Shift */ |
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334 #define ETH_DMARXDESC_FRAMELENGTHSHIFT 16U |
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335 |
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336 /* ETHERNET MAC address offsets */ |
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337 #define ETH_MAC_ADDR_HBASE (uint32_t)(ETH_MAC_BASE + 0x40U) /* ETHERNET MAC address high offset */ |
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338 #define ETH_MAC_ADDR_LBASE (uint32_t)(ETH_MAC_BASE + 0x44U) /* ETHERNET MAC address low offset */ |
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339 |
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340 /* ETHERNET MACMIIAR register Mask */ |
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341 #define ETH_MACMIIAR_CR_MASK 0xFFFFFFE3U |
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342 |
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343 /* ETHERNET MACCR register Mask */ |
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344 #define ETH_MACCR_CLEAR_MASK 0xFF20810FU |
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345 |
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346 /* ETHERNET MACFCR register Mask */ |
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347 #define ETH_MACFCR_CLEAR_MASK 0x0000FF41U |
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348 |
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349 /* ETHERNET DMAOMR register Mask */ |
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350 #define ETH_DMAOMR_CLEAR_MASK 0xF8DE3F23U |
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351 |
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352 /* ETHERNET Remote Wake-up frame register length */ |
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353 #define ETH_WAKEUP_REGISTER_LENGTH 8U |
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354 |
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355 /* ETHERNET Missed frames counter Shift */ |
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356 #define ETH_DMA_RX_OVERFLOW_MISSEDFRAMES_COUNTERSHIFT 17U |
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357 /** |
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358 * @} |
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359 */ |
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360 |
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361 /* Exported types ------------------------------------------------------------*/ |
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362 /** @defgroup ETH_Exported_Types ETH Exported Types |
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363 * @{ |
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364 */ |
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365 |
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366 /** |
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367 * @brief HAL State structures definition |
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368 */ |
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369 typedef enum |
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370 { |
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371 HAL_ETH_STATE_RESET = 0x00U, /*!< Peripheral not yet Initialized or disabled */ |
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372 HAL_ETH_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ |
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373 HAL_ETH_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ |
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374 HAL_ETH_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */ |
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375 HAL_ETH_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ |
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376 HAL_ETH_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission and Reception process is ongoing */ |
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377 HAL_ETH_STATE_BUSY_WR = 0x42U, /*!< Write process is ongoing */ |
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378 HAL_ETH_STATE_BUSY_RD = 0x82U, /*!< Read process is ongoing */ |
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379 HAL_ETH_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ |
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380 HAL_ETH_STATE_ERROR = 0x04U /*!< Reception process is ongoing */ |
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381 }HAL_ETH_StateTypeDef; |
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382 |
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383 /** |
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384 * @brief ETH Init Structure definition |
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385 */ |
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386 |
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387 typedef struct |
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388 { |
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389 uint32_t AutoNegotiation; /*!< Selects or not the AutoNegotiation mode for the external PHY |
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390 The AutoNegotiation allows an automatic setting of the Speed (10/100Mbps) |
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391 and the mode (half/full-duplex). |
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392 This parameter can be a value of @ref ETH_AutoNegotiation */ |
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393 |
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394 uint32_t Speed; /*!< Sets the Ethernet speed: 10/100 Mbps. |
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395 This parameter can be a value of @ref ETH_Speed */ |
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396 |
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397 uint32_t DuplexMode; /*!< Selects the MAC duplex mode: Half-Duplex or Full-Duplex mode |
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398 This parameter can be a value of @ref ETH_Duplex_Mode */ |
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399 |
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400 uint16_t PhyAddress; /*!< Ethernet PHY address. |
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401 This parameter must be a number between Min_Data = 0 and Max_Data = 32 */ |
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402 |
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403 uint8_t *MACAddr; /*!< MAC Address of used Hardware: must be pointer on an array of 6 bytes */ |
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404 |
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405 uint32_t RxMode; /*!< Selects the Ethernet Rx mode: Polling mode, Interrupt mode. |
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406 This parameter can be a value of @ref ETH_Rx_Mode */ |
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407 |
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408 uint32_t ChecksumMode; /*!< Selects if the checksum is check by hardware or by software. |
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409 This parameter can be a value of @ref ETH_Checksum_Mode */ |
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410 |
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411 uint32_t MediaInterface; /*!< Selects the media-independent interface or the reduced media-independent interface. |
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412 This parameter can be a value of @ref ETH_Media_Interface */ |
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413 |
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414 } ETH_InitTypeDef; |
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415 |
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416 |
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417 /** |
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418 * @brief ETH MAC Configuration Structure definition |
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419 */ |
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420 |
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421 typedef struct |
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422 { |
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423 uint32_t Watchdog; /*!< Selects or not the Watchdog timer |
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424 When enabled, the MAC allows no more then 2048 bytes to be received. |
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425 When disabled, the MAC can receive up to 16384 bytes. |
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426 This parameter can be a value of @ref ETH_Watchdog */ |
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427 |
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428 uint32_t Jabber; /*!< Selects or not Jabber timer |
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429 When enabled, the MAC allows no more then 2048 bytes to be sent. |
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430 When disabled, the MAC can send up to 16384 bytes. |
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431 This parameter can be a value of @ref ETH_Jabber */ |
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432 |
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433 uint32_t InterFrameGap; /*!< Selects the minimum IFG between frames during transmission. |
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434 This parameter can be a value of @ref ETH_Inter_Frame_Gap */ |
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435 |
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436 uint32_t CarrierSense; /*!< Selects or not the Carrier Sense. |
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437 This parameter can be a value of @ref ETH_Carrier_Sense */ |
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438 |
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439 uint32_t ReceiveOwn; /*!< Selects or not the ReceiveOwn, |
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440 ReceiveOwn allows the reception of frames when the TX_EN signal is asserted |
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441 in Half-Duplex mode. |
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442 This parameter can be a value of @ref ETH_Receive_Own */ |
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443 |
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444 uint32_t LoopbackMode; /*!< Selects or not the internal MAC MII Loopback mode. |
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445 This parameter can be a value of @ref ETH_Loop_Back_Mode */ |
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446 |
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447 uint32_t ChecksumOffload; /*!< Selects or not the IPv4 checksum checking for received frame payloads' TCP/UDP/ICMP headers. |
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448 This parameter can be a value of @ref ETH_Checksum_Offload */ |
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449 |
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450 uint32_t RetryTransmission; /*!< Selects or not the MAC attempt retries transmission, based on the settings of BL, |
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451 when a collision occurs (Half-Duplex mode). |
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452 This parameter can be a value of @ref ETH_Retry_Transmission */ |
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453 |
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454 uint32_t AutomaticPadCRCStrip; /*!< Selects or not the Automatic MAC Pad/CRC Stripping. |
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455 This parameter can be a value of @ref ETH_Automatic_Pad_CRC_Strip */ |
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456 |
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457 uint32_t BackOffLimit; /*!< Selects the BackOff limit value. |
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458 This parameter can be a value of @ref ETH_Back_Off_Limit */ |
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459 |
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460 uint32_t DeferralCheck; /*!< Selects or not the deferral check function (Half-Duplex mode). |
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461 This parameter can be a value of @ref ETH_Deferral_Check */ |
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462 |
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463 uint32_t ReceiveAll; /*!< Selects or not all frames reception by the MAC (No filtering). |
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464 This parameter can be a value of @ref ETH_Receive_All */ |
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465 |
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466 uint32_t SourceAddrFilter; /*!< Selects the Source Address Filter mode. |
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467 This parameter can be a value of @ref ETH_Source_Addr_Filter */ |
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468 |
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469 uint32_t PassControlFrames; /*!< Sets the forwarding mode of the control frames (including unicast and multicast PAUSE frames) |
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470 This parameter can be a value of @ref ETH_Pass_Control_Frames */ |
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471 |
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472 uint32_t BroadcastFramesReception; /*!< Selects or not the reception of Broadcast Frames. |
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473 This parameter can be a value of @ref ETH_Broadcast_Frames_Reception */ |
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474 |
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475 uint32_t DestinationAddrFilter; /*!< Sets the destination filter mode for both unicast and multicast frames. |
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476 This parameter can be a value of @ref ETH_Destination_Addr_Filter */ |
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477 |
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478 uint32_t PromiscuousMode; /*!< Selects or not the Promiscuous Mode |
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479 This parameter can be a value of @ref ETH_Promiscuous_Mode */ |
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480 |
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481 uint32_t MulticastFramesFilter; /*!< Selects the Multicast Frames filter mode: None/HashTableFilter/PerfectFilter/PerfectHashTableFilter. |
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482 This parameter can be a value of @ref ETH_Multicast_Frames_Filter */ |
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483 |
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484 uint32_t UnicastFramesFilter; /*!< Selects the Unicast Frames filter mode: HashTableFilter/PerfectFilter/PerfectHashTableFilter. |
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485 This parameter can be a value of @ref ETH_Unicast_Frames_Filter */ |
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486 |
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487 uint32_t HashTableHigh; /*!< This field holds the higher 32 bits of Hash table. |
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488 This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFFU */ |
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489 |
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490 uint32_t HashTableLow; /*!< This field holds the lower 32 bits of Hash table. |
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491 This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFFU */ |
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492 |
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493 uint32_t PauseTime; /*!< This field holds the value to be used in the Pause Time field in the transmit control frame. |
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494 This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFU */ |
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495 |
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496 uint32_t ZeroQuantaPause; /*!< Selects or not the automatic generation of Zero-Quanta Pause Control frames. |
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497 This parameter can be a value of @ref ETH_Zero_Quanta_Pause */ |
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498 |
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499 uint32_t PauseLowThreshold; /*!< This field configures the threshold of the PAUSE to be checked for |
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500 automatic retransmission of PAUSE Frame. |
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501 This parameter can be a value of @ref ETH_Pause_Low_Threshold */ |
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502 |
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503 uint32_t UnicastPauseFrameDetect; /*!< Selects or not the MAC detection of the Pause frames (with MAC Address0 |
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504 unicast address and unique multicast address). |
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505 This parameter can be a value of @ref ETH_Unicast_Pause_Frame_Detect */ |
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506 |
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507 uint32_t ReceiveFlowControl; /*!< Enables or disables the MAC to decode the received Pause frame and |
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508 disable its transmitter for a specified time (Pause Time) |
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509 This parameter can be a value of @ref ETH_Receive_Flow_Control */ |
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510 |
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511 uint32_t TransmitFlowControl; /*!< Enables or disables the MAC to transmit Pause frames (Full-Duplex mode) |
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512 or the MAC back-pressure operation (Half-Duplex mode) |
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513 This parameter can be a value of @ref ETH_Transmit_Flow_Control */ |
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514 |
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515 uint32_t VLANTagComparison; /*!< Selects the 12-bit VLAN identifier or the complete 16-bit VLAN tag for |
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516 comparison and filtering. |
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517 This parameter can be a value of @ref ETH_VLAN_Tag_Comparison */ |
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518 |
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519 uint32_t VLANTagIdentifier; /*!< Holds the VLAN tag identifier for receive frames */ |
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520 |
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521 } ETH_MACInitTypeDef; |
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522 |
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523 /** |
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524 * @brief ETH DMA Configuration Structure definition |
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525 */ |
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526 |
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527 typedef struct |
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528 { |
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529 uint32_t DropTCPIPChecksumErrorFrame; /*!< Selects or not the Dropping of TCP/IP Checksum Error Frames. |
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530 This parameter can be a value of @ref ETH_Drop_TCP_IP_Checksum_Error_Frame */ |
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531 |
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532 uint32_t ReceiveStoreForward; /*!< Enables or disables the Receive store and forward mode. |
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533 This parameter can be a value of @ref ETH_Receive_Store_Forward */ |
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534 |
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535 uint32_t FlushReceivedFrame; /*!< Enables or disables the flushing of received frames. |
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536 This parameter can be a value of @ref ETH_Flush_Received_Frame */ |
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537 |
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538 uint32_t TransmitStoreForward; /*!< Enables or disables Transmit store and forward mode. |
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539 This parameter can be a value of @ref ETH_Transmit_Store_Forward */ |
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540 |
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541 uint32_t TransmitThresholdControl; /*!< Selects or not the Transmit Threshold Control. |
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542 This parameter can be a value of @ref ETH_Transmit_Threshold_Control */ |
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543 |
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544 uint32_t ForwardErrorFrames; /*!< Selects or not the forward to the DMA of erroneous frames. |
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545 This parameter can be a value of @ref ETH_Forward_Error_Frames */ |
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546 |
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547 uint32_t ForwardUndersizedGoodFrames; /*!< Enables or disables the Rx FIFO to forward Undersized frames (frames with no Error |
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548 and length less than 64 bytes) including pad-bytes and CRC) |
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549 This parameter can be a value of @ref ETH_Forward_Undersized_Good_Frames */ |
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550 |
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551 uint32_t ReceiveThresholdControl; /*!< Selects the threshold level of the Receive FIFO. |
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552 This parameter can be a value of @ref ETH_Receive_Threshold_Control */ |
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553 |
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554 uint32_t SecondFrameOperate; /*!< Selects or not the Operate on second frame mode, which allows the DMA to process a second |
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555 frame of Transmit data even before obtaining the status for the first frame. |
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556 This parameter can be a value of @ref ETH_Second_Frame_Operate */ |
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557 |
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558 uint32_t AddressAlignedBeats; /*!< Enables or disables the Address Aligned Beats. |
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559 This parameter can be a value of @ref ETH_Address_Aligned_Beats */ |
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560 |
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561 uint32_t FixedBurst; /*!< Enables or disables the AHB Master interface fixed burst transfers. |
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562 This parameter can be a value of @ref ETH_Fixed_Burst */ |
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563 |
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564 uint32_t RxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Rx DMA transaction. |
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565 This parameter can be a value of @ref ETH_Rx_DMA_Burst_Length */ |
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566 |
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567 uint32_t TxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Tx DMA transaction. |
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568 This parameter can be a value of @ref ETH_Tx_DMA_Burst_Length */ |
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569 |
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570 uint32_t EnhancedDescriptorFormat; /*!< Enables the enhanced descriptor format. |
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571 This parameter can be a value of @ref ETH_DMA_Enhanced_descriptor_format */ |
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572 |
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573 uint32_t DescriptorSkipLength; /*!< Specifies the number of word to skip between two unchained descriptors (Ring mode) |
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574 This parameter must be a number between Min_Data = 0 and Max_Data = 32 */ |
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575 |
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576 uint32_t DMAArbitration; /*!< Selects the DMA Tx/Rx arbitration. |
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577 This parameter can be a value of @ref ETH_DMA_Arbitration */ |
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578 } ETH_DMAInitTypeDef; |
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579 |
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580 |
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581 /** |
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582 * @brief ETH DMA Descriptors data structure definition |
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583 */ |
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584 |
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585 typedef struct |
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586 { |
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587 __IO uint32_t Status; /*!< Status */ |
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588 |
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589 uint32_t ControlBufferSize; /*!< Control and Buffer1, Buffer2 lengths */ |
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590 |
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591 uint32_t Buffer1Addr; /*!< Buffer1 address pointer */ |
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592 |
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593 uint32_t Buffer2NextDescAddr; /*!< Buffer2 or next descriptor address pointer */ |
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594 |
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595 /*!< Enhanced ETHERNET DMA PTP Descriptors */ |
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596 uint32_t ExtendedStatus; /*!< Extended status for PTP receive descriptor */ |
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597 |
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598 uint32_t Reserved1; /*!< Reserved */ |
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599 |
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600 uint32_t TimeStampLow; /*!< Time Stamp Low value for transmit and receive */ |
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601 |
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602 uint32_t TimeStampHigh; /*!< Time Stamp High value for transmit and receive */ |
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603 |
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604 } ETH_DMADescTypeDef; |
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605 |
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606 /** |
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607 * @brief Received Frame Informations structure definition |
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608 */ |
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609 typedef struct |
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610 { |
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611 ETH_DMADescTypeDef *FSRxDesc; /*!< First Segment Rx Desc */ |
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612 |
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613 ETH_DMADescTypeDef *LSRxDesc; /*!< Last Segment Rx Desc */ |
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614 |
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615 uint32_t SegCount; /*!< Segment count */ |
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616 |
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617 uint32_t length; /*!< Frame length */ |
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618 |
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619 uint32_t buffer; /*!< Frame buffer */ |
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620 |
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621 } ETH_DMARxFrameInfos; |
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622 |
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623 /** |
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624 * @brief ETH Handle Structure definition |
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625 */ |
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626 |
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627 typedef struct |
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628 { |
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629 ETH_TypeDef *Instance; /*!< Register base address */ |
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630 |
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631 ETH_InitTypeDef Init; /*!< Ethernet Init Configuration */ |
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632 |
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633 uint32_t LinkStatus; /*!< Ethernet link status */ |
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634 |
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635 ETH_DMADescTypeDef *RxDesc; /*!< Rx descriptor to Get */ |
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636 |
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637 ETH_DMADescTypeDef *TxDesc; /*!< Tx descriptor to Set */ |
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638 |
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639 ETH_DMARxFrameInfos RxFrameInfos; /*!< last Rx frame infos */ |
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640 |
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641 __IO HAL_ETH_StateTypeDef State; /*!< ETH communication state */ |
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642 |
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643 HAL_LockTypeDef Lock; /*!< ETH Lock */ |
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644 |
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645 } ETH_HandleTypeDef; |
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646 |
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647 /** |
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648 * @} |
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649 */ |
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650 |
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651 /* Exported constants --------------------------------------------------------*/ |
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652 /** @defgroup ETH_Exported_Constants ETH Exported Constants |
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653 * @{ |
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654 */ |
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655 |
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656 /** @defgroup ETH_Buffers_setting ETH Buffers setting |
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657 * @{ |
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658 */ |
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659 #define ETH_MAX_PACKET_SIZE 1524U /*!< ETH_HEADER + ETH_EXTRA + ETH_VLAN_TAG + ETH_MAX_ETH_PAYLOAD + ETH_CRC */ |
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660 #define ETH_HEADER 14U /*!< 6 byte Dest addr, 6 byte Src addr, 2 byte length/type */ |
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661 #define ETH_CRC 4U /*!< Ethernet CRC */ |
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662 #define ETH_EXTRA 2U /*!< Extra bytes in some cases */ |
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663 #define ETH_VLAN_TAG 4U /*!< optional 802.1q VLAN Tag */ |
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664 #define ETH_MIN_ETH_PAYLOAD 46U /*!< Minimum Ethernet payload size */ |
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665 #define ETH_MAX_ETH_PAYLOAD 1500U /*!< Maximum Ethernet payload size */ |
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666 #define ETH_JUMBO_FRAME_PAYLOAD 9000U /*!< Jumbo frame payload size */ |
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667 |
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668 /* Ethernet driver receive buffers are organized in a chained linked-list, when |
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669 an ethernet packet is received, the Rx-DMA will transfer the packet from RxFIFO |
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670 to the driver receive buffers memory. |
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671 |
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672 Depending on the size of the received ethernet packet and the size of |
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673 each ethernet driver receive buffer, the received packet can take one or more |
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674 ethernet driver receive buffer. |
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675 |
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676 In below are defined the size of one ethernet driver receive buffer ETH_RX_BUF_SIZE |
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677 and the total count of the driver receive buffers ETH_RXBUFNB. |
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678 |
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679 The configured value for ETH_RX_BUF_SIZE and ETH_RXBUFNB are only provided as |
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680 example, they can be reconfigured in the application layer to fit the application |
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681 needs */ |
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682 |
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683 /* Here we configure each Ethernet driver receive buffer to fit the Max size Ethernet |
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684 packet */ |
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685 #ifndef ETH_RX_BUF_SIZE |
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686 #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE |
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687 #endif |
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688 |
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689 /* 5 Ethernet driver receive buffers are used (in a chained linked list)*/ |
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690 #ifndef ETH_RXBUFNB |
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691 #define ETH_RXBUFNB 5U /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ |
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692 #endif |
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693 |
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694 |
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695 /* Ethernet driver transmit buffers are organized in a chained linked-list, when |
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696 an ethernet packet is transmitted, Tx-DMA will transfer the packet from the |
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697 driver transmit buffers memory to the TxFIFO. |
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698 |
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699 Depending on the size of the Ethernet packet to be transmitted and the size of |
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700 each ethernet driver transmit buffer, the packet to be transmitted can take |
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701 one or more ethernet driver transmit buffer. |
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702 |
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703 In below are defined the size of one ethernet driver transmit buffer ETH_TX_BUF_SIZE |
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704 and the total count of the driver transmit buffers ETH_TXBUFNB. |
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705 |
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706 The configured value for ETH_TX_BUF_SIZE and ETH_TXBUFNB are only provided as |
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707 example, they can be reconfigured in the application layer to fit the application |
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708 needs */ |
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709 |
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710 /* Here we configure each Ethernet driver transmit buffer to fit the Max size Ethernet |
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711 packet */ |
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712 #ifndef ETH_TX_BUF_SIZE |
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713 #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE |
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714 #endif |
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715 |
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716 /* 5 ethernet driver transmit buffers are used (in a chained linked list)*/ |
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717 #ifndef ETH_TXBUFNB |
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718 #define ETH_TXBUFNB 5U /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ |
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719 #endif |
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720 |
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721 /** |
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722 * @} |
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723 */ |
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724 |
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725 /** @defgroup ETH_DMA_TX_Descriptor ETH DMA TX Descriptor |
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726 * @{ |
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727 */ |
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728 |
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729 /* |
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730 DMA Tx Descriptor |
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731 ----------------------------------------------------------------------------------------------- |
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732 TDES0 | OWN(31) | CTRL[30:26] | Reserved[25:24] | CTRL[23:20] | Reserved[19:17] | Status[16:0] | |
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733 ----------------------------------------------------------------------------------------------- |
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734 TDES1 | Reserved[31:29] | Buffer2 ByteCount[28:16] | Reserved[15:13] | Buffer1 ByteCount[12:0] | |
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735 ----------------------------------------------------------------------------------------------- |
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736 TDES2 | Buffer1 Address [31:0] | |
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737 ----------------------------------------------------------------------------------------------- |
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738 TDES3 | Buffer2 Address [31:0] / Next Descriptor Address [31:0] | |
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739 ----------------------------------------------------------------------------------------------- |
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740 */ |
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741 |
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742 /** |
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743 * @brief Bit definition of TDES0 register: DMA Tx descriptor status register |
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744 */ |
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745 #define ETH_DMATXDESC_OWN 0x80000000U /*!< OWN bit: descriptor is owned by DMA engine */ |
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746 #define ETH_DMATXDESC_IC 0x40000000U /*!< Interrupt on Completion */ |
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747 #define ETH_DMATXDESC_LS 0x20000000U /*!< Last Segment */ |
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748 #define ETH_DMATXDESC_FS 0x10000000U /*!< First Segment */ |
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749 #define ETH_DMATXDESC_DC 0x08000000U /*!< Disable CRC */ |
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750 #define ETH_DMATXDESC_DP 0x04000000U /*!< Disable Padding */ |
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751 #define ETH_DMATXDESC_TTSE 0x02000000U /*!< Transmit Time Stamp Enable */ |
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752 #define ETH_DMATXDESC_CIC 0x00C00000U /*!< Checksum Insertion Control: 4 cases */ |
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753 #define ETH_DMATXDESC_CIC_BYPASS 0x00000000U /*!< Do Nothing: Checksum Engine is bypassed */ |
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754 #define ETH_DMATXDESC_CIC_IPV4HEADER 0x00400000U /*!< IPV4 header Checksum Insertion */ |
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755 #define ETH_DMATXDESC_CIC_TCPUDPICMP_SEGMENT 0x00800000U /*!< TCP/UDP/ICMP Checksum Insertion calculated over segment only */ |
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756 #define ETH_DMATXDESC_CIC_TCPUDPICMP_FULL 0x00C00000U /*!< TCP/UDP/ICMP Checksum Insertion fully calculated */ |
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757 #define ETH_DMATXDESC_TER 0x00200000U /*!< Transmit End of Ring */ |
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758 #define ETH_DMATXDESC_TCH 0x00100000U /*!< Second Address Chained */ |
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759 #define ETH_DMATXDESC_TTSS 0x00020000U /*!< Tx Time Stamp Status */ |
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760 #define ETH_DMATXDESC_IHE 0x00010000U /*!< IP Header Error */ |
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761 #define ETH_DMATXDESC_ES 0x00008000U /*!< Error summary: OR of the following bits: UE || ED || EC || LCO || NC || LCA || FF || JT */ |
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762 #define ETH_DMATXDESC_JT 0x00004000U /*!< Jabber Timeout */ |
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763 #define ETH_DMATXDESC_FF 0x00002000U /*!< Frame Flushed: DMA/MTL flushed the frame due to SW flush */ |
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764 #define ETH_DMATXDESC_PCE 0x00001000U /*!< Payload Checksum Error */ |
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765 #define ETH_DMATXDESC_LCA 0x00000800U /*!< Loss of Carrier: carrier lost during transmission */ |
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766 #define ETH_DMATXDESC_NC 0x00000400U /*!< No Carrier: no carrier signal from the transceiver */ |
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767 #define ETH_DMATXDESC_LCO 0x00000200U /*!< Late Collision: transmission aborted due to collision */ |
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768 #define ETH_DMATXDESC_EC 0x00000100U /*!< Excessive Collision: transmission aborted after 16 collisions */ |
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769 #define ETH_DMATXDESC_VF 0x00000080U /*!< VLAN Frame */ |
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770 #define ETH_DMATXDESC_CC 0x00000078U /*!< Collision Count */ |
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771 #define ETH_DMATXDESC_ED 0x00000004U /*!< Excessive Deferral */ |
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772 #define ETH_DMATXDESC_UF 0x00000002U /*!< Underflow Error: late data arrival from the memory */ |
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773 #define ETH_DMATXDESC_DB 0x00000001U /*!< Deferred Bit */ |
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774 |
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775 /** |
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776 * @brief Bit definition of TDES1 register |
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777 */ |
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778 #define ETH_DMATXDESC_TBS2 0x1FFF0000U /*!< Transmit Buffer2 Size */ |
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779 #define ETH_DMATXDESC_TBS1 0x00001FFFU /*!< Transmit Buffer1 Size */ |
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780 |
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781 /** |
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782 * @brief Bit definition of TDES2 register |
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783 */ |
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784 #define ETH_DMATXDESC_B1AP 0xFFFFFFFFU /*!< Buffer1 Address Pointer */ |
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785 |
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786 /** |
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787 * @brief Bit definition of TDES3 register |
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788 */ |
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789 #define ETH_DMATXDESC_B2AP 0xFFFFFFFFU /*!< Buffer2 Address Pointer */ |
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790 |
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791 /*--------------------------------------------------------------------------------------------- |
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792 TDES6 | Transmit Time Stamp Low [31:0] | |
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793 ----------------------------------------------------------------------------------------------- |
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794 TDES7 | Transmit Time Stamp High [31:0] | |
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795 ----------------------------------------------------------------------------------------------*/ |
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796 |
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797 /* Bit definition of TDES6 register */ |
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798 #define ETH_DMAPTPTXDESC_TTSL 0xFFFFFFFFU /* Transmit Time Stamp Low */ |
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799 |
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800 /* Bit definition of TDES7 register */ |
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801 #define ETH_DMAPTPTXDESC_TTSH 0xFFFFFFFFU /* Transmit Time Stamp High */ |
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802 |
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803 /** |
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804 * @} |
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805 */ |
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806 /** @defgroup ETH_DMA_RX_Descriptor ETH DMA RX Descriptor |
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807 * @{ |
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808 */ |
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809 |
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810 /* |
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811 DMA Rx Descriptor |
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812 -------------------------------------------------------------------------------------------------------------------- |
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813 RDES0 | OWN(31) | Status [30:0] | |
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814 --------------------------------------------------------------------------------------------------------------------- |
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815 RDES1 | CTRL(31) | Reserved[30:29] | Buffer2 ByteCount[28:16] | CTRL[15:14] | Reserved(13) | Buffer1 ByteCount[12:0] | |
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816 --------------------------------------------------------------------------------------------------------------------- |
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817 RDES2 | Buffer1 Address [31:0] | |
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818 --------------------------------------------------------------------------------------------------------------------- |
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819 RDES3 | Buffer2 Address [31:0] / Next Descriptor Address [31:0] | |
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820 --------------------------------------------------------------------------------------------------------------------- |
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821 */ |
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822 |
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823 /** |
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824 * @brief Bit definition of RDES0 register: DMA Rx descriptor status register |
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825 */ |
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826 #define ETH_DMARXDESC_OWN 0x80000000U /*!< OWN bit: descriptor is owned by DMA engine */ |
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827 #define ETH_DMARXDESC_AFM 0x40000000U /*!< DA Filter Fail for the rx frame */ |
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828 #define ETH_DMARXDESC_FL 0x3FFF0000U /*!< Receive descriptor frame length */ |
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829 #define ETH_DMARXDESC_ES 0x00008000U /*!< Error summary: OR of the following bits: DE || OE || IPC || LC || RWT || RE || CE */ |
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830 #define ETH_DMARXDESC_DE 0x00004000U /*!< Descriptor error: no more descriptors for receive frame */ |
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831 #define ETH_DMARXDESC_SAF 0x00002000U /*!< SA Filter Fail for the received frame */ |
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832 #define ETH_DMARXDESC_LE 0x00001000U /*!< Frame size not matching with length field */ |
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833 #define ETH_DMARXDESC_OE 0x00000800U /*!< Overflow Error: Frame was damaged due to buffer overflow */ |
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834 #define ETH_DMARXDESC_VLAN 0x00000400U /*!< VLAN Tag: received frame is a VLAN frame */ |
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835 #define ETH_DMARXDESC_FS 0x00000200U /*!< First descriptor of the frame */ |
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836 #define ETH_DMARXDESC_LS 0x00000100U /*!< Last descriptor of the frame */ |
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837 #define ETH_DMARXDESC_IPV4HCE 0x00000080U /*!< IPC Checksum Error: Rx Ipv4 header checksum error */ |
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838 #define ETH_DMARXDESC_LC 0x00000040U /*!< Late collision occurred during reception */ |
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839 #define ETH_DMARXDESC_FT 0x00000020U /*!< Frame type - Ethernet, otherwise 802.3 */ |
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840 #define ETH_DMARXDESC_RWT 0x00000010U /*!< Receive Watchdog Timeout: watchdog timer expired during reception */ |
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841 #define ETH_DMARXDESC_RE 0x00000008U /*!< Receive error: error reported by MII interface */ |
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842 #define ETH_DMARXDESC_DBE 0x00000004U /*!< Dribble bit error: frame contains non int multiple of 8 bits */ |
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843 #define ETH_DMARXDESC_CE 0x00000002U /*!< CRC error */ |
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844 #define ETH_DMARXDESC_MAMPCE 0x00000001U /*!< Rx MAC Address/Payload Checksum Error: Rx MAC address matched/ Rx Payload Checksum Error */ |
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845 |
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846 /** |
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847 * @brief Bit definition of RDES1 register |
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848 */ |
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849 #define ETH_DMARXDESC_DIC 0x80000000U /*!< Disable Interrupt on Completion */ |
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850 #define ETH_DMARXDESC_RBS2 0x1FFF0000U /*!< Receive Buffer2 Size */ |
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851 #define ETH_DMARXDESC_RER 0x00008000U /*!< Receive End of Ring */ |
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852 #define ETH_DMARXDESC_RCH 0x00004000U /*!< Second Address Chained */ |
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853 #define ETH_DMARXDESC_RBS1 0x00001FFFU /*!< Receive Buffer1 Size */ |
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854 |
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|
855 /** |
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856 * @brief Bit definition of RDES2 register |
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|
857 */ |
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|
858 #define ETH_DMARXDESC_B1AP 0xFFFFFFFFU /*!< Buffer1 Address Pointer */ |
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859 |
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860 /** |
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861 * @brief Bit definition of RDES3 register |
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862 */ |
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863 #define ETH_DMARXDESC_B2AP 0xFFFFFFFFU /*!< Buffer2 Address Pointer */ |
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864 |
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|
865 /*--------------------------------------------------------------------------------------------------------------------- |
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866 RDES4 | Reserved[31:15] | Extended Status [14:0] | |
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867 --------------------------------------------------------------------------------------------------------------------- |
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868 RDES5 | Reserved[31:0] | |
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869 --------------------------------------------------------------------------------------------------------------------- |
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870 RDES6 | Receive Time Stamp Low [31:0] | |
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871 --------------------------------------------------------------------------------------------------------------------- |
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872 RDES7 | Receive Time Stamp High [31:0] | |
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873 --------------------------------------------------------------------------------------------------------------------*/ |
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874 |
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875 /* Bit definition of RDES4 register */ |
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876 #define ETH_DMAPTPRXDESC_PTPV 0x00002000U /* PTP Version */ |
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877 #define ETH_DMAPTPRXDESC_PTPFT 0x00001000U /* PTP Frame Type */ |
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878 #define ETH_DMAPTPRXDESC_PTPMT 0x00000F00U /* PTP Message Type */ |
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879 #define ETH_DMAPTPRXDESC_PTPMT_SYNC 0x00000100U /* SYNC message (all clock types) */ |
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880 #define ETH_DMAPTPRXDESC_PTPMT_FOLLOWUP 0x00000200U /* FollowUp message (all clock types) */ |
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881 #define ETH_DMAPTPRXDESC_PTPMT_DELAYREQ 0x00000300U /* DelayReq message (all clock types) */ |
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882 #define ETH_DMAPTPRXDESC_PTPMT_DELAYRESP 0x00000400U /* DelayResp message (all clock types) */ |
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883 #define ETH_DMAPTPRXDESC_PTPMT_PDELAYREQ_ANNOUNCE 0x00000500U /* PdelayReq message (peer-to-peer transparent clock) or Announce message (Ordinary or Boundary clock) */ |
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884 #define ETH_DMAPTPRXDESC_PTPMT_PDELAYRESP_MANAG 0x00000600U /* PdelayResp message (peer-to-peer transparent clock) or Management message (Ordinary or Boundary clock) */ |
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885 #define ETH_DMAPTPRXDESC_PTPMT_PDELAYRESPFOLLOWUP_SIGNAL 0x00000700U /* PdelayRespFollowUp message (peer-to-peer transparent clock) or Signaling message (Ordinary or Boundary clock) */ |
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886 #define ETH_DMAPTPRXDESC_IPV6PR 0x00000080U /* IPv6 Packet Received */ |
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887 #define ETH_DMAPTPRXDESC_IPV4PR 0x00000040U /* IPv4 Packet Received */ |
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888 #define ETH_DMAPTPRXDESC_IPCB 0x00000020U /* IP Checksum Bypassed */ |
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889 #define ETH_DMAPTPRXDESC_IPPE 0x00000010U /* IP Payload Error */ |
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890 #define ETH_DMAPTPRXDESC_IPHE 0x00000008U /* IP Header Error */ |
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891 #define ETH_DMAPTPRXDESC_IPPT 0x00000007U /* IP Payload Type */ |
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892 #define ETH_DMAPTPRXDESC_IPPT_UDP 0x00000001U /* UDP payload encapsulated in the IP datagram */ |
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893 #define ETH_DMAPTPRXDESC_IPPT_TCP 0x00000002U /* TCP payload encapsulated in the IP datagram */ |
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894 #define ETH_DMAPTPRXDESC_IPPT_ICMP 0x00000003U /* ICMP payload encapsulated in the IP datagram */ |
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|
895 |
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896 /* Bit definition of RDES6 register */ |
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897 #define ETH_DMAPTPRXDESC_RTSL 0xFFFFFFFFU /* Receive Time Stamp Low */ |
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898 |
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899 /* Bit definition of RDES7 register */ |
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900 #define ETH_DMAPTPRXDESC_RTSH 0xFFFFFFFFU /* Receive Time Stamp High */ |
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901 /** |
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902 * @} |
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903 */ |
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|
904 /** @defgroup ETH_AutoNegotiation ETH AutoNegotiation |
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905 * @{ |
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906 */ |
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907 #define ETH_AUTONEGOTIATION_ENABLE 0x00000001U |
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908 #define ETH_AUTONEGOTIATION_DISABLE 0x00000000U |
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|
909 |
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|
910 /** |
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911 * @} |
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|
912 */ |
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|
913 /** @defgroup ETH_Speed ETH Speed |
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|
914 * @{ |
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|
915 */ |
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|
916 #define ETH_SPEED_10M 0x00000000U |
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|
917 #define ETH_SPEED_100M 0x00004000U |
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|
918 |
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|
919 /** |
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|
920 * @} |
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|
921 */ |
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|
922 /** @defgroup ETH_Duplex_Mode ETH Duplex Mode |
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|
923 * @{ |
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|
924 */ |
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|
925 #define ETH_MODE_FULLDUPLEX 0x00000800U |
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|
926 #define ETH_MODE_HALFDUPLEX 0x00000000U |
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|
927 /** |
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|
928 * @} |
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|
929 */ |
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|
930 /** @defgroup ETH_Rx_Mode ETH Rx Mode |
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|
931 * @{ |
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|
932 */ |
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|
933 #define ETH_RXPOLLING_MODE 0x00000000U |
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|
934 #define ETH_RXINTERRUPT_MODE 0x00000001U |
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|
935 /** |
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|
936 * @} |
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|
937 */ |
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|
938 |
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|
939 /** @defgroup ETH_Checksum_Mode ETH Checksum Mode |
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|
940 * @{ |
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|
941 */ |
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|
942 #define ETH_CHECKSUM_BY_HARDWARE 0x00000000U |
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|
943 #define ETH_CHECKSUM_BY_SOFTWARE 0x00000001U |
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|
944 /** |
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|
945 * @} |
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|
946 */ |
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|
947 |
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|
948 /** @defgroup ETH_Media_Interface ETH Media Interface |
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|
949 * @{ |
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|
950 */ |
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|
951 #define ETH_MEDIA_INTERFACE_MII 0x00000000U |
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|
952 #define ETH_MEDIA_INTERFACE_RMII ((uint32_t)SYSCFG_PMC_MII_RMII_SEL) |
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|
953 /** |
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|
954 * @} |
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|
955 */ |
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|
956 |
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|
957 /** @defgroup ETH_Watchdog ETH Watchdog |
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|
958 * @{ |
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|
959 */ |
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|
960 #define ETH_WATCHDOG_ENABLE 0x00000000U |
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|
961 #define ETH_WATCHDOG_DISABLE 0x00800000U |
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|
962 /** |
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|
963 * @} |
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|
964 */ |
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|
965 |
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|
966 /** @defgroup ETH_Jabber ETH Jabber |
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|
967 * @{ |
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|
968 */ |
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|
969 #define ETH_JABBER_ENABLE 0x00000000U |
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970 #define ETH_JABBER_DISABLE 0x00400000U |
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|
971 /** |
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|
972 * @} |
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|
973 */ |
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|
974 |
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|
975 /** @defgroup ETH_Inter_Frame_Gap ETH Inter Frame Gap |
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|
976 * @{ |
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|
977 */ |
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|
978 #define ETH_INTERFRAMEGAP_96BIT 0x00000000U /*!< minimum IFG between frames during transmission is 96Bit */ |
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979 #define ETH_INTERFRAMEGAP_88BIT 0x00020000U /*!< minimum IFG between frames during transmission is 88Bit */ |
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980 #define ETH_INTERFRAMEGAP_80BIT 0x00040000U /*!< minimum IFG between frames during transmission is 80Bit */ |
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981 #define ETH_INTERFRAMEGAP_72BIT 0x00060000U /*!< minimum IFG between frames during transmission is 72Bit */ |
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982 #define ETH_INTERFRAMEGAP_64BIT 0x00080000U /*!< minimum IFG between frames during transmission is 64Bit */ |
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983 #define ETH_INTERFRAMEGAP_56BIT 0x000A0000U /*!< minimum IFG between frames during transmission is 56Bit */ |
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984 #define ETH_INTERFRAMEGAP_48BIT 0x000C0000U /*!< minimum IFG between frames during transmission is 48Bit */ |
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985 #define ETH_INTERFRAMEGAP_40BIT 0x000E0000U /*!< minimum IFG between frames during transmission is 40Bit */ |
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986 /** |
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987 * @} |
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988 */ |
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989 |
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990 /** @defgroup ETH_Carrier_Sense ETH Carrier Sense |
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991 * @{ |
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992 */ |
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993 #define ETH_CARRIERSENCE_ENABLE 0x00000000U |
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994 #define ETH_CARRIERSENCE_DISABLE 0x00010000U |
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995 /** |
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996 * @} |
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997 */ |
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998 |
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|
999 /** @defgroup ETH_Receive_Own ETH Receive Own |
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1000 * @{ |
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1001 */ |
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|
1002 #define ETH_RECEIVEOWN_ENABLE 0x00000000U |
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1003 #define ETH_RECEIVEOWN_DISABLE 0x00002000U |
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1004 /** |
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|
1005 * @} |
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|
1006 */ |
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|
1007 |
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|
1008 /** @defgroup ETH_Loop_Back_Mode ETH Loop Back Mode |
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|
1009 * @{ |
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|
1010 */ |
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|
1011 #define ETH_LOOPBACKMODE_ENABLE 0x00001000U |
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1012 #define ETH_LOOPBACKMODE_DISABLE 0x00000000U |
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1013 /** |
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|
1014 * @} |
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|
1015 */ |
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|
1016 |
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|
1017 /** @defgroup ETH_Checksum_Offload ETH Checksum Offload |
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|
1018 * @{ |
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|
1019 */ |
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|
1020 #define ETH_CHECKSUMOFFLAOD_ENABLE 0x00000400U |
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|
1021 #define ETH_CHECKSUMOFFLAOD_DISABLE 0x00000000U |
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|
1022 /** |
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|
1023 * @} |
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|
1024 */ |
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|
1025 |
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|
1026 /** @defgroup ETH_Retry_Transmission ETH Retry Transmission |
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|
1027 * @{ |
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|
1028 */ |
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|
1029 #define ETH_RETRYTRANSMISSION_ENABLE 0x00000000U |
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|
1030 #define ETH_RETRYTRANSMISSION_DISABLE 0x00000200U |
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|
1031 /** |
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|
1032 * @} |
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|
1033 */ |
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|
1034 |
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|
1035 /** @defgroup ETH_Automatic_Pad_CRC_Strip ETH Automatic Pad CRC Strip |
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|
1036 * @{ |
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|
1037 */ |
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|
1038 #define ETH_AUTOMATICPADCRCSTRIP_ENABLE 0x00000080U |
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|
1039 #define ETH_AUTOMATICPADCRCSTRIP_DISABLE 0x00000000U |
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|
1040 /** |
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|
1041 * @} |
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|
1042 */ |
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|
1043 |
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|
1044 /** @defgroup ETH_Back_Off_Limit ETH Back Off Limit |
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|
1045 * @{ |
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|
1046 */ |
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|
1047 #define ETH_BACKOFFLIMIT_10 0x00000000U |
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|
1048 #define ETH_BACKOFFLIMIT_8 0x00000020U |
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|
1049 #define ETH_BACKOFFLIMIT_4 0x00000040U |
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1050 #define ETH_BACKOFFLIMIT_1 0x00000060U |
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|
1051 /** |
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|
1052 * @} |
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Ideenmodellierer
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|
1053 */ |
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|
1054 |
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|
1055 /** @defgroup ETH_Deferral_Check ETH Deferral Check |
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|
1056 * @{ |
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|
1057 */ |
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|
1058 #define ETH_DEFFERRALCHECK_ENABLE 0x00000010U |
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|
1059 #define ETH_DEFFERRALCHECK_DISABLE 0x00000000U |
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|
1060 /** |
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diff
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|
1061 * @} |
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|
1062 */ |
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|
1063 |
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|
1064 /** @defgroup ETH_Receive_All ETH Receive All |
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|
1065 * @{ |
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|
1066 */ |
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|
1067 #define ETH_RECEIVEALL_ENABLE 0x80000000U |
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|
1068 #define ETH_RECEIVEAll_DISABLE 0x00000000U |
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|
1069 /** |
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|
1070 * @} |
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|
1071 */ |
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|
1072 |
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|
1073 /** @defgroup ETH_Source_Addr_Filter ETH Source Addr Filter |
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|
1074 * @{ |
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|
1075 */ |
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|
1076 #define ETH_SOURCEADDRFILTER_NORMAL_ENABLE 0x00000200U |
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|
1077 #define ETH_SOURCEADDRFILTER_INVERSE_ENABLE 0x00000300U |
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1078 #define ETH_SOURCEADDRFILTER_DISABLE 0x00000000U |
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|
1079 /** |
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|
1080 * @} |
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|
1081 */ |
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|
1082 |
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1083 /** @defgroup ETH_Pass_Control_Frames ETH Pass Control Frames |
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1084 * @{ |
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|
1085 */ |
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|
1086 #define ETH_PASSCONTROLFRAMES_BLOCKALL 0x00000040U /*!< MAC filters all control frames from reaching the application */ |
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|
1087 #define ETH_PASSCONTROLFRAMES_FORWARDALL 0x00000080U /*!< MAC forwards all control frames to application even if they fail the Address Filter */ |
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|
1088 #define ETH_PASSCONTROLFRAMES_FORWARDPASSEDADDRFILTER 0x000000C0U /*!< MAC forwards control frames that pass the Address Filter. */ |
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1089 /** |
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1090 * @} |
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1091 */ |
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|
1092 |
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|
1093 /** @defgroup ETH_Broadcast_Frames_Reception ETH Broadcast Frames Reception |
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1094 * @{ |
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|
1095 */ |
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|
1096 #define ETH_BROADCASTFRAMESRECEPTION_ENABLE 0x00000000U |
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1097 #define ETH_BROADCASTFRAMESRECEPTION_DISABLE 0x00000020U |
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1098 /** |
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1099 * @} |
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|
1100 */ |
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|
1101 |
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1102 /** @defgroup ETH_Destination_Addr_Filter ETH Destination Addr Filter |
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1103 * @{ |
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|
1104 */ |
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|
1105 #define ETH_DESTINATIONADDRFILTER_NORMAL 0x00000000U |
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1106 #define ETH_DESTINATIONADDRFILTER_INVERSE 0x00000008U |
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|
1107 /** |
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|
1108 * @} |
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|
1109 */ |
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|
1110 |
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|
1111 /** @defgroup ETH_Promiscuous_Mode ETH Promiscuous Mode |
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1112 * @{ |
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|
1113 */ |
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|
1114 #define ETH_PROMISCUOUS_MODE_ENABLE 0x00000001U |
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Added current STM32 standandard libraries in version independend folder structure
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1115 #define ETH_PROMISCUOUS_MODE_DISABLE 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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|
1116 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
1117 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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|
1118 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1119 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1120 /** @defgroup ETH_Multicast_Frames_Filter ETH Multicast Frames Filter |
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Added current STM32 standandard libraries in version independend folder structure
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|
1121 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1122 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1123 #define ETH_MULTICASTFRAMESFILTER_PERFECTHASHTABLE 0x00000404U |
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Added current STM32 standandard libraries in version independend folder structure
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|
1124 #define ETH_MULTICASTFRAMESFILTER_HASHTABLE 0x00000004U |
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Added current STM32 standandard libraries in version independend folder structure
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1125 #define ETH_MULTICASTFRAMESFILTER_PERFECT 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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1126 #define ETH_MULTICASTFRAMESFILTER_NONE 0x00000010U |
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Added current STM32 standandard libraries in version independend folder structure
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|
1127 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
1128 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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|
1129 */ |
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Added current STM32 standandard libraries in version independend folder structure
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1130 |
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Added current STM32 standandard libraries in version independend folder structure
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1131 /** @defgroup ETH_Unicast_Frames_Filter ETH Unicast Frames Filter |
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Added current STM32 standandard libraries in version independend folder structure
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|
1132 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1133 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1134 #define ETH_UNICASTFRAMESFILTER_PERFECTHASHTABLE 0x00000402U |
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Added current STM32 standandard libraries in version independend folder structure
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1135 #define ETH_UNICASTFRAMESFILTER_HASHTABLE 0x00000002U |
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Added current STM32 standandard libraries in version independend folder structure
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|
1136 #define ETH_UNICASTFRAMESFILTER_PERFECT 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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|
1137 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
1138 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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|
1139 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1140 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1141 /** @defgroup ETH_Zero_Quanta_Pause ETH Zero Quanta Pause |
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Added current STM32 standandard libraries in version independend folder structure
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|
1142 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1143 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1144 #define ETH_ZEROQUANTAPAUSE_ENABLE 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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1145 #define ETH_ZEROQUANTAPAUSE_DISABLE 0x00000080U |
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|
1146 /** |
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|
1147 * @} |
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|
1148 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1149 |
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|
1150 /** @defgroup ETH_Pause_Low_Threshold ETH Pause Low Threshold |
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|
1151 * @{ |
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|
1152 */ |
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|
1153 #define ETH_PAUSELOWTHRESHOLD_MINUS4 0x00000000U /*!< Pause time minus 4 slot times */ |
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|
1154 #define ETH_PAUSELOWTHRESHOLD_MINUS28 0x00000010U /*!< Pause time minus 28 slot times */ |
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|
1155 #define ETH_PAUSELOWTHRESHOLD_MINUS144 0x00000020U /*!< Pause time minus 144 slot times */ |
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Added current STM32 standandard libraries in version independend folder structure
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1156 #define ETH_PAUSELOWTHRESHOLD_MINUS256 0x00000030U /*!< Pause time minus 256 slot times */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1157 /** |
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|
1158 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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|
1159 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1160 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1161 /** @defgroup ETH_Unicast_Pause_Frame_Detect ETH Unicast Pause Frame Detect |
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Added current STM32 standandard libraries in version independend folder structure
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|
1162 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1163 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1164 #define ETH_UNICASTPAUSEFRAMEDETECT_ENABLE 0x00000008U |
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|
1165 #define ETH_UNICASTPAUSEFRAMEDETECT_DISABLE 0x00000000U |
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|
1166 /** |
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|
1167 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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|
1168 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1169 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1170 /** @defgroup ETH_Receive_Flow_Control ETH Receive Flow Control |
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|
1171 * @{ |
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|
1172 */ |
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|
1173 #define ETH_RECEIVEFLOWCONTROL_ENABLE 0x00000004U |
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Added current STM32 standandard libraries in version independend folder structure
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1174 #define ETH_RECEIVEFLOWCONTROL_DISABLE 0x00000000U |
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1175 /** |
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|
1176 * @} |
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|
1177 */ |
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|
1178 |
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|
1179 /** @defgroup ETH_Transmit_Flow_Control ETH Transmit Flow Control |
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|
1180 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1181 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1182 #define ETH_TRANSMITFLOWCONTROL_ENABLE 0x00000002U |
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|
1183 #define ETH_TRANSMITFLOWCONTROL_DISABLE 0x00000000U |
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|
1184 /** |
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|
1185 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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|
1186 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1187 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1188 /** @defgroup ETH_VLAN_Tag_Comparison ETH VLAN Tag Comparison |
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|
1189 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1190 */ |
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|
1191 #define ETH_VLANTAGCOMPARISON_12BIT 0x00010000U |
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|
1192 #define ETH_VLANTAGCOMPARISON_16BIT 0x00000000U |
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|
1193 /** |
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|
1194 * @} |
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|
1195 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1196 |
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|
1197 /** @defgroup ETH_MAC_addresses ETH MAC addresses |
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|
1198 * @{ |
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|
1199 */ |
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|
1200 #define ETH_MAC_ADDRESS0 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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|
1201 #define ETH_MAC_ADDRESS1 0x00000008U |
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|
1202 #define ETH_MAC_ADDRESS2 0x00000010U |
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Added current STM32 standandard libraries in version independend folder structure
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|
1203 #define ETH_MAC_ADDRESS3 0x00000018U |
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|
1204 /** |
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|
1205 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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|
1206 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1207 |
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|
1208 /** @defgroup ETH_MAC_addresses_filter_SA_DA ETH MAC addresses filter SA DA |
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|
1209 * @{ |
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|
1210 */ |
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|
1211 #define ETH_MAC_ADDRESSFILTER_SA 0x00000000U |
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|
1212 #define ETH_MAC_ADDRESSFILTER_DA 0x00000008U |
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|
1213 /** |
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|
1214 * @} |
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|
1215 */ |
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|
1216 |
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|
1217 /** @defgroup ETH_MAC_addresses_filter_Mask_bytes ETH MAC addresses filter Mask bytes |
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|
1218 * @{ |
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|
1219 */ |
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|
1220 #define ETH_MAC_ADDRESSMASK_BYTE6 0x20000000U /*!< Mask MAC Address high reg bits [15:8] */ |
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|
1221 #define ETH_MAC_ADDRESSMASK_BYTE5 0x10000000U /*!< Mask MAC Address high reg bits [7:0] */ |
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|
1222 #define ETH_MAC_ADDRESSMASK_BYTE4 0x08000000U /*!< Mask MAC Address low reg bits [31:24] */ |
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|
1223 #define ETH_MAC_ADDRESSMASK_BYTE3 0x04000000U /*!< Mask MAC Address low reg bits [23:16] */ |
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1224 #define ETH_MAC_ADDRESSMASK_BYTE2 0x02000000U /*!< Mask MAC Address low reg bits [15:8] */ |
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|
1225 #define ETH_MAC_ADDRESSMASK_BYTE1 0x01000000U /*!< Mask MAC Address low reg bits [70] */ |
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|
1226 /** |
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|
1227 * @} |
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|
1228 */ |
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|
1229 |
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|
1230 /** @defgroup ETH_Drop_TCP_IP_Checksum_Error_Frame ETH Drop TCP IP Checksum Error Frame |
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|
1231 * @{ |
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|
1232 */ |
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|
1233 #define ETH_DROPTCPIPCHECKSUMERRORFRAME_ENABLE 0x00000000U |
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|
1234 #define ETH_DROPTCPIPCHECKSUMERRORFRAME_DISABLE 0x04000000U |
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|
1235 /** |
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|
1236 * @} |
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|
1237 */ |
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|
1238 |
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|
1239 /** @defgroup ETH_Receive_Store_Forward ETH Receive Store Forward |
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|
1240 * @{ |
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|
1241 */ |
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|
1242 #define ETH_RECEIVESTOREFORWARD_ENABLE 0x02000000U |
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|
1243 #define ETH_RECEIVESTOREFORWARD_DISABLE 0x00000000U |
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|
1244 /** |
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|
1245 * @} |
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|
1246 */ |
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Added current STM32 standandard libraries in version independend folder structure
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1247 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1248 /** @defgroup ETH_Flush_Received_Frame ETH Flush Received Frame |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1249 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1250 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1251 #define ETH_FLUSHRECEIVEDFRAME_ENABLE 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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|
1252 #define ETH_FLUSHRECEIVEDFRAME_DISABLE 0x01000000U |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1253 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
1254 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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|
1255 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1256 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1257 /** @defgroup ETH_Transmit_Store_Forward ETH Transmit Store Forward |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1258 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1259 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1260 #define ETH_TRANSMITSTOREFORWARD_ENABLE 0x00200000U |
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Added current STM32 standandard libraries in version independend folder structure
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|
1261 #define ETH_TRANSMITSTOREFORWARD_DISABLE 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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|
1262 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
1263 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1264 */ |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1265 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1266 /** @defgroup ETH_Transmit_Threshold_Control ETH Transmit Threshold Control |
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Added current STM32 standandard libraries in version independend folder structure
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|
1267 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1268 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1269 #define ETH_TRANSMITTHRESHOLDCONTROL_64BYTES 0x00000000U /*!< threshold level of the MTL Transmit FIFO is 64 Bytes */ |
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Added current STM32 standandard libraries in version independend folder structure
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1270 #define ETH_TRANSMITTHRESHOLDCONTROL_128BYTES 0x00004000U /*!< threshold level of the MTL Transmit FIFO is 128 Bytes */ |
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Added current STM32 standandard libraries in version independend folder structure
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1271 #define ETH_TRANSMITTHRESHOLDCONTROL_192BYTES 0x00008000U /*!< threshold level of the MTL Transmit FIFO is 192 Bytes */ |
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Added current STM32 standandard libraries in version independend folder structure
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1272 #define ETH_TRANSMITTHRESHOLDCONTROL_256BYTES 0x0000C000U /*!< threshold level of the MTL Transmit FIFO is 256 Bytes */ |
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Added current STM32 standandard libraries in version independend folder structure
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1273 #define ETH_TRANSMITTHRESHOLDCONTROL_40BYTES 0x00010000U /*!< threshold level of the MTL Transmit FIFO is 40 Bytes */ |
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Added current STM32 standandard libraries in version independend folder structure
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1274 #define ETH_TRANSMITTHRESHOLDCONTROL_32BYTES 0x00014000U /*!< threshold level of the MTL Transmit FIFO is 32 Bytes */ |
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Added current STM32 standandard libraries in version independend folder structure
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1275 #define ETH_TRANSMITTHRESHOLDCONTROL_24BYTES 0x00018000U /*!< threshold level of the MTL Transmit FIFO is 24 Bytes */ |
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Added current STM32 standandard libraries in version independend folder structure
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1276 #define ETH_TRANSMITTHRESHOLDCONTROL_16BYTES 0x0001C000U /*!< threshold level of the MTL Transmit FIFO is 16 Bytes */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1277 /** |
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|
1278 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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|
1279 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1280 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1281 /** @defgroup ETH_Forward_Error_Frames ETH Forward Error Frames |
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Added current STM32 standandard libraries in version independend folder structure
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|
1282 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1283 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1284 #define ETH_FORWARDERRORFRAMES_ENABLE 0x00000080U |
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Added current STM32 standandard libraries in version independend folder structure
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|
1285 #define ETH_FORWARDERRORFRAMES_DISABLE 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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|
1286 /** |
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|
1287 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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|
1288 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1289 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1290 /** @defgroup ETH_Forward_Undersized_Good_Frames ETH Forward Undersized Good Frames |
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|
1291 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1292 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1293 #define ETH_FORWARDUNDERSIZEDGOODFRAMES_ENABLE 0x00000040U |
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Added current STM32 standandard libraries in version independend folder structure
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1294 #define ETH_FORWARDUNDERSIZEDGOODFRAMES_DISABLE 0x00000000U |
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Added current STM32 standandard libraries in version independend folder structure
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|
1295 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
1296 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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|
1297 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1298 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1299 /** @defgroup ETH_Receive_Threshold_Control ETH Receive Threshold Control |
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Added current STM32 standandard libraries in version independend folder structure
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|
1300 * @{ |
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|
1301 */ |
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|
1302 #define ETH_RECEIVEDTHRESHOLDCONTROL_64BYTES 0x00000000U /*!< threshold level of the MTL Receive FIFO is 64 Bytes */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1303 #define ETH_RECEIVEDTHRESHOLDCONTROL_32BYTES 0x00000008U /*!< threshold level of the MTL Receive FIFO is 32 Bytes */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1304 #define ETH_RECEIVEDTHRESHOLDCONTROL_96BYTES 0x00000010U /*!< threshold level of the MTL Receive FIFO is 96 Bytes */ |
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1305 #define ETH_RECEIVEDTHRESHOLDCONTROL_128BYTES 0x00000018U /*!< threshold level of the MTL Receive FIFO is 128 Bytes */ |
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|
1306 /** |
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|
1307 * @} |
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|
1308 */ |
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|
1309 |
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|
1310 /** @defgroup ETH_Second_Frame_Operate ETH Second Frame Operate |
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|
1311 * @{ |
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|
1312 */ |
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|
1313 #define ETH_SECONDFRAMEOPERARTE_ENABLE 0x00000004U |
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Added current STM32 standandard libraries in version independend folder structure
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|
1314 #define ETH_SECONDFRAMEOPERARTE_DISABLE 0x00000000U |
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|
1315 /** |
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|
1316 * @} |
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|
1317 */ |
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|
1318 |
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|
1319 /** @defgroup ETH_Address_Aligned_Beats ETH Address Aligned Beats |
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|
1320 * @{ |
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|
1321 */ |
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|
1322 #define ETH_ADDRESSALIGNEDBEATS_ENABLE 0x02000000U |
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|
1323 #define ETH_ADDRESSALIGNEDBEATS_DISABLE 0x00000000U |
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|
1324 /** |
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|
1325 * @} |
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|
1326 */ |
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|
1327 |
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|
1328 /** @defgroup ETH_Fixed_Burst ETH Fixed Burst |
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|
1329 * @{ |
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|
1330 */ |
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|
1331 #define ETH_FIXEDBURST_ENABLE 0x00010000U |
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|
1332 #define ETH_FIXEDBURST_DISABLE 0x00000000U |
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|
1333 /** |
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|
1334 * @} |
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|
1335 */ |
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|
1336 |
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|
1337 /** @defgroup ETH_Rx_DMA_Burst_Length ETH Rx DMA Burst Length |
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|
1338 * @{ |
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|
1339 */ |
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|
1340 #define ETH_RXDMABURSTLENGTH_1BEAT 0x00020000U /*!< maximum number of beats to be transferred in one RxDMA transaction is 1 */ |
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|
1341 #define ETH_RXDMABURSTLENGTH_2BEAT 0x00040000U /*!< maximum number of beats to be transferred in one RxDMA transaction is 2 */ |
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|
1342 #define ETH_RXDMABURSTLENGTH_4BEAT 0x00080000U /*!< maximum number of beats to be transferred in one RxDMA transaction is 4 */ |
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1343 #define ETH_RXDMABURSTLENGTH_8BEAT 0x00100000U /*!< maximum number of beats to be transferred in one RxDMA transaction is 8 */ |
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|
1344 #define ETH_RXDMABURSTLENGTH_16BEAT 0x00200000U /*!< maximum number of beats to be transferred in one RxDMA transaction is 16 */ |
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1345 #define ETH_RXDMABURSTLENGTH_32BEAT 0x00400000U /*!< maximum number of beats to be transferred in one RxDMA transaction is 32 */ |
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|
1346 #define ETH_RXDMABURSTLENGTH_4XPBL_4BEAT 0x01020000U /*!< maximum number of beats to be transferred in one RxDMA transaction is 4 */ |
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|
1347 #define ETH_RXDMABURSTLENGTH_4XPBL_8BEAT 0x01040000U /*!< maximum number of beats to be transferred in one RxDMA transaction is 8 */ |
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|
1348 #define ETH_RXDMABURSTLENGTH_4XPBL_16BEAT 0x01080000U /*!< maximum number of beats to be transferred in one RxDMA transaction is 16 */ |
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|
1349 #define ETH_RXDMABURSTLENGTH_4XPBL_32BEAT 0x01100000U /*!< maximum number of beats to be transferred in one RxDMA transaction is 32 */ |
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|
1350 #define ETH_RXDMABURSTLENGTH_4XPBL_64BEAT 0x01200000U /*!< maximum number of beats to be transferred in one RxDMA transaction is 64 */ |
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|
1351 #define ETH_RXDMABURSTLENGTH_4XPBL_128BEAT 0x01400000U /*!< maximum number of beats to be transferred in one RxDMA transaction is 128 */ |
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|
1352 /** |
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|
1353 * @} |
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|
1354 */ |
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|
1355 |
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|
1356 /** @defgroup ETH_Tx_DMA_Burst_Length ETH Tx DMA Burst Length |
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1357 * @{ |
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|
1358 */ |
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|
1359 #define ETH_TXDMABURSTLENGTH_1BEAT 0x00000100U /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 1 */ |
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|
1360 #define ETH_TXDMABURSTLENGTH_2BEAT 0x00000200U /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 2 */ |
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|
1361 #define ETH_TXDMABURSTLENGTH_4BEAT 0x00000400U /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 */ |
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|
1362 #define ETH_TXDMABURSTLENGTH_8BEAT 0x00000800U /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 */ |
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|
1363 #define ETH_TXDMABURSTLENGTH_16BEAT 0x00001000U /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 */ |
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|
1364 #define ETH_TXDMABURSTLENGTH_32BEAT 0x00002000U /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 */ |
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|
1365 #define ETH_TXDMABURSTLENGTH_4XPBL_4BEAT 0x01000100U /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 */ |
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|
1366 #define ETH_TXDMABURSTLENGTH_4XPBL_8BEAT 0x01000200U /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 */ |
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|
1367 #define ETH_TXDMABURSTLENGTH_4XPBL_16BEAT 0x01000400U /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 */ |
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Added current STM32 standandard libraries in version independend folder structure
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1368 #define ETH_TXDMABURSTLENGTH_4XPBL_32BEAT 0x01000800U /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1369 #define ETH_TXDMABURSTLENGTH_4XPBL_64BEAT 0x01001000U /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 64 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1370 #define ETH_TXDMABURSTLENGTH_4XPBL_128BEAT 0x01002000U /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 128 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1371 /** |
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|
1372 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1373 */ |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1374 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1375 /** @defgroup ETH_DMA_Enhanced_descriptor_format ETH DMA Enhanced descriptor format |
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Added current STM32 standandard libraries in version independend folder structure
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|
1376 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1377 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1378 #define ETH_DMAENHANCEDDESCRIPTOR_ENABLE 0x00000080U |
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Added current STM32 standandard libraries in version independend folder structure
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|
1379 #define ETH_DMAENHANCEDDESCRIPTOR_DISABLE 0x00000000U |
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|
1380 /** |
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|
1381 * @} |
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diff
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|
1382 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1383 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1384 /** @defgroup ETH_DMA_Arbitration ETH DMA Arbitration |
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|
1385 * @{ |
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|
1386 */ |
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|
1387 #define ETH_DMAARBITRATION_ROUNDROBIN_RXTX_1_1 0x00000000U |
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|
1388 #define ETH_DMAARBITRATION_ROUNDROBIN_RXTX_2_1 0x00004000U |
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1389 #define ETH_DMAARBITRATION_ROUNDROBIN_RXTX_3_1 0x00008000U |
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1390 #define ETH_DMAARBITRATION_ROUNDROBIN_RXTX_4_1 0x0000C000U |
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Added current STM32 standandard libraries in version independend folder structure
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1391 #define ETH_DMAARBITRATION_RXPRIORTX 0x00000002U |
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|
1392 /** |
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|
1393 * @} |
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|
1394 */ |
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|
1395 |
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|
1396 /** @defgroup ETH_DMA_Tx_descriptor_segment ETH DMA Tx descriptor segment |
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|
1397 * @{ |
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|
1398 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1399 #define ETH_DMATXDESC_LASTSEGMENTS 0x40000000U /*!< Last Segment */ |
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Added current STM32 standandard libraries in version independend folder structure
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1400 #define ETH_DMATXDESC_FIRSTSEGMENT 0x20000000U /*!< First Segment */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1401 /** |
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|
1402 * @} |
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|
1403 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1404 |
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|
1405 /** @defgroup ETH_DMA_Tx_descriptor_Checksum_Insertion_Control ETH DMA Tx descriptor Checksum Insertion Control |
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Added current STM32 standandard libraries in version independend folder structure
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|
1406 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1407 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1408 #define ETH_DMATXDESC_CHECKSUMBYPASS 0x00000000U /*!< Checksum engine bypass */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1409 #define ETH_DMATXDESC_CHECKSUMIPV4HEADER 0x00400000U /*!< IPv4 header checksum insertion */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1410 #define ETH_DMATXDESC_CHECKSUMTCPUDPICMPSEGMENT 0x00800000U /*!< TCP/UDP/ICMP checksum insertion. Pseudo header checksum is assumed to be present */ |
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Added current STM32 standandard libraries in version independend folder structure
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1411 #define ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL 0x00C00000U /*!< TCP/UDP/ICMP checksum fully in hardware including pseudo header */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1412 /** |
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|
1413 * @} |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1414 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1415 |
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|
1416 /** @defgroup ETH_DMA_Rx_descriptor_buffers ETH DMA Rx descriptor buffers |
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Added current STM32 standandard libraries in version independend folder structure
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|
1417 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1418 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1419 #define ETH_DMARXDESC_BUFFER1 0x00000000U /*!< DMA Rx Desc Buffer1 */ |
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Added current STM32 standandard libraries in version independend folder structure
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1420 #define ETH_DMARXDESC_BUFFER2 0x00000001U /*!< DMA Rx Desc Buffer2 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1421 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
1422 * @} |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
1423 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1424 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1425 /** @defgroup ETH_PMT_Flags ETH PMT Flags |
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Added current STM32 standandard libraries in version independend folder structure
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|
1426 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1427 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1428 #define ETH_PMT_FLAG_WUFFRPR 0x80000000U /*!< Wake-Up Frame Filter Register Pointer Reset */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1429 #define ETH_PMT_FLAG_WUFR 0x00000040U /*!< Wake-Up Frame Received */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1430 #define ETH_PMT_FLAG_MPR 0x00000020U /*!< Magic Packet Received */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1431 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
1432 * @} |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
1433 */ |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1434 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1435 /** @defgroup ETH_MMC_Tx_Interrupts ETH MMC Tx Interrupts |
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Added current STM32 standandard libraries in version independend folder structure
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|
1436 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
1437 */ |
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|
1438 #define ETH_MMC_IT_TGF 0x00200000U /*!< When Tx good frame counter reaches half the maximum value */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1439 #define ETH_MMC_IT_TGFMSC 0x00008000U /*!< When Tx good multi col counter reaches half the maximum value */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1440 #define ETH_MMC_IT_TGFSC 0x00004000U /*!< When Tx good single col counter reaches half the maximum value */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
1441 /** |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
1442 * @} |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1443 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
1444 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1445 /** @defgroup ETH_MMC_Rx_Interrupts ETH MMC Rx Interrupts |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1446 * @{ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1447 */ |
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diff
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|
1448 #define ETH_MMC_IT_RGUF 0x10020000U /*!< When Rx good unicast frames counter reaches half the maximum value */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1449 #define ETH_MMC_IT_RFAE 0x10000040U /*!< When Rx alignment error counter reaches half the maximum value */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1450 #define ETH_MMC_IT_RFCE 0x10000020U /*!< When Rx crc error counter reaches half the maximum value */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
1451 /** |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
1452 * @} |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
1453 */ |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1454 |
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diff
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|
1455 /** @defgroup ETH_MAC_Flags ETH MAC Flags |
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Added current STM32 standandard libraries in version independend folder structure
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|
1456 * @{ |
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|
1457 */ |
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|
1458 #define ETH_MAC_FLAG_TST 0x00000200U /*!< Time stamp trigger flag (on MAC) */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1459 #define ETH_MAC_FLAG_MMCT 0x00000040U /*!< MMC transmit flag */ |
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|
1460 #define ETH_MAC_FLAG_MMCR 0x00000020U /*!< MMC receive flag */ |
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|
1461 #define ETH_MAC_FLAG_MMC 0x00000010U /*!< MMC flag (on MAC) */ |
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|
1462 #define ETH_MAC_FLAG_PMT 0x00000008U /*!< PMT flag (on MAC) */ |
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|
1463 /** |
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|
1464 * @} |
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|
1465 */ |
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|
1466 |
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|
1467 /** @defgroup ETH_DMA_Flags ETH DMA Flags |
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|
1468 * @{ |
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|
1469 */ |
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|
1470 #define ETH_DMA_FLAG_TST 0x20000000U /*!< Time-stamp trigger interrupt (on DMA) */ |
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|
1471 #define ETH_DMA_FLAG_PMT 0x10000000U /*!< PMT interrupt (on DMA) */ |
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|
1472 #define ETH_DMA_FLAG_MMC 0x08000000U /*!< MMC interrupt (on DMA) */ |
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|
1473 #define ETH_DMA_FLAG_DATATRANSFERERROR 0x00800000U /*!< Error bits 0-Rx DMA, 1-Tx DMA */ |
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|
1474 #define ETH_DMA_FLAG_READWRITEERROR 0x01000000U /*!< Error bits 0-write transfer, 1-read transfer */ |
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|
1475 #define ETH_DMA_FLAG_ACCESSERROR 0x02000000U /*!< Error bits 0-data buffer, 1-desc. access */ |
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|
1476 #define ETH_DMA_FLAG_NIS 0x00010000U /*!< Normal interrupt summary flag */ |
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|
1477 #define ETH_DMA_FLAG_AIS 0x00008000U /*!< Abnormal interrupt summary flag */ |
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|
1478 #define ETH_DMA_FLAG_ER 0x00004000U /*!< Early receive flag */ |
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|
1479 #define ETH_DMA_FLAG_FBE 0x00002000U /*!< Fatal bus error flag */ |
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|
1480 #define ETH_DMA_FLAG_ET 0x00000400U /*!< Early transmit flag */ |
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|
1481 #define ETH_DMA_FLAG_RWT 0x00000200U /*!< Receive watchdog timeout flag */ |
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|
1482 #define ETH_DMA_FLAG_RPS 0x00000100U /*!< Receive process stopped flag */ |
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|
1483 #define ETH_DMA_FLAG_RBU 0x00000080U /*!< Receive buffer unavailable flag */ |
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|
1484 #define ETH_DMA_FLAG_R 0x00000040U /*!< Receive flag */ |
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|
1485 #define ETH_DMA_FLAG_TU 0x00000020U /*!< Underflow flag */ |
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|
1486 #define ETH_DMA_FLAG_RO 0x00000010U /*!< Overflow flag */ |
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|
1487 #define ETH_DMA_FLAG_TJT 0x00000008U /*!< Transmit jabber timeout flag */ |
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|
1488 #define ETH_DMA_FLAG_TBU 0x00000004U /*!< Transmit buffer unavailable flag */ |
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|
1489 #define ETH_DMA_FLAG_TPS 0x00000002U /*!< Transmit process stopped flag */ |
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1490 #define ETH_DMA_FLAG_T 0x00000001U /*!< Transmit flag */ |
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1491 /** |
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1492 * @} |
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1493 */ |
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1494 |
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1495 /** @defgroup ETH_MAC_Interrupts ETH MAC Interrupts |
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1496 * @{ |
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1497 */ |
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1498 #define ETH_MAC_IT_TST 0x00000200U /*!< Time stamp trigger interrupt (on MAC) */ |
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1499 #define ETH_MAC_IT_MMCT 0x00000040U /*!< MMC transmit interrupt */ |
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1500 #define ETH_MAC_IT_MMCR 0x00000020U /*!< MMC receive interrupt */ |
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1501 #define ETH_MAC_IT_MMC 0x00000010U /*!< MMC interrupt (on MAC) */ |
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1502 #define ETH_MAC_IT_PMT 0x00000008U /*!< PMT interrupt (on MAC) */ |
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1503 /** |
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1504 * @} |
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1505 */ |
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1506 |
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1507 /** @defgroup ETH_DMA_Interrupts ETH DMA Interrupts |
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1508 * @{ |
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1509 */ |
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1510 #define ETH_DMA_IT_TST 0x20000000U /*!< Time-stamp trigger interrupt (on DMA) */ |
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1511 #define ETH_DMA_IT_PMT 0x10000000U /*!< PMT interrupt (on DMA) */ |
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1512 #define ETH_DMA_IT_MMC 0x08000000U /*!< MMC interrupt (on DMA) */ |
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1513 #define ETH_DMA_IT_NIS 0x00010000U /*!< Normal interrupt summary */ |
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1514 #define ETH_DMA_IT_AIS 0x00008000U /*!< Abnormal interrupt summary */ |
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1515 #define ETH_DMA_IT_ER 0x00004000U /*!< Early receive interrupt */ |
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1516 #define ETH_DMA_IT_FBE 0x00002000U /*!< Fatal bus error interrupt */ |
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1517 #define ETH_DMA_IT_ET 0x00000400U /*!< Early transmit interrupt */ |
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1518 #define ETH_DMA_IT_RWT 0x00000200U /*!< Receive watchdog timeout interrupt */ |
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1519 #define ETH_DMA_IT_RPS 0x00000100U /*!< Receive process stopped interrupt */ |
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1520 #define ETH_DMA_IT_RBU 0x00000080U /*!< Receive buffer unavailable interrupt */ |
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1521 #define ETH_DMA_IT_R 0x00000040U /*!< Receive interrupt */ |
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1522 #define ETH_DMA_IT_TU 0x00000020U /*!< Underflow interrupt */ |
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1523 #define ETH_DMA_IT_RO 0x00000010U /*!< Overflow interrupt */ |
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1524 #define ETH_DMA_IT_TJT 0x00000008U /*!< Transmit jabber timeout interrupt */ |
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1525 #define ETH_DMA_IT_TBU 0x00000004U /*!< Transmit buffer unavailable interrupt */ |
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1526 #define ETH_DMA_IT_TPS 0x00000002U /*!< Transmit process stopped interrupt */ |
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1527 #define ETH_DMA_IT_T 0x00000001U /*!< Transmit interrupt */ |
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1528 /** |
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1529 * @} |
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1530 */ |
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1531 |
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1532 /** @defgroup ETH_DMA_transmit_process_state ETH DMA transmit process state |
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1533 * @{ |
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1534 */ |
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1535 #define ETH_DMA_TRANSMITPROCESS_STOPPED 0x00000000U /*!< Stopped - Reset or Stop Tx Command issued */ |
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1536 #define ETH_DMA_TRANSMITPROCESS_FETCHING 0x00100000U /*!< Running - fetching the Tx descriptor */ |
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1537 #define ETH_DMA_TRANSMITPROCESS_WAITING 0x00200000U /*!< Running - waiting for status */ |
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1538 #define ETH_DMA_TRANSMITPROCESS_READING 0x00300000U /*!< Running - reading the data from host memory */ |
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1539 #define ETH_DMA_TRANSMITPROCESS_SUSPENDED 0x00600000U /*!< Suspended - Tx Descriptor unavailable */ |
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1540 #define ETH_DMA_TRANSMITPROCESS_CLOSING 0x00700000U /*!< Running - closing Rx descriptor */ |
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1541 |
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1542 /** |
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1543 * @} |
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1544 */ |
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1545 |
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1546 |
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1547 /** @defgroup ETH_DMA_receive_process_state ETH DMA receive process state |
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1548 * @{ |
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1549 */ |
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1550 #define ETH_DMA_RECEIVEPROCESS_STOPPED 0x00000000U /*!< Stopped - Reset or Stop Rx Command issued */ |
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1551 #define ETH_DMA_RECEIVEPROCESS_FETCHING 0x00020000U /*!< Running - fetching the Rx descriptor */ |
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1552 #define ETH_DMA_RECEIVEPROCESS_WAITING 0x00060000U /*!< Running - waiting for packet */ |
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1553 #define ETH_DMA_RECEIVEPROCESS_SUSPENDED 0x00080000U /*!< Suspended - Rx Descriptor unavailable */ |
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1554 #define ETH_DMA_RECEIVEPROCESS_CLOSING 0x000A0000U /*!< Running - closing descriptor */ |
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1555 #define ETH_DMA_RECEIVEPROCESS_QUEUING 0x000E0000U /*!< Running - queuing the receive frame into host memory */ |
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1556 |
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1557 /** |
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1558 * @} |
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1559 */ |
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1560 |
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1561 /** @defgroup ETH_DMA_overflow ETH DMA overflow |
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1562 * @{ |
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1563 */ |
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1564 #define ETH_DMA_OVERFLOW_RXFIFOCOUNTER 0x10000000U /*!< Overflow bit for FIFO overflow counter */ |
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1565 #define ETH_DMA_OVERFLOW_MISSEDFRAMECOUNTER 0x00010000U /*!< Overflow bit for missed frame counter */ |
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1566 /** |
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1567 * @} |
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1568 */ |
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1569 |
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1570 /** @defgroup ETH_EXTI_LINE_WAKEUP ETH EXTI LINE WAKEUP |
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1571 * @{ |
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1572 */ |
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1573 #define ETH_EXTI_LINE_WAKEUP 0x00080000U /*!< External interrupt line 19 Connected to the ETH EXTI Line */ |
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1574 |
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1575 /** |
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1576 * @} |
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1577 */ |
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1578 |
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1579 /** |
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1580 * @} |
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1581 */ |
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|
1582 |
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1583 /* Exported macro ------------------------------------------------------------*/ |
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1584 /** @defgroup ETH_Exported_Macros ETH Exported Macros |
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1585 * @brief macros to handle interrupts and specific clock configurations |
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1586 * @{ |
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1587 */ |
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1588 |
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1589 /** @brief Reset ETH handle state |
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1590 * @param __HANDLE__ specifies the ETH handle. |
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1591 * @retval None |
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1592 */ |
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1593 #define __HAL_ETH_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ETH_STATE_RESET) |
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1594 |
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1595 /** |
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1596 * @brief Checks whether the specified ETHERNET DMA Tx Desc flag is set or not. |
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1597 * @param __HANDLE__ ETH Handle |
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1598 * @param __FLAG__ specifies the flag of TDES0 to check. |
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1599 * @retval the ETH_DMATxDescFlag (SET or RESET). |
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1600 */ |
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1601 #define __HAL_ETH_DMATXDESC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->TxDesc->Status & (__FLAG__) == (__FLAG__)) |
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1602 |
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1603 /** |
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1604 * @brief Checks whether the specified ETHERNET DMA Rx Desc flag is set or not. |
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1605 * @param __HANDLE__ ETH Handle |
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1606 * @param __FLAG__ specifies the flag of RDES0 to check. |
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1607 * @retval the ETH_DMATxDescFlag (SET or RESET). |
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1608 */ |
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1609 #define __HAL_ETH_DMARXDESC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->RxDesc->Status & (__FLAG__) == (__FLAG__)) |
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1610 |
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1611 /** |
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1612 * @brief Enables the specified DMA Rx Desc receive interrupt. |
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1613 * @param __HANDLE__ ETH Handle |
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1614 * @retval None |
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1615 */ |
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|
1616 #define __HAL_ETH_DMARXDESC_ENABLE_IT(__HANDLE__) ((__HANDLE__)->RxDesc->ControlBufferSize &=(~(uint32_t)ETH_DMARXDESC_DIC)) |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1617 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1618 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1619 * @brief Disables the specified DMA Rx Desc receive interrupt. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1620 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1621 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1622 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1623 #define __HAL_ETH_DMARXDESC_DISABLE_IT(__HANDLE__) ((__HANDLE__)->RxDesc->ControlBufferSize |= ETH_DMARXDESC_DIC) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1624 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1625 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1626 * @brief Set the specified DMA Rx Desc Own bit. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1627 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1628 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1629 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1630 #define __HAL_ETH_DMARXDESC_SET_OWN_BIT(__HANDLE__) ((__HANDLE__)->RxDesc->Status |= ETH_DMARXDESC_OWN) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1631 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1632 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1633 * @brief Returns the specified ETHERNET DMA Tx Desc collision count. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1634 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1635 * @retval The Transmit descriptor collision counter value. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1636 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1637 #define __HAL_ETH_DMATXDESC_GET_COLLISION_COUNT(__HANDLE__) (((__HANDLE__)->TxDesc->Status & ETH_DMATXDESC_CC) >> ETH_DMATXDESC_COLLISION_COUNTSHIFT) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1638 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1639 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1640 * @brief Set the specified DMA Tx Desc Own bit. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1641 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1642 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1643 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1644 #define __HAL_ETH_DMATXDESC_SET_OWN_BIT(__HANDLE__) ((__HANDLE__)->TxDesc->Status |= ETH_DMATXDESC_OWN) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1645 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1646 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1647 * @brief Enables the specified DMA Tx Desc Transmit interrupt. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1648 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1649 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1650 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1651 #define __HAL_ETH_DMATXDESC_ENABLE_IT(__HANDLE__) ((__HANDLE__)->TxDesc->Status |= ETH_DMATXDESC_IC) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1652 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1653 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1654 * @brief Disables the specified DMA Tx Desc Transmit interrupt. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1655 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1656 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1657 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1658 #define __HAL_ETH_DMATXDESC_DISABLE_IT(__HANDLE__) ((__HANDLE__)->TxDesc->Status &= ~ETH_DMATXDESC_IC) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1659 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1660 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1661 * @brief Selects the specified ETHERNET DMA Tx Desc Checksum Insertion. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1662 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1663 * @param __CHECKSUM__ specifies is the DMA Tx desc checksum insertion. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1664 * This parameter can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1665 * @arg ETH_DMATXDESC_CHECKSUMBYPASS : Checksum bypass |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1666 * @arg ETH_DMATXDESC_CHECKSUMIPV4HEADER : IPv4 header checksum |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1667 * @arg ETH_DMATXDESC_CHECKSUMTCPUDPICMPSEGMENT : TCP/UDP/ICMP checksum. Pseudo header checksum is assumed to be present |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1668 * @arg ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL : TCP/UDP/ICMP checksum fully in hardware including pseudo header |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1669 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1670 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1671 #define __HAL_ETH_DMATXDESC_CHECKSUM_INSERTION(__HANDLE__, __CHECKSUM__) ((__HANDLE__)->TxDesc->Status |= (__CHECKSUM__)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1672 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1673 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1674 * @brief Enables the DMA Tx Desc CRC. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1675 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1676 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1677 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1678 #define __HAL_ETH_DMATXDESC_CRC_ENABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status &= ~ETH_DMATXDESC_DC) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1679 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1680 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1681 * @brief Disables the DMA Tx Desc CRC. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1682 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1683 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1684 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1685 #define __HAL_ETH_DMATXDESC_CRC_DISABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status |= ETH_DMATXDESC_DC) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1686 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1687 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1688 * @brief Enables the DMA Tx Desc padding for frame shorter than 64 bytes. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1689 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1690 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1691 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1692 #define __HAL_ETH_DMATXDESC_SHORT_FRAME_PADDING_ENABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status &= ~ETH_DMATXDESC_DP) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1693 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1694 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1695 * @brief Disables the DMA Tx Desc padding for frame shorter than 64 bytes. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1696 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1697 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1698 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1699 #define __HAL_ETH_DMATXDESC_SHORT_FRAME_PADDING_DISABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status |= ETH_DMATXDESC_DP) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1700 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1701 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1702 * @brief Enables the specified ETHERNET MAC interrupts. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1703 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1704 * @param __INTERRUPT__ specifies the ETHERNET MAC interrupt sources to be |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1705 * enabled or disabled. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1706 * This parameter can be any combination of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1707 * @arg ETH_MAC_IT_TST : Time stamp trigger interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1708 * @arg ETH_MAC_IT_PMT : PMT interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1709 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1710 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1711 #define __HAL_ETH_MAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MACIMR |= (__INTERRUPT__)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1712 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1713 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1714 * @brief Disables the specified ETHERNET MAC interrupts. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1715 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1716 * @param __INTERRUPT__ specifies the ETHERNET MAC interrupt sources to be |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
1717 * enabled or disabled. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1718 * This parameter can be any combination of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1719 * @arg ETH_MAC_IT_TST : Time stamp trigger interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1720 * @arg ETH_MAC_IT_PMT : PMT interrupt |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1721 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1722 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1723 #define __HAL_ETH_MAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MACIMR &= ~(__INTERRUPT__)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1724 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1725 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1726 * @brief Initiate a Pause Control Frame (Full-duplex only). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1727 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1728 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1729 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1730 #define __HAL_ETH_INITIATE_PAUSE_CONTROL_FRAME(__HANDLE__) ((__HANDLE__)->Instance->MACFCR |= ETH_MACFCR_FCBBPA) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1731 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1732 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1733 * @brief Checks whether the ETHERNET flow control busy bit is set or not. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1734 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1735 * @retval The new state of flow control busy status bit (SET or RESET). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1736 */ |
c78bcbd5deda
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|
1737 #define __HAL_ETH_GET_FLOW_CONTROL_BUSY_STATUS(__HANDLE__) (((__HANDLE__)->Instance->MACFCR & ETH_MACFCR_FCBBPA) == ETH_MACFCR_FCBBPA) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1738 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1739 /** |
c78bcbd5deda
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|
1740 * @brief Enables the MAC Back Pressure operation activation (Half-duplex only). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1741 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1742 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1743 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
1744 #define __HAL_ETH_BACK_PRESSURE_ACTIVATION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACFCR |= ETH_MACFCR_FCBBPA) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1745 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1746 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1747 * @brief Disables the MAC BackPressure operation activation (Half-duplex only). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1748 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1749 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1750 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1751 #define __HAL_ETH_BACK_PRESSURE_ACTIVATION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACFCR &= ~ETH_MACFCR_FCBBPA) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1752 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1753 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1754 * @brief Checks whether the specified ETHERNET MAC flag is set or not. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1755 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1756 * @param __FLAG__ specifies the flag to check. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1757 * This parameter can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1758 * @arg ETH_MAC_FLAG_TST : Time stamp trigger flag |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1759 * @arg ETH_MAC_FLAG_MMCT : MMC transmit flag |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1760 * @arg ETH_MAC_FLAG_MMCR : MMC receive flag |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1761 * @arg ETH_MAC_FLAG_MMC : MMC flag |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1762 * @arg ETH_MAC_FLAG_PMT : PMT flag |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1763 * @retval The state of ETHERNET MAC flag. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1764 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1765 #define __HAL_ETH_MAC_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->MACSR &( __FLAG__)) == ( __FLAG__)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1766 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1767 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1768 * @brief Enables the specified ETHERNET DMA interrupts. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1769 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1770 * @param __INTERRUPT__ specifies the ETHERNET DMA interrupt sources to be |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1771 * enabled @ref ETH_DMA_Interrupts |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1772 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1773 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1774 #define __HAL_ETH_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DMAIER |= (__INTERRUPT__)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
1775 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
1776 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1777 * @brief Disables the specified ETHERNET DMA interrupts. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1778 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1779 * @param __INTERRUPT__ specifies the ETHERNET DMA interrupt sources to be |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1780 * disabled. @ref ETH_DMA_Interrupts |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1781 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1782 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1783 #define __HAL_ETH_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DMAIER &= ~(__INTERRUPT__)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
1784 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1785 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1786 * @brief Clears the ETHERNET DMA IT pending bit. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1787 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1788 * @param __INTERRUPT__ specifies the interrupt pending bit to clear. @ref ETH_DMA_Interrupts |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1789 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1790 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1791 #define __HAL_ETH_DMA_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DMASR =(__INTERRUPT__)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1792 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1793 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1794 * @brief Checks whether the specified ETHERNET DMA flag is set or not. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1795 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1796 * @param __FLAG__ specifies the flag to check. @ref ETH_DMA_Flags |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1797 * @retval The new state of ETH_DMA_FLAG (SET or RESET). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1798 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
1799 #define __HAL_ETH_DMA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->DMASR &( __FLAG__)) == ( __FLAG__)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1800 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1801 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1802 * @brief Checks whether the specified ETHERNET DMA flag is set or not. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1803 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1804 * @param __FLAG__ specifies the flag to clear. @ref ETH_DMA_Flags |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1805 * @retval The new state of ETH_DMA_FLAG (SET or RESET). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1806 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1807 #define __HAL_ETH_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->DMASR = (__FLAG__)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1808 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1809 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1810 * @brief Checks whether the specified ETHERNET DMA overflow flag is set or not. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1811 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1812 * @param __OVERFLOW__ specifies the DMA overflow flag to check. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1813 * This parameter can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1814 * @arg ETH_DMA_OVERFLOW_RXFIFOCOUNTER : Overflow for FIFO Overflows Counter |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1815 * @arg ETH_DMA_OVERFLOW_MISSEDFRAMECOUNTER : Overflow for Buffer Unavailable Missed Frame Counter |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
1816 * @retval The state of ETHERNET DMA overflow Flag (SET or RESET). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1817 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1818 #define __HAL_ETH_GET_DMA_OVERFLOW_STATUS(__HANDLE__, __OVERFLOW__) (((__HANDLE__)->Instance->DMAMFBOCR & (__OVERFLOW__)) == (__OVERFLOW__)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1819 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1820 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1821 * @brief Set the DMA Receive status watchdog timer register value |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1822 * @param __HANDLE__ ETH Handle |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1823 * @param __VALUE__ DMA Receive status watchdog timer register value |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1824 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1825 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
1826 #define __HAL_ETH_SET_RECEIVE_WATCHDOG_TIMER(__HANDLE__, __VALUE__) ((__HANDLE__)->Instance->DMARSWTR = (__VALUE__)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
1827 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1828 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
1829 * @brief Enables any unicast packet filtered by the MAC address |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
1830 * recognition to be a wake-up frame. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
1831 * @param __HANDLE__ ETH Handle. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1832 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
1833 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
1834 #define __HAL_ETH_GLOBAL_UNICAST_WAKEUP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR |= ETH_MACPMTCSR_GU) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1835 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1836 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1837 * @brief Disables any unicast packet filtered by the MAC address |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1838 * recognition to be a wake-up frame. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1839 * @param __HANDLE__ ETH Handle. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1840 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1841 */ |
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|
1842 #define __HAL_ETH_GLOBAL_UNICAST_WAKEUP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_GU) |
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Added current STM32 standandard libraries in version independend folder structure
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|
1843 |
c78bcbd5deda
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|
1844 /** |
c78bcbd5deda
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|
1845 * @brief Enables the MAC Wake-Up Frame Detection. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1846 * @param __HANDLE__ ETH Handle. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1847 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1848 */ |
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|
1849 #define __HAL_ETH_WAKEUP_FRAME_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR |= ETH_MACPMTCSR_WFE) |
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Added current STM32 standandard libraries in version independend folder structure
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|
1850 |
c78bcbd5deda
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|
1851 /** |
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|
1852 * @brief Disables the MAC Wake-Up Frame Detection. |
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Added current STM32 standandard libraries in version independend folder structure
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|
1853 * @param __HANDLE__ ETH Handle. |
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Added current STM32 standandard libraries in version independend folder structure
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|
1854 * @retval None |
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|
1855 */ |
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|
1856 #define __HAL_ETH_WAKEUP_FRAME_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_WFE) |
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|
1857 |
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|
1858 /** |
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|
1859 * @brief Enables the MAC Magic Packet Detection. |
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|
1860 * @param __HANDLE__ ETH Handle. |
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|
1861 * @retval None |
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|
1862 */ |
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|
1863 #define __HAL_ETH_MAGIC_PACKET_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR |= ETH_MACPMTCSR_MPE) |
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|
1864 |
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|
1865 /** |
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|
1866 * @brief Disables the MAC Magic Packet Detection. |
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Added current STM32 standandard libraries in version independend folder structure
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|
1867 * @param __HANDLE__ ETH Handle. |
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|
1868 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
1869 */ |
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|
1870 #define __HAL_ETH_MAGIC_PACKET_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_WFE) |
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Added current STM32 standandard libraries in version independend folder structure
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1871 |
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1872 /** |
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1873 * @brief Enables the MAC Power Down. |
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1874 * @param __HANDLE__ ETH Handle |
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1875 * @retval None |
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1876 */ |
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1877 #define __HAL_ETH_POWER_DOWN_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR |= ETH_MACPMTCSR_PD) |
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1878 |
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1879 /** |
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1880 * @brief Disables the MAC Power Down. |
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1881 * @param __HANDLE__ ETH Handle |
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1882 * @retval None |
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1883 */ |
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1884 #define __HAL_ETH_POWER_DOWN_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_PD) |
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1885 |
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1886 /** |
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1887 * @brief Checks whether the specified ETHERNET PMT flag is set or not. |
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1888 * @param __HANDLE__ ETH Handle. |
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1889 * @param __FLAG__ specifies the flag to check. |
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1890 * This parameter can be one of the following values: |
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1891 * @arg ETH_PMT_FLAG_WUFFRPR : Wake-Up Frame Filter Register Pointer Reset |
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1892 * @arg ETH_PMT_FLAG_WUFR : Wake-Up Frame Received |
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1893 * @arg ETH_PMT_FLAG_MPR : Magic Packet Received |
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1894 * @retval The new state of ETHERNET PMT Flag (SET or RESET). |
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1895 */ |
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1896 #define __HAL_ETH_GET_PMT_FLAG_STATUS(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->MACPMTCSR &( __FLAG__)) == ( __FLAG__)) |
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1897 |
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1898 /** |
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1899 * @brief Preset and Initialize the MMC counters to almost-full value: 0xFFFF_FFF0 (full - 16) |
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1900 * @param __HANDLE__ ETH Handle. |
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1901 * @retval None |
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1902 */ |
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1903 #define __HAL_ETH_MMC_COUNTER_FULL_PRESET(__HANDLE__) ((__HANDLE__)->Instance->MMCCR |= (ETH_MMCCR_MCFHP | ETH_MMCCR_MCP)) |
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1904 |
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1905 /** |
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1906 * @brief Preset and Initialize the MMC counters to almost-half value: 0x7FFF_FFF0 (half - 16) |
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1907 * @param __HANDLE__ ETH Handle. |
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1908 * @retval None |
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1909 */ |
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1910 #define __HAL_ETH_MMC_COUNTER_HALF_PRESET(__HANDLE__) do{(__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_MCFHP;\ |
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1911 (__HANDLE__)->Instance->MMCCR |= ETH_MMCCR_MCP;} while (0) |
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1912 |
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1913 /** |
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1914 * @brief Enables the MMC Counter Freeze. |
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1915 * @param __HANDLE__ ETH Handle. |
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1916 * @retval None |
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1917 */ |
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1918 #define __HAL_ETH_MMC_COUNTER_FREEZE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR |= ETH_MMCCR_MCF) |
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1919 |
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1920 /** |
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1921 * @brief Disables the MMC Counter Freeze. |
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1922 * @param __HANDLE__ ETH Handle. |
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1923 * @retval None |
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1924 */ |
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1925 #define __HAL_ETH_MMC_COUNTER_FREEZE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_MCF) |
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1926 |
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1927 /** |
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1928 * @brief Enables the MMC Reset On Read. |
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1929 * @param __HANDLE__ ETH Handle. |
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1930 * @retval None |
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1931 */ |
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1932 #define __HAL_ETH_ETH_MMC_RESET_ONREAD_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR |= ETH_MMCCR_ROR) |
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1933 |
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1934 /** |
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1935 * @brief Disables the MMC Reset On Read. |
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1936 * @param __HANDLE__ ETH Handle. |
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1937 * @retval None |
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1938 */ |
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1939 #define __HAL_ETH_ETH_MMC_RESET_ONREAD_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_ROR) |
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1940 |
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1941 /** |
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1942 * @brief Enables the MMC Counter Stop Rollover. |
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1943 * @param __HANDLE__ ETH Handle. |
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1944 * @retval None |
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1945 */ |
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1946 #define __HAL_ETH_ETH_MMC_COUNTER_ROLLOVER_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_CSR) |
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1947 |
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1948 /** |
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1949 * @brief Disables the MMC Counter Stop Rollover. |
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1950 * @param __HANDLE__ ETH Handle. |
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1951 * @retval None |
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1952 */ |
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1953 #define __HAL_ETH_ETH_MMC_COUNTER_ROLLOVER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR |= ETH_MMCCR_CSR) |
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1954 |
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1955 /** |
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1956 * @brief Resets the MMC Counters. |
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1957 * @param __HANDLE__ ETH Handle. |
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1958 * @retval None |
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1959 */ |
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1960 #define __HAL_ETH_MMC_COUNTERS_RESET(__HANDLE__) ((__HANDLE__)->Instance->MMCCR |= ETH_MMCCR_CR) |
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1961 |
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1962 /** |
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1963 * @brief Enables the specified ETHERNET MMC Rx interrupts. |
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1964 * @param __HANDLE__ ETH Handle. |
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1965 * @param __INTERRUPT__ specifies the ETHERNET MMC interrupt sources to be enabled or disabled. |
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1966 * This parameter can be one of the following values: |
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1967 * @arg ETH_MMC_IT_RGUF : When Rx good unicast frames counter reaches half the maximum value |
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1968 * @arg ETH_MMC_IT_RFAE : When Rx alignment error counter reaches half the maximum value |
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1969 * @arg ETH_MMC_IT_RFCE : When Rx crc error counter reaches half the maximum value |
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1970 * @retval None |
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1971 */ |
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1972 #define __HAL_ETH_MMC_RX_IT_ENABLE(__HANDLE__, __INTERRUPT__) (__HANDLE__)->Instance->MMCRIMR &= ~((__INTERRUPT__) & 0xEFFFFFFFU) |
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1973 /** |
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1974 * @brief Disables the specified ETHERNET MMC Rx interrupts. |
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1975 * @param __HANDLE__ ETH Handle. |
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1976 * @param __INTERRUPT__ specifies the ETHERNET MMC interrupt sources to be enabled or disabled. |
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1977 * This parameter can be one of the following values: |
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1978 * @arg ETH_MMC_IT_RGUF : When Rx good unicast frames counter reaches half the maximum value |
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1979 * @arg ETH_MMC_IT_RFAE : When Rx alignment error counter reaches half the maximum value |
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1980 * @arg ETH_MMC_IT_RFCE : When Rx crc error counter reaches half the maximum value |
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1981 * @retval None |
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1982 */ |
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1983 #define __HAL_ETH_MMC_RX_IT_DISABLE(__HANDLE__, __INTERRUPT__) (__HANDLE__)->Instance->MMCRIMR |= ((__INTERRUPT__) & 0xEFFFFFFFU) |
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1984 /** |
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1985 * @brief Enables the specified ETHERNET MMC Tx interrupts. |
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1986 * @param __HANDLE__ ETH Handle. |
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1987 * @param __INTERRUPT__ specifies the ETHERNET MMC interrupt sources to be enabled or disabled. |
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1988 * This parameter can be one of the following values: |
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1989 * @arg ETH_MMC_IT_TGF : When Tx good frame counter reaches half the maximum value |
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1990 * @arg ETH_MMC_IT_TGFMSC: When Tx good multi col counter reaches half the maximum value |
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1991 * @arg ETH_MMC_IT_TGFSC : When Tx good single col counter reaches half the maximum value |
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1992 * @retval None |
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1993 */ |
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1994 #define __HAL_ETH_MMC_TX_IT_ENABLE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MMCRIMR &= ~ (__INTERRUPT__)) |
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1995 |
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1996 /** |
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1997 * @brief Disables the specified ETHERNET MMC Tx interrupts. |
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1998 * @param __HANDLE__ ETH Handle. |
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1999 * @param __INTERRUPT__ specifies the ETHERNET MMC interrupt sources to be enabled or disabled. |
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2000 * This parameter can be one of the following values: |
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2001 * @arg ETH_MMC_IT_TGF : When Tx good frame counter reaches half the maximum value |
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2002 * @arg ETH_MMC_IT_TGFMSC: When Tx good multi col counter reaches half the maximum value |
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2003 * @arg ETH_MMC_IT_TGFSC : When Tx good single col counter reaches half the maximum value |
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2004 * @retval None |
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2005 */ |
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2006 #define __HAL_ETH_MMC_TX_IT_DISABLE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MMCRIMR |= (__INTERRUPT__)) |
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2007 |
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2008 /** |
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2009 * @brief Enables the ETH External interrupt line. |
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2010 * @retval None |
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2011 */ |
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2012 #define __HAL_ETH_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= (ETH_EXTI_LINE_WAKEUP) |
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Added current STM32 standandard libraries in version independend folder structure
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2013 |
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Added current STM32 standandard libraries in version independend folder structure
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2014 /** |
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2015 * @brief Disables the ETH External interrupt line. |
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2016 * @retval None |
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|
2017 */ |
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Added current STM32 standandard libraries in version independend folder structure
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2018 #define __HAL_ETH_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(ETH_EXTI_LINE_WAKEUP) |
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Added current STM32 standandard libraries in version independend folder structure
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2019 |
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Added current STM32 standandard libraries in version independend folder structure
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2020 /** |
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2021 * @brief Enable event on ETH External event line. |
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Added current STM32 standandard libraries in version independend folder structure
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2022 * @retval None. |
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|
2023 */ |
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Added current STM32 standandard libraries in version independend folder structure
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2024 #define __HAL_ETH_WAKEUP_EXTI_ENABLE_EVENT() EXTI->EMR |= (ETH_EXTI_LINE_WAKEUP) |
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Added current STM32 standandard libraries in version independend folder structure
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2025 |
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Added current STM32 standandard libraries in version independend folder structure
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|
2026 /** |
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Added current STM32 standandard libraries in version independend folder structure
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2027 * @brief Disable event on ETH External event line |
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Added current STM32 standandard libraries in version independend folder structure
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|
2028 * @retval None. |
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Added current STM32 standandard libraries in version independend folder structure
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|
2029 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
2030 #define __HAL_ETH_WAKEUP_EXTI_DISABLE_EVENT() EXTI->EMR &= ~(ETH_EXTI_LINE_WAKEUP) |
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Added current STM32 standandard libraries in version independend folder structure
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|
2031 |
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Added current STM32 standandard libraries in version independend folder structure
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|
2032 /** |
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Added current STM32 standandard libraries in version independend folder structure
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2033 * @brief Get flag of the ETH External interrupt line. |
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Added current STM32 standandard libraries in version independend folder structure
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2034 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
2035 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
2036 #define __HAL_ETH_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (ETH_EXTI_LINE_WAKEUP) |
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Added current STM32 standandard libraries in version independend folder structure
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|
2037 |
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Added current STM32 standandard libraries in version independend folder structure
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|
2038 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
2039 * @brief Clear flag of the ETH External interrupt line. |
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Added current STM32 standandard libraries in version independend folder structure
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|
2040 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
2041 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
2042 #define __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = (ETH_EXTI_LINE_WAKEUP) |
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Added current STM32 standandard libraries in version independend folder structure
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|
2043 |
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Added current STM32 standandard libraries in version independend folder structure
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|
2044 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
2045 * @brief Enables rising edge trigger to the ETH External interrupt line. |
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Added current STM32 standandard libraries in version independend folder structure
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|
2046 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
2047 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
2048 #define __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER() EXTI->RTSR |= ETH_EXTI_LINE_WAKEUP |
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Added current STM32 standandard libraries in version independend folder structure
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|
2049 |
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Added current STM32 standandard libraries in version independend folder structure
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|
2050 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
2051 * @brief Disables the rising edge trigger to the ETH External interrupt line. |
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Added current STM32 standandard libraries in version independend folder structure
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|
2052 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
2053 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
2054 #define __HAL_ETH_WAKEUP_EXTI_DISABLE_RISING_EDGE_TRIGGER() EXTI->RTSR &= ~(ETH_EXTI_LINE_WAKEUP) |
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Added current STM32 standandard libraries in version independend folder structure
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|
2055 |
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Added current STM32 standandard libraries in version independend folder structure
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|
2056 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
2057 * @brief Enables falling edge trigger to the ETH External interrupt line. |
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Added current STM32 standandard libraries in version independend folder structure
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|
2058 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
2059 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
2060 #define __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER() EXTI->FTSR |= (ETH_EXTI_LINE_WAKEUP) |
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Added current STM32 standandard libraries in version independend folder structure
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|
2061 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
2062 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
2063 * @brief Disables falling edge trigger to the ETH External interrupt line. |
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Added current STM32 standandard libraries in version independend folder structure
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|
2064 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
2065 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
2066 #define __HAL_ETH_WAKEUP_EXTI_DISABLE_FALLING_EDGE_TRIGGER() EXTI->FTSR &= ~(ETH_EXTI_LINE_WAKEUP) |
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Added current STM32 standandard libraries in version independend folder structure
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|
2067 |
c78bcbd5deda
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|
2068 /** |
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|
2069 * @brief Enables rising/falling edge trigger to the ETH External interrupt line. |
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Added current STM32 standandard libraries in version independend folder structure
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|
2070 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
2071 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
2072 #define __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER() do{EXTI->RTSR |= ETH_EXTI_LINE_WAKEUP;\ |
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Added current STM32 standandard libraries in version independend folder structure
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2073 EXTI->FTSR |= ETH_EXTI_LINE_WAKEUP;\ |
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Added current STM32 standandard libraries in version independend folder structure
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|
2074 }while(0U) |
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Added current STM32 standandard libraries in version independend folder structure
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|
2075 |
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Added current STM32 standandard libraries in version independend folder structure
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|
2076 /** |
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|
2077 * @brief Disables rising/falling edge trigger to the ETH External interrupt line. |
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Added current STM32 standandard libraries in version independend folder structure
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|
2078 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
2079 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
2080 #define __HAL_ETH_WAKEUP_EXTI_DISABLE_FALLINGRISING_TRIGGER() do{EXTI->RTSR &= ~(ETH_EXTI_LINE_WAKEUP);\ |
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Added current STM32 standandard libraries in version independend folder structure
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|
2081 EXTI->FTSR &= ~(ETH_EXTI_LINE_WAKEUP);\ |
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Added current STM32 standandard libraries in version independend folder structure
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|
2082 }while(0U) |
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|
2083 |
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|
2084 /** |
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|
2085 * @brief Generate a Software interrupt on selected EXTI line. |
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|
2086 * @retval None. |
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|
2087 */ |
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|
2088 #define __HAL_ETH_WAKEUP_EXTI_GENERATE_SWIT() EXTI->SWIER|= ETH_EXTI_LINE_WAKEUP |
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Added current STM32 standandard libraries in version independend folder structure
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|
2089 |
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|
2090 /** |
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2091 * @} |
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|
2092 */ |
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|
2093 /* Exported functions --------------------------------------------------------*/ |
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|
2094 |
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|
2095 /** @addtogroup ETH_Exported_Functions |
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2096 * @{ |
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|
2097 */ |
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|
2098 |
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2099 /* Initialization and de-initialization functions ****************************/ |
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|
2100 |
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2101 /** @addtogroup ETH_Exported_Functions_Group1 |
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2102 * @{ |
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2103 */ |
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|
2104 HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth); |
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2105 HAL_StatusTypeDef HAL_ETH_DeInit(ETH_HandleTypeDef *heth); |
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2106 void HAL_ETH_MspInit(ETH_HandleTypeDef *heth); |
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2107 void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth); |
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2108 HAL_StatusTypeDef HAL_ETH_DMATxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADescTypeDef *DMATxDescTab, uint8_t* TxBuff, uint32_t TxBuffCount); |
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2109 HAL_StatusTypeDef HAL_ETH_DMARxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADescTypeDef *DMARxDescTab, uint8_t *RxBuff, uint32_t RxBuffCount); |
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|
2110 |
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|
2111 /** |
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2112 * @} |
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2113 */ |
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2114 /* IO operation functions ****************************************************/ |
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|
2115 |
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2116 /** @addtogroup ETH_Exported_Functions_Group2 |
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2117 * @{ |
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2118 */ |
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2119 HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameLength); |
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2120 HAL_StatusTypeDef HAL_ETH_GetReceivedFrame(ETH_HandleTypeDef *heth); |
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2121 /* Communication with PHY functions*/ |
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2122 HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t *RegValue); |
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2123 HAL_StatusTypeDef HAL_ETH_WritePHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t RegValue); |
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2124 /* Non-Blocking mode: Interrupt */ |
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2125 HAL_StatusTypeDef HAL_ETH_GetReceivedFrame_IT(ETH_HandleTypeDef *heth); |
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2126 void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth); |
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2127 /* Callback in non blocking modes (Interrupt) */ |
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2128 void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth); |
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2129 void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth); |
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2130 void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth); |
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2131 /** |
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2132 * @} |
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2133 */ |
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2134 |
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2135 /* Peripheral Control functions **********************************************/ |
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2136 |
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2137 /** @addtogroup ETH_Exported_Functions_Group3 |
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2138 * @{ |
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2139 */ |
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2140 |
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2141 HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth); |
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2142 HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth); |
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2143 HAL_StatusTypeDef HAL_ETH_ConfigMAC(ETH_HandleTypeDef *heth, ETH_MACInitTypeDef *macconf); |
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2144 HAL_StatusTypeDef HAL_ETH_ConfigDMA(ETH_HandleTypeDef *heth, ETH_DMAInitTypeDef *dmaconf); |
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2145 /** |
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2146 * @} |
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2147 */ |
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2148 |
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2149 /* Peripheral State functions ************************************************/ |
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2150 |
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2151 /** @addtogroup ETH_Exported_Functions_Group4 |
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2152 * @{ |
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2153 */ |
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2154 HAL_ETH_StateTypeDef HAL_ETH_GetState(ETH_HandleTypeDef *heth); |
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2155 /** |
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2156 * @} |
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2157 */ |
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2158 |
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2159 /** |
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2160 * @} |
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2161 */ |
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2162 |
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2163 /** |
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2164 * @} |
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2165 */ |
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2166 |
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2167 /** |
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2168 * @} |
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2169 */ |
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2170 |
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2171 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx ||\ |
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2172 STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ |
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2173 |
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2174 #ifdef __cplusplus |
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2175 } |
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2176 #endif |
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2177 |
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2178 #endif /* __STM32F4xx_HAL_ETH_H */ |
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2179 |
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2180 |
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2181 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |