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annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h @ 359:4258ea9b67fa MotionDetection

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Added new files for motion detection (shaking) detection
author ideenmodellierer
date Fri, 24 May 2019 22:00:38 +0200
parents c78bcbd5deda
children
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128
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_ll_fmc.h
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4 * @author MCD Application Team
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5 * @brief Header file of FMC HAL module.
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6 ******************************************************************************
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7 * @attention
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8 *
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9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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10 *
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11 * Redistribution and use in source and binary forms, with or without modification,
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12 * are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright notice,
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16 * this list of conditions and the following disclaimer in the documentation
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17 * and/or other materials provided with the distribution.
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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19 * may be used to endorse or promote products derived from this software
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20 * without specific prior written permission.
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21 *
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 *
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33 ******************************************************************************
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34 */
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35
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36 /* Define to prevent recursive inclusion -------------------------------------*/
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37 #ifndef __STM32F4xx_LL_FMC_H
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38 #define __STM32F4xx_LL_FMC_H
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39
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40 #ifdef __cplusplus
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41 extern "C" {
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42 #endif
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43
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44 /* Includes ------------------------------------------------------------------*/
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45 #include "stm32f4xx_hal_def.h"
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46
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47 /** @addtogroup STM32F4xx_HAL_Driver
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48 * @{
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49 */
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50
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51 /** @addtogroup FMC_LL
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52 * @{
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53 */
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54 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
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55 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
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56 /* Private types -------------------------------------------------------------*/
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57 /** @defgroup FMC_LL_Private_Types FMC Private Types
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58 * @{
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59 */
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60
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61 /**
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62 * @brief FMC NORSRAM Configuration Structure definition
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63 */
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64 typedef struct
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65 {
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66 uint32_t NSBank; /*!< Specifies the NORSRAM memory device that will be used.
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67 This parameter can be a value of @ref FMC_NORSRAM_Bank */
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68
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69 uint32_t DataAddressMux; /*!< Specifies whether the address and data values are
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70 multiplexed on the data bus or not.
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71 This parameter can be a value of @ref FMC_Data_Address_Bus_Multiplexing */
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72
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73 uint32_t MemoryType; /*!< Specifies the type of external memory attached to
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74 the corresponding memory device.
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75 This parameter can be a value of @ref FMC_Memory_Type */
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76
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77 uint32_t MemoryDataWidth; /*!< Specifies the external memory device width.
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78 This parameter can be a value of @ref FMC_NORSRAM_Data_Width */
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79
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80 uint32_t BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory,
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81 valid only with synchronous burst Flash memories.
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82 This parameter can be a value of @ref FMC_Burst_Access_Mode */
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83
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84 uint32_t WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing
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85 the Flash memory in burst mode.
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86 This parameter can be a value of @ref FMC_Wait_Signal_Polarity */
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87
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88 uint32_t WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash
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89 memory, valid only when accessing Flash memories in burst mode.
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90 This parameter can be a value of @ref FMC_Wrap_Mode
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91 This mode is not available for the STM32F446/467/479xx devices */
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92
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93 uint32_t WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one
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94 clock cycle before the wait state or during the wait state,
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95 valid only when accessing memories in burst mode.
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96 This parameter can be a value of @ref FMC_Wait_Timing */
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97
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98 uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device by the FMC.
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99 This parameter can be a value of @ref FMC_Write_Operation */
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100
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101 uint32_t WaitSignal; /*!< Enables or disables the wait state insertion via wait
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102 signal, valid for Flash memory access in burst mode.
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103 This parameter can be a value of @ref FMC_Wait_Signal */
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104
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105 uint32_t ExtendedMode; /*!< Enables or disables the extended mode.
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106 This parameter can be a value of @ref FMC_Extended_Mode */
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107
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108 uint32_t AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers,
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109 valid only with asynchronous Flash memories.
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110 This parameter can be a value of @ref FMC_AsynchronousWait */
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111
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112 uint32_t WriteBurst; /*!< Enables or disables the write burst operation.
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113 This parameter can be a value of @ref FMC_Write_Burst */
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114
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115 uint32_t ContinuousClock; /*!< Enables or disables the FMC clock output to external memory devices.
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116 This parameter is only enabled through the FMC_BCR1 register, and don't care
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117 through FMC_BCR2..4 registers.
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118 This parameter can be a value of @ref FMC_Continous_Clock */
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119
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120 uint32_t WriteFifo; /*!< Enables or disables the write FIFO used by the FMC controller.
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121 This parameter is only enabled through the FMC_BCR1 register, and don't care
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122 through FMC_BCR2..4 registers.
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123 This parameter can be a value of @ref FMC_Write_FIFO
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124 This mode is available only for the STM32F446/469/479xx devices */
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125
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126 uint32_t PageSize; /*!< Specifies the memory page size.
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127 This parameter can be a value of @ref FMC_Page_Size */
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128 }FMC_NORSRAM_InitTypeDef;
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129
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130 /**
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131 * @brief FMC NORSRAM Timing parameters structure definition
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132 */
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133 typedef struct
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134 {
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135 uint32_t AddressSetupTime; /*!< Defines the number of HCLK cycles to configure
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136 the duration of the address setup time.
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137 This parameter can be a value between Min_Data = 0 and Max_Data = 15.
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138 @note This parameter is not used with synchronous NOR Flash memories. */
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139
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140 uint32_t AddressHoldTime; /*!< Defines the number of HCLK cycles to configure
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141 the duration of the address hold time.
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142 This parameter can be a value between Min_Data = 1 and Max_Data = 15.
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143 @note This parameter is not used with synchronous NOR Flash memories. */
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144
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145 uint32_t DataSetupTime; /*!< Defines the number of HCLK cycles to configure
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146 the duration of the data setup time.
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147 This parameter can be a value between Min_Data = 1 and Max_Data = 255.
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148 @note This parameter is used for SRAMs, ROMs and asynchronous multiplexed
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149 NOR Flash memories. */
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150
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151 uint32_t BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure
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152 the duration of the bus turnaround.
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153 This parameter can be a value between Min_Data = 0 and Max_Data = 15.
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154 @note This parameter is only used for multiplexed NOR Flash memories. */
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155
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156 uint32_t CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of
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157 HCLK cycles. This parameter can be a value between Min_Data = 2 and Max_Data = 16.
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158 @note This parameter is not used for asynchronous NOR Flash, SRAM or ROM
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159 accesses. */
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160
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161 uint32_t DataLatency; /*!< Defines the number of memory clock cycles to issue
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162 to the memory before getting the first data.
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163 The parameter value depends on the memory type as shown below:
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164 - It must be set to 0 in case of a CRAM
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165 - It is don't care in asynchronous NOR, SRAM or ROM accesses
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166 - It may assume a value between Min_Data = 2 and Max_Data = 17 in NOR Flash memories
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167 with synchronous burst mode enable */
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168
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169 uint32_t AccessMode; /*!< Specifies the asynchronous access mode.
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170 This parameter can be a value of @ref FMC_Access_Mode */
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171 }FMC_NORSRAM_TimingTypeDef;
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172
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173 /**
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174 * @brief FMC NAND Configuration Structure definition
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175 */
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176 typedef struct
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177 {
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178 uint32_t NandBank; /*!< Specifies the NAND memory device that will be used.
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179 This parameter can be a value of @ref FMC_NAND_Bank */
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180
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181 uint32_t Waitfeature; /*!< Enables or disables the Wait feature for the NAND Memory device.
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182 This parameter can be any value of @ref FMC_Wait_feature */
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183
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184 uint32_t MemoryDataWidth; /*!< Specifies the external memory device width.
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185 This parameter can be any value of @ref FMC_NAND_Data_Width */
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186
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187 uint32_t EccComputation; /*!< Enables or disables the ECC computation.
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188 This parameter can be any value of @ref FMC_ECC */
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189
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190 uint32_t ECCPageSize; /*!< Defines the page size for the extended ECC.
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191 This parameter can be any value of @ref FMC_ECC_Page_Size */
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192
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193 uint32_t TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
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194 delay between CLE low and RE low.
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195 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
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196
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197 uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
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198 delay between ALE low and RE low.
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199 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
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200 }FMC_NAND_InitTypeDef;
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201
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202 /**
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203 * @brief FMC NAND/PCCARD Timing parameters structure definition
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204 */
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205 typedef struct
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206 {
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207 uint32_t SetupTime; /*!< Defines the number of HCLK cycles to setup address before
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208 the command assertion for NAND-Flash read or write access
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209 to common/Attribute or I/O memory space (depending on
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210 the memory space timing to be configured).
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211 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
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212
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213 uint32_t WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the
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214 command for NAND-Flash read or write access to
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215 common/Attribute or I/O memory space (depending on the
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216 memory space timing to be configured).
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217 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
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218
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219 uint32_t HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address
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220 (and data for write access) after the command de-assertion
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221 for NAND-Flash read or write access to common/Attribute
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222 or I/O memory space (depending on the memory space timing
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223 to be configured).
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224 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
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225
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226 uint32_t HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the
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227 data bus is kept in HiZ after the start of a NAND-Flash
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228 write access to common/Attribute or I/O memory space (depending
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229 on the memory space timing to be configured).
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230 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
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231 }FMC_NAND_PCC_TimingTypeDef;
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232
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233 /**
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234 * @brief FMC NAND Configuration Structure definition
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235 */
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236 typedef struct
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237 {
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238 uint32_t Waitfeature; /*!< Enables or disables the Wait feature for the PCCARD Memory device.
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239 This parameter can be any value of @ref FMC_Wait_feature */
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240
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241 uint32_t TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
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242 delay between CLE low and RE low.
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243 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
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244
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245 uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
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246 delay between ALE low and RE low.
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247 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
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248 }FMC_PCCARD_InitTypeDef;
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249
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250 /**
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251 * @brief FMC SDRAM Configuration Structure definition
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252 */
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253 typedef struct
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254 {
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255 uint32_t SDBank; /*!< Specifies the SDRAM memory device that will be used.
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256 This parameter can be a value of @ref FMC_SDRAM_Bank */
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257
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258 uint32_t ColumnBitsNumber; /*!< Defines the number of bits of column address.
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259 This parameter can be a value of @ref FMC_SDRAM_Column_Bits_number. */
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260
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261 uint32_t RowBitsNumber; /*!< Defines the number of bits of column address.
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262 This parameter can be a value of @ref FMC_SDRAM_Row_Bits_number. */
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263
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264 uint32_t MemoryDataWidth; /*!< Defines the memory device width.
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265 This parameter can be a value of @ref FMC_SDRAM_Memory_Bus_Width. */
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266
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267 uint32_t InternalBankNumber; /*!< Defines the number of the device's internal banks.
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268 This parameter can be of @ref FMC_SDRAM_Internal_Banks_Number. */
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269
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270 uint32_t CASLatency; /*!< Defines the SDRAM CAS latency in number of memory clock cycles.
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271 This parameter can be a value of @ref FMC_SDRAM_CAS_Latency. */
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272
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273 uint32_t WriteProtection; /*!< Enables the SDRAM device to be accessed in write mode.
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274 This parameter can be a value of @ref FMC_SDRAM_Write_Protection. */
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275
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276 uint32_t SDClockPeriod; /*!< Define the SDRAM Clock Period for both SDRAM devices and they allow
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277 to disable the clock before changing frequency.
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278 This parameter can be a value of @ref FMC_SDRAM_Clock_Period. */
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279
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280 uint32_t ReadBurst; /*!< This bit enable the SDRAM controller to anticipate the next read
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281 commands during the CAS latency and stores data in the Read FIFO.
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282 This parameter can be a value of @ref FMC_SDRAM_Read_Burst. */
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283
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284 uint32_t ReadPipeDelay; /*!< Define the delay in system clock cycles on read data path.
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285 This parameter can be a value of @ref FMC_SDRAM_Read_Pipe_Delay. */
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286 }FMC_SDRAM_InitTypeDef;
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287
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288 /**
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289 * @brief FMC SDRAM Timing parameters structure definition
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290 */
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291 typedef struct
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292 {
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293 uint32_t LoadToActiveDelay; /*!< Defines the delay between a Load Mode Register command and
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294 an active or Refresh command in number of memory clock cycles.
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295 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
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296
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297 uint32_t ExitSelfRefreshDelay; /*!< Defines the delay from releasing the self refresh command to
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298 issuing the Activate command in number of memory clock cycles.
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299 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
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300
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301 uint32_t SelfRefreshTime; /*!< Defines the minimum Self Refresh period in number of memory clock
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302 cycles.
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303 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
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304
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305 uint32_t RowCycleDelay; /*!< Defines the delay between the Refresh command and the Activate command
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306 and the delay between two consecutive Refresh commands in number of
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307 memory clock cycles.
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308 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
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309
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310 uint32_t WriteRecoveryTime; /*!< Defines the Write recovery Time in number of memory clock cycles.
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311 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
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312
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313 uint32_t RPDelay; /*!< Defines the delay between a Precharge Command and an other command
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314 in number of memory clock cycles.
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315 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
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316
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317 uint32_t RCDDelay; /*!< Defines the delay between the Activate Command and a Read/Write
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318 command in number of memory clock cycles.
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319 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
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320 }FMC_SDRAM_TimingTypeDef;
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321
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322 /**
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323 * @brief SDRAM command parameters structure definition
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324 */
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325 typedef struct
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326 {
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327 uint32_t CommandMode; /*!< Defines the command issued to the SDRAM device.
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328 This parameter can be a value of @ref FMC_SDRAM_Command_Mode. */
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329
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330 uint32_t CommandTarget; /*!< Defines which device (1 or 2) the command will be issued to.
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331 This parameter can be a value of @ref FMC_SDRAM_Command_Target. */
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332
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333 uint32_t AutoRefreshNumber; /*!< Defines the number of consecutive auto refresh command issued
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334 in auto refresh mode.
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335 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
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336 uint32_t ModeRegisterDefinition; /*!< Defines the SDRAM Mode register content */
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337 }FMC_SDRAM_CommandTypeDef;
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338 /**
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339 * @}
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340 */
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341
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342 /* Private constants ---------------------------------------------------------*/
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343 /** @defgroup FMC_LL_Private_Constants FMC Private Constants
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344 * @{
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345 */
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346
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347 /** @defgroup FMC_LL_NOR_SRAM_Controller FMC NOR/SRAM Controller
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348 * @{
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349 */
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350 /** @defgroup FMC_NORSRAM_Bank FMC NOR/SRAM Bank
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351 * @{
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352 */
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353 #define FMC_NORSRAM_BANK1 0x00000000U
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354 #define FMC_NORSRAM_BANK2 0x00000002U
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355 #define FMC_NORSRAM_BANK3 0x00000004U
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356 #define FMC_NORSRAM_BANK4 0x00000006U
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357 /**
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358 * @}
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359 */
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360
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361 /** @defgroup FMC_Data_Address_Bus_Multiplexing FMC Data Address Bus Multiplexing
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362 * @{
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363 */
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364 #define FMC_DATA_ADDRESS_MUX_DISABLE 0x00000000U
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365 #define FMC_DATA_ADDRESS_MUX_ENABLE 0x00000002U
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366 /**
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367 * @}
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368 */
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369
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370 /** @defgroup FMC_Memory_Type FMC Memory Type
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371 * @{
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372 */
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373 #define FMC_MEMORY_TYPE_SRAM 0x00000000U
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374 #define FMC_MEMORY_TYPE_PSRAM 0x00000004U
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375 #define FMC_MEMORY_TYPE_NOR 0x00000008U
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376 /**
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377 * @}
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378 */
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379
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380 /** @defgroup FMC_NORSRAM_Data_Width FMC NORSRAM Data Width
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381 * @{
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382 */
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383 #define FMC_NORSRAM_MEM_BUS_WIDTH_8 0x00000000U
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384 #define FMC_NORSRAM_MEM_BUS_WIDTH_16 0x00000010U
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385 #define FMC_NORSRAM_MEM_BUS_WIDTH_32 0x00000020U
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386 /**
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387 * @}
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388 */
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389
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390 /** @defgroup FMC_NORSRAM_Flash_Access FMC NOR/SRAM Flash Access
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391 * @{
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392 */
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393 #define FMC_NORSRAM_FLASH_ACCESS_ENABLE 0x00000040U
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394 #define FMC_NORSRAM_FLASH_ACCESS_DISABLE 0x00000000U
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395 /**
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396 * @}
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397 */
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398
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399 /** @defgroup FMC_Burst_Access_Mode FMC Burst Access Mode
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400 * @{
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401 */
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402 #define FMC_BURST_ACCESS_MODE_DISABLE 0x00000000U
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403 #define FMC_BURST_ACCESS_MODE_ENABLE 0x00000100U
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404 /**
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405 * @}
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406 */
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407
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408 /** @defgroup FMC_Wait_Signal_Polarity FMC Wait Signal Polarity
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409 * @{
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410 */
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411 #define FMC_WAIT_SIGNAL_POLARITY_LOW 0x00000000U
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412 #define FMC_WAIT_SIGNAL_POLARITY_HIGH 0x00000200U
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413 /**
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414 * @}
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415 */
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416
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417 /** @defgroup FMC_Wrap_Mode FMC Wrap Mode
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418 * @{
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419 */
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420 /** @note This mode is not available for the STM32F446/469/479xx devices
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421 */
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422 #define FMC_WRAP_MODE_DISABLE 0x00000000U
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423 #define FMC_WRAP_MODE_ENABLE 0x00000400U
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424 /**
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425 * @}
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426 */
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427
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428 /** @defgroup FMC_Wait_Timing FMC Wait Timing
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429 * @{
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430 */
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431 #define FMC_WAIT_TIMING_BEFORE_WS 0x00000000U
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432 #define FMC_WAIT_TIMING_DURING_WS 0x00000800U
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433 /**
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434 * @}
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435 */
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436
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437 /** @defgroup FMC_Write_Operation FMC Write Operation
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438 * @{
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439 */
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440 #define FMC_WRITE_OPERATION_DISABLE 0x00000000U
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441 #define FMC_WRITE_OPERATION_ENABLE 0x00001000U
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442 /**
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443 * @}
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444 */
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445
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446 /** @defgroup FMC_Wait_Signal FMC Wait Signal
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447 * @{
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448 */
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449 #define FMC_WAIT_SIGNAL_DISABLE 0x00000000U
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450 #define FMC_WAIT_SIGNAL_ENABLE 0x00002000U
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Ideenmodellierer
parents:
diff changeset
451 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
452 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
453 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
454
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
455 /** @defgroup FMC_Extended_Mode FMC Extended Mode
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
456 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
457 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
458 #define FMC_EXTENDED_MODE_DISABLE 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
459 #define FMC_EXTENDED_MODE_ENABLE 0x00004000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
460 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
461 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
462 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
463
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
464 /** @defgroup FMC_AsynchronousWait FMC Asynchronous Wait
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
465 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
466 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
467 #define FMC_ASYNCHRONOUS_WAIT_DISABLE 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
468 #define FMC_ASYNCHRONOUS_WAIT_ENABLE 0x00008000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
469 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
470 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
471 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
472
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
473 /** @defgroup FMC_Page_Size FMC Page Size
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
474 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
475 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
476 #define FMC_PAGE_SIZE_NONE 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
477 #define FMC_PAGE_SIZE_128 ((uint32_t)FMC_BCR1_CPSIZE_0)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
478 #define FMC_PAGE_SIZE_256 ((uint32_t)FMC_BCR1_CPSIZE_1)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
479 #define FMC_PAGE_SIZE_512 ((uint32_t)(FMC_BCR1_CPSIZE_0 | FMC_BCR1_CPSIZE_1))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
480 #define FMC_PAGE_SIZE_1024 ((uint32_t)FMC_BCR1_CPSIZE_2)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
481 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
482 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
483 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
484
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
485 /** @defgroup FMC_Write_FIFO FMC Write FIFO
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
486 * @note These values are available only for the STM32F446/469/479xx devices.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
487 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
488 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
489 #define FMC_WRITE_FIFO_DISABLE ((uint32_t)FMC_BCR1_WFDIS)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
490 #define FMC_WRITE_FIFO_ENABLE 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
491 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
492 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
493 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
494
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
495 /** @defgroup FMC_Write_Burst FMC Write Burst
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
496 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
497 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
498 #define FMC_WRITE_BURST_DISABLE 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
499 #define FMC_WRITE_BURST_ENABLE 0x00080000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
500 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
501 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
502 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
503
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
504 /** @defgroup FMC_Continous_Clock FMC Continuous Clock
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
505 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
506 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
507 #define FMC_CONTINUOUS_CLOCK_SYNC_ONLY 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
508 #define FMC_CONTINUOUS_CLOCK_SYNC_ASYNC 0x00100000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
509 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
510 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
511 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
512
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
513 /** @defgroup FMC_Access_Mode FMC Access Mode
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
514 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
515 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
516 #define FMC_ACCESS_MODE_A 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
517 #define FMC_ACCESS_MODE_B 0x10000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
518 #define FMC_ACCESS_MODE_C 0x20000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
519 #define FMC_ACCESS_MODE_D 0x30000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
520 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
521 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
522 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
523
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
524 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
525 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
526 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
527
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
528 /** @defgroup FMC_LL_NAND_Controller FMC NAND Controller
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
529 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
530 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
531 /** @defgroup FMC_NAND_Bank FMC NAND Bank
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
532 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
533 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
534 #define FMC_NAND_BANK2 0x00000010U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
535 #define FMC_NAND_BANK3 0x00000100U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
536 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
537 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
538 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
539
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
540 /** @defgroup FMC_Wait_feature FMC Wait feature
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
541 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
542 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
543 #define FMC_NAND_PCC_WAIT_FEATURE_DISABLE 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
544 #define FMC_NAND_PCC_WAIT_FEATURE_ENABLE 0x00000002U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
545 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
546 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
547 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
548
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
549 /** @defgroup FMC_PCR_Memory_Type FMC PCR Memory Type
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
550 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
551 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
552 #define FMC_PCR_MEMORY_TYPE_PCCARD 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
553 #define FMC_PCR_MEMORY_TYPE_NAND 0x00000008U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
554 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
555 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
556 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
557
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
558 /** @defgroup FMC_NAND_Data_Width FMC NAND Data Width
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
559 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
560 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
561 #define FMC_NAND_PCC_MEM_BUS_WIDTH_8 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
562 #define FMC_NAND_PCC_MEM_BUS_WIDTH_16 0x00000010U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
563 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
564 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
565 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
566
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
567 /** @defgroup FMC_ECC FMC ECC
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
568 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
569 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
570 #define FMC_NAND_ECC_DISABLE 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
571 #define FMC_NAND_ECC_ENABLE 0x00000040U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
572 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
573 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
574 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
575
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
576 /** @defgroup FMC_ECC_Page_Size FMC ECC Page Size
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
577 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
578 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
579 #define FMC_NAND_ECC_PAGE_SIZE_256BYTE 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
580 #define FMC_NAND_ECC_PAGE_SIZE_512BYTE 0x00020000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
581 #define FMC_NAND_ECC_PAGE_SIZE_1024BYTE 0x00040000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
582 #define FMC_NAND_ECC_PAGE_SIZE_2048BYTE 0x00060000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
583 #define FMC_NAND_ECC_PAGE_SIZE_4096BYTE 0x00080000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
584 #define FMC_NAND_ECC_PAGE_SIZE_8192BYTE 0x000A0000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
585 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
586 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
587 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
588
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
589 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
590 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
591 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
592
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
593 /** @defgroup FMC_LL_SDRAM_Controller FMC SDRAM Controller
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
594 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
595 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
596 /** @defgroup FMC_SDRAM_Bank FMC SDRAM Bank
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
597 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
598 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
599 #define FMC_SDRAM_BANK1 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
600 #define FMC_SDRAM_BANK2 0x00000001U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
601 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
602 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
603 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
604
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
605 /** @defgroup FMC_SDRAM_Column_Bits_number FMC SDRAM Column Bits number
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
606 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
607 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
608 #define FMC_SDRAM_COLUMN_BITS_NUM_8 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
609 #define FMC_SDRAM_COLUMN_BITS_NUM_9 0x00000001U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
610 #define FMC_SDRAM_COLUMN_BITS_NUM_10 0x00000002U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
611 #define FMC_SDRAM_COLUMN_BITS_NUM_11 0x00000003U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
612 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
613 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
614 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
615
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
616 /** @defgroup FMC_SDRAM_Row_Bits_number FMC SDRAM Row Bits number
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
617 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
618 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
619 #define FMC_SDRAM_ROW_BITS_NUM_11 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
620 #define FMC_SDRAM_ROW_BITS_NUM_12 0x00000004U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
621 #define FMC_SDRAM_ROW_BITS_NUM_13 0x00000008U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
622 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
623 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
624 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
625
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
626 /** @defgroup FMC_SDRAM_Memory_Bus_Width FMC SDRAM Memory Bus Width
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
627 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
628 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
629 #define FMC_SDRAM_MEM_BUS_WIDTH_8 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
630 #define FMC_SDRAM_MEM_BUS_WIDTH_16 0x00000010U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
631 #define FMC_SDRAM_MEM_BUS_WIDTH_32 0x00000020U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
632 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
633 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
634 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
635
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
636 /** @defgroup FMC_SDRAM_Internal_Banks_Number FMC SDRAM Internal Banks Number
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
637 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
638 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
639 #define FMC_SDRAM_INTERN_BANKS_NUM_2 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
640 #define FMC_SDRAM_INTERN_BANKS_NUM_4 0x00000040U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
641 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
642 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
643 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
644
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
645 /** @defgroup FMC_SDRAM_CAS_Latency FMC SDRAM CAS Latency
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
646 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
647 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
648 #define FMC_SDRAM_CAS_LATENCY_1 0x00000080U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
649 #define FMC_SDRAM_CAS_LATENCY_2 0x00000100U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
650 #define FMC_SDRAM_CAS_LATENCY_3 0x00000180U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
651 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
652 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
653 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
654
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
655 /** @defgroup FMC_SDRAM_Write_Protection FMC SDRAM Write Protection
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
656 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
657 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
658 #define FMC_SDRAM_WRITE_PROTECTION_DISABLE 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
659 #define FMC_SDRAM_WRITE_PROTECTION_ENABLE 0x00000200U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
660
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
661 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
662 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
663 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
664
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
665 /** @defgroup FMC_SDRAM_Clock_Period FMC SDRAM Clock Period
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
666 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
667 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
668 #define FMC_SDRAM_CLOCK_DISABLE 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
669 #define FMC_SDRAM_CLOCK_PERIOD_2 0x00000800U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
670 #define FMC_SDRAM_CLOCK_PERIOD_3 0x00000C00U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
671 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
672 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
673 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
674
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
675 /** @defgroup FMC_SDRAM_Read_Burst FMC SDRAM Read Burst
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
676 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
677 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
678 #define FMC_SDRAM_RBURST_DISABLE 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
679 #define FMC_SDRAM_RBURST_ENABLE 0x00001000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
680 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
681 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
682 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
683
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
684 /** @defgroup FMC_SDRAM_Read_Pipe_Delay FMC SDRAM Read Pipe Delay
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
685 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
686 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
687 #define FMC_SDRAM_RPIPE_DELAY_0 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
688 #define FMC_SDRAM_RPIPE_DELAY_1 0x00002000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
689 #define FMC_SDRAM_RPIPE_DELAY_2 0x00004000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
690 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
691 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
692 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
693
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
694 /** @defgroup FMC_SDRAM_Command_Mode FMC SDRAM Command Mode
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
695 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
696 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
697 #define FMC_SDRAM_CMD_NORMAL_MODE 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
698 #define FMC_SDRAM_CMD_CLK_ENABLE 0x00000001U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
699 #define FMC_SDRAM_CMD_PALL 0x00000002U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
700 #define FMC_SDRAM_CMD_AUTOREFRESH_MODE 0x00000003U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
701 #define FMC_SDRAM_CMD_LOAD_MODE 0x00000004U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
702 #define FMC_SDRAM_CMD_SELFREFRESH_MODE 0x00000005U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
703 #define FMC_SDRAM_CMD_POWERDOWN_MODE 0x00000006U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
704 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
705 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
706 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
707
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
708 /** @defgroup FMC_SDRAM_Command_Target FMC SDRAM Command Target
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
709 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
710 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
711 #define FMC_SDRAM_CMD_TARGET_BANK2 FMC_SDCMR_CTB2
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
712 #define FMC_SDRAM_CMD_TARGET_BANK1 FMC_SDCMR_CTB1
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
713 #define FMC_SDRAM_CMD_TARGET_BANK1_2 0x00000018U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
714 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
715 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
716 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
717
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
718 /** @defgroup FMC_SDRAM_Mode_Status FMC SDRAM Mode Status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
719 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
720 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
721 #define FMC_SDRAM_NORMAL_MODE 0x00000000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
722 #define FMC_SDRAM_SELF_REFRESH_MODE FMC_SDSR_MODES1_0
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
723 #define FMC_SDRAM_POWER_DOWN_MODE FMC_SDSR_MODES1_1
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
724 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
725 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
726 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
727
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
728 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
729 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
730 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
731
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
732 /** @defgroup FMC_LL_Interrupt_definition FMC Interrupt definition
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
733 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
734 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
735 #define FMC_IT_RISING_EDGE 0x00000008U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
736 #define FMC_IT_LEVEL 0x00000010U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
737 #define FMC_IT_FALLING_EDGE 0x00000020U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
738 #define FMC_IT_REFRESH_ERROR 0x00004000U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
739 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
740 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
741 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
742
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
743 /** @defgroup FMC_LL_Flag_definition FMC Flag definition
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
744 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
745 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
746 #define FMC_FLAG_RISING_EDGE 0x00000001U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
747 #define FMC_FLAG_LEVEL 0x00000002U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
748 #define FMC_FLAG_FALLING_EDGE 0x00000004U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
749 #define FMC_FLAG_FEMPT 0x00000040U
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
750 #define FMC_SDRAM_FLAG_REFRESH_IT FMC_SDSR_RE
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
751 #define FMC_SDRAM_FLAG_BUSY FMC_SDSR_BUSY
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
752 #define FMC_SDRAM_FLAG_REFRESH_ERROR FMC_SDRTR_CRE
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
753 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
754 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
755 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
756
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
757 /** @defgroup FMC_LL_Alias_definition FMC Alias definition
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
758 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
759 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
760 #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
761 #define FMC_NAND_TypeDef FMC_Bank3_TypeDef
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762 #else
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diff changeset
763 #define FMC_NAND_TypeDef FMC_Bank2_3_TypeDef
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
764 #define FMC_PCCARD_TypeDef FMC_Bank4_TypeDef
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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765 #endif /* STM32F446xx || STM32F469xx || STM32F479xx */
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diff changeset
766 #define FMC_NORSRAM_TypeDef FMC_Bank1_TypeDef
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diff changeset
767 #define FMC_NORSRAM_EXTENDED_TypeDef FMC_Bank1E_TypeDef
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768 #define FMC_SDRAM_TypeDef FMC_Bank5_6_TypeDef
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diff changeset
769
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
770
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
771 #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
772 #define FMC_NAND_DEVICE FMC_Bank3
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diff changeset
773 #else
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
774 #define FMC_NAND_DEVICE FMC_Bank2_3
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
775 #define FMC_PCCARD_DEVICE FMC_Bank4
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
776 #endif /* STM32F446xx || STM32F469xx || STM32F479xx */
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777 #define FMC_NORSRAM_DEVICE FMC_Bank1
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
778 #define FMC_NORSRAM_EXTENDED_DEVICE FMC_Bank1E
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
779 #define FMC_SDRAM_DEVICE FMC_Bank5_6
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
780 /**
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diff changeset
781 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
782 */
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diff changeset
783
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
784 /**
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diff changeset
785 * @}
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diff changeset
786 */
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diff changeset
787
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diff changeset
788 /* Private macro -------------------------------------------------------------*/
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diff changeset
789 /** @defgroup FMC_LL_Private_Macros FMC Private Macros
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790 * @{
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diff changeset
791 */
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diff changeset
792
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
793 /** @defgroup FMC_LL_NOR_Macros FMC NOR/SRAM Macros
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794 * @brief macros to handle NOR device enable/disable and read/write operations
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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795 * @{
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796 */
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diff changeset
797 /**
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diff changeset
798 * @brief Enable the NORSRAM device access.
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799 * @param __INSTANCE__ FMC_NORSRAM Instance
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800 * @param __BANK__ FMC_NORSRAM Bank
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801 * @retval None
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802 */
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803 #define __FMC_NORSRAM_ENABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)] |= FMC_BCR1_MBKEN)
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804
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diff changeset
805 /**
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806 * @brief Disable the NORSRAM device access.
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807 * @param __INSTANCE__ FMC_NORSRAM Instance
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808 * @param __BANK__ FMC_NORSRAM Bank
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809 * @retval None
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810 */
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811 #define __FMC_NORSRAM_DISABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)] &= ~FMC_BCR1_MBKEN)
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812 /**
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813 * @}
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814 */
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diff changeset
815
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816 /** @defgroup FMC_LL_NAND_Macros FMC NAND Macros
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817 * @brief macros to handle NAND device enable/disable
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818 * @{
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819 */
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820 #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
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821 /**
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822 * @brief Enable the NAND device access.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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823 * @param __INSTANCE__ FMC_NAND Instance
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824 * @param __BANK__ FMC_NAND Bank
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825 * @retval None
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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826 */
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827 #define __FMC_NAND_ENABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->PCR |= FMC_PCR_PBKEN)
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828
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829 /**
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830 * @brief Disable the NAND device access.
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831 * @param __INSTANCE__ FMC_NAND Instance
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832 * @param __BANK__ FMC_NAND Bank
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833 * @retval None
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834 */
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835 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->PCR &= ~FMC_PCR_PBKEN)
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836 #else /* defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) */
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837 /**
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838 * @brief Enable the NAND device access.
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839 * @param __INSTANCE__ FMC_NAND Instance
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840 * @param __BANK__ FMC_NAND Bank
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841 * @retval None
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842 */
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843 #define __FMC_NAND_ENABLE(__INSTANCE__, __BANK__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->PCR2 |= FMC_PCR2_PBKEN): \
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844 ((__INSTANCE__)->PCR3 |= FMC_PCR3_PBKEN))
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845
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846 /**
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847 * @brief Disable the NAND device access.
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848 * @param __INSTANCE__ FMC_NAND Instance
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849 * @param __BANK__ FMC_NAND Bank
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850 * @retval None
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851 */
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852 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->PCR2 &= ~FMC_PCR2_PBKEN): \
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853 ((__INSTANCE__)->PCR3 &= ~FMC_PCR3_PBKEN))
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854
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855 #endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) */
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856 /**
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857 * @}
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858 */
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859 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
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860 /** @defgroup FMC_LL_PCCARD_Macros FMC PCCARD Macros
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861 * @brief macros to handle SRAM read/write operations
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862 * @{
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863 */
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864 /**
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865 * @brief Enable the PCCARD device access.
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866 * @param __INSTANCE__ FMC_PCCARD Instance
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867 * @retval None
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868 */
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869 #define __FMC_PCCARD_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR4 |= FMC_PCR4_PBKEN)
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870
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871 /**
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872 * @brief Disable the PCCARD device access.
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873 * @param __INSTANCE__ FMC_PCCARD Instance
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874 * @retval None
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875 */
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876 #define __FMC_PCCARD_DISABLE(__INSTANCE__) ((__INSTANCE__)->PCR4 &= ~FMC_PCR4_PBKEN)
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877 /**
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878 * @}
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879 */
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880 #endif /* defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) */
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881
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882 /** @defgroup FMC_LL_Flag_Interrupt_Macros FMC Flag&Interrupt Macros
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883 * @brief macros to handle FMC flags and interrupts
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884 * @{
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885 */
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886 #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
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887 /**
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888 * @brief Enable the NAND device interrupt.
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889 * @param __INSTANCE__ FMC_NAND instance
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890 * @param __BANK__ FMC_NAND Bank
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891 * @param __INTERRUPT__ FMC_NAND interrupt
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892 * This parameter can be any combination of the following values:
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893 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
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894 * @arg FMC_IT_LEVEL: Interrupt level.
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895 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
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896 * @retval None
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897 */
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898 #define __FMC_NAND_ENABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) ((__INSTANCE__)->SR |= (__INTERRUPT__))
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899
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900 /**
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901 * @brief Disable the NAND device interrupt.
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902 * @param __INSTANCE__ FMC_NAND Instance
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903 * @param __BANK__ FMC_NAND Bank
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904 * @param __INTERRUPT__ FMC_NAND interrupt
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905 * This parameter can be any combination of the following values:
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906 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
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907 * @arg FMC_IT_LEVEL: Interrupt level.
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908 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
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909 * @retval None
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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910 */
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911 #define __FMC_NAND_DISABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) ((__INSTANCE__)->SR &= ~(__INTERRUPT__))
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912
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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913 /**
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914 * @brief Get flag status of the NAND device.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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915 * @param __INSTANCE__ FMC_NAND Instance
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916 * @param __BANK__ FMC_NAND Bank
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917 * @param __FLAG__ FMC_NAND flag
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918 * This parameter can be any combination of the following values:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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919 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
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920 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
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921 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
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922 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
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923 * @retval The state of FLAG (SET or RESET).
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924 */
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925 #define __FMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__INSTANCE__)->SR &(__FLAG__)) == (__FLAG__))
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926 /**
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927 * @brief Clear flag status of the NAND device.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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928 * @param __INSTANCE__ FMC_NAND Instance
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929 * @param __BANK__ FMC_NAND Bank
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930 * @param __FLAG__ FMC_NAND flag
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931 * This parameter can be any combination of the following values:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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932 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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933 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
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934 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
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935 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
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936 * @retval None
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937 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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938 #define __FMC_NAND_CLEAR_FLAG(__INSTANCE__, __BANK__, __FLAG__) ((__INSTANCE__)->SR &= ~(__FLAG__))
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939 #else /* defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) */
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940 /**
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941 * @brief Enable the NAND device interrupt.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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942 * @param __INSTANCE__ FMC_NAND instance
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943 * @param __BANK__ FMC_NAND Bank
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944 * @param __INTERRUPT__ FMC_NAND interrupt
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945 * This parameter can be any combination of the following values:
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946 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
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947 * @arg FMC_IT_LEVEL: Interrupt level.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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948 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
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949 * @retval None
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950 */
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951 #define __FMC_NAND_ENABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->SR2 |= (__INTERRUPT__)): \
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952 ((__INSTANCE__)->SR3 |= (__INTERRUPT__)))
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953
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954 /**
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955 * @brief Disable the NAND device interrupt.
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956 * @param __INSTANCE__ FMC_NAND Instance
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957 * @param __BANK__ FMC_NAND Bank
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958 * @param __INTERRUPT__ FMC_NAND interrupt
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959 * This parameter can be any combination of the following values:
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960 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
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961 * @arg FMC_IT_LEVEL: Interrupt level.
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962 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
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963 * @retval None
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964 */
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965 #define __FMC_NAND_DISABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__INTERRUPT__)): \
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966 ((__INSTANCE__)->SR3 &= ~(__INTERRUPT__)))
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967
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968 /**
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969 * @brief Get flag status of the NAND device.
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970 * @param __INSTANCE__ FMC_NAND Instance
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971 * @param __BANK__ FMC_NAND Bank
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972 * @param __FLAG__ FMC_NAND flag
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973 * This parameter can be any combination of the following values:
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974 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
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975 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
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976 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
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977 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
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978 * @retval The state of FLAG (SET or RESET).
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979 */
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980 #define __FMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FMC_NAND_BANK2)? (((__INSTANCE__)->SR2 &(__FLAG__)) == (__FLAG__)): \
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981 (((__INSTANCE__)->SR3 &(__FLAG__)) == (__FLAG__)))
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982 /**
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983 * @brief Clear flag status of the NAND device.
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984 * @param __INSTANCE__ FMC_NAND Instance
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985 * @param __BANK__ FMC_NAND Bank
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986 * @param __FLAG__ FMC_NAND flag
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987 * This parameter can be any combination of the following values:
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988 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
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989 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
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990 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
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991 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
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992 * @retval None
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993 */
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994 #define __FMC_NAND_CLEAR_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__BANK__) == FMC_NAND_BANK2)? ((__INSTANCE__)->SR2 &= ~(__FLAG__)): \
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995 ((__INSTANCE__)->SR3 &= ~(__FLAG__)))
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996 #endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) */
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997
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998 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
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999 /**
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1000 * @brief Enable the PCCARD device interrupt.
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1001 * @param __INSTANCE__ FMC_PCCARD instance
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1002 * @param __INTERRUPT__ FMC_PCCARD interrupt
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1003 * This parameter can be any combination of the following values:
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1004 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
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1005 * @arg FMC_IT_LEVEL: Interrupt level.
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1006 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
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1007 * @retval None
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1008 */
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1009 #define __FMC_PCCARD_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SR4 |= (__INTERRUPT__))
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1010
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1011 /**
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1012 * @brief Disable the PCCARD device interrupt.
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1013 * @param __INSTANCE__ FMC_PCCARD instance
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1014 * @param __INTERRUPT__ FMC_PCCARD interrupt
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1015 * This parameter can be any combination of the following values:
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1016 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
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1017 * @arg FMC_IT_LEVEL: Interrupt level.
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1018 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
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1019 * @retval None
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1020 */
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1021 #define __FMC_PCCARD_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SR4 &= ~(__INTERRUPT__))
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1022
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1023 /**
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1024 * @brief Get flag status of the PCCARD device.
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1025 * @param __INSTANCE__ FMC_PCCARD instance
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1026 * @param __FLAG__ FMC_PCCARD flag
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1027 * This parameter can be any combination of the following values:
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1028 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
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1029 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
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1030 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
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1031 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
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1032 * @retval The state of FLAG (SET or RESET).
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1033 */
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1034 #define __FMC_PCCARD_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->SR4 &(__FLAG__)) == (__FLAG__))
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1035
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1036 /**
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1037 * @brief Clear flag status of the PCCARD device.
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1038 * @param __INSTANCE__ FMC_PCCARD instance
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1039 * @param __FLAG__ FMC_PCCARD flag
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1040 * This parameter can be any combination of the following values:
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1041 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
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1042 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
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1043 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
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1044 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
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1045 * @retval None
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1046 */
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1047 #define __FMC_PCCARD_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->SR4 &= ~(__FLAG__))
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1048 #endif /* defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) */
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diff changeset
1049
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1050 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1051 * @brief Enable the SDRAM device interrupt.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1052 * @param __INSTANCE__ FMC_SDRAM instance
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1053 * @param __INTERRUPT__ FMC_SDRAM interrupt
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1054 * This parameter can be any combination of the following values:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1055 * @arg FMC_IT_REFRESH_ERROR: Interrupt refresh error
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1056 * @retval None
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1057 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1058 #define __FMC_SDRAM_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SDRTR |= (__INTERRUPT__))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1059
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1060 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1061 * @brief Disable the SDRAM device interrupt.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1062 * @param __INSTANCE__ FMC_SDRAM instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1063 * @param __INTERRUPT__ FMC_SDRAM interrupt
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1064 * This parameter can be any combination of the following values:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1065 * @arg FMC_IT_REFRESH_ERROR: Interrupt refresh error
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1066 * @retval None
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1067 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1068 #define __FMC_SDRAM_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SDRTR &= ~(__INTERRUPT__))
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1069
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1070 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1071 * @brief Get flag status of the SDRAM device.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1072 * @param __INSTANCE__ FMC_SDRAM instance
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1073 * @param __FLAG__ FMC_SDRAM flag
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1074 * This parameter can be any combination of the following values:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1075 * @arg FMC_SDRAM_FLAG_REFRESH_IT: Interrupt refresh error.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1076 * @arg FMC_SDRAM_FLAG_BUSY: SDRAM busy flag.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1077 * @arg FMC_SDRAM_FLAG_REFRESH_ERROR: Refresh error flag.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1078 * @retval The state of FLAG (SET or RESET).
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1079 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1080 #define __FMC_SDRAM_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->SDSR &(__FLAG__)) == (__FLAG__))
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1081
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1082 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1083 * @brief Clear flag status of the SDRAM device.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1084 * @param __INSTANCE__ FMC_SDRAM instance
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1085 * @param __FLAG__ FMC_SDRAM flag
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1086 * This parameter can be any combination of the following values:
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1087 * @arg FMC_SDRAM_FLAG_REFRESH_ERROR
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1088 * @retval None
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1089 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1090 #define __FMC_SDRAM_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->SDRTR |= (__FLAG__))
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1091 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1092 * @}
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1093 */
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1094
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1095 /** @defgroup FSMC_LL_Assert_Macros FSMC Assert Macros
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1096 * @{
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1097 */
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1098 #define IS_FMC_NORSRAM_BANK(BANK) (((BANK) == FMC_NORSRAM_BANK1) || \
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1099 ((BANK) == FMC_NORSRAM_BANK2) || \
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1100 ((BANK) == FMC_NORSRAM_BANK3) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1101 ((BANK) == FMC_NORSRAM_BANK4))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1102
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1103 #define IS_FMC_MUX(__MUX__) (((__MUX__) == FMC_DATA_ADDRESS_MUX_DISABLE) || \
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1104 ((__MUX__) == FMC_DATA_ADDRESS_MUX_ENABLE))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1105
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1106 #define IS_FMC_MEMORY(__MEMORY__) (((__MEMORY__) == FMC_MEMORY_TYPE_SRAM) || \
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1107 ((__MEMORY__) == FMC_MEMORY_TYPE_PSRAM)|| \
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1108 ((__MEMORY__) == FMC_MEMORY_TYPE_NOR))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1109
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1110 #define IS_FMC_NORSRAM_MEMORY_WIDTH(__WIDTH__) (((__WIDTH__) == FMC_NORSRAM_MEM_BUS_WIDTH_8) || \
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1111 ((__WIDTH__) == FMC_NORSRAM_MEM_BUS_WIDTH_16) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1112 ((__WIDTH__) == FMC_NORSRAM_MEM_BUS_WIDTH_32))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1113
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1114 #define IS_FMC_ACCESS_MODE(__MODE__) (((__MODE__) == FMC_ACCESS_MODE_A) || \
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1115 ((__MODE__) == FMC_ACCESS_MODE_B) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1116 ((__MODE__) == FMC_ACCESS_MODE_C) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1117 ((__MODE__) == FMC_ACCESS_MODE_D))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1118
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1119 #define IS_FMC_NAND_BANK(BANK) (((BANK) == FMC_NAND_BANK2) || \
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1120 ((BANK) == FMC_NAND_BANK3))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1121
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1122 #define IS_FMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FMC_NAND_PCC_WAIT_FEATURE_DISABLE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1123 ((FEATURE) == FMC_NAND_PCC_WAIT_FEATURE_ENABLE))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1124
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1125 #define IS_FMC_NAND_MEMORY_WIDTH(WIDTH) (((WIDTH) == FMC_NAND_PCC_MEM_BUS_WIDTH_8) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1126 ((WIDTH) == FMC_NAND_PCC_MEM_BUS_WIDTH_16))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1127
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1128 #define IS_FMC_ECC_STATE(STATE) (((STATE) == FMC_NAND_ECC_DISABLE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1129 ((STATE) == FMC_NAND_ECC_ENABLE))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1130
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1131 #define IS_FMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FMC_NAND_ECC_PAGE_SIZE_256BYTE) || \
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1132 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_512BYTE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1133 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_1024BYTE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1134 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_2048BYTE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1135 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_4096BYTE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1136 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_8192BYTE))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1137
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1138 #define IS_FMC_TCLR_TIME(TIME) ((TIME) <= 255U)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1139
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1140 #define IS_FMC_TAR_TIME(TIME) ((TIME) <= 255U)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1141
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1142 #define IS_FMC_SETUP_TIME(TIME) ((TIME) <= 255U)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1143
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1144 #define IS_FMC_WAIT_TIME(TIME) ((TIME) <= 255U)
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1145
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1146 #define IS_FMC_HOLD_TIME(TIME) ((TIME) <= 255U)
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1147
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1148 #define IS_FMC_HIZ_TIME(TIME) ((TIME) <= 255U)
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1149
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1150 #define IS_FMC_NORSRAM_DEVICE(__INSTANCE__) ((__INSTANCE__) == FMC_NORSRAM_DEVICE)
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1151
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1152 #define IS_FMC_NORSRAM_EXTENDED_DEVICE(__INSTANCE__) ((__INSTANCE__) == FMC_NORSRAM_EXTENDED_DEVICE)
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1153
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1154 #define IS_FMC_NAND_DEVICE(__INSTANCE__) ((__INSTANCE__) == FMC_NAND_DEVICE)
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1155
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1156 #define IS_FMC_PCCARD_DEVICE(__INSTANCE__) ((__INSTANCE__) == FMC_PCCARD_DEVICE)
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1157
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1158 #define IS_FMC_BURSTMODE(__STATE__) (((__STATE__) == FMC_BURST_ACCESS_MODE_DISABLE) || \
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1159 ((__STATE__) == FMC_BURST_ACCESS_MODE_ENABLE))
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1160
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1161 #define IS_FMC_WAIT_POLARITY(__POLARITY__) (((__POLARITY__) == FMC_WAIT_SIGNAL_POLARITY_LOW) || \
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1162 ((__POLARITY__) == FMC_WAIT_SIGNAL_POLARITY_HIGH))
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1163
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1164 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
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1165 #define IS_FMC_WRAP_MODE(__MODE__) (((__MODE__) == FMC_WRAP_MODE_DISABLE) || \
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1166 ((__MODE__) == FMC_WRAP_MODE_ENABLE))
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1167 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
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1168
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1169 #define IS_FMC_WAIT_SIGNAL_ACTIVE(__ACTIVE__) (((__ACTIVE__) == FMC_WAIT_TIMING_BEFORE_WS) || \
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1170 ((__ACTIVE__) == FMC_WAIT_TIMING_DURING_WS))
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1171
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1172 #define IS_FMC_WRITE_OPERATION(__OPERATION__) (((__OPERATION__) == FMC_WRITE_OPERATION_DISABLE) || \
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1173 ((__OPERATION__) == FMC_WRITE_OPERATION_ENABLE))
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1174
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1175 #define IS_FMC_WAITE_SIGNAL(__SIGNAL__) (((__SIGNAL__) == FMC_WAIT_SIGNAL_DISABLE) || \
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1176 ((__SIGNAL__) == FMC_WAIT_SIGNAL_ENABLE))
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1177
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1178 #define IS_FMC_EXTENDED_MODE(__MODE__) (((__MODE__) == FMC_EXTENDED_MODE_DISABLE) || \
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1179 ((__MODE__) == FMC_EXTENDED_MODE_ENABLE))
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1180
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1181 #define IS_FMC_ASYNWAIT(__STATE__) (((__STATE__) == FMC_ASYNCHRONOUS_WAIT_DISABLE) || \
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1182 ((__STATE__) == FMC_ASYNCHRONOUS_WAIT_ENABLE))
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diff changeset
1183
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1184 #define IS_FMC_WRITE_BURST(__BURST__) (((__BURST__) == FMC_WRITE_BURST_DISABLE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1185 ((__BURST__) == FMC_WRITE_BURST_ENABLE))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1186
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1187 #define IS_FMC_CONTINOUS_CLOCK(CCLOCK) (((CCLOCK) == FMC_CONTINUOUS_CLOCK_SYNC_ONLY) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1188 ((CCLOCK) == FMC_CONTINUOUS_CLOCK_SYNC_ASYNC))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1189
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1190 #define IS_FMC_ADDRESS_SETUP_TIME(__TIME__) ((__TIME__) <= 15U)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1191
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1192 #define IS_FMC_ADDRESS_HOLD_TIME(__TIME__) (((__TIME__) > 0U) && ((__TIME__) <= 15U))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1193
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1194 #define IS_FMC_DATASETUP_TIME(__TIME__) (((__TIME__) > 0U) && ((__TIME__) <= 255U))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1195
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1196 #define IS_FMC_TURNAROUND_TIME(__TIME__) ((__TIME__) <= 15U)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1197
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1198 #define IS_FMC_DATA_LATENCY(__LATENCY__) (((__LATENCY__) > 1U) && ((__LATENCY__) <= 17U))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1199
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1200 #define IS_FMC_CLK_DIV(DIV) (((DIV) > 1U) && ((DIV) <= 16U))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1201
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1202 #define IS_FMC_SDRAM_BANK(BANK) (((BANK) == FMC_SDRAM_BANK1) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1203 ((BANK) == FMC_SDRAM_BANK2))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1204
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1205 #define IS_FMC_COLUMNBITS_NUMBER(COLUMN) (((COLUMN) == FMC_SDRAM_COLUMN_BITS_NUM_8) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1206 ((COLUMN) == FMC_SDRAM_COLUMN_BITS_NUM_9) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1207 ((COLUMN) == FMC_SDRAM_COLUMN_BITS_NUM_10) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1208 ((COLUMN) == FMC_SDRAM_COLUMN_BITS_NUM_11))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1209
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1210 #define IS_FMC_ROWBITS_NUMBER(ROW) (((ROW) == FMC_SDRAM_ROW_BITS_NUM_11) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1211 ((ROW) == FMC_SDRAM_ROW_BITS_NUM_12) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1212 ((ROW) == FMC_SDRAM_ROW_BITS_NUM_13))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1213
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1214 #define IS_FMC_SDMEMORY_WIDTH(WIDTH) (((WIDTH) == FMC_SDRAM_MEM_BUS_WIDTH_8) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1215 ((WIDTH) == FMC_SDRAM_MEM_BUS_WIDTH_16) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1216 ((WIDTH) == FMC_SDRAM_MEM_BUS_WIDTH_32))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1217
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1218 #define IS_FMC_INTERNALBANK_NUMBER(NUMBER) (((NUMBER) == FMC_SDRAM_INTERN_BANKS_NUM_2) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1219 ((NUMBER) == FMC_SDRAM_INTERN_BANKS_NUM_4))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1220
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1221
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1222 #define IS_FMC_CAS_LATENCY(LATENCY) (((LATENCY) == FMC_SDRAM_CAS_LATENCY_1) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1223 ((LATENCY) == FMC_SDRAM_CAS_LATENCY_2) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1224 ((LATENCY) == FMC_SDRAM_CAS_LATENCY_3))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1225
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1226 #define IS_FMC_SDCLOCK_PERIOD(PERIOD) (((PERIOD) == FMC_SDRAM_CLOCK_DISABLE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1227 ((PERIOD) == FMC_SDRAM_CLOCK_PERIOD_2) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1228 ((PERIOD) == FMC_SDRAM_CLOCK_PERIOD_3))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1229
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1230 #define IS_FMC_READ_BURST(RBURST) (((RBURST) == FMC_SDRAM_RBURST_DISABLE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1231 ((RBURST) == FMC_SDRAM_RBURST_ENABLE))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1232
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1233
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1234 #define IS_FMC_READPIPE_DELAY(DELAY) (((DELAY) == FMC_SDRAM_RPIPE_DELAY_0) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1235 ((DELAY) == FMC_SDRAM_RPIPE_DELAY_1) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1236 ((DELAY) == FMC_SDRAM_RPIPE_DELAY_2))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1237
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1238 #define IS_FMC_LOADTOACTIVE_DELAY(DELAY) (((DELAY) > 0U) && ((DELAY) <= 16U))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1239
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1240 #define IS_FMC_EXITSELFREFRESH_DELAY(DELAY) (((DELAY) > 0U) && ((DELAY) <= 16U))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1241
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1242 #define IS_FMC_SELFREFRESH_TIME(TIME) (((TIME) > 0U) && ((TIME) <= 16U))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1243
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1244 #define IS_FMC_ROWCYCLE_DELAY(DELAY) (((DELAY) > 0U) && ((DELAY) <= 16U))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1245
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1246 #define IS_FMC_WRITE_RECOVERY_TIME(TIME) (((TIME) > 0U) && ((TIME) <= 16U))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1247
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1248 #define IS_FMC_RP_DELAY(DELAY) (((DELAY) > 0U) && ((DELAY) <= 16U))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1249
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1250 #define IS_FMC_RCD_DELAY(DELAY) (((DELAY) > 0U) && ((DELAY) <= 16U))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1251
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1252 #define IS_FMC_COMMAND_MODE(COMMAND) (((COMMAND) == FMC_SDRAM_CMD_NORMAL_MODE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1253 ((COMMAND) == FMC_SDRAM_CMD_CLK_ENABLE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1254 ((COMMAND) == FMC_SDRAM_CMD_PALL) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1255 ((COMMAND) == FMC_SDRAM_CMD_AUTOREFRESH_MODE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1256 ((COMMAND) == FMC_SDRAM_CMD_LOAD_MODE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1257 ((COMMAND) == FMC_SDRAM_CMD_SELFREFRESH_MODE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1258 ((COMMAND) == FMC_SDRAM_CMD_POWERDOWN_MODE))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1259
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1260 #define IS_FMC_COMMAND_TARGET(TARGET) (((TARGET) == FMC_SDRAM_CMD_TARGET_BANK1) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1261 ((TARGET) == FMC_SDRAM_CMD_TARGET_BANK2) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1262 ((TARGET) == FMC_SDRAM_CMD_TARGET_BANK1_2))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1263
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1264 #define IS_FMC_AUTOREFRESH_NUMBER(NUMBER) (((NUMBER) > 0U) && ((NUMBER) <= 16U))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1265
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1266 #define IS_FMC_MODE_REGISTER(CONTENT) ((CONTENT) <= 8191U)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1267
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1268 #define IS_FMC_REFRESH_RATE(RATE) ((RATE) <= 8191U)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1269
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1270 #define IS_FMC_SDRAM_DEVICE(INSTANCE) ((INSTANCE) == FMC_SDRAM_DEVICE)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1271
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1272 #define IS_FMC_WRITE_PROTECTION(WRITE) (((WRITE) == FMC_SDRAM_WRITE_PROTECTION_DISABLE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
1273 ((WRITE) == FMC_SDRAM_WRITE_PROTECTION_ENABLE))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
1274
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
1275 #define IS_FMC_PAGESIZE(SIZE) (((SIZE) == FMC_PAGE_SIZE_NONE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1276 ((SIZE) == FMC_PAGE_SIZE_128) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1277 ((SIZE) == FMC_PAGE_SIZE_256) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1278 ((SIZE) == FMC_PAGE_SIZE_512) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1279 ((SIZE) == FMC_PAGE_SIZE_1024))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
1280
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1281 #if defined (STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1282 #define IS_FMC_WRITE_FIFO(FIFO) (((FIFO) == FMC_WRITE_FIFO_DISABLE) || \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1283 ((FIFO) == FMC_WRITE_FIFO_ENABLE))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1284 #endif /* STM32F446xx || STM32F469xx || STM32F479xx */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1285
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1286 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
1287 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1288 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1289
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1290 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
1291 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1292 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1293
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1294 /* Private functions ---------------------------------------------------------*/
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1295 /** @defgroup FMC_LL_Private_Functions FMC LL Private Functions
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1296 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1297 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1298
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1299 /** @defgroup FMC_LL_NORSRAM NOR SRAM
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1300 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1301 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1302 /** @defgroup FMC_LL_NORSRAM_Private_Functions_Group1 NOR SRAM Initialization/de-initialization functions
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1303 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1304 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1305 HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_InitTypeDef *Init);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1306 HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1307 HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1308 HAL_StatusTypeDef FMC_NORSRAM_DeInit(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1309 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1310 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1311 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1312
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1313 /** @defgroup FMC_LL_NORSRAM_Private_Functions_Group2 NOR SRAM Control functions
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1314 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1315 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1316 HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Enable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1317 HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Disable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank);
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1318 /**
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1319 * @}
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1320 */
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1321 /**
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1322 * @}
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1323 */
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1324
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1325 /** @defgroup FMC_LL_NAND NAND
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1326 * @{
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1327 */
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1328 /** @defgroup FMC_LL_NAND_Private_Functions_Group1 NAND Initialization/de-initialization functions
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1329 * @{
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1330 */
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1331 HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef *Init);
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1332 HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
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1333 HAL_StatusTypeDef FMC_NAND_AttributeSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
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1334 HAL_StatusTypeDef FMC_NAND_DeInit(FMC_NAND_TypeDef *Device, uint32_t Bank);
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1335 /**
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1336 * @}
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1337 */
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1338
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1339 /** @defgroup FMC_LL_NAND_Private_Functions_Group2 NAND Control functions
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1340 * @{
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1341 */
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1342 HAL_StatusTypeDef FMC_NAND_ECC_Enable(FMC_NAND_TypeDef *Device, uint32_t Bank);
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1343 HAL_StatusTypeDef FMC_NAND_ECC_Disable(FMC_NAND_TypeDef *Device, uint32_t Bank);
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1344 HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout);
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1345
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1346 /**
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1347 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1348 */
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1349 /**
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1350 * @}
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1351 */
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1352 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
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1353 /** @defgroup FMC_LL_PCCARD PCCARD
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1354 * @{
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1355 */
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1356 /** @defgroup FMC_LL_PCCARD_Private_Functions_Group1 PCCARD Initialization/de-initialization functions
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1357 * @{
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1358 */
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1359 HAL_StatusTypeDef FMC_PCCARD_Init(FMC_PCCARD_TypeDef *Device, FMC_PCCARD_InitTypeDef *Init);
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1360 HAL_StatusTypeDef FMC_PCCARD_CommonSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing);
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1361 HAL_StatusTypeDef FMC_PCCARD_AttributeSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing);
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1362 HAL_StatusTypeDef FMC_PCCARD_IOSpace_Timing_Init(FMC_PCCARD_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing);
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1363 HAL_StatusTypeDef FMC_PCCARD_DeInit(FMC_PCCARD_TypeDef *Device);
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1364 /**
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1365 * @}
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1366 */
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1367 /**
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1368 * @}
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1369 */
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1370 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
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1371
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1372 /** @defgroup FMC_LL_SDRAM SDRAM
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1373 * @{
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1374 */
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1375 /** @defgroup FMC_LL_SDRAM_Private_Functions_Group1 SDRAM Initialization/de-initialization functions
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1376 * @{
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1377 */
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1378 HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_InitTypeDef *Init);
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1379 HAL_StatusTypeDef FMC_SDRAM_Timing_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank);
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1380 HAL_StatusTypeDef FMC_SDRAM_DeInit(FMC_SDRAM_TypeDef *Device, uint32_t Bank);
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1381 /**
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1382 * @}
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1383 */
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1384
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1385 /** @defgroup FMC_LL_SDRAM_Private_Functions_Group2 SDRAM Control functions
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1386 * @{
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1387 */
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1388 HAL_StatusTypeDef FMC_SDRAM_WriteProtection_Enable(FMC_SDRAM_TypeDef *Device, uint32_t Bank);
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1389 HAL_StatusTypeDef FMC_SDRAM_WriteProtection_Disable(FMC_SDRAM_TypeDef *Device, uint32_t Bank);
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1390 HAL_StatusTypeDef FMC_SDRAM_SendCommand(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout);
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1391 HAL_StatusTypeDef FMC_SDRAM_ProgramRefreshRate(FMC_SDRAM_TypeDef *Device, uint32_t RefreshRate);
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1392 HAL_StatusTypeDef FMC_SDRAM_SetAutoRefreshNumber(FMC_SDRAM_TypeDef *Device, uint32_t AutoRefreshNumber);
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1393 uint32_t FMC_SDRAM_GetModeStatus(FMC_SDRAM_TypeDef *Device, uint32_t Bank);
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1394 /**
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1395 * @}
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1396 */
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1397 /**
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1398 * @}
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1399 */
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1400
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1401 /**
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1402 * @}
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1403 */
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1404
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1405 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
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1406 /**
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1407 * @}
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1408 */
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1409
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1410 /**
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1411 * @}
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1412 */
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1413 #ifdef __cplusplus
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1414 }
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1415 #endif
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1416
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1417 #endif /* __STM32F4xx_LL_FMC_H */
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1418
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1419 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/