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annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spdifrx.h @ 544:3bb94d361f29

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add current build
author heinrichsweikamp
date Mon, 02 Nov 2020 12:13:02 +0100
parents c78bcbd5deda
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128
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_spdifrx.h
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4 * @author MCD Application Team
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5 * @brief Header file of SPDIFRX HAL module.
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6 ******************************************************************************
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7 * @attention
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8 *
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9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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10 *
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11 * Redistribution and use in source and binary forms, with or without modification,
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12 * are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright notice,
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16 * this list of conditions and the following disclaimer in the documentation
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17 * and/or other materials provided with the distribution.
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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19 * may be used to endorse or promote products derived from this software
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20 * without specific prior written permission.
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21 *
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 *
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33 ******************************************************************************
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34 */
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35
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36 /* Define to prevent recursive inclusion -------------------------------------*/
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37 #ifndef __STM32F4xx_HAL_SPDIFRX_H
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38 #define __STM32F4xx_HAL_SPDIFRX_H
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39
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40 #ifdef __cplusplus
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41 extern "C" {
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42 #endif
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43
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44 #if defined(STM32F446xx)
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45
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46 /* Includes ------------------------------------------------------------------*/
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47 #include "stm32f4xx_hal_def.h"
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48
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49 /** @addtogroup STM32F4xx_HAL_Driver
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50 * @{
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51 */
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52
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53 /** @addtogroup SPDIFRX
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54 * @{
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55 */
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56
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57 /* Exported types ------------------------------------------------------------*/
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58 /** @defgroup SPDIFRX_Exported_Types SPDIFRX Exported Types
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59 * @{
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60 */
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61
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62 /**
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63 * @brief SPDIFRX Init structure definition
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64 */
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65 typedef struct
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66 {
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67 uint32_t InputSelection; /*!< Specifies the SPDIF input selection.
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68 This parameter can be a value of @ref SPDIFRX_Input_Selection */
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69
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70 uint32_t Retries; /*!< Specifies the Maximum allowed re-tries during synchronization phase.
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71 This parameter can be a value of @ref SPDIFRX_Max_Retries */
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72
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73 uint32_t WaitForActivity; /*!< Specifies the wait for activity on SPDIF selected input.
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74 This parameter can be a value of @ref SPDIFRX_Wait_For_Activity. */
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75
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76 uint32_t ChannelSelection; /*!< Specifies whether the control flow will take the channel status from channel A or B.
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77 This parameter can be a value of @ref SPDIFRX_Channel_Selection */
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78
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79 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...).
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80 This parameter can be a value of @ref SPDIFRX_Data_Format */
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81
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82 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode.
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83 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */
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84
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85 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame.
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86 This parameter can be a value of @ref SPDIFRX_PT_Mask */
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87
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88 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame.
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89 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */
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90
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91 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame.
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92 This parameter can be a value of @ref SPDIFRX_V_Mask */
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93
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94 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame.
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95 This parameter can be a value of @ref SPDIFRX_PE_Mask */
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96 }SPDIFRX_InitTypeDef;
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97
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98 /**
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99 * @brief SPDIFRX SetDataFormat structure definition
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100 */
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101 typedef struct
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102 {
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103 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...).
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104 This parameter can be a value of @ref SPDIFRX_Data_Format */
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105
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106 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode.
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107 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */
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108
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109 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame.
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110 This parameter can be a value of @ref SPDIFRX_PT_Mask */
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111
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112 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame.
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113 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */
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114
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115 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame.
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116 This parameter can be a value of @ref SPDIFRX_V_Mask */
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117
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118 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame.
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119 This parameter can be a value of @ref SPDIFRX_PE_Mask */
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120 }SPDIFRX_SetDataFormatTypeDef;
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121
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122 /**
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123 * @brief HAL State structures definition
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124 */
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125 typedef enum
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126 {
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127 HAL_SPDIFRX_STATE_RESET = 0x00U, /*!< SPDIFRX not yet initialized or disabled */
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128 HAL_SPDIFRX_STATE_READY = 0x01U, /*!< SPDIFRX initialized and ready for use */
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129 HAL_SPDIFRX_STATE_BUSY = 0x02U, /*!< SPDIFRX internal process is ongoing */
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130 HAL_SPDIFRX_STATE_BUSY_RX = 0x03U, /*!< SPDIFRX internal Data Flow RX process is ongoing */
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131 HAL_SPDIFRX_STATE_BUSY_CX = 0x04U, /*!< SPDIFRX internal Control Flow RX process is ongoing */
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132 HAL_SPDIFRX_STATE_ERROR = 0x07U /*!< SPDIFRX error state */
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133 }HAL_SPDIFRX_StateTypeDef;
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134
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135 /**
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136 * @brief SPDIFRX handle Structure definition
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137 */
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138 typedef struct
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139 {
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140 SPDIFRX_TypeDef *Instance; /* SPDIFRX registers base address */
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141
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142 SPDIFRX_InitTypeDef Init; /* SPDIFRX communication parameters */
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143
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144 uint32_t *pRxBuffPtr; /* Pointer to SPDIFRX Rx transfer buffer */
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145
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146 uint32_t *pCsBuffPtr; /* Pointer to SPDIFRX Cx transfer buffer */
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147
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148 __IO uint16_t RxXferSize; /* SPDIFRX Rx transfer size */
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149
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150 __IO uint16_t RxXferCount; /* SPDIFRX Rx transfer counter
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151 (This field is initialized at the
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152 same value as transfer size at the
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153 beginning of the transfer and
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154 decremented when a sample is received.
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155 NbSamplesReceived = RxBufferSize-RxBufferCount) */
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156
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157 __IO uint16_t CsXferSize; /* SPDIFRX Rx transfer size */
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158
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159 __IO uint16_t CsXferCount; /* SPDIFRX Rx transfer counter
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160 (This field is initialized at the
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161 same value as transfer size at the
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162 beginning of the transfer and
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163 decremented when a sample is received.
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164 NbSamplesReceived = RxBufferSize-RxBufferCount) */
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165
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166 DMA_HandleTypeDef *hdmaCsRx; /* SPDIFRX EC60958_channel_status and user_information DMA handle parameters */
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167
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168 DMA_HandleTypeDef *hdmaDrRx; /* SPDIFRX Rx DMA handle parameters */
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169
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170 __IO HAL_LockTypeDef Lock; /* SPDIFRX locking object */
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171
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172 __IO HAL_SPDIFRX_StateTypeDef State; /* SPDIFRX communication state */
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173
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174 __IO uint32_t ErrorCode; /* SPDIFRX Error code */
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175 }SPDIFRX_HandleTypeDef;
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176 /**
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177 * @}
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178 */
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179
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180 /* Exported constants --------------------------------------------------------*/
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181 /** @defgroup SPDIFRX_Exported_Constants SPDIFRX Exported Constants
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182 * @{
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183 */
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184 /** @defgroup SPDIFRX_ErrorCode SPDIFRX Error Code
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185 * @{
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186 */
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187 #define HAL_SPDIFRX_ERROR_NONE 0x00000000U /*!< No error */
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188 #define HAL_SPDIFRX_ERROR_TIMEOUT 0x00000001U /*!< Timeout error */
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189 #define HAL_SPDIFRX_ERROR_OVR 0x00000002U /*!< OVR error */
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190 #define HAL_SPDIFRX_ERROR_PE 0x00000004U /*!< Parity error */
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191 #define HAL_SPDIFRX_ERROR_DMA 0x00000008U /*!< DMA transfer error */
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192 #define HAL_SPDIFRX_ERROR_UNKNOWN 0x00000010U /*!< Unknown Error error */
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193 /**
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194 * @}
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195 */
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196
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197 /** @defgroup SPDIFRX_Input_Selection SPDIFRX Input Selection
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198 * @{
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199 */
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200 #define SPDIFRX_INPUT_IN0 0x00000000U
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201 #define SPDIFRX_INPUT_IN1 0x00010000U
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202 #define SPDIFRX_INPUT_IN2 0x00020000U
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203 #define SPDIFRX_INPUT_IN3 0x00030000U
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204 /**
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205 * @}
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206 */
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207
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208 /** @defgroup SPDIFRX_Max_Retries SPDIFRX Maximum Retries
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209 * @{
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210 */
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211 #define SPDIFRX_MAXRETRIES_NONE 0x00000000U
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212 #define SPDIFRX_MAXRETRIES_3 0x00001000U
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213 #define SPDIFRX_MAXRETRIES_15 0x00002000U
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214 #define SPDIFRX_MAXRETRIES_63 0x00003000U
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215 /**
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216 * @}
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217 */
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218
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219 /** @defgroup SPDIFRX_Wait_For_Activity SPDIFRX Wait For Activity
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220 * @{
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221 */
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222 #define SPDIFRX_WAITFORACTIVITY_OFF 0x00000000U
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223 #define SPDIFRX_WAITFORACTIVITY_ON ((uint32_t)SPDIFRX_CR_WFA)
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224 /**
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225 * @}
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226 */
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227
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228 /** @defgroup SPDIFRX_PT_Mask SPDIFRX Preamble Type Mask
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229 * @{
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230 */
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231 #define SPDIFRX_PREAMBLETYPEMASK_OFF 0x00000000U
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232 #define SPDIFRX_PREAMBLETYPEMASK_ON ((uint32_t)SPDIFRX_CR_PTMSK)
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233 /**
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234 * @}
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235 */
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236
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237 /** @defgroup SPDIFRX_ChannelStatus_Mask SPDIFRX Channel Status Mask
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238 * @{
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239 */
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240 #define SPDIFRX_CHANNELSTATUS_OFF 0x00000000U /* The channel status and user bits are copied into the SPDIF_DR */
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241 #define SPDIFRX_CHANNELSTATUS_ON ((uint32_t)SPDIFRX_CR_CUMSK) /* The channel status and user bits are not copied into the SPDIF_DR, zeros are written instead*/
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242 /**
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243 * @}
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244 */
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245
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246 /** @defgroup SPDIFRX_V_Mask SPDIFRX Validity Mask
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247 * @{
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248 */
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249 #define SPDIFRX_VALIDITYMASK_OFF 0x00000000U
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250 #define SPDIFRX_VALIDITYMASK_ON ((uint32_t)SPDIFRX_CR_VMSK)
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251 /**
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252 * @}
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253 */
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254
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255 /** @defgroup SPDIFRX_PE_Mask SPDIFRX Parity Error Mask
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256 * @{
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257 */
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258 #define SPDIFRX_PARITYERRORMASK_OFF 0x00000000U
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259 #define SPDIFRX_PARITYERRORMASK_ON ((uint32_t)SPDIFRX_CR_PMSK)
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260 /**
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261 * @}
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262 */
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263
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264 /** @defgroup SPDIFRX_Channel_Selection SPDIFRX Channel Selection
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265 * @{
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266 */
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267 #define SPDIFRX_CHANNEL_A 0x00000000U
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268 #define SPDIFRX_CHANNEL_B ((uint32_t)SPDIFRX_CR_CHSEL)
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269 /**
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270 * @}
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271 */
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272
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273 /** @defgroup SPDIFRX_Data_Format SPDIFRX Data Format
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274 * @{
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275 */
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276 #define SPDIFRX_DATAFORMAT_LSB 0x00000000U
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277 #define SPDIFRX_DATAFORMAT_MSB 0x00000010U
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278 #define SPDIFRX_DATAFORMAT_32BITS 0x00000020U
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279 /**
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280 * @}
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281 */
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282
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283 /** @defgroup SPDIFRX_Stereo_Mode SPDIFRX Stereo Mode
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284 * @{
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285 */
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286 #define SPDIFRX_STEREOMODE_DISABLE 0x00000000U
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287 #define SPDIFRX_STEREOMODE_ENABLE ((uint32_t)SPDIFRX_CR_RXSTEO)
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288 /**
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289 * @}
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290 */
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291
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292 /** @defgroup SPDIFRX_State SPDIFRX State
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293 * @{
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294 */
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295
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296 #define SPDIFRX_STATE_IDLE 0xFFFFFFFCU
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297 #define SPDIFRX_STATE_SYNC 0x00000001U
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298 #define SPDIFRX_STATE_RCV ((uint32_t)SPDIFRX_CR_SPDIFEN)
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299 /**
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300 * @}
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301 */
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302
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303 /** @defgroup SPDIFRX_Interrupts_Definition SPDIFRX Interrupts Definition
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304 * @{
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305 */
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306 #define SPDIFRX_IT_RXNE ((uint32_t)SPDIFRX_IMR_RXNEIE)
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307 #define SPDIFRX_IT_CSRNE ((uint32_t)SPDIFRX_IMR_CSRNEIE)
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308 #define SPDIFRX_IT_PERRIE ((uint32_t)SPDIFRX_IMR_PERRIE)
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309 #define SPDIFRX_IT_OVRIE ((uint32_t)SPDIFRX_IMR_OVRIE)
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310 #define SPDIFRX_IT_SBLKIE ((uint32_t)SPDIFRX_IMR_SBLKIE)
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311 #define SPDIFRX_IT_SYNCDIE ((uint32_t)SPDIFRX_IMR_SYNCDIE)
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312 #define SPDIFRX_IT_IFEIE ((uint32_t)SPDIFRX_IMR_IFEIE )
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313 /**
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314 * @}
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315 */
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316
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317 /** @defgroup SPDIFRX_Flags_Definition SPDIFRX Flags Definition
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318 * @{
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319 */
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320 #define SPDIFRX_FLAG_RXNE ((uint32_t)SPDIFRX_SR_RXNE)
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321 #define SPDIFRX_FLAG_CSRNE ((uint32_t)SPDIFRX_SR_CSRNE)
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322 #define SPDIFRX_FLAG_PERR ((uint32_t)SPDIFRX_SR_PERR)
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323 #define SPDIFRX_FLAG_OVR ((uint32_t)SPDIFRX_SR_OVR)
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324 #define SPDIFRX_FLAG_SBD ((uint32_t)SPDIFRX_SR_SBD)
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325 #define SPDIFRX_FLAG_SYNCD ((uint32_t)SPDIFRX_SR_SYNCD)
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326 #define SPDIFRX_FLAG_FERR ((uint32_t)SPDIFRX_SR_FERR)
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327 #define SPDIFRX_FLAG_SERR ((uint32_t)SPDIFRX_SR_SERR)
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328 #define SPDIFRX_FLAG_TERR ((uint32_t)SPDIFRX_SR_TERR)
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329 /**
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330 * @}
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331 */
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332
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333 /**
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334 * @}
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335 */
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336
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337 /* Exported macros -----------------------------------------------------------*/
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338 /** @defgroup SPDIFRX_Exported_macros SPDIFRX Exported Macros
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339 * @{
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340 */
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341
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342 /** @brief Reset SPDIFRX handle state
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343 * @param __HANDLE__ SPDIFRX handle.
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344 * @retval None
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345 */
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346 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = (uint16_t)SPDIFRX_CR_SPDIFEN)
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347
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348 /** @brief Disable the specified SPDIFRX peripheral (IDLE State).
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349 * @param __HANDLE__ specifies the SPDIFRX Handle.
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350 * @retval None
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351 */
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352 #define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE)
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353
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354 /** @brief Enable the specified SPDIFRX peripheral (SYNC State).
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355 * @param __HANDLE__ specifies the SPDIFRX Handle.
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356 * @retval None
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357 */
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358 #define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC)
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359
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360
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361 /** @brief Enable the specified SPDIFRX peripheral (RCV State).
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362 * @param __HANDLE__ specifies the SPDIFRX Handle.
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363 * @retval None
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364 */
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365 #define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV)
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366
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367 /** @brief Enable or disable the specified SPDIFRX interrupts.
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368 * @param __HANDLE__ specifies the SPDIFRX Handle.
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369 * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
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370 * This parameter can be one of the following values:
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371 * @arg SPDIFRX_IT_RXNE
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372 * @arg SPDIFRX_IT_CSRNE
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373 * @arg SPDIFRX_IT_PERRIE
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374 * @arg SPDIFRX_IT_OVRIE
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375 * @arg SPDIFRX_IT_SBLKIE
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376 * @arg SPDIFRX_IT_SYNCDIE
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377 * @arg SPDIFRX_IT_IFEIE
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378 * @retval None
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379 */
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380 #define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
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381 #define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (uint16_t)(~(__INTERRUPT__)))
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382
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383 /** @brief Checks if the specified SPDIFRX interrupt source is enabled or disabled.
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384 * @param __HANDLE__ specifies the SPDIFRX Handle.
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385 * @param __INTERRUPT__ specifies the SPDIFRX interrupt source to check.
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386 * This parameter can be one of the following values:
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387 * @arg SPDIFRX_IT_RXNE
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388 * @arg SPDIFRX_IT_CSRNE
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389 * @arg SPDIFRX_IT_PERRIE
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390 * @arg SPDIFRX_IT_OVRIE
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391 * @arg SPDIFRX_IT_SBLKIE
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392 * @arg SPDIFRX_IT_SYNCDIE
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393 * @arg SPDIFRX_IT_IFEIE
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394 * @retval The new state of __IT__ (TRUE or FALSE).
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395 */
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396 #define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
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397
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398 /** @brief Checks whether the specified SPDIFRX flag is set or not.
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399 * @param __HANDLE__ specifies the SPDIFRX Handle.
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400 * @param __FLAG__ specifies the flag to check.
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401 * This parameter can be one of the following values:
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402 * @arg SPDIFRX_FLAG_RXNE
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403 * @arg SPDIFRX_FLAG_CSRNE
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404 * @arg SPDIFRX_FLAG_PERR
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405 * @arg SPDIFRX_FLAG_OVR
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406 * @arg SPDIFRX_FLAG_SBD
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407 * @arg SPDIFRX_FLAG_SYNCD
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408 * @arg SPDIFRX_FLAG_FERR
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409 * @arg SPDIFRX_FLAG_SERR
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410 * @arg SPDIFRX_FLAG_TERR
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411 * @retval The new state of __FLAG__ (TRUE or FALSE).
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412 */
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413 #define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
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414
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415 /** @brief Clears the specified SPDIFRX SR flag, in setting the proper IFCR register bit.
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416 * @param __HANDLE__ specifies the USART Handle.
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417 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
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418 * to clear the corresponding interrupt
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419 * This parameter can be one of the following values:
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420 * @arg SPDIFRX_FLAG_PERR
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421 * @arg SPDIFRX_FLAG_OVR
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422 * @arg SPDIFRX_SR_SBD
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423 * @arg SPDIFRX_SR_SYNCD
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424 * @retval None
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425 */
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426 #define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__))
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427
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428 /**
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429 * @}
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430 */
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431
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432 /* Exported functions --------------------------------------------------------*/
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433 /** @addtogroup SPDIFRX_Exported_Functions
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434 * @{
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435 */
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436
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437 /** @addtogroup SPDIFRX_Exported_Functions_Group1
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438 * @{
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439 */
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440 /* Initialization/de-initialization functions **********************************/
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441 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif);
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442 HAL_StatusTypeDef HAL_SPDIFRX_DeInit (SPDIFRX_HandleTypeDef *hspdif);
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443 void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif);
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444 void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif);
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445 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat);
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446 /**
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447 * @}
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448 */
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449
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450 /** @addtogroup SPDIFRX_Exported_Functions_Group2
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451 * @{
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452 */
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453 /* I/O operation functions ***************************************************/
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454 /* Blocking mode: Polling */
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455 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout);
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456 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout);
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457
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458 /* Non-Blocking mode: Interrupt */
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459 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
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460 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
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461 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif);
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462
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463 /* Non-Blocking mode: DMA */
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464 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
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465 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
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466
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467 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif);
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468
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469 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
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470 void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
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471 void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
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472 void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif);
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473 void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
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474 void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
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475 /**
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476 * @}
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477 */
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478
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479 /** @addtogroup SPDIFRX_Exported_Functions_Group3
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480 * @{
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481 */
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482 /* Peripheral Control and State functions ************************************/
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483 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif);
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484 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif);
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485 /**
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486 * @}
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487 */
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488
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489 /**
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490 * @}
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491 */
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492 /* Private types -------------------------------------------------------------*/
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493 /* Private variables ---------------------------------------------------------*/
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494 /* Private constants ---------------------------------------------------------*/
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495 /* Private macros ------------------------------------------------------------*/
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496 /** @defgroup SPDIFRX_Private_Macros SPDIFRX Private Macros
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497 * @{
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498 */
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499 #define IS_SPDIFRX_INPUT_SELECT(INPUT) (((INPUT) == SPDIFRX_INPUT_IN1) || \
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500 ((INPUT) == SPDIFRX_INPUT_IN2) || \
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501 ((INPUT) == SPDIFRX_INPUT_IN3) || \
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502 ((INPUT) == SPDIFRX_INPUT_IN0))
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503 #define IS_SPDIFRX_MAX_RETRIES(RET) (((RET) == SPDIFRX_MAXRETRIES_NONE) || \
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504 ((RET) == SPDIFRX_MAXRETRIES_3) || \
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505 ((RET) == SPDIFRX_MAXRETRIES_15) || \
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506 ((RET) == SPDIFRX_MAXRETRIES_63))
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507 #define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL) (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \
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508 ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF))
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509 #define IS_PREAMBLE_TYPE_MASK(VAL) (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \
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510 ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF))
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511 #define IS_VALIDITY_MASK(VAL) (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \
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512 ((VAL) == SPDIFRX_VALIDITYMASK_ON))
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513 #define IS_PARITY_ERROR_MASK(VAL) (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \
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514 ((VAL) == SPDIFRX_PARITYERRORMASK_ON))
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515 #define IS_SPDIFRX_CHANNEL(CHANNEL) (((CHANNEL) == SPDIFRX_CHANNEL_A) || \
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516 ((CHANNEL) == SPDIFRX_CHANNEL_B))
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517 #define IS_SPDIFRX_DATA_FORMAT(FORMAT) (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \
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518 ((FORMAT) == SPDIFRX_DATAFORMAT_MSB) || \
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519 ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS))
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520 #define IS_STEREO_MODE(MODE) (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \
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521 ((MODE) == SPDIFRX_STEREOMODE_ENABLE))
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522
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523 #define IS_CHANNEL_STATUS_MASK(VAL) (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \
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524 ((VAL) == SPDIFRX_CHANNELSTATUS_OFF))
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525 /**
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526 * @}
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527 */
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528
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529 /* Private functions ---------------------------------------------------------*/
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530 /** @defgroup SPDIFRX_Private_Functions SPDIFRX Private Functions
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531 * @{
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532 */
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533 /**
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534 * @}
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535 */
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536
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537 /**
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538 * @}
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539 */
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540
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541 /**
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542 * @}
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543 */
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544 #endif /* STM32F446xx */
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545
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546 #ifdef __cplusplus
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547 }
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548 #endif
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549
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550
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551 #endif /* __STM32F4xx_HAL_SPDIFRX_H */
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552
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553 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/