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38
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_adc_ex.c
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4 * @author MCD Application Team
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5 * @version V1.2.0
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6 * @date 26-December-2014
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7 * @brief This file provides firmware functions to manage the following
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8 * functionalities of the ADC extension peripheral:
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9 * + Extended features functions
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10 *
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11 @verbatim
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12 ==============================================================================
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13 ##### How to use this driver #####
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14 ==============================================================================
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15 [..]
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16 (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit():
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17 (##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE()
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18 (##) ADC pins configuration
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19 (+++) Enable the clock for the ADC GPIOs using the following function:
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20 __HAL_RCC_GPIOx_CLK_ENABLE()
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21 (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init()
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22 (##) In case of using interrupts (e.g. HAL_ADC_Start_IT())
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23 (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority()
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24 (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ()
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25 (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler()
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26 (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA())
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27 (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE()
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28 (+++) Configure and enable two DMA streams stream for managing data
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29 transfer from peripheral to memory (output stream)
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30 (+++) Associate the initialized DMA handle to the ADC DMA handle
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31 using __HAL_LINKDMA()
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32 (+++) Configure the priority and enable the NVIC for the transfer complete
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33 interrupt on the two DMA Streams. The output stream should have higher
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34 priority than the input stream.
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35 (#) Configure the ADC Prescaler, conversion resolution and data alignment
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36 using the HAL_ADC_Init() function.
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37
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38 (#) Configure the ADC Injected channels group features, use HAL_ADC_Init()
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39 and HAL_ADC_ConfigChannel() functions.
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40
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41 (#) Three operation modes are available within this driver :
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42
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43 *** Polling mode IO operation ***
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44 =================================
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45 [..]
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46 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart()
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47 (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage
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48 user can specify the value of timeout according to his end application
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49 (+) To read the ADC converted values, use the HAL_ADCEx_InjectedGetValue() function.
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50 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop()
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51
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52 *** Interrupt mode IO operation ***
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53 ===================================
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54 [..]
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55 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_IT()
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56 (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine
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57 (+) At ADC end of conversion HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can
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58 add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback
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59 (+) In case of ADC Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can
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60 add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback
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61 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_IT()
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62
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63
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64 *** DMA mode IO operation ***
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65 ==============================
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66 [..]
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67 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_DMA(), at this stage the user specify the length
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68 of data to be transferred at each end of conversion
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69 (+) At The end of data transfer ba HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can
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70 add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback
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71 (+) In case of transfer Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can
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72 add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback
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73 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_DMA()
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74
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75 *** Multi mode ADCs Regular channels configuration ***
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76 ======================================================
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77 [..]
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78 (+) Select the Multi mode ADC regular channels features (dual or triple mode)
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79 and configure the DMA mode using HAL_ADCEx_MultiModeConfigChannel() functions.
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80 (+) Start the ADC peripheral using HAL_ADCEx_MultiModeStart_DMA(), at this stage the user specify the length
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81 of data to be transferred at each end of conversion
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82 (+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue() function.
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83
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84
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85 @endverbatim
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86 ******************************************************************************
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87 * @attention
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88 *
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89 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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90 *
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91 * Redistribution and use in source and binary forms, with or without modification,
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92 * are permitted provided that the following conditions are met:
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93 * 1. Redistributions of source code must retain the above copyright notice,
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94 * this list of conditions and the following disclaimer.
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95 * 2. Redistributions in binary form must reproduce the above copyright notice,
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96 * this list of conditions and the following disclaimer in the documentation
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97 * and/or other materials provided with the distribution.
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98 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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99 * may be used to endorse or promote products derived from this software
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100 * without specific prior written permission.
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101 *
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102 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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103 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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104 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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105 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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106 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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107 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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108 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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109 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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110 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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111 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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112 *
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113 ******************************************************************************
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114 */
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115
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116 /* Includes ------------------------------------------------------------------*/
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117 #include "stm32f4xx_hal.h"
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118
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119 /** @addtogroup STM32F4xx_HAL_Driver
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120 * @{
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121 */
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122
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123 /** @defgroup ADCEx ADCEx
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124 * @brief ADC Extended driver modules
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125 * @{
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126 */
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127
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128 #ifdef HAL_ADC_MODULE_ENABLED
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129
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130 /* Private typedef -----------------------------------------------------------*/
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131 /* Private define ------------------------------------------------------------*/
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132 /* Private macro -------------------------------------------------------------*/
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133 /* Private variables ---------------------------------------------------------*/
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134 /** @addtogroup ADCEx_Private_Functions
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135 * @{
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136 */
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137 /* Private function prototypes -----------------------------------------------*/
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138 static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma);
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139 static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma);
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140 static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma);
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141 /**
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142 * @}
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143 */
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144
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145 /* Exported functions --------------------------------------------------------*/
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146 /** @defgroup ADCEx_Exported_Functions ADC Exported Functions
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147 * @{
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148 */
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149
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150 /** @defgroup ADCEx_Exported_Functions_Group1 Extended features functions
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151 * @brief Extended features functions
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152 *
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153 @verbatim
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154 ===============================================================================
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155 ##### Extended features functions #####
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156 ===============================================================================
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157 [..] This section provides functions allowing to:
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158 (+) Start conversion of injected channel.
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159 (+) Stop conversion of injected channel.
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160 (+) Start multimode and enable DMA transfer.
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161 (+) Stop multimode and disable DMA transfer.
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162 (+) Get result of injected channel conversion.
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163 (+) Get result of multimode conversion.
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164 (+) Configure injected channels.
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165 (+) Configure multimode.
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166
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167 @endverbatim
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168 * @{
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169 */
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170
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171 /**
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172 * @brief Enables the selected ADC software start conversion of the injected channels.
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173 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
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174 * the configuration information for the specified ADC.
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175 * @retval HAL status
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176 */
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177 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
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178 {
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179 uint32_t i = 0, tmp1 = 0, tmp2 = 0;
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180
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181 /* Process locked */
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182 __HAL_LOCK(hadc);
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183
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184 /* Check if a regular conversion is ongoing */
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185 if(hadc->State == HAL_ADC_STATE_BUSY_REG)
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186 {
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187 /* Change ADC state */
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188 hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
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189 }
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190 else
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191 {
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192 /* Change ADC state */
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193 hadc->State = HAL_ADC_STATE_BUSY_INJ;
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194 }
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195
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196 /* Check if ADC peripheral is disabled in order to enable it and wait during
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197 Tstab time the ADC's stabilization */
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198 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
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199 {
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200 /* Enable the Peripheral */
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201 __HAL_ADC_ENABLE(hadc);
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202
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203 /* Delay inserted to wait during Tstab time the ADC's stabilization */
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204 for(; i <= 540; i++)
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205 {
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206 __NOP();
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207 }
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208 }
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209
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210 /* Check if Multimode enabled */
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211 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
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212 {
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213 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
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214 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
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215 if(tmp1 && tmp2)
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216 {
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217 /* Enable the selected ADC software conversion for injected group */
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218 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
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219 }
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220 }
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221 else
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222 {
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223 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
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224 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
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225 if((hadc->Instance == ADC1) && tmp1 && tmp2)
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226 {
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227 /* Enable the selected ADC software conversion for injected group */
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228 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
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229 }
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230 }
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231
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232 /* Process unlocked */
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233 __HAL_UNLOCK(hadc);
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234
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235 /* Return function status */
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236 return HAL_OK;
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237 }
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238
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239 /**
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240 * @brief Enables the interrupt and starts ADC conversion of injected channels.
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241 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
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242 * the configuration information for the specified ADC.
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243 *
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244 * @retval HAL status.
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245 */
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246 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
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247 {
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248 uint32_t i = 0, tmp1 = 0, tmp2 =0;
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249
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250 /* Process locked */
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251 __HAL_LOCK(hadc);
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252
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253 /* Check if a regular conversion is ongoing */
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254 if(hadc->State == HAL_ADC_STATE_BUSY_REG)
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255 {
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256 /* Change ADC state */
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257 hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
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258 }
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259 else
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260 {
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261 /* Change ADC state */
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262 hadc->State = HAL_ADC_STATE_BUSY_INJ;
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263 }
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264
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265 /* Set ADC error code to none */
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266 hadc->ErrorCode = HAL_ADC_ERROR_NONE;
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267
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268 /* Check if ADC peripheral is disabled in order to enable it and wait during
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269 Tstab time the ADC's stabilization */
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270 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
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271 {
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272 /* Enable the Peripheral */
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273 __HAL_ADC_ENABLE(hadc);
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274
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275 /* Delay inserted to wait during Tstab time the ADC's stabilization */
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276 for(; i <= 540; i++)
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277 {
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278 __NOP();
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279 }
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280 }
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281
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282 /* Enable the ADC end of conversion interrupt for injected group */
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283 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
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284
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285 /* Enable the ADC overrun interrupt */
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286 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
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287
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288 /* Check if Multimode enabled */
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289 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
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290 {
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291 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
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292 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
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293 if(tmp1 && tmp2)
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294 {
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295 /* Enable the selected ADC software conversion for injected group */
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296 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
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297 }
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298 }
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299 else
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300 {
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301 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
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302 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
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303 if((hadc->Instance == ADC1) && tmp1 && tmp2)
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304 {
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305 /* Enable the selected ADC software conversion for injected group */
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306 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
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307 }
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308 }
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309
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310 /* Process unlocked */
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311 __HAL_UNLOCK(hadc);
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312
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313 /* Return function status */
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314 return HAL_OK;
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315 }
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316
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317 /**
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318 * @brief Disables ADC and stop conversion of injected channels.
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319 *
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320 * @note Caution: This function will stop also regular channels.
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321 *
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322 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
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323 * the configuration information for the specified ADC.
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324 * @retval HAL status.
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325 */
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326 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
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327 {
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328 /* Disable the Peripheral */
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329 __HAL_ADC_DISABLE(hadc);
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330
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331 /* Change ADC state */
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332 hadc->State = HAL_ADC_STATE_READY;
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333
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334 /* Return function status */
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335 return HAL_OK;
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336 }
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337
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338 /**
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339 * @brief Poll for injected conversion complete
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340 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
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341 * the configuration information for the specified ADC.
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342 * @param Timeout: Timeout value in millisecond.
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343 * @retval HAL status
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344 */
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345 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
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346 {
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347 uint32_t tickstart = 0;
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348
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349 /* Get tick */
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350 tickstart = HAL_GetTick();
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351
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352 /* Check End of conversion flag */
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353 while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC)))
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354 {
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355 /* Check for the Timeout */
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356 if(Timeout != HAL_MAX_DELAY)
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357 {
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358 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
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359 {
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360 hadc->State= HAL_ADC_STATE_TIMEOUT;
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361 /* Process unlocked */
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362 __HAL_UNLOCK(hadc);
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363 return HAL_TIMEOUT;
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364 }
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365 }
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366 }
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367
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368 /* Check if a regular conversion is ready */
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369 if(hadc->State == HAL_ADC_STATE_EOC_REG)
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370 {
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371 /* Change ADC state */
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372 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
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373 }
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374 else
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375 {
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376 /* Change ADC state */
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377 hadc->State = HAL_ADC_STATE_EOC_INJ;
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378 }
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379
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380 /* Return ADC state */
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381 return HAL_OK;
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382 }
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383
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384 /**
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385 * @brief Disables the interrupt and stop ADC conversion of injected channels.
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386 *
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387 * @note Caution: This function will stop also regular channels.
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388 *
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389 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
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390 * the configuration information for the specified ADC.
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391 * @retval HAL status.
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392 */
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393 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
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394 {
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395 /* Disable the ADC end of conversion interrupt for regular group */
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396 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
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397
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398 /* Disable the ADC end of conversion interrupt for injected group */
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399 __HAL_ADC_DISABLE_IT(hadc, ADC_CR1_JEOCIE);
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400
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401 /* Enable the Peripheral */
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402 __HAL_ADC_DISABLE(hadc);
|
|
|
403
|
|
|
404 /* Change ADC state */
|
|
|
405 hadc->State = HAL_ADC_STATE_READY;
|
|
|
406
|
|
|
407 /* Return function status */
|
|
|
408 return HAL_OK;
|
|
|
409 }
|
|
|
410
|
|
|
411 /**
|
|
|
412 * @brief Gets the converted value from data register of injected channel.
|
|
|
413 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
|
|
|
414 * the configuration information for the specified ADC.
|
|
|
415 * @param InjectedRank: the ADC injected rank.
|
|
|
416 * This parameter can be one of the following values:
|
|
|
417 * @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
|
|
|
418 * @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
|
|
|
419 * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
|
|
|
420 * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
|
|
|
421 * @retval None
|
|
|
422 */
|
|
|
423 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
|
|
|
424 {
|
|
|
425 __IO uint32_t tmp = 0;
|
|
|
426
|
|
|
427 /* Check the parameters */
|
|
|
428 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
|
|
|
429
|
|
|
430 /* Clear the ADCx's flag for injected end of conversion */
|
|
|
431 __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_JEOC);
|
|
|
432
|
|
|
433 /* Return the selected ADC converted value */
|
|
|
434 switch(InjectedRank)
|
|
|
435 {
|
|
|
436 case ADC_INJECTED_RANK_4:
|
|
|
437 {
|
|
|
438 tmp = hadc->Instance->JDR4;
|
|
|
439 }
|
|
|
440 break;
|
|
|
441 case ADC_INJECTED_RANK_3:
|
|
|
442 {
|
|
|
443 tmp = hadc->Instance->JDR3;
|
|
|
444 }
|
|
|
445 break;
|
|
|
446 case ADC_INJECTED_RANK_2:
|
|
|
447 {
|
|
|
448 tmp = hadc->Instance->JDR2;
|
|
|
449 }
|
|
|
450 break;
|
|
|
451 case ADC_INJECTED_RANK_1:
|
|
|
452 {
|
|
|
453 tmp = hadc->Instance->JDR1;
|
|
|
454 }
|
|
|
455 break;
|
|
|
456 default:
|
|
|
457 break;
|
|
|
458 }
|
|
|
459 return tmp;
|
|
|
460 }
|
|
|
461
|
|
|
462 /**
|
|
|
463 * @brief Enables ADC DMA request after last transfer (Multi-ADC mode) and enables ADC peripheral
|
|
|
464 *
|
|
|
465 * @note Caution: This function must be used only with the ADC master.
|
|
|
466 *
|
|
|
467 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
|
|
|
468 * the configuration information for the specified ADC.
|
|
|
469 * @param pData: Pointer to buffer in which transferred from ADC peripheral to memory will be stored.
|
|
|
470 * @param Length: The length of data to be transferred from ADC peripheral to memory.
|
|
|
471 * @retval HAL status
|
|
|
472 */
|
|
|
473 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
|
|
|
474 {
|
|
|
475 uint16_t counter = 0;
|
|
|
476
|
|
|
477 /* Check the parameters */
|
|
|
478 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
|
|
|
479 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
|
|
|
480 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
|
|
|
481
|
|
|
482 /* Process locked */
|
|
|
483 __HAL_LOCK(hadc);
|
|
|
484
|
|
|
485 /* Enable ADC overrun interrupt */
|
|
|
486 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
|
|
|
487
|
|
|
488 if (hadc->Init.DMAContinuousRequests != DISABLE)
|
|
|
489 {
|
|
|
490 /* Enable the selected ADC DMA request after last transfer */
|
|
|
491 ADC->CCR |= ADC_CCR_DDS;
|
|
|
492 }
|
|
|
493 else
|
|
|
494 {
|
|
|
495 /* Disable the selected ADC EOC rising on each regular channel conversion */
|
|
|
496 ADC->CCR &= ~ADC_CCR_DDS;
|
|
|
497 }
|
|
|
498
|
|
|
499 /* Set the DMA transfer complete callback */
|
|
|
500 hadc->DMA_Handle->XferCpltCallback = ADC_MultiModeDMAConvCplt;
|
|
|
501
|
|
|
502 /* Set the DMA half transfer complete callback */
|
|
|
503 hadc->DMA_Handle->XferHalfCpltCallback = ADC_MultiModeDMAHalfConvCplt;
|
|
|
504
|
|
|
505 /* Set the DMA error callback */
|
|
|
506 hadc->DMA_Handle->XferErrorCallback = ADC_MultiModeDMAError ;
|
|
|
507
|
|
|
508 /* Enable the DMA Stream */
|
|
|
509 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&ADC->CDR, (uint32_t)pData, Length);
|
|
|
510
|
|
|
511 /* Change ADC state */
|
|
|
512 hadc->State = HAL_ADC_STATE_BUSY_REG;
|
|
|
513
|
|
|
514 /* Check if ADC peripheral is disabled in order to enable it and wait during
|
|
|
515 Tstab time the ADC's stabilization */
|
|
|
516 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
|
|
|
517 {
|
|
|
518 /* Enable the Peripheral */
|
|
|
519 __HAL_ADC_ENABLE(hadc);
|
|
|
520
|
|
|
521 /* Delay inserted to wait during Tstab time the ADC's stabilization */
|
|
|
522 for(; counter <= 540; counter++)
|
|
|
523 {
|
|
|
524 __NOP();
|
|
|
525 }
|
|
|
526 }
|
|
|
527
|
|
|
528 /* if no external trigger present enable software conversion of regular channels */
|
|
|
529 if (hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE)
|
|
|
530 {
|
|
|
531 /* Enable the selected ADC software conversion for regular group */
|
|
|
532 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
|
|
|
533 }
|
|
|
534
|
|
|
535 /* Process unlocked */
|
|
|
536 __HAL_UNLOCK(hadc);
|
|
|
537
|
|
|
538 /* Return function status */
|
|
|
539 return HAL_OK;
|
|
|
540 }
|
|
|
541
|
|
|
542 /**
|
|
|
543 * @brief Disables ADC DMA (multi-ADC mode) and disables ADC peripheral
|
|
|
544 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
|
|
|
545 * the configuration information for the specified ADC.
|
|
|
546 * @retval HAL status
|
|
|
547 */
|
|
|
548 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
|
|
|
549 {
|
|
|
550 /* Process locked */
|
|
|
551 __HAL_LOCK(hadc);
|
|
|
552
|
|
|
553 /* Enable the Peripheral */
|
|
|
554 __HAL_ADC_DISABLE(hadc);
|
|
|
555
|
|
|
556 /* Disable ADC overrun interrupt */
|
|
|
557 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
|
|
|
558
|
|
|
559 /* Disable the selected ADC DMA request after last transfer */
|
|
|
560 ADC->CCR &= ~ADC_CCR_DDS;
|
|
|
561
|
|
|
562 /* Disable the ADC DMA Stream */
|
|
|
563 HAL_DMA_Abort(hadc->DMA_Handle);
|
|
|
564
|
|
|
565 /* Change ADC state */
|
|
|
566 hadc->State = HAL_ADC_STATE_READY;
|
|
|
567
|
|
|
568 /* Process unlocked */
|
|
|
569 __HAL_UNLOCK(hadc);
|
|
|
570
|
|
|
571 /* Return function status */
|
|
|
572 return HAL_OK;
|
|
|
573 }
|
|
|
574
|
|
|
575 /**
|
|
|
576 * @brief Returns the last ADC1, ADC2 and ADC3 regular conversions results
|
|
|
577 * data in the selected multi mode.
|
|
|
578 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
|
|
|
579 * the configuration information for the specified ADC.
|
|
|
580 * @retval The converted data value.
|
|
|
581 */
|
|
|
582 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
|
|
|
583 {
|
|
|
584 /* Return the multi mode conversion value */
|
|
|
585 return ADC->CDR;
|
|
|
586 }
|
|
|
587
|
|
|
588 /**
|
|
|
589 * @brief Injected conversion complete callback in non blocking mode
|
|
|
590 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
|
|
|
591 * the configuration information for the specified ADC.
|
|
|
592 * @retval None
|
|
|
593 */
|
|
|
594 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
|
|
|
595 {
|
|
|
596 /* NOTE : This function Should not be modified, when the callback is needed,
|
|
|
597 the HAL_ADC_InjectedConvCpltCallback could be implemented in the user file
|
|
|
598 */
|
|
|
599 }
|
|
|
600
|
|
|
601 /**
|
|
|
602 * @brief Configures for the selected ADC injected channel its corresponding
|
|
|
603 * rank in the sequencer and its sample time.
|
|
|
604 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
|
|
|
605 * the configuration information for the specified ADC.
|
|
|
606 * @param sConfigInjected: ADC configuration structure for injected channel.
|
|
|
607 * @retval None
|
|
|
608 */
|
|
|
609 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
|
|
|
610 {
|
|
|
611
|
|
|
612 #ifdef USE_FULL_ASSERT
|
|
|
613 uint32_t tmp = 0;
|
|
|
614 #endif /* USE_FULL_ASSERT */
|
|
|
615
|
|
|
616 /* Check the parameters */
|
|
|
617 assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
|
|
|
618 assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
|
|
|
619 assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
|
|
|
620 assert_param(IS_ADC_EXT_INJEC_TRIG(sConfigInjected->ExternalTrigInjecConv));
|
|
|
621 assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
|
|
|
622 assert_param(IS_ADC_INJECTED_LENGTH(sConfigInjected->InjectedNbrOfConversion));
|
|
|
623 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
|
|
|
624 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
|
|
|
625
|
|
|
626 #ifdef USE_FULL_ASSERT
|
|
|
627 tmp = ADC_GET_RESOLUTION(hadc);
|
|
|
628 assert_param(IS_ADC_RANGE(tmp, sConfigInjected->InjectedOffset));
|
|
|
629 #endif /* USE_FULL_ASSERT */
|
|
|
630
|
|
|
631 /* Process locked */
|
|
|
632 __HAL_LOCK(hadc);
|
|
|
633
|
|
|
634 /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
|
|
|
635 if (sConfigInjected->InjectedChannel > ADC_CHANNEL_9)
|
|
|
636 {
|
|
|
637 /* Clear the old sample time */
|
|
|
638 hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel);
|
|
|
639
|
|
|
640 /* Set the new sample time */
|
|
|
641 hadc->Instance->SMPR1 |= ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
|
|
|
642 }
|
|
|
643 else /* ADC_Channel include in ADC_Channel_[0..9] */
|
|
|
644 {
|
|
|
645 /* Clear the old sample time */
|
|
|
646 hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel);
|
|
|
647
|
|
|
648 /* Set the new sample time */
|
|
|
649 hadc->Instance->SMPR2 |= ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
|
|
|
650 }
|
|
|
651
|
|
|
652 /*---------------------------- ADCx JSQR Configuration -----------------*/
|
|
|
653 hadc->Instance->JSQR &= ~(ADC_JSQR_JL);
|
|
|
654 hadc->Instance->JSQR |= ADC_SQR1(sConfigInjected->InjectedNbrOfConversion);
|
|
|
655
|
|
|
656 /* Rank configuration */
|
|
|
657
|
|
|
658 /* Clear the old SQx bits for the selected rank */
|
|
|
659 hadc->Instance->JSQR &= ~ADC_JSQR(ADC_JSQR_JSQ1, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion);
|
|
|
660
|
|
|
661 /* Set the SQx bits for the selected rank */
|
|
|
662 hadc->Instance->JSQR |= ADC_JSQR(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion);
|
|
|
663
|
|
|
664 /* Select external trigger to start conversion */
|
|
|
665 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
|
|
|
666 hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConv;
|
|
|
667
|
|
|
668 /* Select external trigger polarity */
|
|
|
669 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);
|
|
|
670 hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConvEdge;
|
|
|
671
|
|
|
672 if (sConfigInjected->AutoInjectedConv != DISABLE)
|
|
|
673 {
|
|
|
674 /* Enable the selected ADC automatic injected group conversion */
|
|
|
675 hadc->Instance->CR1 |= ADC_CR1_JAUTO;
|
|
|
676 }
|
|
|
677 else
|
|
|
678 {
|
|
|
679 /* Disable the selected ADC automatic injected group conversion */
|
|
|
680 hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO);
|
|
|
681 }
|
|
|
682
|
|
|
683 if (sConfigInjected->InjectedDiscontinuousConvMode != DISABLE)
|
|
|
684 {
|
|
|
685 /* Enable the selected ADC injected discontinuous mode */
|
|
|
686 hadc->Instance->CR1 |= ADC_CR1_JDISCEN;
|
|
|
687 }
|
|
|
688 else
|
|
|
689 {
|
|
|
690 /* Disable the selected ADC injected discontinuous mode */
|
|
|
691 hadc->Instance->CR1 &= ~(ADC_CR1_JDISCEN);
|
|
|
692 }
|
|
|
693
|
|
|
694 switch(sConfigInjected->InjectedRank)
|
|
|
695 {
|
|
|
696 case 1:
|
|
|
697 /* Set injected channel 1 offset */
|
|
|
698 hadc->Instance->JOFR1 &= ~(ADC_JOFR1_JOFFSET1);
|
|
|
699 hadc->Instance->JOFR1 |= sConfigInjected->InjectedOffset;
|
|
|
700 break;
|
|
|
701 case 2:
|
|
|
702 /* Set injected channel 2 offset */
|
|
|
703 hadc->Instance->JOFR2 &= ~(ADC_JOFR2_JOFFSET2);
|
|
|
704 hadc->Instance->JOFR2 |= sConfigInjected->InjectedOffset;
|
|
|
705 break;
|
|
|
706 case 3:
|
|
|
707 /* Set injected channel 3 offset */
|
|
|
708 hadc->Instance->JOFR3 &= ~(ADC_JOFR3_JOFFSET3);
|
|
|
709 hadc->Instance->JOFR3 |= sConfigInjected->InjectedOffset;
|
|
|
710 break;
|
|
|
711 default:
|
|
|
712 /* Set injected channel 4 offset */
|
|
|
713 hadc->Instance->JOFR4 &= ~(ADC_JOFR4_JOFFSET4);
|
|
|
714 hadc->Instance->JOFR4 |= sConfigInjected->InjectedOffset;
|
|
|
715 break;
|
|
|
716 }
|
|
|
717
|
|
|
718 /* if ADC1 Channel_18 is selected enable VBAT Channel */
|
|
|
719 if ((hadc->Instance == ADC1) && (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT))
|
|
|
720 {
|
|
|
721 /* Enable the VBAT channel*/
|
|
|
722 ADC->CCR |= ADC_CCR_VBATE;
|
|
|
723 }
|
|
|
724
|
|
|
725 /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */
|
|
|
726 if ((hadc->Instance == ADC1) && ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) || (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)))
|
|
|
727 {
|
|
|
728 /* Enable the TSVREFE channel*/
|
|
|
729 ADC->CCR |= ADC_CCR_TSVREFE;
|
|
|
730 }
|
|
|
731
|
|
|
732 /* Process unlocked */
|
|
|
733 __HAL_UNLOCK(hadc);
|
|
|
734
|
|
|
735 /* Return function status */
|
|
|
736 return HAL_OK;
|
|
|
737 }
|
|
|
738
|
|
|
739 /**
|
|
|
740 * @brief Configures the ADC multi-mode
|
|
|
741 * @param hadc : pointer to a ADC_HandleTypeDef structure that contains
|
|
|
742 * the configuration information for the specified ADC.
|
|
|
743 * @param multimode : pointer to an ADC_MultiModeTypeDef structure that contains
|
|
|
744 * the configuration information for multimode.
|
|
|
745 * @retval HAL status
|
|
|
746 */
|
|
|
747 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
|
|
|
748 {
|
|
|
749 /* Check the parameters */
|
|
|
750 assert_param(IS_ADC_MODE(multimode->Mode));
|
|
|
751 assert_param(IS_ADC_DMA_ACCESS_MODE(multimode->DMAAccessMode));
|
|
|
752 assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
|
|
|
753
|
|
|
754 /* Process locked */
|
|
|
755 __HAL_LOCK(hadc);
|
|
|
756
|
|
|
757 /* Set ADC mode */
|
|
|
758 ADC->CCR &= ~(ADC_CCR_MULTI);
|
|
|
759 ADC->CCR |= multimode->Mode;
|
|
|
760
|
|
|
761 /* Set the ADC DMA access mode */
|
|
|
762 ADC->CCR &= ~(ADC_CCR_DMA);
|
|
|
763 ADC->CCR |= multimode->DMAAccessMode;
|
|
|
764
|
|
|
765 /* Set delay between two sampling phases */
|
|
|
766 ADC->CCR &= ~(ADC_CCR_DELAY);
|
|
|
767 ADC->CCR |= multimode->TwoSamplingDelay;
|
|
|
768
|
|
|
769 /* Process unlocked */
|
|
|
770 __HAL_UNLOCK(hadc);
|
|
|
771
|
|
|
772 /* Return function status */
|
|
|
773 return HAL_OK;
|
|
|
774 }
|
|
|
775
|
|
|
776 /**
|
|
|
777 * @}
|
|
|
778 */
|
|
|
779
|
|
|
780 /**
|
|
|
781 * @brief DMA transfer complete callback.
|
|
|
782 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
|
|
783 * the configuration information for the specified DMA module.
|
|
|
784 * @retval None
|
|
|
785 */
|
|
|
786 static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma)
|
|
|
787 {
|
|
|
788 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
|
|
789
|
|
|
790 /* Check if an injected conversion is ready */
|
|
|
791 if(hadc->State == HAL_ADC_STATE_EOC_INJ)
|
|
|
792 {
|
|
|
793 /* Change ADC state */
|
|
|
794 hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
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795 }
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796 else
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797 {
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798 /* Change ADC state */
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799 hadc->State = HAL_ADC_STATE_EOC_REG;
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800 }
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801
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802 HAL_ADC_ConvCpltCallback(hadc);
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803 }
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804
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805 /**
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806 * @brief DMA half transfer complete callback.
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807 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
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808 * the configuration information for the specified DMA module.
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809 * @retval None
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810 */
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811 static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma)
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812 {
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813 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
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814 /* Conversion complete callback */
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815 HAL_ADC_ConvHalfCpltCallback(hadc);
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816 }
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817
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818 /**
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819 * @brief DMA error callback
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820 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
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821 * the configuration information for the specified DMA module.
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822 * @retval None
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823 */
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824 static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma)
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825 {
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826 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
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827 hadc->State= HAL_ADC_STATE_ERROR;
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828 /* Set ADC error code to DMA error */
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829 hadc->ErrorCode |= HAL_ADC_ERROR_DMA;
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830 HAL_ADC_ErrorCallback(hadc);
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831 }
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832
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833 /**
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834 * @}
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835 */
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836
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837 #endif /* HAL_ADC_MODULE_ENABLED */
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838 /**
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839 * @}
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840 */
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841
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842 /**
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843 * @}
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844 */
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845
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846 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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