annotate Small_CPU/Src/spi.c @ 326:2559a3f0f1f2

Merged in janlmulder/ostc4/fix-batt-1 (pull request #29) trival bugfix: implement battery at end in dive header
author heinrichsweikamp <bitbucket@heinrichsweikamp.com>
date Mon, 01 Jul 2019 14:18:39 +0000
parents 580822b5d3d1
children 2fc08a0d1ec3
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1 /**
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2 ******************************************************************************
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3 * @file spi.c
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4 * @author heinrichs weikamp gmbh
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5 * @version V0.0.1
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6 * @date 16-Sept-2014
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7 * @brief Source code for spi control
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8 *
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9 @verbatim
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10 ==============================================================================
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11 ##### How to use #####
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12 ==============================================================================
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13 @endverbatim
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14 ******************************************************************************
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15 * @attention
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16 *
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17 * <h2><center>&copy; COPYRIGHT(c) 2014 heinrichs weikamp</center></h2>
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18 *
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19 ******************************************************************************
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20 */
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22 /* Includes ------------------------------------------------------------------*/
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23
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24 #include "global_constants.h"
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25 #include "spi.h"
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26 #include "dma.h"
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27
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28 //#include "gpio.h"
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30 /* USER CODE BEGIN 0 */
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31 #include "scheduler.h"
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32
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33 #ifdef DEBUG_GPIO
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34 extern void GPIO_new_DEBUG_LOW(void);
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35 extern void GPIO_new_DEBUG_HIGH(void);
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36 #endif
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37
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38 uint8_t data_error = 0;
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39 uint32_t data_error_time = 0;
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40 uint8_t SPIDataRX = 0; /* Flag to signal that SPI RX callback has been triggered */
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42 static void SPI_Error_Handler(void);
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43
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44 /* USER CODE END 0 */
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45
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46 static uint8_t SPI_check_header_and_footer_ok(void);
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47 static uint8_t DataEX_check_header_and_footer_shifted(void);
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49 SPI_HandleTypeDef hspi1;
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50 SPI_HandleTypeDef hspi3;
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51
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52 DMA_HandleTypeDef hdma_tx;
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53 DMA_HandleTypeDef hdma_rx;
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54
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55 // SPI3 init function
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56 void MX_SPI3_Init(void) {
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57 hspi3.Instance = SPI3;
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58 hspi3.Init.Mode = SPI_MODE_MASTER;
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59 hspi3.Init.Direction = SPI_DIRECTION_2LINES;
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60 hspi3.Init.DataSize = SPI_DATASIZE_8BIT;
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61 hspi3.Init.CLKPolarity = SPI_POLARITY_HIGH;
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62 hspi3.Init.CLKPhase = SPI_PHASE_1EDGE;
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63 hspi3.Init.NSS = SPI_NSS_SOFT;
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64 hspi3.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
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65 hspi3.Init.FirstBit = SPI_FIRSTBIT_MSB;
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66 hspi3.Init.TIMode = SPI_TIMODE_DISABLED;
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67 hspi3.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
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68 hspi3.Init.CRCPolynomial = 7;
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69 HAL_SPI_Init(&hspi3);
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70 }
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71
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72 void MX_SPI3_DeInit(void) {
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73 HAL_SPI_DeInit(&hspi3);
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74 }
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75
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76 uint8_t SPI3_ButtonAdjust(uint8_t *arrayInput, uint8_t *arrayOutput) {
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77 HAL_StatusTypeDef status;
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78 uint8_t answer[10];
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79 uint8_t rework[10];
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81 rework[0] = 0xFF;
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82 for (int i = 0; i < 3; i++) {
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83 // limiter
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84 if (arrayInput[i] == 0xFF)
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85 arrayInput[i] = 0xFE;
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86 if (arrayInput[i] >= 15) {
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87 // copy - ausl�se-schwelle
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88 rework[i + 1] = arrayInput[i];
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89 // wieder-scharf-schalte-schwelle
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90 rework[i + 3 + 1] = arrayInput[i] - 10;
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91 } else if (arrayInput[i] >= 10) {
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92 // copy - ausl�se-schwelle
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93 rework[i + 1] = arrayInput[i];
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94 // wieder-scharf-schalte-schwelle
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95 rework[i + 3 + 1] = arrayInput[i] - 5;
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96 } else {
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97 // copy - ausl�se-schwelle
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98 rework[i + 1] = 7;
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99 // wieder-scharf-schalte-schwelle
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100 rework[i + 3 + 1] = 6;
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101 }
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102 }
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103
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104 status = HAL_OK; /* = 0 */
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105 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_SET);
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106 for (int i = 0; i < 7; i++) {
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107 HAL_Delay(10);
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108 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_RESET);
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109 HAL_Delay(10);
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110 status += HAL_SPI_TransmitReceive(&hspi3, &rework[i], &answer[i], 1,
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111 20);
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112 HAL_Delay(10);
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113 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_SET);
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114 }
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115
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116 if (status == HAL_OK) {
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117 for (int i = 0; i < 3; i++) {
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118 arrayOutput[i] = answer[i + 2]; // first not, return of 0xFF not
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119 }
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120 return 1;
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121 } else
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122
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123 return 0;
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124 }
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125
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126 // SPI5 init function
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127 void MX_SPI1_Init(void) {
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128 hspi1.Instance = SPI1;
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129 hspi1.Init.Mode = SPI_MODE_SLAVE;
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130 hspi1.Init.Direction = SPI_DIRECTION_2LINES;
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131 hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
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132 hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
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133 hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
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134 hspi1.Init.NSS = SPI_NSS_HARD_INPUT; //SPI_NSS_SOFT;
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135 hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128;
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136 hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
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137 hspi1.Init.TIMode = SPI_TIMODE_DISABLED;
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138 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED; //_DISABLED; _ENABLED;
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139 hspi1.Init.CRCPolynomial = 7;
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140 HAL_SPI_Init(&hspi1);
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141 }
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142
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143 void MX_SPI_DeInit(void) {
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144 HAL_SPI_DeInit(&hspi1);
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145 }
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146
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147 void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) {
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148
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149 GPIO_InitTypeDef GPIO_InitStruct;
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150
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151 if (hspi->Instance == SPI1) {
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152 SPIDataRX = 0;
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153 // Peripheral clock enable
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154 __SPI1_CLK_ENABLE();
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155 __GPIOA_CLK_ENABLE();
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156 //SPI1 GPIO Configuration
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157 //PA4 ------> SPI1_CS
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158 //PA5 ------> SPI1_SCK
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159 //PA6 ------> SPI1_MISO
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160 //PA7 ------> SPI1_MOSI
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161
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162 GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7;
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163 // GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
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164 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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165 GPIO_InitStruct.Pull = GPIO_PULLUP;
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166 GPIO_InitStruct.Speed = GPIO_SPEED_FAST; /* Decision is based on errata which recommends FAST for GPIO at 90Mhz */
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167 GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
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168 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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169
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170 //##-3- Configure the DMA streams ##########################################
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171 // Configure the DMA handler for Transmission process
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172 hdma_tx.Instance = DMA2_Stream3;
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173 hdma_tx.Init.Channel = DMA_CHANNEL_3;
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174 hdma_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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175 hdma_tx.Init.PeriphInc = DMA_PINC_DISABLE;
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176 hdma_tx.Init.MemInc = DMA_MINC_ENABLE;
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177 hdma_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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178 hdma_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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179 hdma_tx.Init.Mode = DMA_NORMAL;
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180 hdma_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
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181 hdma_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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182 hdma_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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183 hdma_tx.Init.MemBurst = DMA_MBURST_INC4;
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184 hdma_tx.Init.PeriphBurst = DMA_PBURST_INC4;
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185
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186 HAL_DMA_Init(&hdma_tx);
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187
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188 // Associate the initialized DMA handle to the the SPI handle
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189 __HAL_LINKDMA(hspi, hdmatx, hdma_tx);
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190
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191 // Configure the DMA handler for Transmission process
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192 hdma_rx.Instance = DMA2_Stream0;
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193 hdma_rx.Init.Channel = DMA_CHANNEL_3;
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194 hdma_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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195 hdma_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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196 hdma_rx.Init.MemInc = DMA_MINC_ENABLE;
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197 hdma_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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198 hdma_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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199 hdma_rx.Init.Mode = DMA_NORMAL;
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200 hdma_rx.Init.Priority = DMA_PRIORITY_HIGH;
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201 hdma_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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202 hdma_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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203 hdma_rx.Init.MemBurst = DMA_MBURST_INC4;
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204 hdma_rx.Init.PeriphBurst = DMA_PBURST_INC4;
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205
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206 HAL_DMA_Init(&hdma_rx);
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207
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208 // Associate the initialized DMA handle to the the SPI handle
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209 __HAL_LINKDMA(hspi, hdmarx, hdma_rx);
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210
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211 //##-4- Configure the NVIC for DMA #########################################
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212 //NVIC configuration for DMA transfer complete interrupt (SPI3_RX)
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213 HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 1, 0);
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214 HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
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215
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216 // NVIC configuration for DMA transfer complete interrupt (SPI1_TX)
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217 HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 1, 1);
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218 HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
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219 } else if (hspi->Instance == SPI3) {
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220 __GPIOC_CLK_ENABLE();
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221 __SPI3_CLK_ENABLE();
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222
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223 //SPI1 GPIO Configuration
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224 //PC10 ------> SPI3_SCK
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225 //PC11 ------> SPI3_MISO
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226 //PC12 ------> SPI3_MOSI
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227 //PA15 ------> SPI3_NSS (official)
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228 //PC9 ------> SPI3_NSS (hw)
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229
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230 GPIO_InitStruct.Pin = GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12;
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231 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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232 GPIO_InitStruct.Pull = GPIO_PULLUP;
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233 GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
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234 GPIO_InitStruct.Alternate = GPIO_AF6_SPI3;
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235 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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236
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237 GPIO_InitStruct.Pin = GPIO_PIN_9;
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238 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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239 GPIO_InitStruct.Pull = GPIO_PULLUP;
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240 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
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241 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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242
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243 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_SET);
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244 }
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245 }
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246
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247 void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) {
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248 if (hspi->Instance == SPI1) {
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249 __SPI1_FORCE_RESET();
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250 __SPI1_RELEASE_RESET();
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251
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252 //SPI1 GPIO Configuration
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253 //PA5 ------> SPI1_SCK
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254 //PA6 ------> SPI1_MISO
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255 //PA7 ------> SPI1_MOSI
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256
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257 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7);
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258
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259 HAL_DMA_DeInit(&hdma_tx);
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260 HAL_DMA_DeInit(&hdma_rx);
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261
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262 HAL_NVIC_DisableIRQ(DMA2_Stream3_IRQn);
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263 HAL_NVIC_DisableIRQ(DMA2_Stream0_IRQn);
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264 } else if (hspi->Instance == SPI3) {
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265 __SPI3_FORCE_RESET();
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266 __SPI3_RELEASE_RESET();
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267
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268 //SPI1 GPIO Configuration
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269 //PC10 ------> SPI3_SCK
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270 //PC11 ------> SPI3_MISO
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271 //PC12 ------> SPI3_MOSI
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272 //PA15 ------> SPI3_NSS (official)
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273 //PC9 ------> SPI3_NSS (hw)
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274 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12);
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275 }
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276 }
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277
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278 void SPI_synchronize_with_Master(void) {
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279 #ifdef USE_OLD_SYNC_METHOD
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280 GPIO_InitTypeDef GPIO_InitStruct;
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281 //
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282 __GPIOA_CLK_ENABLE();
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283 /**SPI1 GPIO Configuration
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284 PA5 ------> SPI1_SCK
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285 */
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286 GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5;
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287 GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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288 GPIO_InitStruct.Pull = GPIO_PULLUP;
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289 GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
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290 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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291 //
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292 HAL_Delay(10);
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293 while (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_4) == 0);
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294 HAL_Delay(10);
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295 while (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_5) == 1);
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296 HAL_Delay(50);
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297 #endif
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298 }
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299
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300 void SPI_Start_single_TxRx_with_Master(void) {
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301 uint8_t * pOutput;
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302 HAL_StatusTypeDef retval;
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303
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304 if (global.dataSendToSlave.getDeviceDataNow) {
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305 global.dataSendToSlave.getDeviceDataNow = 0;
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306 pOutput = (uint8_t*) &(global.deviceDataSendToMaster);
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307 } else {
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308 pOutput = (uint8_t*) &(global.dataSendToMaster);
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309 }
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310 retval = HAL_SPI_TransmitReceive_DMA(&hspi1, pOutput,(uint8_t*) &(global.dataSendToSlave), EXCHANGE_BUFFERSIZE);
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311 if ( retval!= HAL_OK) {
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312 SPI_Error_Handler();
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313 }
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314 }
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315
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316 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi) {
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317 /* restart SPI */
136
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318 if (hspi == &hspi1)
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319 {
264
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320 if(SPI_check_header_and_footer_ok()) /* process timestamp provided by main */
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321 {
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322 Scheduler_SyncToSPI(global.dataSendToSlave.header.checkCode[SPI_HEADER_INDEX_TX_TICK]);
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323 }
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324 else
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325 {
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326 Scheduler_SyncToSPI(0); /* => no async will be calculated */
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327 }
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328
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329 SPIDataRX = 1;
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330
89
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331 /* stop data exchange? */
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332 if (global.mode == MODE_SHUTDOWN) {
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333 global.mode = MODE_SLEEP;
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334 global.dataSendToSlavePending = 0;
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335 global.dataSendToSlaveIsValid = 1;
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336 global.dataSendToSlaveIsNotValidCount = 0;
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337 }
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338 }
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339 }
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340
264
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341 uint8_t SPI_Evaluate_RX_Data()
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342 {
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343 uint8_t resettimeout = 1;
264
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344 uint8_t ret = SPIDataRX;
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345
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346 if ((global.mode != MODE_SHUTDOWN) && ( global.mode != MODE_SLEEP) && (SPIDataRX))
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347 {
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348 SPIDataRX = 0;
89
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349 /* data consistent? */
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350 if (SPI_check_header_and_footer_ok()) {
208
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351 global.dataSendToMaster.header.checkCode[SPI_HEADER_INDEX_RX_STATE] = SPI_RX_STATE_OK;
143
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352 // GPIO_new_DEBUG_HIGH(); //For debug.
89
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353 global.dataSendToSlaveIsValid = 1;
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354 global.dataSendToSlaveIsNotValidCount = 0;
208
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355 /* Master signal a data shift outside of his control => reset own DMA and resync */
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356 if(global.dataSendToSlave.header.checkCode[SPI_HEADER_INDEX_RX_STATE] == SPI_RX_STATE_SHIFTED)
143
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357 {
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358 HAL_SPI_Abort_IT(&hspi1);
208
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359 Scheduler_Request_sync_with_SPI(SPI_SYNC_METHOD_HARD);
143
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360 }
277
580822b5d3d1 Rework SPI error handling.
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361 else
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362 {
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363 }
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364 SPI_Start_single_TxRx_with_Master();
208
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365 }
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366 else
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367 {
143
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368 // GPIO_new_DEBUG_LOW(); //For debug.
136
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369 global.dataSendToSlaveIsValid = 0;
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370 global.dataSendToSlaveIsNotValidCount++;
143
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371 if(DataEX_check_header_and_footer_shifted())
466c8d9c5e43 Introduced Token for SPI data exchange
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372 {
208
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373
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374 /* Reset own DMA */
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375 if ((global.dataSendToSlaveIsNotValidCount % 10) == 1) //% 10
143
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376 {
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377 HAL_SPI_Abort_IT(&hspi1); /* reset DMA only once */
466c8d9c5e43 Introduced Token for SPI data exchange
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378 }
208
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379 /* Signal problem to master */
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380 if ((global.dataSendToSlaveIsNotValidCount ) >= 2)
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381 {
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382 global.dataSendToMaster.header.checkCode[SPI_HEADER_INDEX_RX_STATE] = SPI_RX_STATE_SHIFTED;
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383 }
143
466c8d9c5e43 Introduced Token for SPI data exchange
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384 }
208
9fc06e1e0f66 Update SPI error display and handling
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385 else /* handle received data as if no data would have been received */
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386 {
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387 global.dataSendToMaster.header.checkCode[SPI_HEADER_INDEX_RX_STATE] = SPI_RX_STATE_OFFLINE;
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388 resettimeout = 0;
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389 }
277
580822b5d3d1 Rework SPI error handling.
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390 HAL_SPI_TransmitReceive_DMA(&hspi1,(uint8_t*) &(global.dataSendToMaster),(uint8_t*) &(global.dataSendToSlave), EXCHANGE_BUFFERSIZE);
208
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391 }
143
466c8d9c5e43 Introduced Token for SPI data exchange
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392
89
ff7775cc34c4 temp! full cyclic SPI
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diff changeset
393 global.dataSendToMaster.power_on_reset = 0;
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diff changeset
394 global.deviceDataSendToMaster.power_on_reset = 0;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
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395
143
466c8d9c5e43 Introduced Token for SPI data exchange
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diff changeset
396 scheduleSpecial_Evaluate_DataSendToSlave();
136
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
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397
264
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
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398 if(resettimeout)
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
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399 {
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400 global.check_sync_not_running = 0;
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401 }
208
9fc06e1e0f66 Update SPI error display and handling
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402 }
264
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
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diff changeset
403 return ret;
38
5f11787b4f42 include in ostc4 repository
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404 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
405
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
406 static uint8_t SPI_check_header_and_footer_ok(void) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
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diff changeset
407 if (global.dataSendToSlave.header.checkCode[0] != 0xBB)
38
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408 return 0;
148
ee744c7160ce Use SPI TX callback to synchronize to main CPU
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diff changeset
409 #ifdef USE_OLD_HEADER_FORMAT
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
410 if (global.dataSendToSlave.header.checkCode[1] != 0x01)
38
5f11787b4f42 include in ostc4 repository
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parents:
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411 return 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
412 if (global.dataSendToSlave.header.checkCode[2] != 0x01)
38
5f11787b4f42 include in ostc4 repository
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413 return 0;
143
466c8d9c5e43 Introduced Token for SPI data exchange
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diff changeset
414 #endif
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
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diff changeset
415 if (global.dataSendToSlave.header.checkCode[3] != 0xBB)
38
5f11787b4f42 include in ostc4 repository
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416 return 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
417 if (global.dataSendToSlave.footer.checkCode[0] != 0xF4)
38
5f11787b4f42 include in ostc4 repository
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418 return 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
419 if (global.dataSendToSlave.footer.checkCode[1] != 0xF3)
38
5f11787b4f42 include in ostc4 repository
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420 return 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
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diff changeset
421 if (global.dataSendToSlave.footer.checkCode[2] != 0xF2)
38
5f11787b4f42 include in ostc4 repository
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422 return 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
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diff changeset
423 if (global.dataSendToSlave.footer.checkCode[3] != 0xF1)
38
5f11787b4f42 include in ostc4 repository
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424 return 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
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425
5f11787b4f42 include in ostc4 repository
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426 return 1;
5f11787b4f42 include in ostc4 repository
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parents:
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427 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
428
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
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diff changeset
429
466c8d9c5e43 Introduced Token for SPI data exchange
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parents: 136
diff changeset
430 /* Check if there is an empty frame providec by RTE (all 0) or even no data provided by RTE (all 0xFF)
466c8d9c5e43 Introduced Token for SPI data exchange
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431 * If that is not the case the DMA is somehow not in sync
466c8d9c5e43 Introduced Token for SPI data exchange
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parents: 136
diff changeset
432 */
466c8d9c5e43 Introduced Token for SPI data exchange
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diff changeset
433 uint8_t DataEX_check_header_and_footer_shifted()
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
434 {
466c8d9c5e43 Introduced Token for SPI data exchange
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parents: 136
diff changeset
435 uint8_t ret = 1;
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
436 if((global.dataSendToSlave.footer.checkCode[0] == 0x00)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
437 && (global.dataSendToSlave.footer.checkCode[1] == 0x00)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
438 && (global.dataSendToSlave.footer.checkCode[2] == 0x00)
466c8d9c5e43 Introduced Token for SPI data exchange
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diff changeset
439 && (global.dataSendToSlave.footer.checkCode[3] == 0x00)) { ret = 0; }
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
440
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
441 if((global.dataSendToSlave.footer.checkCode[0] == 0xff)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
442 && (global.dataSendToSlave.footer.checkCode[1] == 0xff)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
443 && (global.dataSendToSlave.footer.checkCode[2] == 0xff)
466c8d9c5e43 Introduced Token for SPI data exchange
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diff changeset
444 && (global.dataSendToSlave.footer.checkCode[3] == 0xff)) { ret = 0; }
466c8d9c5e43 Introduced Token for SPI data exchange
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parents: 136
diff changeset
445
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
446 return ret;
466c8d9c5e43 Introduced Token for SPI data exchange
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parents: 136
diff changeset
447 }
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
448
89
ff7775cc34c4 temp! full cyclic SPI
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diff changeset
449 static void SPI_Error_Handler(void) {
82
a6f0881074a4 +i2c analog noise filtering
Dmitry Romanov <kitt@bk.ru>
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450 //The device is locks. Hard to recover.
a6f0881074a4 +i2c analog noise filtering
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451 // while(1)
a6f0881074a4 +i2c analog noise filtering
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diff changeset
452 // {
a6f0881074a4 +i2c analog noise filtering
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parents: 63
diff changeset
453 // }
38
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454 }
5f11787b4f42 include in ostc4 repository
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parents:
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455
5f11787b4f42 include in ostc4 repository
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parents:
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456 /**
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
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diff changeset
457 * @}
ff7775cc34c4 temp! full cyclic SPI
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diff changeset
458 */
38
5f11787b4f42 include in ostc4 repository
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459
5f11787b4f42 include in ostc4 repository
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parents:
diff changeset
460 /**
89
ff7775cc34c4 temp! full cyclic SPI
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461 * @}
ff7775cc34c4 temp! full cyclic SPI
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diff changeset
462 */
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463
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464 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/