|
38
|
1 /**
|
|
|
2 ******************************************************************************
|
|
|
3 * @file stm32f4xx_hal_adc.h
|
|
|
4 * @author MCD Application Team
|
|
|
5 * @version V1.2.0
|
|
|
6 * @date 26-December-2014
|
|
|
7 * @brief Header file of ADC HAL module.
|
|
|
8 ******************************************************************************
|
|
|
9 * @attention
|
|
|
10 *
|
|
|
11 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
|
|
12 *
|
|
|
13 * Redistribution and use in source and binary forms, with or without modification,
|
|
|
14 * are permitted provided that the following conditions are met:
|
|
|
15 * 1. Redistributions of source code must retain the above copyright notice,
|
|
|
16 * this list of conditions and the following disclaimer.
|
|
|
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
|
18 * this list of conditions and the following disclaimer in the documentation
|
|
|
19 * and/or other materials provided with the distribution.
|
|
|
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
|
21 * may be used to endorse or promote products derived from this software
|
|
|
22 * without specific prior written permission.
|
|
|
23 *
|
|
|
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
|
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
|
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
|
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
|
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
|
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
|
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
|
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
|
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
|
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
|
34 *
|
|
|
35 ******************************************************************************
|
|
|
36 */
|
|
|
37
|
|
|
38 /* Define to prevent recursive inclusion -------------------------------------*/
|
|
|
39 #ifndef __STM32F4xx_ADC_EX_H
|
|
|
40 #define __STM32F4xx_ADC_EX_H
|
|
|
41
|
|
|
42 #ifdef __cplusplus
|
|
|
43 extern "C" {
|
|
|
44 #endif
|
|
|
45
|
|
|
46 /* Includes ------------------------------------------------------------------*/
|
|
|
47 #include "stm32f4xx_hal_def.h"
|
|
|
48
|
|
|
49 /** @addtogroup STM32F4xx_HAL_Driver
|
|
|
50 * @{
|
|
|
51 */
|
|
|
52
|
|
|
53 /** @addtogroup ADCEx
|
|
|
54 * @{
|
|
|
55 */
|
|
|
56
|
|
|
57 /* Exported types ------------------------------------------------------------*/
|
|
|
58 /** @defgroup ADCEx_Exported_Types ADC Exported Types
|
|
|
59 * @{
|
|
|
60 */
|
|
|
61
|
|
|
62 /**
|
|
|
63 * @brief ADC Configuration injected Channel structure definition
|
|
|
64 */
|
|
|
65 typedef struct
|
|
|
66 {
|
|
|
67 uint32_t InjectedChannel; /*!< Configure the ADC injected channel.
|
|
|
68 This parameter can be a value of @ref ADC_channels */
|
|
|
69 uint32_t InjectedRank; /*!< The rank in the injected group sequencer
|
|
|
70 This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
|
|
|
71 uint32_t InjectedSamplingTime; /*!< The sample time value to be set for the selected channel.
|
|
|
72 This parameter can be a value of @ref ADC_sampling_times */
|
|
|
73 uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data when convert injected channels.
|
|
|
74 This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
|
|
|
75 uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ADC conversions that will be done using the sequencer for
|
|
|
76 injected channel group.
|
|
|
77 This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
|
|
|
78 uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group
|
|
|
79 conversion after regular one */
|
|
|
80 uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversion is performed in Discontinuous mode or not for injected channels.
|
|
|
81 This parameter can be set to ENABLE or DISABLE. */
|
|
|
82 uint32_t ExternalTrigInjecConvEdge; /*!< Select the external trigger edge and enable the trigger of an injected channels.
|
|
|
83 This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected */
|
|
|
84 uint32_t ExternalTrigInjecConv; /*!< Select the external event used to trigger the start of conversion of a injected channels.
|
|
|
85 This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected */
|
|
|
86 }ADC_InjectionConfTypeDef;
|
|
|
87
|
|
|
88 /**
|
|
|
89 * @brief ADC Configuration multi-mode structure definition
|
|
|
90 */
|
|
|
91 typedef struct
|
|
|
92 {
|
|
|
93 uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
|
|
|
94 This parameter can be a value of @ref ADCEx_Common_mode */
|
|
|
95 uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode.
|
|
|
96 This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */
|
|
|
97 uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
|
|
|
98 This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */
|
|
|
99 }ADC_MultiModeTypeDef;
|
|
|
100
|
|
|
101 /**
|
|
|
102 * @}
|
|
|
103 */
|
|
|
104
|
|
|
105 /* Exported constants --------------------------------------------------------*/
|
|
|
106 /** @defgroup ADCEx_Exported_Constants ADC Exported Constants
|
|
|
107 * @{
|
|
|
108 */
|
|
|
109
|
|
|
110 /** @defgroup ADCEx_Common_mode ADC Common Mode
|
|
|
111 * @{
|
|
|
112 */
|
|
|
113 #define ADC_MODE_INDEPENDENT ((uint32_t)0x00000000)
|
|
|
114 #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0)
|
|
|
115 #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1)
|
|
|
116 #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
|
|
|
117 #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
|
|
|
118 #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
|
|
|
119 #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
|
|
|
120 #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0))
|
|
|
121 #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1))
|
|
|
122 #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
|
|
|
123 #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
|
|
|
124 #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
|
|
|
125 #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
|
|
|
126 /**
|
|
|
127 * @}
|
|
|
128 */
|
|
|
129
|
|
|
130 /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode ADC Direct Memory Access Mode For Multi Mode
|
|
|
131 * @{
|
|
|
132 */
|
|
|
133 #define ADC_DMAACCESSMODE_DISABLED ((uint32_t)0x00000000) /*!< DMA mode disabled */
|
|
|
134 #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/
|
|
|
135 #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/
|
|
|
136 #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */
|
|
|
137 /**
|
|
|
138 * @}
|
|
|
139 */
|
|
|
140
|
|
|
141 /** @defgroup ADCEx_External_trigger_edge_Injected ADC External Trigger Edge Injected
|
|
|
142 * @{
|
|
|
143 */
|
|
|
144 #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE ((uint32_t)0x00000000)
|
|
|
145 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0)
|
|
|
146 #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1)
|
|
|
147 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN)
|
|
|
148 /**
|
|
|
149 * @}
|
|
|
150 */
|
|
|
151
|
|
|
152 /** @defgroup ADCEx_External_trigger_Source_Injected ADC External Trigger Source Injected
|
|
|
153 * @{
|
|
|
154 */
|
|
|
155 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ((uint32_t)0x00000000)
|
|
|
156 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0)
|
|
|
157 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1)
|
|
|
158 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
|
|
|
159 #define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2)
|
|
|
160 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
|
|
|
161 #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
|
|
|
162 #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
|
|
|
163 #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3)
|
|
|
164 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0))
|
|
|
165 #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1))
|
|
|
166 #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
|
|
|
167 #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2))
|
|
|
168 #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
|
|
|
169 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
|
|
|
170 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL)
|
|
|
171 /**
|
|
|
172 * @}
|
|
|
173 */
|
|
|
174
|
|
|
175 /** @defgroup ADCEx_injected_channel_selection ADC Injected Channel Selection
|
|
|
176 * @{
|
|
|
177 */
|
|
|
178 #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001)
|
|
|
179 #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002)
|
|
|
180 #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003)
|
|
|
181 #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004)
|
|
|
182 /**
|
|
|
183 * @}
|
|
|
184 */
|
|
|
185
|
|
|
186 /** @defgroup ADCEx_channels ADC Specific Channels
|
|
|
187 * @{
|
|
|
188 */
|
|
|
189 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
|
|
|
190 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
|
191 #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_16)
|
|
|
192 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
|
|
|
193
|
|
|
194 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
|
|
|
195 #define ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT ((uint32_t)0x10000000) /* Dummy bit for driver internal usage, not used in ADC channel setting registers CR1 or SQRx */
|
|
|
196 #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_18 | ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT)
|
|
|
197 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
|
|
198 /**
|
|
|
199 * @}
|
|
|
200 */
|
|
|
201
|
|
|
202
|
|
|
203 /**
|
|
|
204 * @}
|
|
|
205 */
|
|
|
206
|
|
|
207 /* Exported macro ------------------------------------------------------------*/
|
|
|
208 /** @defgroup ADC_Exported_Macros ADC Exported Macros
|
|
|
209 * @{
|
|
|
210 */
|
|
|
211
|
|
|
212 /**
|
|
|
213 * @}
|
|
|
214 */
|
|
|
215
|
|
|
216 /* Exported functions --------------------------------------------------------*/
|
|
|
217 /** @addtogroup ADCEx_Exported_Functions
|
|
|
218 * @{
|
|
|
219 */
|
|
|
220
|
|
|
221 /** @addtogroup ADCEx_Exported_Functions_Group1
|
|
|
222 * @{
|
|
|
223 */
|
|
|
224
|
|
|
225 /* I/O operation functions ******************************************************/
|
|
|
226 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
|
|
|
227 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
|
|
|
228 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
|
|
|
229 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
|
|
|
230 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
|
|
|
231 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
|
|
|
232 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
|
|
|
233 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc);
|
|
|
234 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc);
|
|
|
235 void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
|
|
|
236
|
|
|
237 /* Peripheral Control functions *************************************************/
|
|
|
238 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
|
|
|
239 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode);
|
|
|
240
|
|
|
241 /**
|
|
|
242 * @}
|
|
|
243 */
|
|
|
244
|
|
|
245 /**
|
|
|
246 * @}
|
|
|
247 */
|
|
|
248 /* Private types -------------------------------------------------------------*/
|
|
|
249 /* Private variables ---------------------------------------------------------*/
|
|
|
250 /* Private constants ---------------------------------------------------------*/
|
|
|
251 /** @defgroup ADCEx_Private_Constants ADC Private Constants
|
|
|
252 * @{
|
|
|
253 */
|
|
|
254
|
|
|
255 /**
|
|
|
256 * @}
|
|
|
257 */
|
|
|
258
|
|
|
259 /* Private macros ------------------------------------------------------------*/
|
|
|
260 /** @defgroup ADCEx_Private_Macros ADC Private Macros
|
|
|
261 * @{
|
|
|
262 */
|
|
|
263 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
|
|
|
264 ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
|
|
|
265 ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
|
|
|
266 ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
|
|
|
267 ((MODE) == ADC_DUALMODE_REGSIMULT) || \
|
|
|
268 ((MODE) == ADC_DUALMODE_INTERL) || \
|
|
|
269 ((MODE) == ADC_DUALMODE_ALTERTRIG) || \
|
|
|
270 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
|
|
|
271 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
|
|
|
272 ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \
|
|
|
273 ((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \
|
|
|
274 ((MODE) == ADC_TRIPLEMODE_INTERL) || \
|
|
|
275 ((MODE) == ADC_TRIPLEMODE_ALTERTRIG))
|
|
|
276 #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \
|
|
|
277 ((MODE) == ADC_DMAACCESSMODE_1) || \
|
|
|
278 ((MODE) == ADC_DMAACCESSMODE_2) || \
|
|
|
279 ((MODE) == ADC_DMAACCESSMODE_3))
|
|
|
280 #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \
|
|
|
281 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \
|
|
|
282 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
|
|
|
283 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))
|
|
|
284 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
|
|
|
285 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
|
|
|
286 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
|
|
|
287 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
|
|
|
288 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \
|
|
|
289 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
|
|
|
290 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \
|
|
|
291 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \
|
|
|
292 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
|
|
|
293 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
|
|
|
294 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
|
|
|
295 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
|
|
|
296 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
|
|
|
297 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \
|
|
|
298 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
|
|
|
299 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15))
|
|
|
300 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4)))
|
|
|
301 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= ((uint32_t)1)) && ((RANK) <= ((uint32_t)4)))
|
|
|
302
|
|
|
303 /**
|
|
|
304 * @brief Set the selected injected Channel rank.
|
|
|
305 * @param _CHANNELNB_: Channel number.
|
|
|
306 * @param _RANKNB_: Rank number.
|
|
|
307 * @param _JSQR_JL_: Sequence length.
|
|
|
308 * @retval None
|
|
|
309 */
|
|
|
310 #define ADC_JSQR(_CHANNELNB_, _RANKNB_, _JSQR_JL_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5 * (uint8_t)(((_RANKNB_) + 3) - (_JSQR_JL_))))
|
|
|
311
|
|
|
312 /**
|
|
|
313 * @}
|
|
|
314 */
|
|
|
315
|
|
|
316 /* Private functions ---------------------------------------------------------*/
|
|
|
317 /** @defgroup ADCEx_Private_Functions ADC Private Functions
|
|
|
318 * @{
|
|
|
319 */
|
|
|
320
|
|
|
321 /**
|
|
|
322 * @}
|
|
|
323 */
|
|
|
324
|
|
|
325 /**
|
|
|
326 * @}
|
|
|
327 */
|
|
|
328
|
|
|
329 /**
|
|
|
330 * @}
|
|
|
331 */
|
|
|
332
|
|
|
333 #ifdef __cplusplus
|
|
|
334 }
|
|
|
335 #endif
|
|
|
336
|
|
|
337 #endif /*__STM32F4xx_ADC_EX_H */
|
|
|
338
|
|
|
339
|
|
|
340 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
