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1 /**
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2 ******************************************************************************
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3 * @file stm32_hal_legacy.h
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4 * @author MCD Application Team
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5 * @version V1.2.0
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6 * @date 26-December-2014
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7 * @brief This file contains aliases definition for the STM32Cube HAL constants
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8 * macros and functions maintained for legacy purpose.
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9 ******************************************************************************
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10 * @attention
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11 *
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12 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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13 *
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14 * Redistribution and use in source and binary forms, with or without modification,
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15 * are permitted provided that the following conditions are met:
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16 * 1. Redistributions of source code must retain the above copyright notice,
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17 * this list of conditions and the following disclaimer.
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18 * 2. Redistributions in binary form must reproduce the above copyright notice,
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19 * this list of conditions and the following disclaimer in the documentation
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20 * and/or other materials provided with the distribution.
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21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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22 * may be used to endorse or promote products derived from this software
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23 * without specific prior written permission.
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24 *
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25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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33 UART * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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35 *
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36 ******************************************************************************
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37 */
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38
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39 /* Define to prevent recursive inclusion -------------------------------------*/
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40 #ifndef __STM32_HAL_LEGACY
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41 #define __STM32_HAL_LEGACY
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42
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43 #ifdef __cplusplus
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44 extern "C" {
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45 #endif
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46
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47 /* Includes ------------------------------------------------------------------*/
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48 /* Exported types ------------------------------------------------------------*/
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49 /* Exported constants --------------------------------------------------------*/
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50
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51 /** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose
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52 * @{
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53 */
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54 #define AES_FLAG_RDERR CRYP_FLAG_RDERR
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55 #define AES_FLAG_WRERR CRYP_FLAG_WRERR
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56 #define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
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57 #define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
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58 #define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
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59
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60 /**
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61 * @}
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62 */
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63
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64 /** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose
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65 * @{
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66 */
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67 #define ADC_RESOLUTION12b ADC_RESOLUTION_12B
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68 #define ADC_RESOLUTION10b ADC_RESOLUTION_10B
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69 #define ADC_RESOLUTION8b ADC_RESOLUTION_8B
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70 #define ADC_RESOLUTION6b ADC_RESOLUTION_6B
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71 #define OVR_DATA_OVERWRITTEN ADC_OVR_DATA_OVERWRITTEN
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72 #define OVR_DATA_PRESERVED ADC_OVR_DATA_PRESERVED
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73 #define EOC_SINGLE_CONV ADC_EOC_SINGLE_CONV
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74 #define EOC_SEQ_CONV ADC_EOC_SEQ_CONV
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75 #define EOC_SINGLE_SEQ_CONV ADC_EOC_SINGLE_SEQ_CONV
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76 #define REGULAR_GROUP ADC_REGULAR_GROUP
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77 #define INJECTED_GROUP ADC_INJECTED_GROUP
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78 #define REGULAR_INJECTED_GROUP ADC_REGULAR_INJECTED_GROUP
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79 #define AWD_EVENT ADC_AWD_EVENT
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80 #define AWD1_EVENT ADC_AWD1_EVENT
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81 #define AWD2_EVENT ADC_AWD2_EVENT
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82 #define AWD3_EVENT ADC_AWD3_EVENT
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83 #define OVR_EVENT ADC_OVR_EVENT
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84 #define JQOVF_EVENT ADC_JQOVF_EVENT
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85 #define ALL_CHANNELS ADC_ALL_CHANNELS
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86 #define REGULAR_CHANNELS ADC_REGULAR_CHANNELS
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87 #define INJECTED_CHANNELS ADC_INJECTED_CHANNELS
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88 #define SYSCFG_FLAG_SENSOR_ADC ADC_FLAG_SENSOR
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89 #define SYSCFG_FLAG_VREF_ADC ADC_FLAG_VREFINT
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90 #define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO
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91 #define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2
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92 #define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO
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93 #define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4
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94 #define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO
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95 #define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11
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96
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97
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98 /**
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99 * @}
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100 */
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101
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102 /** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose
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103 * @{
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104 */
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105
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106 #define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG
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107
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108 /**
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109 * @}
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110 */
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111
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112 /** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose
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113 * @{
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114 */
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115
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116 #define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE
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117 #define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE
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118 #define COMP_EXTI_LINE_COMP1_EVENT COMP_EXTI_LINE_COMP1
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119 #define COMP_EXTI_LINE_COMP2_EVENT COMP_EXTI_LINE_COMP2
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120
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121 /**
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122 * @}
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123 */
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124
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125 /** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose
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126 * @{
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127 */
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128
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129 #define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE
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130 #define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE
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131
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132 /**
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133 * @}
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134 */
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135
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136 /** @defgroup HAL_DAC_Aliased_Defines HAL DAC Aliased Defines maintained for legacy purpose
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137 * @{
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138 */
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139
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140 #define DAC1_CHANNEL_1 DAC_CHANNEL_1
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141 #define DAC1_CHANNEL_2 DAC_CHANNEL_2
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142 #define DAC2_CHANNEL_1 DAC_CHANNEL_1
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143
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144 /**
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145 * @}
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146 */
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147
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148
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149 /** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose
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150 * @{
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151 */
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152
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153 #define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE
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154 #define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD
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155 #define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD
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156 #define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD
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157 #define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS
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158 #define TYPEERASE_PAGES FLASH_TYPEERASE_PAGES
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159 #define TYPEERASE_PAGEERASE FLASH_TYPEERASE_PAGES
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160 #define TYPEERASE_MASSERASE FLASH_TYPEERASE_MASSERASE
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161 #define WRPSTATE_DISABLE OB_WRPSTATE_DISABLE
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162 #define WRPSTATE_ENABLE OB_WRPSTATE_ENABLE
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163 #define HAL_FLASH_TIMEOUT_VALUE FLASH_TIMEOUT_VALUE
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164 #define OBEX_PCROP OPTIONBYTE_PCROP
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165 #define OBEX_BOOTCONFIG OPTIONBYTE_BOOTCONFIG
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166 #define PCROPSTATE_DISABLE OB_PCROP_STATE_DISABLE
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167 #define PCROPSTATE_ENABLE OB_PCROP_STATE_ENABLE
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168 #define TYPEERASEDATA_BYTE FLASH_TYPEERASEDATA_BYTE
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169 #define TYPEERASEDATA_HALFWORD FLASH_TYPEERASEDATA_HALFWORD
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170 #define TYPEERASEDATA_WORD FLASH_TYPEERASEDATA_WORD
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171 #define TYPEPROGRAMDATA_BYTE FLASH_TYPEPROGRAMDATA_BYTE
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172 #define TYPEPROGRAMDATA_HALFWORD FLASH_TYPEPROGRAMDATA_HALFWORD
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173 #define TYPEPROGRAMDATA_WORD FLASH_TYPEPROGRAMDATA_WORD
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174 #define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
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175 #define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
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176 #define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
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177 #define PAGESIZE FLASH_PAGE_SIZE
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178 #define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
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179 #define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
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180 #define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
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181 #define VOLTAGE_RANGE_1 FLASH_VOLTAGE_RANGE_1
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182 #define VOLTAGE_RANGE_2 FLASH_VOLTAGE_RANGE_2
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183 #define VOLTAGE_RANGE_3 FLASH_VOLTAGE_RANGE_3
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184 #define VOLTAGE_RANGE_4 FLASH_VOLTAGE_RANGE_4
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185 #define TYPEPROGRAM_FAST FLASH_TYPEPROGRAM_FAST
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186 #define TYPEPROGRAM_FAST_AND_LAST FLASH_TYPEPROGRAM_FAST_AND_LAST
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187 #define WRPAREA_BANK1_AREAA OB_WRPAREA_BANK1_AREAA
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188 #define WRPAREA_BANK1_AREAB OB_WRPAREA_BANK1_AREAB
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189 #define WRPAREA_BANK2_AREAA OB_WRPAREA_BANK2_AREAA
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190 #define WRPAREA_BANK2_AREAB OB_WRPAREA_BANK2_AREAB
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191 #define IWDG_STDBY_FREEZE OB_IWDG_STDBY_FREEZE
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192 #define IWDG_STDBY_ACTIVE OB_IWDG_STDBY_RUN
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193 #define IWDG_STOP_FREEZE OB_IWDG_STOP_FREEZE
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194 #define IWDG_STOP_ACTIVE OB_IWDG_STOP_RUN
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195 #define IS_NBSECTORS IS_FLASH_NBSECTORS
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196 #define FLASH_ERROR_NONE HAL_FLASH_ERROR_NONE
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197 #define FLASH_ERROR_RD HAL_FLASH_ERROR_RD
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198 #define FLASH_ERROR_PG HAL_FLASH_ERROR_PROG
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199 #define FLASH_ERROR_PGP HAL_FLASH_ERROR_PGS
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200 #define FLASH_ERROR_WRP HAL_FLASH_ERROR_WRP
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201 #define FLASH_ERROR_OPTV HAL_FLASH_ERROR_OPTV
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202 #define FLASH_ERROR_OPTVUSR HAL_FLASH_ERROR_OPTVUSR
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203 #define FLASH_ERROR_PROG HAL_FLASH_ERROR_PROG
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204 #define FLASH_ERROR_OP HAL_FLASH_ERROR_OPERATION
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205 #define FLASH_ERROR_PGA HAL_FLASH_ERROR_PGA
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206 #define FLASH_ERROR_SIZE HAL_FLASH_ERROR_SIZE
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207 #define FLASH_ERROR_SIZ HAL_FLASH_ERROR_SIZE
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208 #define FLASH_ERROR_PGS HAL_FLASH_ERROR_PGS
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209 #define FLASH_ERROR_MIS HAL_FLASH_ERROR_MIS
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210 #define FLASH_ERROR_FAST HAL_FLASH_ERROR_FAST
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211 #define FLASH_ERROR_FWWERR HAL_FLASH_ERROR_FWWERR
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212 #define FLASH_ERROR_NOTZERO HAL_FLASH_ERROR_NOTZERO
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213 #define FLASH_ERROR_OPERATION HAL_FLASH_ERROR_OPERATION
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214 #define FLASH_ERROR_ERS HAL_FLASH_ERROR_ERS
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215
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216 /**
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217 * @}
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218 */
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219
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220 /** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose
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221 * @{
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222 */
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223
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224 #define SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6
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225 #define SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7
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226 #define SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8
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227 #define SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9
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228 #define SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1
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229 #define SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2
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230 #define SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3
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231
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232 /**
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233 * @}
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234 */
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235
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236
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237 /** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose
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238 * @{
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239 */
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240
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241 #define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef
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242 #define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef
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243 /**
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244 * @}
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245 */
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246
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247 /** @defgroup HAL_GPIO_Aliased_Macros HAL GPIO Aliased Macros maintained for legacy purpose
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248 * @{
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249 */
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250 #define GET_GPIO_SOURCE GPIO_GET_INDEX
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251 #define GET_GPIO_INDEX GPIO_GET_INDEX
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252 /**
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253 * @}
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254 */
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255
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256
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257 /** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose
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258 * @{
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259 */
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260 #define I2C_DUALADDRESS_DISABLED I2C_DUALADDRESS_DISABLE
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261 #define I2C_DUALADDRESS_ENABLED I2C_DUALADDRESS_ENABLE
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262 #define I2C_GENERALCALL_DISABLED I2C_GENERALCALL_DISABLE
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263 #define I2C_GENERALCALL_ENABLED I2C_GENERALCALL_ENABLE
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264 #define I2C_NOSTRETCH_DISABLED I2C_NOSTRETCH_DISABLE
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265 #define I2C_NOSTRETCH_ENABLED I2C_NOSTRETCH_ENABLE
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266 #define I2C_ANALOGFILTER_ENABLED I2C_ANALOGFILTER_ENABLE
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267 #define I2C_ANALOGFILTER_DISABLED I2C_ANALOGFILTER_DISABLE
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268 /**
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269 * @}
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270 */
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271
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272 /** @defgroup HAL_IRDA_Aliased_Defines HAL IRDA Aliased Defines maintained for legacy purpose
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273 * @{
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274 */
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275 #define IRDA_ONE_BIT_SAMPLE_DISABLED IRDA_ONE_BIT_SAMPLE_DISABLE
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276 #define IRDA_ONE_BIT_SAMPLE_ENABLED IRDA_ONE_BIT_SAMPLE_ENABLE
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277
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278 /**
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279 * @}
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280 */
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281
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282 /** @defgroup HAL_IWDG_Aliased_Defines HAL IWDG Aliased Defines maintained for legacy purpose
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283 * @{
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284 */
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285 #define KR_KEY_RELOAD IWDG_KEY_RELOAD
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286 #define KR_KEY_ENABLE IWDG_KEY_ENABLE
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287 #define KR_KEY_EWA IWDG_KEY_WRITE_ACCESS_ENABLE
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288 #define KR_KEY_DWA IWDG_KEY_WRITE_ACCESS_DISABLE
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289 /**
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290 * @}
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291 */
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292
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293 /** @defgroup HAL_NAND_Aliased_Defines HAL NAND Aliased Defines maintained for legacy purpose
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294 * @{
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295 */
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296 #define NAND_AddressTypedef NAND_AddressTypeDef
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297
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298 #define __ARRAY_ADDRESS ARRAY_ADDRESS
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299 #define __ADDR_1st_CYCLE ADDR_1ST_CYCLE
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300 #define __ADDR_2nd_CYCLE ADDR_2ND_CYCLE
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301 #define __ADDR_3rd_CYCLE ADDR_3RD_CYCLE
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302 #define __ADDR_4th_CYCLE ADDR_4TH_CYCLE
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303 /**
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304 * @}
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305 */
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306
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307 /** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose
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308 * @{
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309 */
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310 #define NOR_StatusTypedef HAL_NOR_StatusTypeDef
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311 #define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS
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312 #define NOR_ONGOING HAL_NOR_STATUS_ONGOING
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313 #define NOR_ERROR HAL_NOR_STATUS_ERROR
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314 #define NOR_TIMEOUT HAL_NOR_STATUS_TIMEOUT
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315
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316 #define __NOR_WRITE NOR_WRITE
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317 #define __NOR_ADDR_SHIFT NOR_ADDR_SHIFT
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318 /**
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319 * @}
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320 */
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321
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322 /** @defgroup HAL_OPAMP_Aliased_Defines HAL OPAMP Aliased Defines maintained for legacy purpose
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323 * @{
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324 */
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325
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326 #define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0
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327 #define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1
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328 #define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2
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329 #define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3
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330
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331 #define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0
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332 #define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1
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333 #define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2
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334 #define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3
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335
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336 #define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
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337 #define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
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338
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339 #define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
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340 #define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
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341
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342 #define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0
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343 #define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1
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344
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345 #define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1
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346
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347 #define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO
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348 #define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
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349 #define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
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350
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351 /**
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352 * @}
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353 */
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354
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355 /** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose
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356 * @{
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357 */
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358 #define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS
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359 /**
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360 * @}
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361 */
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362
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363 /** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose
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364 * @{
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365 */
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366
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367 /* Compact Flash-ATA registers description */
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368 #define CF_DATA ATA_DATA
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369 #define CF_SECTOR_COUNT ATA_SECTOR_COUNT
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370 #define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER
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371 #define CF_CYLINDER_LOW ATA_CYLINDER_LOW
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372 #define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH
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373 #define CF_CARD_HEAD ATA_CARD_HEAD
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374 #define CF_STATUS_CMD ATA_STATUS_CMD
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375 #define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE
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376 #define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA
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377
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378 /* Compact Flash-ATA commands */
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379 #define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD
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380 #define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD
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381 #define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD
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382 #define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD
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383
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384 #define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef
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385 #define PCCARD_SUCCESS HAL_PCCARD_STATUS_SUCCESS
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386 #define PCCARD_ONGOING HAL_PCCARD_STATUS_ONGOING
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387 #define PCCARD_ERROR HAL_PCCARD_STATUS_ERROR
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388 #define PCCARD_TIMEOUT HAL_PCCARD_STATUS_TIMEOUT
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389 /**
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390 * @}
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391 */
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392
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393 /** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose
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394 * @{
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395 */
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396
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397 #define FORMAT_BIN RTC_FORMAT_BIN
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398 #define FORMAT_BCD RTC_FORMAT_BCD
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399
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400 #define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE
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401 #define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
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402 #define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
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403 #define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
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404 #define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
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405
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406 #define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
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407 #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
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408 #define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
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409 #define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
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410 #define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
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411 #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
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412 #define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
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413 #define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
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414
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415 /**
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416 * @}
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417 */
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418
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419
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420 /** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose
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421 * @{
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422 */
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423 #define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE
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424 #define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE
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425
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426 #define SMARTCARD_ONEBIT_SAMPLING_DISABLED SMARTCARD_ONE_BIT_SAMPLE_DISABLE
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427 #define SMARTCARD_ONEBIT_SAMPLING_ENABLED SMARTCARD_ONE_BIT_SAMPLE_ENABLE
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428 #define SMARTCARD_ONEBIT_SAMPLING_DISABLE SMARTCARD_ONE_BIT_SAMPLE_DISABLE
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429 #define SMARTCARD_ONEBIT_SAMPLING_ENABLE SMARTCARD_ONE_BIT_SAMPLE_ENABLE
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430
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431 #define SMARTCARD_TIMEOUT_DISABLED SMARTCARD_TIMEOUT_DISABLE
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432 #define SMARTCARD_TIMEOUT_ENABLED SMARTCARD_TIMEOUT_ENABLE
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433
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434 #define SMARTCARD_LASTBIT_DISABLED SMARTCARD_LASTBIT_DISABLE
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435 #define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE
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436 /**
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437 * @}
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438 */
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439
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440
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441 /** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose
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442 * @{
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443 */
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444 #define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE
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445 #define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE
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446 #define SMBUS_GENERALCALL_DISABLED SMBUS_GENERALCALL_DISABLE
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447 #define SMBUS_GENERALCALL_ENABLED SMBUS_GENERALCALL_ENABLE
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448 #define SMBUS_NOSTRETCH_DISABLED SMBUS_NOSTRETCH_DISABLE
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449 #define SMBUS_NOSTRETCH_ENABLED SMBUS_NOSTRETCH_ENABLE
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450 #define SMBUS_ANALOGFILTER_ENABLED SMBUS_ANALOGFILTER_ENABLE
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451 #define SMBUS_ANALOGFILTER_DISABLED SMBUS_ANALOGFILTER_DISABLE
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452 #define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN
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453 /**
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454 * @}
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455 */
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456
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457 /** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose
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458 * @{
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459 */
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460 #define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE
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461 #define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE
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462
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463 #define SPI_CRCCALCULATION_DISABLED SPI_CRCCALCULATION_DISABLE
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464 #define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE
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465
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466 #define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE
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467 #define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE
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468
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469 /**
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470 * @}
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471 */
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472
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473 /** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose
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474 * @{
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475 */
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476 #define CCER_CCxE_MASK TIM_CCER_CCxE_MASK
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477 #define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK
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478
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479 #define TIM_DMABase_CR1 TIM_DMABASE_CR1
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480 #define TIM_DMABase_CR2 TIM_DMABASE_CR2
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481 #define TIM_DMABase_SMCR TIM_DMABASE_SMCR
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482 #define TIM_DMABase_DIER TIM_DMABASE_DIER
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483 #define TIM_DMABase_SR TIM_DMABASE_SR
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484 #define TIM_DMABase_EGR TIM_DMABASE_EGR
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485 #define TIM_DMABase_CCMR1 TIM_DMABASE_CCMR1
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486 #define TIM_DMABase_CCMR2 TIM_DMABASE_CCMR2
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487 #define TIM_DMABase_CCER TIM_DMABASE_CCER
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488 #define TIM_DMABase_CNT TIM_DMABASE_CNT
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489 #define TIM_DMABase_PSC TIM_DMABASE_PSC
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490 #define TIM_DMABase_ARR TIM_DMABASE_ARR
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491 #define TIM_DMABase_RCR TIM_DMABASE_RCR
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492 #define TIM_DMABase_CCR1 TIM_DMABASE_CCR1
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493 #define TIM_DMABase_CCR2 TIM_DMABASE_CCR2
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494 #define TIM_DMABase_CCR3 TIM_DMABASE_CCR3
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495 #define TIM_DMABase_CCR4 TIM_DMABASE_CCR4
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496 #define TIM_DMABase_BDTR TIM_DMABASE_BDTR
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497 #define TIM_DMABase_DCR TIM_DMABASE_DCR
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498 #define TIM_DMABase_DMAR TIM_DMABASE_DMAR
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499 #define TIM_DMABase_OR1 TIM_DMABASE_OR1
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500 #define TIM_DMABase_CCMR3 TIM_DMABASE_CCMR3
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501 #define TIM_DMABase_CCR5 TIM_DMABASE_CCR5
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502 #define TIM_DMABase_CCR6 TIM_DMABASE_CCR6
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503 #define TIM_DMABase_OR2 TIM_DMABASE_OR2
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504 #define TIM_DMABase_OR3 TIM_DMABASE_OR3
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505
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506 #define TIM_EventSource_Update TIM_EVENTSOURCE_UPDATE
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507 #define TIM_EventSource_CC1 TIM_EVENTSOURCE_CC1
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508 #define TIM_EventSource_CC2 TIM_EVENTSOURCE_CC2
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509 #define TIM_EventSource_CC3 TIM_EVENTSOURCE_CC3
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510 #define TIM_EventSource_CC4 TIM_EVENTSOURCE_CC4
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511 #define TIM_EventSource_COM TIM_EVENTSOURCE_COM
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512 #define TIM_EventSource_Trigger TIM_EVENTSOURCE_TRIGGER
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513 #define TIM_EventSource_Break TIM_EVENTSOURCE_BREAK
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514 #define TIM_EventSource_Break2 TIM_EVENTSOURCE_BREAK2
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515
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516 #define TIM_DMABurstLength_1Transfer TIM_DMABURSTLENGTH_1TRANSFER
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517 #define TIM_DMABurstLength_2Transfers TIM_DMABURSTLENGTH_2TRANSFERS
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518 #define TIM_DMABurstLength_3Transfers TIM_DMABURSTLENGTH_3TRANSFERS
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|
519 #define TIM_DMABurstLength_4Transfers TIM_DMABURSTLENGTH_4TRANSFERS
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520 #define TIM_DMABurstLength_5Transfers TIM_DMABURSTLENGTH_5TRANSFERS
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521 #define TIM_DMABurstLength_6Transfers TIM_DMABURSTLENGTH_6TRANSFERS
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522 #define TIM_DMABurstLength_7Transfers TIM_DMABURSTLENGTH_7TRANSFERS
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523 #define TIM_DMABurstLength_8Transfers TIM_DMABURSTLENGTH_8TRANSFERS
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524 #define TIM_DMABurstLength_9Transfers TIM_DMABURSTLENGTH_9TRANSFERS
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525 #define TIM_DMABurstLength_10Transfers TIM_DMABURSTLENGTH_10TRANSFERS
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526 #define TIM_DMABurstLength_11Transfers TIM_DMABURSTLENGTH_11TRANSFERS
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527 #define TIM_DMABurstLength_12Transfers TIM_DMABURSTLENGTH_12TRANSFERS
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|
528 #define TIM_DMABurstLength_13Transfers TIM_DMABURSTLENGTH_13TRANSFERS
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529 #define TIM_DMABurstLength_14Transfers TIM_DMABURSTLENGTH_14TRANSFERS
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530 #define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS
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|
531 #define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS
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|
|
532 #define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS
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|
533 #define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS
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534
|
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|
535 /**
|
|
|
536 * @}
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|
|
537 */
|
|
|
538
|
|
|
539 /** @defgroup HAL_UART_Aliased_Defines HAL UART Aliased Defines maintained for legacy purpose
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|
540 * @{
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|
|
541 */
|
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|
542 #define UART_ONEBIT_SAMPLING_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
|
|
|
543 #define UART_ONEBIT_SAMPLING_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
|
|
|
544 #define UART_ONE_BIT_SAMPLE_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
|
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|
545 #define UART_ONE_BIT_SAMPLE_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
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|
|
546
|
|
|
547 #define __HAL_UART_ONEBIT_ENABLE __HAL_UART_ONE_BIT_SAMPLE_ENABLE
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548 #define __HAL_UART_ONEBIT_DISABLE __HAL_UART_ONE_BIT_SAMPLE_DISABLE
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549
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|
550 #define __DIV_SAMPLING16 UART_DIV_SAMPLING16
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|
551 #define __DIVMANT_SAMPLING16 UART_DIVMANT_SAMPLING16
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|
552 #define __DIVFRAQ_SAMPLING16 UART_DIVFRAQ_SAMPLING16
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|
|
553 #define __UART_BRR_SAMPLING16 UART_BRR_SAMPLING16
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554
|
|
|
555 #define __DIV_SAMPLING8 UART_DIV_SAMPLING8
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|
556 #define __DIVMANT_SAMPLING8 UART_DIVMANT_SAMPLING8
|
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|
557 #define __DIVFRAQ_SAMPLING8 UART_DIVFRAQ_SAMPLING8
|
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|
558 #define __UART_BRR_SAMPLING8 UART_BRR_SAMPLING8
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|
559
|
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|
560 #define UART_WAKEUPMETHODE_IDLELINE UART_WAKEUPMETHOD_IDLELINE
|
|
|
561 #define UART_WAKEUPMETHODE_ADDRESSMARK UART_WAKEUPMETHOD_ADDRESSMARK
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|
562
|
|
|
563 /**
|
|
|
564 * @}
|
|
|
565 */
|
|
|
566
|
|
|
567
|
|
|
568 /** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose
|
|
|
569 * @{
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|
|
570 */
|
|
|
571
|
|
|
572 #define USART_CLOCK_DISABLED USART_CLOCK_DISABLE
|
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|
573 #define USART_CLOCK_ENABLED USART_CLOCK_ENABLE
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|
574
|
|
|
575 #define USARTNACK_ENABLED USART_NACK_ENABLE
|
|
|
576 #define USARTNACK_DISABLED USART_NACK_DISABLE
|
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|
577 /**
|
|
|
578 * @}
|
|
|
579 */
|
|
|
580
|
|
|
581 /** @defgroup HAL_WWDG_Aliased_Defines HAL WWDG Aliased Defines maintained for legacy purpose
|
|
|
582 * @{
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|
|
583 */
|
|
|
584 #define CFR_BASE WWDG_CFR_BASE
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|
|
585
|
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|
586 /**
|
|
|
587 * @}
|
|
|
588 */
|
|
|
589
|
|
|
590 /** @defgroup HAL_CAN_Aliased_Defines HAL CAN Aliased Defines maintained for legacy purpose
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|
|
591 * @{
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|
|
592 */
|
|
|
593 #define CAN_FilterFIFO0 CAN_FILTER_FIFO0
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|
594 #define CAN_FilterFIFO1 CAN_FILTER_FIFO1
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|
|
595 #define CAN_IT_RQCP0 CAN_IT_TME
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|
596 #define CAN_IT_RQCP1 CAN_IT_TME
|
|
|
597 #define CAN_IT_RQCP2 CAN_IT_TME
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|
598 #define INAK_TIMEOUT CAN_TIMEOUT_VALUE
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|
599 #define SLAK_TIMEOUT CAN_TIMEOUT_VALUE
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|
|
600 #define CAN_TXSTATUS_FAILED ((uint8_t)0x00)
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|
601 #define CAN_TXSTATUS_OK ((uint8_t)0x01)
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|
602 #define CAN_TXSTATUS_PENDING ((uint8_t)0x02)
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603
|
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|
604 /**
|
|
|
605 * @}
|
|
|
606 */
|
|
|
607
|
|
|
608 /** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose
|
|
|
609 * @{
|
|
|
610 */
|
|
|
611
|
|
|
612 #define VLAN_TAG ETH_VLAN_TAG
|
|
|
613 #define MIN_ETH_PAYLOAD ETH_MIN_ETH_PAYLOAD
|
|
|
614 #define MAX_ETH_PAYLOAD ETH_MAX_ETH_PAYLOAD
|
|
|
615 #define JUMBO_FRAME_PAYLOAD ETH_JUMBO_FRAME_PAYLOAD
|
|
|
616 #define MACMIIAR_CR_MASK ETH_MACMIIAR_CR_MASK
|
|
|
617 #define MACCR_CLEAR_MASK ETH_MACCR_CLEAR_MASK
|
|
|
618 #define MACFCR_CLEAR_MASK ETH_MACFCR_CLEAR_MASK
|
|
|
619 #define DMAOMR_CLEAR_MASK ETH_DMAOMR_CLEAR_MASK
|
|
|
620
|
|
|
621 #define ETH_MMCCR ((uint32_t)0x00000100)
|
|
|
622 #define ETH_MMCRIR ((uint32_t)0x00000104)
|
|
|
623 #define ETH_MMCTIR ((uint32_t)0x00000108)
|
|
|
624 #define ETH_MMCRIMR ((uint32_t)0x0000010C)
|
|
|
625 #define ETH_MMCTIMR ((uint32_t)0x00000110)
|
|
|
626 #define ETH_MMCTGFSCCR ((uint32_t)0x0000014C)
|
|
|
627 #define ETH_MMCTGFMSCCR ((uint32_t)0x00000150)
|
|
|
628 #define ETH_MMCTGFCR ((uint32_t)0x00000168)
|
|
|
629 #define ETH_MMCRFCECR ((uint32_t)0x00000194)
|
|
|
630 #define ETH_MMCRFAECR ((uint32_t)0x00000198)
|
|
|
631 #define ETH_MMCRGUFCR ((uint32_t)0x000001C4)
|
|
|
632
|
|
|
633 /**
|
|
|
634 * @}
|
|
|
635 */
|
|
|
636
|
|
|
637 /** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
|
|
|
638 * @{
|
|
|
639 */
|
|
|
640
|
|
|
641 /**
|
|
|
642 * @}
|
|
|
643 */
|
|
|
644
|
|
|
645 /* Exported functions --------------------------------------------------------*/
|
|
|
646
|
|
|
647 /** @defgroup HAL_CRYP_Aliased_Functions HAL CRYP Aliased Functions maintained for legacy purpose
|
|
|
648 * @{
|
|
|
649 */
|
|
|
650 #define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback
|
|
|
651 /**
|
|
|
652 * @}
|
|
|
653 */
|
|
|
654
|
|
|
655 /** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose
|
|
|
656 * @{
|
|
|
657 */
|
|
|
658
|
|
|
659 #define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish
|
|
|
660 #define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish
|
|
|
661 #define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish
|
|
|
662 #define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish
|
|
|
663
|
|
|
664 /*HASH Algorithm Selection*/
|
|
|
665
|
|
|
666 #define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1
|
|
|
667 #define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224
|
|
|
668 #define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256
|
|
|
669 #define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5
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|
|
670
|
|
|
671 #define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH
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|
|
672 #define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC
|
|
|
673
|
|
|
674 #define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY
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|
|
675 #define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY
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676 /**
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|
|
677 * @}
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|
|
678 */
|
|
|
679
|
|
|
680 /** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose
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|
|
681 * @{
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|
|
682 */
|
|
|
683 #define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode
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|
684 #define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode
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|
|
685 #define HAL_EnableDBGStopMode HAL_DBGMCU_EnableDBGStopMode
|
|
|
686 #define HAL_DisableDBGStopMode HAL_DBGMCU_DisableDBGStopMode
|
|
|
687 #define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode
|
|
|
688 #define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode
|
|
|
689 #define HAL_DBG_LowPowerConfig(Periph, cmd) ((cmd==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
|
|
|
690 #define HAL_VREFINT_OutputSelect HAL_SYSCFG_VREFINT_OutputSelect
|
|
|
691 #define HAL_Lock_Cmd(cmd) ((cmd==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT())
|
|
|
692 #define HAL_VREFINT_Cmd(cmd) ((cmd==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT())
|
|
|
693 #define HAL_ADC_EnableBuffer_Cmd(cmd) ((cmd==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
|
|
|
694 #define HAL_ADC_EnableBufferSensor_Cmd(cmd) ((cmd==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
|
|
|
695 /**
|
|
|
696 * @}
|
|
|
697 */
|
|
|
698
|
|
|
699 /** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose
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|
|
700 * @{
|
|
|
701 */
|
|
|
702 #define FLASH_HalfPageProgram HAL_FLASHEx_HalfPageProgram
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|
|
703 #define FLASH_EnableRunPowerDown HAL_FLASHEx_EnableRunPowerDown
|
|
|
704 #define FLASH_DisableRunPowerDown HAL_FLASHEx_DisableRunPowerDown
|
|
|
705 #define HAL_DATA_EEPROMEx_Unlock HAL_FLASHEx_DATAEEPROM_Unlock
|
|
|
706 #define HAL_DATA_EEPROMEx_Lock HAL_FLASHEx_DATAEEPROM_Lock
|
|
|
707 #define HAL_DATA_EEPROMEx_Erase HAL_FLASHEx_DATAEEPROM_Erase
|
|
|
708 #define HAL_DATA_EEPROMEx_Program HAL_FLASHEx_DATAEEPROM_Program
|
|
|
709
|
|
|
710 /**
|
|
|
711 * @}
|
|
|
712 */
|
|
|
713
|
|
|
714 /** @defgroup HAL_I2C_Aliased_Functions HAL I2C Aliased Functions maintained for legacy purpose
|
|
|
715 * @{
|
|
|
716 */
|
|
|
717 #define HAL_I2CEx_AnalogFilter_Config HAL_I2CEx_ConfigAnalogFilter
|
|
|
718 #define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter
|
|
|
719
|
|
|
720 #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) ((cmd==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
|
|
|
721 /**
|
|
|
722 * @}
|
|
|
723 */
|
|
|
724
|
|
|
725 /** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose
|
|
|
726 * @{
|
|
|
727 */
|
|
|
728 #define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD
|
|
|
729 #define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg
|
|
|
730 #define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown
|
|
|
731 #define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor
|
|
|
732 #define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg
|
|
|
733 #define HAL_PWR_EnableFlashPowerDown HAL_PWREx_EnableFlashPowerDown
|
|
|
734 #define HAL_PWR_EnableVddio2Monitor HAL_PWREx_EnableVddio2Monitor
|
|
|
735 #define HAL_PWR_PVD_PVM_IRQHandler HAL_PWREx_PVD_PVM_IRQHandler
|
|
|
736 #define HAL_PWR_PVDLevelConfig HAL_PWR_ConfigPVD
|
|
|
737 #define HAL_PWR_Vddio2Monitor_IRQHandler HAL_PWREx_Vddio2Monitor_IRQHandler
|
|
|
738 #define HAL_PWR_Vddio2MonitorCallback HAL_PWREx_Vddio2MonitorCallback
|
|
|
739 #define HAL_PWREx_ActivateOverDrive HAL_PWREx_EnableOverDrive
|
|
|
740 #define HAL_PWREx_DeactivateOverDrive HAL_PWREx_DisableOverDrive
|
|
|
741 #define HAL_PWREx_DisableSDADCAnalog HAL_PWREx_DisableSDADC
|
|
|
742 #define HAL_PWREx_EnableSDADCAnalog HAL_PWREx_EnableSDADC
|
|
|
743 #define HAL_PWREx_PVMConfig HAL_PWREx_ConfigPVM
|
|
|
744
|
|
|
745 #define PWR_MODE_NORMAL PWR_PVD_MODE_NORMAL
|
|
|
746 #define PWR_MODE_IT_RISING PWR_PVD_MODE_IT_RISING
|
|
|
747 #define PWR_MODE_IT_FALLING PWR_PVD_MODE_IT_FALLING
|
|
|
748 #define PWR_MODE_IT_RISING_FALLING PWR_PVD_MODE_IT_RISING_FALLING
|
|
|
749 #define PWR_MODE_EVENT_RISING PWR_PVD_MODE_EVENT_RISING
|
|
|
750 #define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING
|
|
|
751 #define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING
|
|
|
752
|
|
|
753 #define CR_OFFSET_BB PWR_CR_OFFSET_BB
|
|
|
754 #define CSR_OFFSET_BB PWR_CSR_OFFSET_BB
|
|
|
755
|
|
|
756 #define DBP_BitNumber DBP_BIT_NUMBER
|
|
|
757 #define PVDE_BitNumber PVDE_BIT_NUMBER
|
|
|
758 #define PMODE_BitNumber PMODE_BIT_NUMBER
|
|
|
759 #define EWUP_BitNumber EWUP_BIT_NUMBER
|
|
|
760 #define FPDS_BitNumber FPDS_BIT_NUMBER
|
|
|
761 #define ODEN_BitNumber ODEN_BIT_NUMBER
|
|
|
762 #define ODSWEN_BitNumber ODSWEN_BIT_NUMBER
|
|
|
763 #define MRLVDS_BitNumber MRLVDS_BIT_NUMBER
|
|
|
764 #define LPLVDS_BitNumber LPLVDS_BIT_NUMBER
|
|
|
765 #define BRE_BitNumber BRE_BIT_NUMBER
|
|
|
766
|
|
|
767 #define PWR_MODE_EVT PWR_PVD_MODE_NORMAL
|
|
|
768
|
|
|
769 /**
|
|
|
770 * @}
|
|
|
771 */
|
|
|
772
|
|
|
773 /** @defgroup HAL_RCC_Aliased_Functions HAL RCC Aliased Functions maintained for legacy purpose
|
|
|
774 * @{
|
|
|
775 */
|
|
|
776 #define HAL_RCC_CCSCallback HAL_RCC_CSSCallback
|
|
|
777 #define HAL_RC48_EnableBuffer_Cmd(cmd) ((cmd==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
|
|
|
778
|
|
|
779 /**
|
|
|
780 * @}
|
|
|
781 */
|
|
|
782
|
|
|
783 /** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose
|
|
|
784 * @{
|
|
|
785 */
|
|
|
786 #define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT
|
|
|
787 #define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback
|
|
|
788 #define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback
|
|
|
789 /**
|
|
|
790 * @}
|
|
|
791 */
|
|
|
792
|
|
|
793 /** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose
|
|
|
794 * @{
|
|
|
795 */
|
|
|
796 #define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo
|
|
|
797 /**
|
|
|
798 * @}
|
|
|
799 */
|
|
|
800
|
|
|
801 /** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose
|
|
|
802 * @{
|
|
|
803 */
|
|
|
804 #define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt
|
|
|
805 #define HAL_TIM_DMAError TIM_DMAError
|
|
|
806 #define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt
|
|
|
807 #define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt
|
|
|
808 /**
|
|
|
809 * @}
|
|
|
810 */
|
|
|
811
|
|
|
812 /** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose
|
|
|
813 * @{
|
|
|
814 */
|
|
|
815 #define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback
|
|
|
816 /**
|
|
|
817 * @}
|
|
|
818 */
|
|
|
819
|
|
|
820
|
|
|
821 /** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose
|
|
|
822 * @{
|
|
|
823 */
|
|
|
824
|
|
|
825 /**
|
|
|
826 * @}
|
|
|
827 */
|
|
|
828
|
|
|
829 /* Exported macros ------------------------------------------------------------*/
|
|
|
830
|
|
|
831 /** @defgroup HAL_AES_Aliased_Macros HAL CRYP Aliased Macros maintained for legacy purpose
|
|
|
832 * @{
|
|
|
833 */
|
|
|
834 #define AES_IT_CC CRYP_IT_CC
|
|
|
835 #define AES_IT_ERR CRYP_IT_ERR
|
|
|
836 #define AES_FLAG_CCF CRYP_FLAG_CCF
|
|
|
837 /**
|
|
|
838 * @}
|
|
|
839 */
|
|
|
840
|
|
|
841 /** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
|
|
|
842 * @{
|
|
|
843 */
|
|
|
844 #define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE
|
|
|
845 #define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH
|
|
|
846 #define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH
|
|
|
847 #define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM
|
|
|
848 #define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC
|
|
|
849 #define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM
|
|
|
850 #define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK
|
|
|
851 #define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG
|
|
|
852 #define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG
|
|
|
853 #define SYSCFG_FLAG_VREF_READY SYSCFG_FLAG_VREFINT_READY
|
|
|
854 #define SYSCFG_FLAG_RC48 RCC_FLAG_HSI48
|
|
|
855 #define IS_SYSCFG_FASTMODEPLUS_CONFIG IS_I2C_FASTMODEPLUS
|
|
|
856 #define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER
|
|
|
857 #define CMP_PD_BitNumber CMP_PD_BIT_NUMBER
|
|
|
858
|
|
|
859 /**
|
|
|
860 * @}
|
|
|
861 */
|
|
|
862
|
|
|
863
|
|
|
864 /** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose
|
|
|
865 * @{
|
|
|
866 */
|
|
|
867 #define __ADC_ENABLE __HAL_ADC_ENABLE
|
|
|
868 #define __ADC_DISABLE __HAL_ADC_DISABLE
|
|
|
869 #define __HAL_ADC_ENABLING_CONDITIONS ADC_ENABLING_CONDITIONS
|
|
|
870 #define __HAL_ADC_DISABLING_CONDITIONS ADC_DISABLING_CONDITIONS
|
|
|
871 #define __HAL_ADC_IS_ENABLED ADC_IS_ENABLE
|
|
|
872 #define __ADC_IS_ENABLED ADC_IS_ENABLE
|
|
|
873 #define __HAL_ADC_IS_SOFTWARE_START_REGULAR ADC_IS_SOFTWARE_START_REGULAR
|
|
|
874 #define __HAL_ADC_IS_SOFTWARE_START_INJECTED ADC_IS_SOFTWARE_START_INJECTED
|
|
|
875 #define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED
|
|
|
876 #define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR ADC_IS_CONVERSION_ONGOING_REGULAR
|
|
|
877 #define __HAL_ADC_IS_CONVERSION_ONGOING_INJECTED ADC_IS_CONVERSION_ONGOING_INJECTED
|
|
|
878 #define __HAL_ADC_IS_CONVERSION_ONGOING ADC_IS_CONVERSION_ONGOING
|
|
|
879 #define __HAL_ADC_CLEAR_ERRORCODE ADC_CLEAR_ERRORCODE
|
|
|
880
|
|
|
881 #define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
|
|
|
882 #define __HAL_ADC_JSQR_RK ADC_JSQR_RK
|
|
|
883 #define __HAL_ADC_CFGR_AWD1CH ADC_CFGR_AWD1CH_SHIFT
|
|
|
884 #define __HAL_ADC_CFGR_AWD23CR ADC_CFGR_AWD23CR
|
|
|
885 #define __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION ADC_CFGR_INJECT_AUTO_CONVERSION
|
|
|
886 #define __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE ADC_CFGR_INJECT_CONTEXT_QUEUE
|
|
|
887 #define __HAL_ADC_CFGR_INJECT_DISCCONTINUOUS ADC_CFGR_INJECT_DISCCONTINUOUS
|
|
|
888 #define __HAL_ADC_CFGR_REG_DISCCONTINUOUS ADC_CFGR_REG_DISCCONTINUOUS
|
|
|
889 #define __HAL_ADC_CFGR_DISCONTINUOUS_NUM ADC_CFGR_DISCONTINUOUS_NUM
|
|
|
890 #define __HAL_ADC_CFGR_AUTOWAIT ADC_CFGR_AUTOWAIT
|
|
|
891 #define __HAL_ADC_CFGR_CONTINUOUS ADC_CFGR_CONTINUOUS
|
|
|
892 #define __HAL_ADC_CFGR_OVERRUN ADC_CFGR_OVERRUN
|
|
|
893 #define __HAL_ADC_CFGR_DMACONTREQ ADC_CFGR_DMACONTREQ
|
|
|
894 #define __HAL_ADC_CFGR_EXTSEL ADC_CFGR_EXTSEL_SET
|
|
|
895 #define __HAL_ADC_JSQR_JEXTSEL ADC_JSQR_JEXTSEL_SET
|
|
|
896 #define __HAL_ADC_OFR_CHANNEL ADC_OFR_CHANNEL
|
|
|
897 #define __HAL_ADC_DIFSEL_CHANNEL ADC_DIFSEL_CHANNEL
|
|
|
898 #define __HAL_ADC_CALFACT_DIFF_SET ADC_CALFACT_DIFF_SET
|
|
|
899 #define __HAL_ADC_CALFACT_DIFF_GET ADC_CALFACT_DIFF_GET
|
|
|
900 #define __HAL_ADC_TRX_HIGHTHRESHOLD ADC_TRX_HIGHTHRESHOLD
|
|
|
901
|
|
|
902 #define __HAL_ADC_OFFSET_SHIFT_RESOLUTION ADC_OFFSET_SHIFT_RESOLUTION
|
|
|
903 #define __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION ADC_AWD1THRESHOLD_SHIFT_RESOLUTION
|
|
|
904 #define __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION ADC_AWD23THRESHOLD_SHIFT_RESOLUTION
|
|
|
905 #define __HAL_ADC_COMMON_REGISTER ADC_COMMON_REGISTER
|
|
|
906 #define __HAL_ADC_COMMON_CCR_MULTI ADC_COMMON_CCR_MULTI
|
|
|
907 #define __HAL_ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
|
|
|
908 #define __ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
|
|
|
909 #define __HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER ADC_NONMULTIMODE_OR_MULTIMODEMASTER
|
|
|
910 #define __HAL_ADC_COMMON_ADC_OTHER ADC_COMMON_ADC_OTHER
|
|
|
911 #define __HAL_ADC_MULTI_SLAVE ADC_MULTI_SLAVE
|
|
|
912
|
|
|
913 #define __HAL_ADC_SQR1_L ADC_SQR1_L_SHIFT
|
|
|
914 #define __HAL_ADC_JSQR_JL ADC_JSQR_JL_SHIFT
|
|
|
915 #define __HAL_ADC_JSQR_RK_JL ADC_JSQR_RK_JL
|
|
|
916 #define __HAL_ADC_CR1_DISCONTINUOUS_NUM ADC_CR1_DISCONTINUOUS_NUM
|
|
|
917 #define __HAL_ADC_CR1_SCAN ADC_CR1_SCAN_SET
|
|
|
918 #define __HAL_ADC_CONVCYCLES_MAX_RANGE ADC_CONVCYCLES_MAX_RANGE
|
|
|
919 #define __HAL_ADC_CLOCK_PRESCALER_RANGE ADC_CLOCK_PRESCALER_RANGE
|
|
|
920 #define __HAL_ADC_GET_CLOCK_PRESCALER ADC_GET_CLOCK_PRESCALER
|
|
|
921
|
|
|
922 #define __HAL_ADC_SQR1 ADC_SQR1
|
|
|
923 #define __HAL_ADC_SMPR1 ADC_SMPR1
|
|
|
924 #define __HAL_ADC_SMPR2 ADC_SMPR2
|
|
|
925 #define __HAL_ADC_SQR3_RK ADC_SQR3_RK
|
|
|
926 #define __HAL_ADC_SQR2_RK ADC_SQR2_RK
|
|
|
927 #define __HAL_ADC_SQR1_RK ADC_SQR1_RK
|
|
|
928 #define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS
|
|
|
929 #define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS
|
|
|
930 #define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV
|
|
|
931 #define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection
|
|
|
932 #define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq
|
|
|
933 #define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
|
|
|
934 #define __HAL_ADC_JSQR ADC_JSQR
|
|
|
935
|
|
|
936 #define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL
|
|
|
937 #define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS
|
|
|
938 #define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF
|
|
|
939 #define __HAL_ADC_CFGR1_AUTOWAIT ADC_CFGR1_AUTOWAIT
|
|
|
940 #define __HAL_ADC_CFGR1_CONTINUOUS ADC_CFGR1_CONTINUOUS
|
|
|
941 #define __HAL_ADC_CFGR1_OVERRUN ADC_CFGR1_OVERRUN
|
|
|
942 #define __HAL_ADC_CFGR1_SCANDIR ADC_CFGR1_SCANDIR
|
|
|
943 #define __HAL_ADC_CFGR1_DMACONTREQ ADC_CFGR1_DMACONTREQ
|
|
|
944
|
|
|
945 /**
|
|
|
946 * @}
|
|
|
947 */
|
|
|
948
|
|
|
949 /** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
|
|
|
950 * @{
|
|
|
951 */
|
|
|
952 #define __HAL_DHR12R1_ALIGNEMENT DAC_DHR12R1_ALIGNMENT
|
|
|
953 #define __HAL_DHR12R2_ALIGNEMENT DAC_DHR12R2_ALIGNMENT
|
|
|
954 #define __HAL_DHR12RD_ALIGNEMENT DAC_DHR12RD_ALIGNMENT
|
|
|
955
|
|
|
956 /**
|
|
|
957 * @}
|
|
|
958 */
|
|
|
959
|
|
|
960 /** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose
|
|
|
961 * @{
|
|
|
962 */
|
|
|
963 #define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1
|
|
|
964 #define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1
|
|
|
965 #define __HAL_FREEZE_TIM2_DBGMCU __HAL_DBGMCU_FREEZE_TIM2
|
|
|
966 #define __HAL_UNFREEZE_TIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM2
|
|
|
967 #define __HAL_FREEZE_TIM3_DBGMCU __HAL_DBGMCU_FREEZE_TIM3
|
|
|
968 #define __HAL_UNFREEZE_TIM3_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM3
|
|
|
969 #define __HAL_FREEZE_TIM4_DBGMCU __HAL_DBGMCU_FREEZE_TIM4
|
|
|
970 #define __HAL_UNFREEZE_TIM4_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM4
|
|
|
971 #define __HAL_FREEZE_TIM5_DBGMCU __HAL_DBGMCU_FREEZE_TIM5
|
|
|
972 #define __HAL_UNFREEZE_TIM5_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM5
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|
|
973 #define __HAL_FREEZE_TIM6_DBGMCU __HAL_DBGMCU_FREEZE_TIM6
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|
|
974 #define __HAL_UNFREEZE_TIM6_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM6
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|
|
975 #define __HAL_FREEZE_TIM7_DBGMCU __HAL_DBGMCU_FREEZE_TIM7
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|
|
976 #define __HAL_UNFREEZE_TIM7_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM7
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|
|
977 #define __HAL_FREEZE_TIM8_DBGMCU __HAL_DBGMCU_FREEZE_TIM8
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|
|
978 #define __HAL_UNFREEZE_TIM8_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM8
|
|
|
979
|
|
|
980 #define __HAL_FREEZE_TIM9_DBGMCU __HAL_DBGMCU_FREEZE_TIM9
|
|
|
981 #define __HAL_UNFREEZE_TIM9_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM9
|
|
|
982 #define __HAL_FREEZE_TIM10_DBGMCU __HAL_DBGMCU_FREEZE_TIM10
|
|
|
983 #define __HAL_UNFREEZE_TIM10_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM10
|
|
|
984 #define __HAL_FREEZE_TIM11_DBGMCU __HAL_DBGMCU_FREEZE_TIM11
|
|
|
985 #define __HAL_UNFREEZE_TIM11_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM11
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|
|
986 #define __HAL_FREEZE_TIM12_DBGMCU __HAL_DBGMCU_FREEZE_TIM12
|
|
|
987 #define __HAL_UNFREEZE_TIM12_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM12
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|
|
988 #define __HAL_FREEZE_TIM13_DBGMCU __HAL_DBGMCU_FREEZE_TIM13
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|
|
989 #define __HAL_UNFREEZE_TIM13_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM13
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|
|
990 #define __HAL_FREEZE_TIM14_DBGMCU __HAL_DBGMCU_FREEZE_TIM14
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|
|
991 #define __HAL_UNFREEZE_TIM14_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM14
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|
|
992 #define __HAL_FREEZE_CAN2_DBGMCU __HAL_DBGMCU_FREEZE_CAN2
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|
|
993 #define __HAL_UNFREEZE_CAN2_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN2
|
|
|
994
|
|
|
995
|
|
|
996 #define __HAL_FREEZE_TIM15_DBGMCU __HAL_DBGMCU_FREEZE_TIM15
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|
|
997 #define __HAL_UNFREEZE_TIM15_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM15
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|
|
998 #define __HAL_FREEZE_TIM16_DBGMCU __HAL_DBGMCU_FREEZE_TIM16
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|
|
999 #define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16
|
|
|
1000 #define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17
|
|
|
1001 #define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17
|
|
|
1002 #define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC
|
|
|
1003 #define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC
|
|
|
1004 #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG
|
|
|
1005 #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG
|
|
|
1006 #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG
|
|
|
1007 #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG
|
|
|
1008 #define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT
|
|
|
1009 #define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT
|
|
|
1010 #define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT
|
|
|
1011 #define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT
|
|
|
1012 #define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT
|
|
|
1013 #define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT
|
|
|
1014 #define __HAL_FREEZE_CAN1_DBGMCU __HAL_DBGMCU_FREEZE_CAN1
|
|
|
1015 #define __HAL_UNFREEZE_CAN1_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN1
|
|
|
1016 #define __HAL_FREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM1
|
|
|
1017 #define __HAL_UNFREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM1
|
|
|
1018 #define __HAL_FREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM2
|
|
|
1019 #define __HAL_UNFREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM2
|
|
|
1020
|
|
|
1021 /**
|
|
|
1022 * @}
|
|
|
1023 */
|
|
|
1024
|
|
|
1025 /** @defgroup HAL_COMP_Aliased_Macros HAL COMP Aliased Macros maintained for legacy purpose
|
|
|
1026 * @{
|
|
|
1027 */
|
|
|
1028
|
|
|
1029 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
|
|
|
1030 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
|
|
|
1031 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
|
|
|
1032 __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
|
|
|
1033 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
|
|
|
1034 __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
|
|
|
1035 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
|
|
|
1036 __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
|
|
|
1037 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
|
|
|
1038 __HAL_COMP_COMP2_EXTI_ENABLE_IT())
|
|
|
1039 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
|
|
|
1040 __HAL_COMP_COMP2_EXTI_DISABLE_IT())
|
|
|
1041 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
|
|
|
1042 __HAL_COMP_COMP2_EXTI_GET_FLAG())
|
|
|
1043 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
|
|
|
1044 __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
|
|
|
1045 #define __HAL_COMP_GET_EXTI_LINE COMP_GET_EXTI_LINE
|
|
|
1046
|
|
|
1047 /**
|
|
|
1048 * @}
|
|
|
1049 */
|
|
|
1050
|
|
|
1051 /** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose
|
|
|
1052 * @{
|
|
|
1053 */
|
|
|
1054
|
|
|
1055 #define IS_WRPAREA IS_OB_WRPAREA
|
|
|
1056 #define IS_TYPEPROGRAM IS_FLASH_TYPEPROGRAM
|
|
|
1057 #define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM
|
|
|
1058 #define IS_TYPEERASE IS_FLASH_TYPEERASE
|
|
|
1059
|
|
|
1060 /**
|
|
|
1061 * @}
|
|
|
1062 */
|
|
|
1063
|
|
|
1064 /** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose
|
|
|
1065 * @{
|
|
|
1066 */
|
|
|
1067
|
|
|
1068 #define __HAL_I2C_RESET_CR2 I2C_RESET_CR2
|
|
|
1069 #define __HAL_I2C_GENERATE_START I2C_GENERATE_START
|
|
|
1070 #define __HAL_I2C_FREQ_RANGE I2C_FREQ_RANGE
|
|
|
1071 #define __HAL_I2C_RISE_TIME I2C_RISE_TIME
|
|
|
1072 #define __HAL_I2C_SPEED_STANDARD I2C_SPEED_STANDARD
|
|
|
1073 #define __HAL_I2C_SPEED_FAST I2C_SPEED_FAST
|
|
|
1074 #define __HAL_I2C_SPEED I2C_SPEED
|
|
|
1075 #define __HAL_I2C_7BIT_ADD_WRITE I2C_7BIT_ADD_WRITE
|
|
|
1076 #define __HAL_I2C_7BIT_ADD_READ I2C_7BIT_ADD_READ
|
|
|
1077 #define __HAL_I2C_10BIT_ADDRESS I2C_10BIT_ADDRESS
|
|
|
1078 #define __HAL_I2C_10BIT_HEADER_WRITE I2C_10BIT_HEADER_WRITE
|
|
|
1079 #define __HAL_I2C_10BIT_HEADER_READ I2C_10BIT_HEADER_READ
|
|
|
1080 #define __HAL_I2C_MEM_ADD_MSB I2C_MEM_ADD_MSB
|
|
|
1081 #define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB
|
|
|
1082 #define __HAL_I2C_FREQRANGE I2C_FREQRANGE
|
|
|
1083 /**
|
|
|
1084 * @}
|
|
|
1085 */
|
|
|
1086
|
|
|
1087 /** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose
|
|
|
1088 * @{
|
|
|
1089 */
|
|
|
1090 /* hw
|
|
|
1091 #define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE
|
|
|
1092 #define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT
|
|
|
1093 */
|
|
|
1094 /**
|
|
|
1095 * @}
|
|
|
1096 */
|
|
|
1097
|
|
|
1098 /** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose
|
|
|
1099 * @{
|
|
|
1100 */
|
|
|
1101
|
|
|
1102 #define __IRDA_DISABLE __HAL_IRDA_DISABLE
|
|
|
1103 #define __IRDA_ENABLE __HAL_IRDA_ENABLE
|
|
|
1104
|
|
|
1105 #define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
|
|
|
1106 #define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
|
|
|
1107 #define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
|
|
|
1108 #define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
|
|
|
1109
|
|
|
1110 #define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE
|
|
|
1111
|
|
|
1112
|
|
|
1113 /**
|
|
|
1114 * @}
|
|
|
1115 */
|
|
|
1116
|
|
|
1117
|
|
|
1118 /** @defgroup HAL_IWDG_Aliased_Macros HAL IWDG Aliased Macros maintained for legacy purpose
|
|
|
1119 * @{
|
|
|
1120 */
|
|
|
1121 #define __HAL_IWDG_ENABLE_WRITE_ACCESS IWDG_ENABLE_WRITE_ACCESS
|
|
|
1122 #define __HAL_IWDG_DISABLE_WRITE_ACCESS IWDG_DISABLE_WRITE_ACCESS
|
|
|
1123 /**
|
|
|
1124 * @}
|
|
|
1125 */
|
|
|
1126
|
|
|
1127
|
|
|
1128 /** @defgroup HAL_LPTIM_Aliased_Macros HAL LPTIM Aliased Macros maintained for legacy purpose
|
|
|
1129 * @{
|
|
|
1130 */
|
|
|
1131
|
|
|
1132 #define __HAL_LPTIM_ENABLE_INTERRUPT __HAL_LPTIM_ENABLE_IT
|
|
|
1133 #define __HAL_LPTIM_DISABLE_INTERRUPT __HAL_LPTIM_DISABLE_IT
|
|
|
1134 #define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE
|
|
|
1135
|
|
|
1136 /**
|
|
|
1137 * @}
|
|
|
1138 */
|
|
|
1139
|
|
|
1140 /** @defgroup HAL_PWR_Aliased_Macros HAL PWR Aliased Macros maintained for legacy purpose
|
|
|
1141 * @{
|
|
|
1142 */
|
|
|
1143 #define __HAL_PVD_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
|
|
|
1144 #define __HAL_PVD_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
|
|
|
1145 #define __HAL_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
|
|
|
1146 #define __HAL_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
|
|
|
1147 #define __HAL_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
|
|
|
1148 #define __HAL_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
|
|
|
1149 #define __HAL_PVM_EVENT_DISABLE __HAL_PWR_PVM_EVENT_DISABLE
|
|
|
1150 #define __HAL_PVM_EVENT_ENABLE __HAL_PWR_PVM_EVENT_ENABLE
|
|
|
1151 #define __HAL_PVM_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_DISABLE
|
|
|
1152 #define __HAL_PVM_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_ENABLE
|
|
|
1153 #define __HAL_PVM_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_DISABLE
|
|
|
1154 #define __HAL_PVM_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_ENABLE
|
|
|
1155 #define __HAL_PWR_INTERNALWAKEUP_DISABLE HAL_PWREx_DisableInternalWakeUpLine
|
|
|
1156 #define __HAL_PWR_INTERNALWAKEUP_ENABLE HAL_PWREx_EnableInternalWakeUpLine
|
|
|
1157 #define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE HAL_PWREx_DisablePullUpPullDownConfig
|
|
|
1158 #define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE HAL_PWREx_EnablePullUpPullDownConfig
|
|
|
1159 #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE()
|
|
|
1160 #define __HAL_PWR_PVD_EXTI_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
|
|
|
1161 #define __HAL_PWR_PVD_EXTI_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
|
|
|
1162 #define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
|
|
|
1163 #define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
|
|
|
1164 #define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
|
|
|
1165 #define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
|
|
|
1166 #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
|
|
|
1167 #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
|
|
|
1168 #define __HAL_PWR_PVM_DISABLE() HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4()
|
|
|
1169 #define __HAL_PWR_PVM_ENABLE() HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4()
|
|
|
1170 #define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE HAL_PWREx_DisableSRAM2ContentRetention
|
|
|
1171 #define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE HAL_PWREx_EnableSRAM2ContentRetention
|
|
|
1172 #define __HAL_PWR_VDDIO2_DISABLE HAL_PWREx_DisableVddIO2
|
|
|
1173 #define __HAL_PWR_VDDIO2_ENABLE HAL_PWREx_EnableVddIO2
|
|
|
1174 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE
|
|
|
1175 #define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE
|
|
|
1176 #define __HAL_PWR_VDDUSB_DISABLE HAL_PWREx_DisableVddUSB
|
|
|
1177 #define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB
|
|
|
1178
|
|
|
1179 #if defined (STM32F4)
|
|
|
1180 #define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT()
|
|
|
1181 #define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT()
|
|
|
1182 #define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG()
|
|
|
1183 #define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG()
|
|
|
1184 #define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT()
|
|
|
1185 #else
|
|
|
1186 #define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG
|
|
|
1187 #define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT
|
|
|
1188 #define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT
|
|
|
1189 #define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT
|
|
|
1190 #define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG
|
|
|
1191 #endif /* STM32F4 */
|
|
|
1192 /**
|
|
|
1193 * @}
|
|
|
1194 */
|
|
|
1195
|
|
|
1196
|
|
|
1197 /** @defgroup HAL_RCC_Aliased_Macros HAL RCC Aliased Macros maintained for legacy purpose
|
|
|
1198 * @{
|
|
|
1199 */
|
|
|
1200 #define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE
|
|
|
1201 #define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE
|
|
|
1202 #define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE
|
|
|
1203 #define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE
|
|
|
1204 #define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET
|
|
|
1205 #define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET
|
|
|
1206 #define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE
|
|
|
1207 #define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE
|
|
|
1208 #define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET
|
|
|
1209 #define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET
|
|
|
1210 #define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE
|
|
|
1211 #define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE
|
|
|
1212 #define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET
|
|
|
1213 #define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET
|
|
|
1214 #define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE
|
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1215 #define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE
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1216 #define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET
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1217 #define __ADC3_RELEASE_RESET __HAL_RCC_ADC3_RELEASE_RESET
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1218 #define __AES_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
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1219 #define __AES_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
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1220 #define __AES_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE
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1221 #define __AES_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE
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1222 #define __AES_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
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1223 #define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
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1224 #define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE
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1225 #define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE
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1226 #define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE
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1227 #define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE
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1228 #define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
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1229 #define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET
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1230 #define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE
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1231 #define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE
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1232 #define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET
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1233 #define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET
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1234 #define __AHB_FORCE_RESET __HAL_RCC_AHB_FORCE_RESET
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1235 #define __AHB_RELEASE_RESET __HAL_RCC_AHB_RELEASE_RESET
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1236 #define __AHB1_FORCE_RESET __HAL_RCC_AHB1_FORCE_RESET
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1237 #define __AHB1_RELEASE_RESET __HAL_RCC_AHB1_RELEASE_RESET
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1238 #define __AHB2_FORCE_RESET __HAL_RCC_AHB2_FORCE_RESET
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1239 #define __AHB2_RELEASE_RESET __HAL_RCC_AHB2_RELEASE_RESET
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1240 #define __AHB3_FORCE_RESET __HAL_RCC_AHB3_FORCE_RESET
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1241 #define __AHB3_RELEASE_RESET __HAL_RCC_AHB3_RELEASE_RESET
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1242 #define __APB1_FORCE_RESET __HAL_RCC_APB1_FORCE_RESET
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1243 #define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
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1244 #define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
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1245 #define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
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1246 #define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
|
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|
1247 #define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
|
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1248 #define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
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|
1249 #define __BKP_RELEASE_RESET __HAL_RCC_BKP_RELEASE_RESET
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1250 #define __CAN1_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
|
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|
1251 #define __CAN1_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
|
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1252 #define __CAN1_CLK_SLEEP_DISABLE __HAL_RCC_CAN1_CLK_SLEEP_DISABLE
|
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|
1253 #define __CAN1_CLK_SLEEP_ENABLE __HAL_RCC_CAN1_CLK_SLEEP_ENABLE
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|
1254 #define __CAN1_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
|
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1255 #define __CAN1_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
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1256 #define __CAN2_CLK_DISABLE __HAL_RCC_CAN2_CLK_DISABLE
|
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|
1257 #define __CAN2_CLK_ENABLE __HAL_RCC_CAN2_CLK_ENABLE
|
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|
1258 #define __CAN2_FORCE_RESET __HAL_RCC_CAN2_FORCE_RESET
|
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1259 #define __CAN2_RELEASE_RESET __HAL_RCC_CAN2_RELEASE_RESET
|
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|
1260 #define __CEC_CLK_DISABLE __HAL_RCC_CEC_CLK_DISABLE
|
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1261 #define __CEC_CLK_ENABLE __HAL_RCC_CEC_CLK_ENABLE
|
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1262 #define __CEC_FORCE_RESET __HAL_RCC_CEC_FORCE_RESET
|
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1263 #define __CEC_RELEASE_RESET __HAL_RCC_CEC_RELEASE_RESET
|
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|
1264 #define __CRC_CLK_DISABLE __HAL_RCC_CRC_CLK_DISABLE
|
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|
1265 #define __CRC_CLK_ENABLE __HAL_RCC_CRC_CLK_ENABLE
|
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1266 #define __CRC_CLK_SLEEP_DISABLE __HAL_RCC_CRC_CLK_SLEEP_DISABLE
|
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|
1267 #define __CRC_CLK_SLEEP_ENABLE __HAL_RCC_CRC_CLK_SLEEP_ENABLE
|
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|
1268 #define __CRC_FORCE_RESET __HAL_RCC_CRC_FORCE_RESET
|
|
|
1269 #define __CRC_RELEASE_RESET __HAL_RCC_CRC_RELEASE_RESET
|
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|
1270 #define __DAC_CLK_DISABLE __HAL_RCC_DAC_CLK_DISABLE
|
|
|
1271 #define __DAC_CLK_ENABLE __HAL_RCC_DAC_CLK_ENABLE
|
|
|
1272 #define __DAC_FORCE_RESET __HAL_RCC_DAC_FORCE_RESET
|
|
|
1273 #define __DAC_RELEASE_RESET __HAL_RCC_DAC_RELEASE_RESET
|
|
|
1274 #define __DAC1_CLK_DISABLE __HAL_RCC_DAC1_CLK_DISABLE
|
|
|
1275 #define __DAC1_CLK_ENABLE __HAL_RCC_DAC1_CLK_ENABLE
|
|
|
1276 #define __DAC1_CLK_SLEEP_DISABLE __HAL_RCC_DAC1_CLK_SLEEP_DISABLE
|
|
|
1277 #define __DAC1_CLK_SLEEP_ENABLE __HAL_RCC_DAC1_CLK_SLEEP_ENABLE
|
|
|
1278 #define __DAC1_FORCE_RESET __HAL_RCC_DAC1_FORCE_RESET
|
|
|
1279 #define __DAC1_RELEASE_RESET __HAL_RCC_DAC1_RELEASE_RESET
|
|
|
1280 #define __DFSDM_CLK_DISABLE __HAL_RCC_DFSDM_CLK_DISABLE
|
|
|
1281 #define __DFSDM_CLK_ENABLE __HAL_RCC_DFSDM_CLK_ENABLE
|
|
|
1282 #define __DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE
|
|
|
1283 #define __DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE
|
|
|
1284 #define __DFSDM_FORCE_RESET __HAL_RCC_DFSDM_FORCE_RESET
|
|
|
1285 #define __DFSDM_RELEASE_RESET __HAL_RCC_DFSDM_RELEASE_RESET
|
|
|
1286 #define __DMA1_CLK_DISABLE __HAL_RCC_DMA1_CLK_DISABLE
|
|
|
1287 #define __DMA1_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE
|
|
|
1288 #define __DMA1_CLK_SLEEP_DISABLE __HAL_RCC_DMA1_CLK_SLEEP_DISABLE
|
|
|
1289 #define __DMA1_CLK_SLEEP_ENABLE __HAL_RCC_DMA1_CLK_SLEEP_ENABLE
|
|
|
1290 #define __DMA1_FORCE_RESET __HAL_RCC_DMA1_FORCE_RESET
|
|
|
1291 #define __DMA1_RELEASE_RESET __HAL_RCC_DMA1_RELEASE_RESET
|
|
|
1292 #define __DMA2_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
|
|
|
1293 #define __DMA2_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
|
|
|
1294 #define __DMA2_CLK_SLEEP_DISABLE __HAL_RCC_DMA2_CLK_SLEEP_DISABLE
|
|
|
1295 #define __DMA2_CLK_SLEEP_ENABLE __HAL_RCC_DMA2_CLK_SLEEP_ENABLE
|
|
|
1296 #define __DMA2_FORCE_RESET __HAL_RCC_DMA2_FORCE_RESET
|
|
|
1297 #define __DMA2_RELEASE_RESET __HAL_RCC_DMA2_RELEASE_RESET
|
|
|
1298 #define __ETHMAC_CLK_DISABLE __HAL_RCC_ETHMAC_CLK_DISABLE
|
|
|
1299 #define __ETHMAC_CLK_ENABLE __HAL_RCC_ETHMAC_CLK_ENABLE
|
|
|
1300 #define __ETHMAC_FORCE_RESET __HAL_RCC_ETHMAC_FORCE_RESET
|
|
|
1301 #define __ETHMAC_RELEASE_RESET __HAL_RCC_ETHMAC_RELEASE_RESET
|
|
|
1302 #define __ETHMACRX_CLK_DISABLE __HAL_RCC_ETHMACRX_CLK_DISABLE
|
|
|
1303 #define __ETHMACRX_CLK_ENABLE __HAL_RCC_ETHMACRX_CLK_ENABLE
|
|
|
1304 #define __ETHMACTX_CLK_DISABLE __HAL_RCC_ETHMACTX_CLK_DISABLE
|
|
|
1305 #define __ETHMACTX_CLK_ENABLE __HAL_RCC_ETHMACTX_CLK_ENABLE
|
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|
1306 #define __FIREWALL_CLK_DISABLE __HAL_RCC_FIREWALL_CLK_DISABLE
|
|
|
1307 #define __FIREWALL_CLK_ENABLE __HAL_RCC_FIREWALL_CLK_ENABLE
|
|
|
1308 #define __FLASH_CLK_DISABLE __HAL_RCC_FLASH_CLK_DISABLE
|
|
|
1309 #define __FLASH_CLK_ENABLE __HAL_RCC_FLASH_CLK_ENABLE
|
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1310 #define __FLASH_CLK_SLEEP_DISABLE __HAL_RCC_FLASH_CLK_SLEEP_DISABLE
|
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1311 #define __FLASH_CLK_SLEEP_ENABLE __HAL_RCC_FLASH_CLK_SLEEP_ENABLE
|
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|
1312 #define __FLASH_FORCE_RESET __HAL_RCC_FLASH_FORCE_RESET
|
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1313 #define __FLASH_RELEASE_RESET __HAL_RCC_FLASH_RELEASE_RESET
|
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|
1314 #define __FLITF_CLK_DISABLE __HAL_RCC_FLITF_CLK_DISABLE
|
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|
1315 #define __FLITF_CLK_ENABLE __HAL_RCC_FLITF_CLK_ENABLE
|
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1316 #define __FMC_CLK_DISABLE __HAL_RCC_FMC_CLK_DISABLE
|
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|
1317 #define __FMC_CLK_ENABLE __HAL_RCC_FMC_CLK_ENABLE
|
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1318 #define __FMC_CLK_SLEEP_DISABLE __HAL_RCC_FMC_CLK_SLEEP_DISABLE
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1319 #define __FMC_CLK_SLEEP_ENABLE __HAL_RCC_FMC_CLK_SLEEP_ENABLE
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1320 #define __FMC_FORCE_RESET __HAL_RCC_FMC_FORCE_RESET
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1321 #define __FMC_RELEASE_RESET __HAL_RCC_FMC_RELEASE_RESET
|
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1322 #define __FSMC_CLK_DISABLE __HAL_RCC_FSMC_CLK_DISABLE
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1323 #define __FSMC_CLK_ENABLE __HAL_RCC_FSMC_CLK_ENABLE
|
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1324 #define __GPIOA_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE
|
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1325 #define __GPIOA_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE
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1326 #define __GPIOA_CLK_SLEEP_DISABLE __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE
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1327 #define __GPIOA_CLK_SLEEP_ENABLE __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE
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|
1328 #define __GPIOA_FORCE_RESET __HAL_RCC_GPIOA_FORCE_RESET
|
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1329 #define __GPIOA_RELEASE_RESET __HAL_RCC_GPIOA_RELEASE_RESET
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1330 #define __GPIOB_CLK_DISABLE __HAL_RCC_GPIOB_CLK_DISABLE
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1331 #define __GPIOB_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE
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1332 #define __GPIOB_CLK_SLEEP_DISABLE __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE
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1333 #define __GPIOB_CLK_SLEEP_ENABLE __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE
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|
1334 #define __GPIOB_FORCE_RESET __HAL_RCC_GPIOB_FORCE_RESET
|
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1335 #define __GPIOB_RELEASE_RESET __HAL_RCC_GPIOB_RELEASE_RESET
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1336 #define __GPIOC_CLK_DISABLE __HAL_RCC_GPIOC_CLK_DISABLE
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1337 #define __GPIOC_CLK_ENABLE __HAL_RCC_GPIOC_CLK_ENABLE
|
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1338 #define __GPIOC_CLK_SLEEP_DISABLE __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE
|
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1339 #define __GPIOC_CLK_SLEEP_ENABLE __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE
|
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1340 #define __GPIOC_FORCE_RESET __HAL_RCC_GPIOC_FORCE_RESET
|
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1341 #define __GPIOC_RELEASE_RESET __HAL_RCC_GPIOC_RELEASE_RESET
|
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1342 #define __GPIOD_CLK_DISABLE __HAL_RCC_GPIOD_CLK_DISABLE
|
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1343 #define __GPIOD_CLK_ENABLE __HAL_RCC_GPIOD_CLK_ENABLE
|
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1344 #define __GPIOD_CLK_SLEEP_DISABLE __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE
|
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1345 #define __GPIOD_CLK_SLEEP_ENABLE __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE
|
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1346 #define __GPIOD_FORCE_RESET __HAL_RCC_GPIOD_FORCE_RESET
|
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|
1347 #define __GPIOD_RELEASE_RESET __HAL_RCC_GPIOD_RELEASE_RESET
|
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|
1348 #define __GPIOE_CLK_DISABLE __HAL_RCC_GPIOE_CLK_DISABLE
|
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|
1349 #define __GPIOE_CLK_ENABLE __HAL_RCC_GPIOE_CLK_ENABLE
|
|
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1350 #define __GPIOE_CLK_SLEEP_DISABLE __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE
|
|
|
1351 #define __GPIOE_CLK_SLEEP_ENABLE __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE
|
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|
1352 #define __GPIOE_FORCE_RESET __HAL_RCC_GPIOE_FORCE_RESET
|
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1353 #define __GPIOE_RELEASE_RESET __HAL_RCC_GPIOE_RELEASE_RESET
|
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|
1354 #define __GPIOF_CLK_DISABLE __HAL_RCC_GPIOF_CLK_DISABLE
|
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|
1355 #define __GPIOF_CLK_ENABLE __HAL_RCC_GPIOF_CLK_ENABLE
|
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1356 #define __GPIOF_CLK_SLEEP_DISABLE __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE
|
|
|
1357 #define __GPIOF_CLK_SLEEP_ENABLE __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE
|
|
|
1358 #define __GPIOF_FORCE_RESET __HAL_RCC_GPIOF_FORCE_RESET
|
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|
1359 #define __GPIOF_RELEASE_RESET __HAL_RCC_GPIOF_RELEASE_RESET
|
|
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1360 #define __GPIOG_CLK_DISABLE __HAL_RCC_GPIOG_CLK_DISABLE
|
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|
1361 #define __GPIOG_CLK_ENABLE __HAL_RCC_GPIOG_CLK_ENABLE
|
|
|
1362 #define __GPIOG_CLK_SLEEP_DISABLE __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE
|
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|
1363 #define __GPIOG_CLK_SLEEP_ENABLE __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE
|
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|
1364 #define __GPIOG_FORCE_RESET __HAL_RCC_GPIOG_FORCE_RESET
|
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|
1365 #define __GPIOG_RELEASE_RESET __HAL_RCC_GPIOG_RELEASE_RESET
|
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|
1366 #define __GPIOH_CLK_DISABLE __HAL_RCC_GPIOH_CLK_DISABLE
|
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|
1367 #define __GPIOH_CLK_ENABLE __HAL_RCC_GPIOH_CLK_ENABLE
|
|
|
1368 #define __GPIOH_CLK_SLEEP_DISABLE __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE
|
|
|
1369 #define __GPIOH_CLK_SLEEP_ENABLE __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE
|
|
|
1370 #define __GPIOH_FORCE_RESET __HAL_RCC_GPIOH_FORCE_RESET
|
|
|
1371 #define __GPIOH_RELEASE_RESET __HAL_RCC_GPIOH_RELEASE_RESET
|
|
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1372 #define __I2C1_CLK_DISABLE __HAL_RCC_I2C1_CLK_DISABLE
|
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|
1373 #define __I2C1_CLK_ENABLE __HAL_RCC_I2C1_CLK_ENABLE
|
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1374 #define __I2C1_CLK_SLEEP_DISABLE __HAL_RCC_I2C1_CLK_SLEEP_DISABLE
|
|
|
1375 #define __I2C1_CLK_SLEEP_ENABLE __HAL_RCC_I2C1_CLK_SLEEP_ENABLE
|
|
|
1376 #define __I2C1_FORCE_RESET __HAL_RCC_I2C1_FORCE_RESET
|
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|
1377 #define __I2C1_RELEASE_RESET __HAL_RCC_I2C1_RELEASE_RESET
|
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|
1378 #define __I2C2_CLK_DISABLE __HAL_RCC_I2C2_CLK_DISABLE
|
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|
1379 #define __I2C2_CLK_ENABLE __HAL_RCC_I2C2_CLK_ENABLE
|
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|
1380 #define __I2C2_CLK_SLEEP_DISABLE __HAL_RCC_I2C2_CLK_SLEEP_DISABLE
|
|
|
1381 #define __I2C2_CLK_SLEEP_ENABLE __HAL_RCC_I2C2_CLK_SLEEP_ENABLE
|
|
|
1382 #define __I2C2_FORCE_RESET __HAL_RCC_I2C2_FORCE_RESET
|
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|
1383 #define __I2C2_RELEASE_RESET __HAL_RCC_I2C2_RELEASE_RESET
|
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|
1384 #define __I2C3_CLK_DISABLE __HAL_RCC_I2C3_CLK_DISABLE
|
|
|
1385 #define __I2C3_CLK_ENABLE __HAL_RCC_I2C3_CLK_ENABLE
|
|
|
1386 #define __I2C3_CLK_SLEEP_DISABLE __HAL_RCC_I2C3_CLK_SLEEP_DISABLE
|
|
|
1387 #define __I2C3_CLK_SLEEP_ENABLE __HAL_RCC_I2C3_CLK_SLEEP_ENABLE
|
|
|
1388 #define __I2C3_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET
|
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|
1389 #define __I2C3_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET
|
|
|
1390 #define __LCD_CLK_DISABLE __HAL_RCC_LCD_CLK_DISABLE
|
|
|
1391 #define __LCD_CLK_ENABLE __HAL_RCC_LCD_CLK_ENABLE
|
|
|
1392 #define __LCD_CLK_SLEEP_DISABLE __HAL_RCC_LCD_CLK_SLEEP_DISABLE
|
|
|
1393 #define __LCD_CLK_SLEEP_ENABLE __HAL_RCC_LCD_CLK_SLEEP_ENABLE
|
|
|
1394 #define __LCD_FORCE_RESET __HAL_RCC_LCD_FORCE_RESET
|
|
|
1395 #define __LCD_RELEASE_RESET __HAL_RCC_LCD_RELEASE_RESET
|
|
|
1396 #define __LPTIM1_CLK_DISABLE __HAL_RCC_LPTIM1_CLK_DISABLE
|
|
|
1397 #define __LPTIM1_CLK_ENABLE __HAL_RCC_LPTIM1_CLK_ENABLE
|
|
|
1398 #define __LPTIM1_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE
|
|
|
1399 #define __LPTIM1_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE
|
|
|
1400 #define __LPTIM1_FORCE_RESET __HAL_RCC_LPTIM1_FORCE_RESET
|
|
|
1401 #define __LPTIM1_RELEASE_RESET __HAL_RCC_LPTIM1_RELEASE_RESET
|
|
|
1402 #define __LPTIM2_CLK_DISABLE __HAL_RCC_LPTIM2_CLK_DISABLE
|
|
|
1403 #define __LPTIM2_CLK_ENABLE __HAL_RCC_LPTIM2_CLK_ENABLE
|
|
|
1404 #define __LPTIM2_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE
|
|
|
1405 #define __LPTIM2_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE
|
|
|
1406 #define __LPTIM2_FORCE_RESET __HAL_RCC_LPTIM2_FORCE_RESET
|
|
|
1407 #define __LPTIM2_RELEASE_RESET __HAL_RCC_LPTIM2_RELEASE_RESET
|
|
|
1408 #define __LPUART1_CLK_DISABLE __HAL_RCC_LPUART1_CLK_DISABLE
|
|
|
1409 #define __LPUART1_CLK_ENABLE __HAL_RCC_LPUART1_CLK_ENABLE
|
|
|
1410 #define __LPUART1_CLK_SLEEP_DISABLE __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE
|
|
|
1411 #define __LPUART1_CLK_SLEEP_ENABLE __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE
|
|
|
1412 #define __LPUART1_FORCE_RESET __HAL_RCC_LPUART1_FORCE_RESET
|
|
|
1413 #define __LPUART1_RELEASE_RESET __HAL_RCC_LPUART1_RELEASE_RESET
|
|
|
1414 #define __OPAMP_CLK_DISABLE __HAL_RCC_OPAMP_CLK_DISABLE
|
|
|
1415 #define __OPAMP_CLK_ENABLE __HAL_RCC_OPAMP_CLK_ENABLE
|
|
|
1416 #define __OPAMP_CLK_SLEEP_DISABLE __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE
|
|
|
1417 #define __OPAMP_CLK_SLEEP_ENABLE __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE
|
|
|
1418 #define __OPAMP_FORCE_RESET __HAL_RCC_OPAMP_FORCE_RESET
|
|
|
1419 #define __OPAMP_RELEASE_RESET __HAL_RCC_OPAMP_RELEASE_RESET
|
|
|
1420 #define __OTGFS_CLK_DISABLE __HAL_RCC_OTGFS_CLK_DISABLE
|
|
|
1421 #define __OTGFS_CLK_ENABLE __HAL_RCC_OTGFS_CLK_ENABLE
|
|
|
1422 #define __OTGFS_CLK_SLEEP_DISABLE __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE
|
|
|
1423 #define __OTGFS_CLK_SLEEP_ENABLE __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE
|
|
|
1424 #define __OTGFS_FORCE_RESET __HAL_RCC_OTGFS_FORCE_RESET
|
|
|
1425 #define __OTGFS_RELEASE_RESET __HAL_RCC_OTGFS_RELEASE_RESET
|
|
|
1426 #define __PWR_CLK_DISABLE __HAL_RCC_PWR_CLK_DISABLE
|
|
|
1427 #define __PWR_CLK_ENABLE __HAL_RCC_PWR_CLK_ENABLE
|
|
|
1428 #define __PWR_CLK_SLEEP_DISABLE __HAL_RCC_PWR_CLK_SLEEP_DISABLE
|
|
|
1429 #define __PWR_CLK_SLEEP_ENABLE __HAL_RCC_PWR_CLK_SLEEP_ENABLE
|
|
|
1430 #define __PWR_FORCE_RESET __HAL_RCC_PWR_FORCE_RESET
|
|
|
1431 #define __PWR_RELEASE_RESET __HAL_RCC_PWR_RELEASE_RESET
|
|
|
1432 #define __QSPI_CLK_DISABLE __HAL_RCC_QSPI_CLK_DISABLE
|
|
|
1433 #define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE
|
|
|
1434 #define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE
|
|
|
1435 #define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
|
|
|
1436 #define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET
|
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1437 #define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET
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1438 #define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE
|
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1439 #define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE
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1440 #define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE
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1441 #define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE
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|
1442 #define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET
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1443 #define __RNG_RELEASE_RESET __HAL_RCC_RNG_RELEASE_RESET
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1444 #define __SAI1_CLK_DISABLE __HAL_RCC_SAI1_CLK_DISABLE
|
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|
1445 #define __SAI1_CLK_ENABLE __HAL_RCC_SAI1_CLK_ENABLE
|
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1446 #define __SAI1_CLK_SLEEP_DISABLE __HAL_RCC_SAI1_CLK_SLEEP_DISABLE
|
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|
1447 #define __SAI1_CLK_SLEEP_ENABLE __HAL_RCC_SAI1_CLK_SLEEP_ENABLE
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|
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1448 #define __SAI1_FORCE_RESET __HAL_RCC_SAI1_FORCE_RESET
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1449 #define __SAI1_RELEASE_RESET __HAL_RCC_SAI1_RELEASE_RESET
|
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1450 #define __SAI2_CLK_DISABLE __HAL_RCC_SAI2_CLK_DISABLE
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|
1451 #define __SAI2_CLK_ENABLE __HAL_RCC_SAI2_CLK_ENABLE
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1452 #define __SAI2_CLK_SLEEP_DISABLE __HAL_RCC_SAI2_CLK_SLEEP_DISABLE
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1453 #define __SAI2_CLK_SLEEP_ENABLE __HAL_RCC_SAI2_CLK_SLEEP_ENABLE
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1454 #define __SAI2_FORCE_RESET __HAL_RCC_SAI2_FORCE_RESET
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1455 #define __SAI2_RELEASE_RESET __HAL_RCC_SAI2_RELEASE_RESET
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1456 #define __SDIO_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
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1457 #define __SDIO_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
|
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1458 #define __SDMMC_CLK_DISABLE __HAL_RCC_SDMMC_CLK_DISABLE
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1459 #define __SDMMC_CLK_ENABLE __HAL_RCC_SDMMC_CLK_ENABLE
|
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1460 #define __SDMMC_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE
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1461 #define __SDMMC_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE
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1462 #define __SDMMC_FORCE_RESET __HAL_RCC_SDMMC_FORCE_RESET
|
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1463 #define __SDMMC_RELEASE_RESET __HAL_RCC_SDMMC_RELEASE_RESET
|
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|
1464 #define __SPI1_CLK_DISABLE __HAL_RCC_SPI1_CLK_DISABLE
|
|
|
1465 #define __SPI1_CLK_ENABLE __HAL_RCC_SPI1_CLK_ENABLE
|
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1466 #define __SPI1_CLK_SLEEP_DISABLE __HAL_RCC_SPI1_CLK_SLEEP_DISABLE
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|
|
1467 #define __SPI1_CLK_SLEEP_ENABLE __HAL_RCC_SPI1_CLK_SLEEP_ENABLE
|
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|
1468 #define __SPI1_FORCE_RESET __HAL_RCC_SPI1_FORCE_RESET
|
|
|
1469 #define __SPI1_RELEASE_RESET __HAL_RCC_SPI1_RELEASE_RESET
|
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|
1470 #define __SPI2_CLK_DISABLE __HAL_RCC_SPI2_CLK_DISABLE
|
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1471 #define __SPI2_CLK_ENABLE __HAL_RCC_SPI2_CLK_ENABLE
|
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1472 #define __SPI2_CLK_SLEEP_DISABLE __HAL_RCC_SPI2_CLK_SLEEP_DISABLE
|
|
|
1473 #define __SPI2_CLK_SLEEP_ENABLE __HAL_RCC_SPI2_CLK_SLEEP_ENABLE
|
|
|
1474 #define __SPI2_FORCE_RESET __HAL_RCC_SPI2_FORCE_RESET
|
|
|
1475 #define __SPI2_RELEASE_RESET __HAL_RCC_SPI2_RELEASE_RESET
|
|
|
1476 #define __SPI3_CLK_DISABLE __HAL_RCC_SPI3_CLK_DISABLE
|
|
|
1477 #define __SPI3_CLK_ENABLE __HAL_RCC_SPI3_CLK_ENABLE
|
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1478 #define __SPI3_CLK_SLEEP_DISABLE __HAL_RCC_SPI3_CLK_SLEEP_DISABLE
|
|
|
1479 #define __SPI3_CLK_SLEEP_ENABLE __HAL_RCC_SPI3_CLK_SLEEP_ENABLE
|
|
|
1480 #define __SPI3_FORCE_RESET __HAL_RCC_SPI3_FORCE_RESET
|
|
|
1481 #define __SPI3_RELEASE_RESET __HAL_RCC_SPI3_RELEASE_RESET
|
|
|
1482 #define __SRAM_CLK_DISABLE __HAL_RCC_SRAM_CLK_DISABLE
|
|
|
1483 #define __SRAM_CLK_ENABLE __HAL_RCC_SRAM_CLK_ENABLE
|
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|
1484 #define __SRAM1_CLK_SLEEP_DISABLE __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE
|
|
|
1485 #define __SRAM1_CLK_SLEEP_ENABLE __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE
|
|
|
1486 #define __SRAM2_CLK_SLEEP_DISABLE __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE
|
|
|
1487 #define __SRAM2_CLK_SLEEP_ENABLE __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE
|
|
|
1488 #define __SWPMI1_CLK_DISABLE __HAL_RCC_SWPMI1_CLK_DISABLE
|
|
|
1489 #define __SWPMI1_CLK_ENABLE __HAL_RCC_SWPMI1_CLK_ENABLE
|
|
|
1490 #define __SWPMI1_CLK_SLEEP_DISABLE __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE
|
|
|
1491 #define __SWPMI1_CLK_SLEEP_ENABLE __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE
|
|
|
1492 #define __SWPMI1_FORCE_RESET __HAL_RCC_SWPMI1_FORCE_RESET
|
|
|
1493 #define __SWPMI1_RELEASE_RESET __HAL_RCC_SWPMI1_RELEASE_RESET
|
|
|
1494 #define __SYSCFG_CLK_DISABLE __HAL_RCC_SYSCFG_CLK_DISABLE
|
|
|
1495 #define __SYSCFG_CLK_ENABLE __HAL_RCC_SYSCFG_CLK_ENABLE
|
|
|
1496 #define __SYSCFG_CLK_SLEEP_DISABLE __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE
|
|
|
1497 #define __SYSCFG_CLK_SLEEP_ENABLE __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE
|
|
|
1498 #define __SYSCFG_FORCE_RESET __HAL_RCC_SYSCFG_FORCE_RESET
|
|
|
1499 #define __SYSCFG_RELEASE_RESET __HAL_RCC_SYSCFG_RELEASE_RESET
|
|
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1500 #define __TIM1_CLK_DISABLE __HAL_RCC_TIM1_CLK_DISABLE
|
|
|
1501 #define __TIM1_CLK_ENABLE __HAL_RCC_TIM1_CLK_ENABLE
|
|
|
1502 #define __TIM1_CLK_SLEEP_DISABLE __HAL_RCC_TIM1_CLK_SLEEP_DISABLE
|
|
|
1503 #define __TIM1_CLK_SLEEP_ENABLE __HAL_RCC_TIM1_CLK_SLEEP_ENABLE
|
|
|
1504 #define __TIM1_FORCE_RESET __HAL_RCC_TIM1_FORCE_RESET
|
|
|
1505 #define __TIM1_RELEASE_RESET __HAL_RCC_TIM1_RELEASE_RESET
|
|
|
1506 #define __TIM10_CLK_DISABLE __HAL_RCC_TIM10_CLK_DISABLE
|
|
|
1507 #define __TIM10_CLK_ENABLE __HAL_RCC_TIM10_CLK_ENABLE
|
|
|
1508 #define __TIM10_FORCE_RESET __HAL_RCC_TIM10_FORCE_RESET
|
|
|
1509 #define __TIM10_RELEASE_RESET __HAL_RCC_TIM10_RELEASE_RESET
|
|
|
1510 #define __TIM11_CLK_DISABLE __HAL_RCC_TIM11_CLK_DISABLE
|
|
|
1511 #define __TIM11_CLK_ENABLE __HAL_RCC_TIM11_CLK_ENABLE
|
|
|
1512 #define __TIM11_FORCE_RESET __HAL_RCC_TIM11_FORCE_RESET
|
|
|
1513 #define __TIM11_RELEASE_RESET __HAL_RCC_TIM11_RELEASE_RESET
|
|
|
1514 #define __TIM12_CLK_DISABLE __HAL_RCC_TIM12_CLK_DISABLE
|
|
|
1515 #define __TIM12_CLK_ENABLE __HAL_RCC_TIM12_CLK_ENABLE
|
|
|
1516 #define __TIM12_FORCE_RESET __HAL_RCC_TIM12_FORCE_RESET
|
|
|
1517 #define __TIM12_RELEASE_RESET __HAL_RCC_TIM12_RELEASE_RESET
|
|
|
1518 #define __TIM13_CLK_DISABLE __HAL_RCC_TIM13_CLK_DISABLE
|
|
|
1519 #define __TIM13_CLK_ENABLE __HAL_RCC_TIM13_CLK_ENABLE
|
|
|
1520 #define __TIM13_FORCE_RESET __HAL_RCC_TIM13_FORCE_RESET
|
|
|
1521 #define __TIM13_RELEASE_RESET __HAL_RCC_TIM13_RELEASE_RESET
|
|
|
1522 #define __TIM14_CLK_DISABLE __HAL_RCC_TIM14_CLK_DISABLE
|
|
|
1523 #define __TIM14_CLK_ENABLE __HAL_RCC_TIM14_CLK_ENABLE
|
|
|
1524 #define __TIM14_FORCE_RESET __HAL_RCC_TIM14_FORCE_RESET
|
|
|
1525 #define __TIM14_RELEASE_RESET __HAL_RCC_TIM14_RELEASE_RESET
|
|
|
1526 #define __TIM15_CLK_DISABLE __HAL_RCC_TIM15_CLK_DISABLE
|
|
|
1527 #define __TIM15_CLK_ENABLE __HAL_RCC_TIM15_CLK_ENABLE
|
|
|
1528 #define __TIM15_CLK_SLEEP_DISABLE __HAL_RCC_TIM15_CLK_SLEEP_DISABLE
|
|
|
1529 #define __TIM15_CLK_SLEEP_ENABLE __HAL_RCC_TIM15_CLK_SLEEP_ENABLE
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|
|
1530 #define __TIM15_FORCE_RESET __HAL_RCC_TIM15_FORCE_RESET
|
|
|
1531 #define __TIM15_RELEASE_RESET __HAL_RCC_TIM15_RELEASE_RESET
|
|
|
1532 #define __TIM16_CLK_DISABLE __HAL_RCC_TIM16_CLK_DISABLE
|
|
|
1533 #define __TIM16_CLK_ENABLE __HAL_RCC_TIM16_CLK_ENABLE
|
|
|
1534 #define __TIM16_CLK_SLEEP_DISABLE __HAL_RCC_TIM16_CLK_SLEEP_DISABLE
|
|
|
1535 #define __TIM16_CLK_SLEEP_ENABLE __HAL_RCC_TIM16_CLK_SLEEP_ENABLE
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|
|
1536 #define __TIM16_FORCE_RESET __HAL_RCC_TIM16_FORCE_RESET
|
|
|
1537 #define __TIM16_RELEASE_RESET __HAL_RCC_TIM16_RELEASE_RESET
|
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|
1538 #define __TIM17_CLK_DISABLE __HAL_RCC_TIM17_CLK_DISABLE
|
|
|
1539 #define __TIM17_CLK_ENABLE __HAL_RCC_TIM17_CLK_ENABLE
|
|
|
1540 #define __TIM17_CLK_SLEEP_DISABLE __HAL_RCC_TIM17_CLK_SLEEP_DISABLE
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|
|
1541 #define __TIM17_CLK_SLEEP_ENABLE __HAL_RCC_TIM17_CLK_SLEEP_ENABLE
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|
|
1542 #define __TIM17_FORCE_RESET __HAL_RCC_TIM17_FORCE_RESET
|
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1543 #define __TIM17_RELEASE_RESET __HAL_RCC_TIM17_RELEASE_RESET
|
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|
1544 #define __TIM2_CLK_DISABLE __HAL_RCC_TIM2_CLK_DISABLE
|
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|
1545 #define __TIM2_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE
|
|
|
1546 #define __TIM2_CLK_SLEEP_DISABLE __HAL_RCC_TIM2_CLK_SLEEP_DISABLE
|
|
|
1547 #define __TIM2_CLK_SLEEP_ENABLE __HAL_RCC_TIM2_CLK_SLEEP_ENABLE
|
|
|
1548 #define __TIM2_FORCE_RESET __HAL_RCC_TIM2_FORCE_RESET
|
|
|
1549 #define __TIM2_RELEASE_RESET __HAL_RCC_TIM2_RELEASE_RESET
|
|
|
1550 #define __TIM3_CLK_DISABLE __HAL_RCC_TIM3_CLK_DISABLE
|
|
|
1551 #define __TIM3_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE
|
|
|
1552 #define __TIM3_CLK_SLEEP_DISABLE __HAL_RCC_TIM3_CLK_SLEEP_DISABLE
|
|
|
1553 #define __TIM3_CLK_SLEEP_ENABLE __HAL_RCC_TIM3_CLK_SLEEP_ENABLE
|
|
|
1554 #define __TIM3_FORCE_RESET __HAL_RCC_TIM3_FORCE_RESET
|
|
|
1555 #define __TIM3_RELEASE_RESET __HAL_RCC_TIM3_RELEASE_RESET
|
|
|
1556 #define __TIM4_CLK_DISABLE __HAL_RCC_TIM4_CLK_DISABLE
|
|
|
1557 #define __TIM4_CLK_ENABLE __HAL_RCC_TIM4_CLK_ENABLE
|
|
|
1558 #define __TIM4_CLK_SLEEP_DISABLE __HAL_RCC_TIM4_CLK_SLEEP_DISABLE
|
|
|
1559 #define __TIM4_CLK_SLEEP_ENABLE __HAL_RCC_TIM4_CLK_SLEEP_ENABLE
|
|
|
1560 #define __TIM4_FORCE_RESET __HAL_RCC_TIM4_FORCE_RESET
|
|
|
1561 #define __TIM4_RELEASE_RESET __HAL_RCC_TIM4_RELEASE_RESET
|
|
|
1562 #define __TIM5_CLK_DISABLE __HAL_RCC_TIM5_CLK_DISABLE
|
|
|
1563 #define __TIM5_CLK_ENABLE __HAL_RCC_TIM5_CLK_ENABLE
|
|
|
1564 #define __TIM5_CLK_SLEEP_DISABLE __HAL_RCC_TIM5_CLK_SLEEP_DISABLE
|
|
|
1565 #define __TIM5_CLK_SLEEP_ENABLE __HAL_RCC_TIM5_CLK_SLEEP_ENABLE
|
|
|
1566 #define __TIM5_FORCE_RESET __HAL_RCC_TIM5_FORCE_RESET
|
|
|
1567 #define __TIM5_RELEASE_RESET __HAL_RCC_TIM5_RELEASE_RESET
|
|
|
1568 #define __TIM6_CLK_DISABLE __HAL_RCC_TIM6_CLK_DISABLE
|
|
|
1569 #define __TIM6_CLK_ENABLE __HAL_RCC_TIM6_CLK_ENABLE
|
|
|
1570 #define __TIM6_CLK_SLEEP_DISABLE __HAL_RCC_TIM6_CLK_SLEEP_DISABLE
|
|
|
1571 #define __TIM6_CLK_SLEEP_ENABLE __HAL_RCC_TIM6_CLK_SLEEP_ENABLE
|
|
|
1572 #define __TIM6_FORCE_RESET __HAL_RCC_TIM6_FORCE_RESET
|
|
|
1573 #define __TIM6_RELEASE_RESET __HAL_RCC_TIM6_RELEASE_RESET
|
|
|
1574 #define __TIM7_CLK_DISABLE __HAL_RCC_TIM7_CLK_DISABLE
|
|
|
1575 #define __TIM7_CLK_ENABLE __HAL_RCC_TIM7_CLK_ENABLE
|
|
|
1576 #define __TIM7_CLK_SLEEP_DISABLE __HAL_RCC_TIM7_CLK_SLEEP_DISABLE
|
|
|
1577 #define __TIM7_CLK_SLEEP_ENABLE __HAL_RCC_TIM7_CLK_SLEEP_ENABLE
|
|
|
1578 #define __TIM7_FORCE_RESET __HAL_RCC_TIM7_FORCE_RESET
|
|
|
1579 #define __TIM7_RELEASE_RESET __HAL_RCC_TIM7_RELEASE_RESET
|
|
|
1580 #define __TIM8_CLK_DISABLE __HAL_RCC_TIM8_CLK_DISABLE
|
|
|
1581 #define __TIM8_CLK_ENABLE __HAL_RCC_TIM8_CLK_ENABLE
|
|
|
1582 #define __TIM8_CLK_SLEEP_DISABLE __HAL_RCC_TIM8_CLK_SLEEP_DISABLE
|
|
|
1583 #define __TIM8_CLK_SLEEP_ENABLE __HAL_RCC_TIM8_CLK_SLEEP_ENABLE
|
|
|
1584 #define __TIM8_FORCE_RESET __HAL_RCC_TIM8_FORCE_RESET
|
|
|
1585 #define __TIM8_RELEASE_RESET __HAL_RCC_TIM8_RELEASE_RESET
|
|
|
1586 #define __TIM9_CLK_DISABLE __HAL_RCC_TIM9_CLK_DISABLE
|
|
|
1587 #define __TIM9_CLK_ENABLE __HAL_RCC_TIM9_CLK_ENABLE
|
|
|
1588 #define __TIM9_FORCE_RESET __HAL_RCC_TIM9_FORCE_RESET
|
|
|
1589 #define __TIM9_RELEASE_RESET __HAL_RCC_TIM9_RELEASE_RESET
|
|
|
1590 #define __TSC_CLK_DISABLE __HAL_RCC_TSC_CLK_DISABLE
|
|
|
1591 #define __TSC_CLK_ENABLE __HAL_RCC_TSC_CLK_ENABLE
|
|
|
1592 #define __TSC_CLK_SLEEP_DISABLE __HAL_RCC_TSC_CLK_SLEEP_DISABLE
|
|
|
1593 #define __TSC_CLK_SLEEP_ENABLE __HAL_RCC_TSC_CLK_SLEEP_ENABLE
|
|
|
1594 #define __TSC_FORCE_RESET __HAL_RCC_TSC_FORCE_RESET
|
|
|
1595 #define __TSC_RELEASE_RESET __HAL_RCC_TSC_RELEASE_RESET
|
|
|
1596 #define __UART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE
|
|
|
1597 #define __UART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE
|
|
|
1598 #define __UART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE
|
|
|
1599 #define __UART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE
|
|
|
1600 #define __UART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET
|
|
|
1601 #define __UART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET
|
|
|
1602 #define __UART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE
|
|
|
1603 #define __UART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE
|
|
|
1604 #define __UART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE
|
|
|
1605 #define __UART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE
|
|
|
1606 #define __UART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET
|
|
|
1607 #define __UART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET
|
|
|
1608 #define __USART1_CLK_DISABLE __HAL_RCC_USART1_CLK_DISABLE
|
|
|
1609 #define __USART1_CLK_ENABLE __HAL_RCC_USART1_CLK_ENABLE
|
|
|
1610 #define __USART1_CLK_SLEEP_DISABLE __HAL_RCC_USART1_CLK_SLEEP_DISABLE
|
|
|
1611 #define __USART1_CLK_SLEEP_ENABLE __HAL_RCC_USART1_CLK_SLEEP_ENABLE
|
|
|
1612 #define __USART1_FORCE_RESET __HAL_RCC_USART1_FORCE_RESET
|
|
|
1613 #define __USART1_RELEASE_RESET __HAL_RCC_USART1_RELEASE_RESET
|
|
|
1614 #define __USART2_CLK_DISABLE __HAL_RCC_USART2_CLK_DISABLE
|
|
|
1615 #define __USART2_CLK_ENABLE __HAL_RCC_USART2_CLK_ENABLE
|
|
|
1616 #define __USART2_CLK_SLEEP_DISABLE __HAL_RCC_USART2_CLK_SLEEP_DISABLE
|
|
|
1617 #define __USART2_CLK_SLEEP_ENABLE __HAL_RCC_USART2_CLK_SLEEP_ENABLE
|
|
|
1618 #define __USART2_FORCE_RESET __HAL_RCC_USART2_FORCE_RESET
|
|
|
1619 #define __USART2_RELEASE_RESET __HAL_RCC_USART2_RELEASE_RESET
|
|
|
1620 #define __USART3_CLK_DISABLE __HAL_RCC_USART3_CLK_DISABLE
|
|
|
1621 #define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE
|
|
|
1622 #define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE
|
|
|
1623 #define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE
|
|
|
1624 #define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET
|
|
|
1625 #define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET
|
|
|
1626 #define __USB_CLK_DISABLE __HAL_RCC_USB_CLK_DISABLE
|
|
|
1627 #define __USB_CLK_ENABLE __HAL_RCC_USB_CLK_ENABLE
|
|
|
1628 #define __USB_FORCE_RESET __HAL_RCC_USB_FORCE_RESET
|
|
|
1629 #define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE
|
|
|
1630 #define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE
|
|
|
1631 #define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET
|
|
|
1632 #define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
|
|
|
1633 #define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE
|
|
|
1634 #define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
|
|
|
1635 #define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
|
|
|
1636 #define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET
|
|
|
1637 #define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET
|
|
|
1638 #define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE
|
|
|
1639 #define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE
|
|
|
1640 #define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET
|
|
|
1641 #define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET
|
|
|
1642 #define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE
|
|
|
1643 #define __TIM21_CLK_SLEEP_DISABLE __HAL_RCC_TIM21_CLK_SLEEP_DISABLE
|
|
|
1644 #define __TIM22_CLK_ENABLE __HAL_RCC_TIM22_CLK_ENABLE
|
|
|
1645 #define __TIM22_CLK_DISABLE __HAL_RCC_TIM22_CLK_DISABLE
|
|
|
1646 #define __TIM22_FORCE_RESET __HAL_RCC_TIM22_FORCE_RESET
|
|
|
1647 #define __TIM22_RELEASE_RESET __HAL_RCC_TIM22_RELEASE_RESET
|
|
|
1648 #define __TIM22_CLK_SLEEP_ENABLE __HAL_RCC_TIM22_CLK_SLEEP_ENABLE
|
|
|
1649 #define __TIM22_CLK_SLEEP_DISABLE __HAL_RCC_TIM22_CLK_SLEEP_DISABLE
|
|
|
1650 #define __CRS_CLK_DISABLE __HAL_RCC_CRS_CLK_DISABLE
|
|
|
1651 #define __CRS_CLK_ENABLE __HAL_RCC_CRS_CLK_ENABLE
|
|
|
1652 #define __CRS_CLK_SLEEP_DISABLE __HAL_RCC_CRS_CLK_SLEEP_DISABLE
|
|
|
1653 #define __CRS_CLK_SLEEP_ENABLE __HAL_RCC_CRS_CLK_SLEEP_ENABLE
|
|
|
1654 #define __CRS_FORCE_RESET __HAL_RCC_CRS_FORCE_RESET
|
|
|
1655 #define __CRS_RELEASE_RESET __HAL_RCC_CRS_RELEASE_RESET
|
|
|
1656 #define __RCC_BACKUPRESET_FORCE __HAL_RCC_BACKUPRESET_FORCE
|
|
|
1657 #define __RCC_BACKUPRESET_RELEASE __HAL_RCC_BACKUPRESET_RELEASE
|
|
|
1658
|
|
|
1659 #define __USB_OTG_FS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
|
|
|
1660 #define __USB_OTG_FS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
|
|
|
1661 #define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE
|
|
|
1662 #define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE
|
|
|
1663 #define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE
|
|
|
1664 #define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE
|
|
|
1665 #define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE
|
|
|
1666 #define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE
|
|
|
1667 #define __FLITF_CLK_SLEEP_ENABLE __HAL_RCC_FLITF_CLK_SLEEP_ENABLE
|
|
|
1668 #define __FLITF_CLK_SLEEP_DISABLE __HAL_RCC_FLITF_CLK_SLEEP_DISABLE
|
|
|
1669 #define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE
|
|
|
1670 #define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE
|
|
|
1671 #define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE
|
|
|
1672 #define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE
|
|
|
1673 #define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE
|
|
|
1674 #define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE
|
|
|
1675 #define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE
|
|
|
1676 #define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE
|
|
|
1677 #define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE
|
|
|
1678 #define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE
|
|
|
1679 #define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE
|
|
|
1680 #define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE
|
|
|
1681 #define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET
|
|
|
1682 #define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET
|
|
|
1683 #define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE
|
|
|
1684 #define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE
|
|
|
1685 #define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE
|
|
|
1686 #define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE
|
|
|
1687 #define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE
|
|
|
1688 #define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET
|
|
|
1689 #define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET
|
|
|
1690 #define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE
|
|
|
1691 #define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE
|
|
|
1692 #define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE
|
|
|
1693 #define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE
|
|
|
1694 #define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET
|
|
|
1695 #define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET
|
|
|
1696 #define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE
|
|
|
1697 #define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE
|
|
|
1698 #define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE
|
|
|
1699 #define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE
|
|
|
1700 #define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET
|
|
|
1701 #define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET
|
|
|
1702 #define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE
|
|
|
1703 #define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE
|
|
|
1704 #define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE
|
|
|
1705 #define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE
|
|
|
1706 #define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE
|
|
|
1707 #define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE
|
|
|
1708 #define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE
|
|
|
1709 #define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE
|
|
|
1710 #define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE
|
|
|
1711 #define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE
|
|
|
1712 #define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE
|
|
|
1713 #define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE
|
|
|
1714 #define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE
|
|
|
1715 #define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE
|
|
|
1716 #define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE
|
|
|
1717 #define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE
|
|
|
1718 #define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE
|
|
|
1719 #define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE
|
|
|
1720 #define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE
|
|
|
1721 #define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE
|
|
|
1722 #define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE
|
|
|
1723 #define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET
|
|
|
1724 #define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET
|
|
|
1725 #define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE
|
|
|
1726 #define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE
|
|
|
1727 #define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE
|
|
|
1728 #define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE
|
|
|
1729 #define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET
|
|
|
1730 #define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET
|
|
|
1731 #define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE
|
|
|
1732 #define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE
|
|
|
1733 #define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE
|
|
|
1734 #define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE
|
|
|
1735 #define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET
|
|
|
1736 #define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET
|
|
|
1737 #define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE
|
|
|
1738 #define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE
|
|
|
1739 #define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE
|
|
|
1740 #define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE
|
|
|
1741 #define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET
|
|
|
1742 #define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET
|
|
|
1743 #define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE
|
|
|
1744 #define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE
|
|
|
1745 #define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE
|
|
|
1746 #define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE
|
|
|
1747 #define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET
|
|
|
1748 #define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE
|
|
|
1749 #define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE
|
|
|
1750 #define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE
|
|
|
1751 #define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE
|
|
|
1752 #define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE
|
|
|
1753 #define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE
|
|
|
1754 #define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET
|
|
|
1755 #define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET
|
|
|
1756 #define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE
|
|
|
1757 #define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE
|
|
|
1758 #define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE
|
|
|
1759 #define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE
|
|
|
1760 #define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET
|
|
|
1761 #define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET
|
|
|
1762 #define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE
|
|
|
1763 #define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE
|
|
|
1764 #define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE
|
|
|
1765 #define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE
|
|
|
1766 #define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET
|
|
|
1767 #define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET
|
|
|
1768 #define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE
|
|
|
1769 #define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE
|
|
|
1770 #define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE
|
|
|
1771 #define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE
|
|
|
1772 #define __OTGHS_FORCE_RESET __HAL_RCC_OTGHS_FORCE_RESET
|
|
|
1773 #define __OTGHS_RELEASE_RESET __HAL_RCC_OTGHS_RELEASE_RESET
|
|
|
1774 #define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE
|
|
|
1775 #define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE
|
|
|
1776 #define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
|
|
|
1777 #define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE
|
|
|
1778 #define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE
|
|
|
1779 #define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE
|
|
|
1780 #define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE
|
|
|
1781 #define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE
|
|
|
1782 #define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE
|
|
|
1783 #define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE
|
|
|
1784 #define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE
|
|
|
1785 #define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE
|
|
|
1786 #define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET
|
|
|
1787 #define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET
|
|
|
1788 #define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE
|
|
|
1789 #define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE
|
|
|
1790 #define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
|
|
|
1791 #define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
|
|
|
1792 #define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
|
|
|
1793 #define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
|
|
|
1794 #define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE
|
|
|
1795 #define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE
|
|
|
1796 #define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET
|
|
|
1797 #define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET
|
|
|
1798 #define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE
|
|
|
1799 #define __DMA2D_CLK_SLEEP_DISABLE __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE
|
|
|
1800
|
|
|
1801 /* alias define maintained for legacy */
|
|
|
1802 #define __HAL_RCC_OTGFS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
|
|
|
1803 #define __HAL_RCC_OTGFS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
|
|
|
1804
|
|
|
1805 #define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG
|
|
|
1806 #define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG
|
|
|
1807
|
|
|
1808 #define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE
|
|
|
1809
|
|
|
1810 #define HSION_BitNumber RCC_HSION_BIT_NUMBER
|
|
|
1811 #define CSSON_BitNumber RCC_CSSON_BIT_NUMBER
|
|
|
1812 #define PLLON_BitNumber RCC_PLLON_BIT_NUMBER
|
|
|
1813 #define PLLI2SON_BitNumber RCC_PLLI2SON_BIT_NUMBER
|
|
|
1814 #define I2SSRC_BitNumber RCC_I2SSRC_BIT_NUMBER
|
|
|
1815 #define RTCEN_BitNumber RCC_RTCEN_BIT_NUMBER
|
|
|
1816 #define BDRST_BitNumber RCC_BDRST_BIT_NUMBER
|
|
|
1817 #define LSION_BitNumber RCC_LSION_BIT_NUMBER
|
|
|
1818 #define PLLSAION_BitNumber RCC_PLLSAION_BIT_NUMBER
|
|
|
1819 #define TIMPRE_BitNumber RCC_TIMPRE_BIT_NUMBER
|
|
|
1820
|
|
|
1821 #define CR_BYTE2_ADDRESS RCC_CR_BYTE2_ADDRESS
|
|
|
1822 #define CIR_BYTE1_ADDRESS RCC_CIR_BYTE1_ADDRESS
|
|
|
1823 #define CIR_BYTE2_ADDRESS RCC_CIR_BYTE2_ADDRESS
|
|
|
1824 #define BDCR_BYTE0_ADDRESS RCC_BDCR_BYTE0_ADDRESS
|
|
|
1825 #define DBP_TIMEOUT_VALUE RCC_DBP_TIMEOUT_VALUE
|
|
|
1826 #define LSE_TIMEOUT_VALUE RCC_LSE_TIMEOUT_VALUE
|
|
|
1827
|
|
|
1828 #define CR_HSION_BB RCC_CR_HSION_BB
|
|
|
1829 #define CR_CSSON_BB RCC_CR_CSSON_BB
|
|
|
1830 #define CR_PLLON_BB RCC_CR_PLLON_BB
|
|
|
1831 #define CR_PLLI2SON_BB RCC_CR_PLLI2SON_BB
|
|
|
1832 #define CFGR_I2SSRC_BB RCC_CFGR_I2SSRC_BB
|
|
|
1833 #define BDCR_RTCEN_BB RCC_BDCR_RTCEN_BB
|
|
|
1834 #define BDCR_BDRST_BB RCC_BDCR_BDRST_BB
|
|
|
1835 #define CSR_LSION_BB RCC_CSR_LSION_BB
|
|
|
1836 #define CR_PLLSAION_BB RCC_CR_PLLSAION_BB
|
|
|
1837 #define DCKCFGR_TIMPRE_BB RCC_DCKCFGR_TIMPRE_BB
|
|
|
1838
|
|
|
1839 /**
|
|
|
1840 * @}
|
|
|
1841 */
|
|
|
1842
|
|
|
1843 /** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose
|
|
|
1844 * @{
|
|
|
1845 */
|
|
|
1846 #define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback(__HANDLE__, uint32_t random32bit)
|
|
|
1847
|
|
|
1848 /**
|
|
|
1849 * @}
|
|
|
1850 */
|
|
|
1851
|
|
|
1852 /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
|
|
|
1853 * @{
|
|
|
1854 */
|
|
|
1855
|
|
|
1856 #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
|
|
|
1857 #define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT
|
|
|
1858 #define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT
|
|
|
1859 #if defined (RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
|
|
|
1860 #define __HAL_RTC_EXTI_CLEAR_FLAG(__EXTI_LINE__) ((__EXTI_LINE__ == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() : \
|
|
|
1861 ((__EXTI_LINE__ == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() : \
|
|
|
1862 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG()))
|
|
|
1863 #define __HAL_RTC_EXTI_ENABLE_IT(__EXTI_LINE__) ((__EXTI_LINE__ == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_ENABLE_IT() : \
|
|
|
1864 ((__EXTI_LINE__ == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() : \
|
|
|
1865 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT()))
|
|
|
1866 #define __HAL_RTC_EXTI_DISABLE_IT(__EXTI_LINE__) ((__EXTI_LINE__ == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_DISABLE_IT() : \
|
|
|
1867 ((__EXTI_LINE__ == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() : \
|
|
|
1868 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT()))
|
|
|
1869 #define __HAL_RTC_EXTI_GET_FLAG(__EXTI_LINE__) ((__EXTI_LINE__ == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GET_FLAG() : \
|
|
|
1870 ((__EXTI_LINE__ == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() : \
|
|
|
1871 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG()))
|
|
|
1872 #define __HAL_RTC_EXTI_GENERATE_SWIT(__EXTI_LINE__) ((__EXTI_LINE__ == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() : \
|
|
|
1873 ((__EXTI_LINE__ == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() : \
|
|
|
1874 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
|
|
|
1875
|
|
|
1876 #else
|
|
|
1877 #define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG()
|
|
|
1878
|
|
|
1879 #define __HAL_RTC_EXTI_ENABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_ENABLE_IT()
|
|
|
1880
|
|
|
1881 #define __HAL_RTC_EXTI_DISABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_DISABLE_IT()
|
|
|
1882
|
|
|
1883 #define __HAL_RTC_EXTI_GET_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GET_FLAG()
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|
|
1884
|
|
|
1885 #define __HAL_RTC_EXTI_GENERATE_SWIT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GENERATE_SWIT()
|
|
|
1886
|
|
|
1887 #endif
|
|
|
1888
|
|
|
1889 #define IS_ALARM IS_RTC_ALARM
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|
|
1890 #define IS_ALARM_MASK IS_RTC_ALARM_MASK
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|
|
1891 #define IS_TAMPER IS_RTC_TAMPER
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|
|
1892 #define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE
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|
|
1893 #define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER
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|
|
1894 #define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT
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|
|
1895 #define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE
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|
|
1896 #define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION
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|
|
1897 #define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE
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|
|
1898 #define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ
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|
|
1899 #define IS_TAMPER_TIMESTAMPONTAMPER_DETECTION IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION
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1900 #define IS_TAMPER_TRIGGER IS_RTC_TAMPER_TRIGGER
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|
|
1901 #define IS_WAKEUP_CLOCK IS_RTC_WAKEUP_CLOCK
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|
|
1902 #define IS_WAKEUP_COUNTER IS_RTC_WAKEUP_COUNTER
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|
|
1903
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|
|
1904 #define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE
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|
|
1905 #define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE
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|
|
1906
|
|
|
1907 /**
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|
1908 * @}
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|
|
1909 */
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|
|
1910
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|
|
1911 /** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose
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|
1912 * @{
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|
1913 */
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|
|
1914
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|
1915 #define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
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|
1916 #define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
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1917
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1918 /**
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|
1919 * @}
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|
1920 */
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1921
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|
|
1922 /** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose
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|
|
1923 * @{
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|
1924 */
|
|
|
1925
|
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|
1926 #define __SMARTCARD_ENABLE_IT __HAL_SMARTCARD_ENABLE_IT
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|
1927 #define __SMARTCARD_DISABLE_IT __HAL_SMARTCARD_DISABLE_IT
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|
|
1928 #define __SMARTCARD_ENABLE __HAL_SMARTCARD_ENABLE
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|
|
1929 #define __SMARTCARD_DISABLE __HAL_SMARTCARD_DISABLE
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|
1930 #define __SMARTCARD_DMA_REQUEST_ENABLE __HAL_SMARTCARD_DMA_REQUEST_ENABLE
|
|
|
1931 #define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE
|
|
|
1932
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|
|
1933 #define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
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|
|
1934 #define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
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|
|
1935
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|
|
1936 #define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE
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|
|
1937
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|
1938 /**
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|
1939 * @}
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|
|
1940 */
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|
|
1941
|
|
|
1942 /** @defgroup HAL_SMBUS_Aliased_Macros HAL SMBUS Aliased Macros maintained for legacy purpose
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|
1943 * @{
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|
1944 */
|
|
|
1945 #define __HAL_SMBUS_RESET_CR1 SMBUS_RESET_CR1
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|
|
1946 #define __HAL_SMBUS_RESET_CR2 SMBUS_RESET_CR2
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|
|
1947 #define __HAL_SMBUS_GENERATE_START SMBUS_GENERATE_START
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|
|
1948 #define __HAL_SMBUS_GET_ADDR_MATCH SMBUS_GET_ADDR_MATCH
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|
|
1949 #define __HAL_SMBUS_GET_DIR SMBUS_GET_DIR
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|
|
1950 #define __HAL_SMBUS_GET_STOP_MODE SMBUS_GET_STOP_MODE
|
|
|
1951 #define __HAL_SMBUS_GET_PEC_MODE SMBUS_GET_PEC_MODE
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|
|
1952 #define __HAL_SMBUS_GET_ALERT_ENABLED SMBUS_GET_ALERT_ENABLED
|
|
|
1953 /**
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|
1954 * @}
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|
|
1955 */
|
|
|
1956
|
|
|
1957 /** @defgroup HAL_SPI_Aliased_Macros HAL SPI Aliased Macros maintained for legacy purpose
|
|
|
1958 * @{
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|
|
1959 */
|
|
|
1960
|
|
|
1961 #define __HAL_SPI_1LINE_TX SPI_1LINE_TX
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|
|
1962 #define __HAL_SPI_1LINE_RX SPI_1LINE_RX
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|
|
1963 #define __HAL_SPI_RESET_CRC SPI_RESET_CRC
|
|
|
1964
|
|
|
1965 /**
|
|
|
1966 * @}
|
|
|
1967 */
|
|
|
1968
|
|
|
1969 /** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose
|
|
|
1970 * @{
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|
|
1971 */
|
|
|
1972
|
|
|
1973 #define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
|
|
|
1974 #define __HAL_UART_MASK_COMPUTATION UART_MASK_COMPUTATION
|
|
|
1975 #define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
|
|
|
1976 #define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION
|
|
|
1977
|
|
|
1978 #define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD
|
|
|
1979
|
|
|
1980 #define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE
|
|
|
1981 #define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE
|
|
|
1982
|
|
|
1983 /**
|
|
|
1984 * @}
|
|
|
1985 */
|
|
|
1986
|
|
|
1987
|
|
|
1988 /** @defgroup HAL_USART_Aliased_Macros HAL USART Aliased Macros maintained for legacy purpose
|
|
|
1989 * @{
|
|
|
1990 */
|
|
|
1991
|
|
|
1992 #define __USART_ENABLE_IT __HAL_USART_ENABLE_IT
|
|
|
1993 #define __USART_DISABLE_IT __HAL_USART_DISABLE_IT
|
|
|
1994 #define __USART_ENABLE __HAL_USART_ENABLE
|
|
|
1995 #define __USART_DISABLE __HAL_USART_DISABLE
|
|
|
1996
|
|
|
1997 #define __HAL_USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
|
|
|
1998 #define __USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
|
|
|
1999
|
|
|
2000 /**
|
|
|
2001 * @}
|
|
|
2002 */
|
|
|
2003
|
|
|
2004 /** @defgroup HAL_USB_Aliased_Macros HAL USB Aliased Macros maintained for legacy purpose
|
|
|
2005 * @{
|
|
|
2006 */
|
|
|
2007 #define USB_EXTI_LINE_WAKEUP USB_WAKEUP_EXTI_LINE
|
|
|
2008
|
|
|
2009 #define USB_FS_EXTI_TRIGGER_RISING_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE
|
|
|
2010 #define USB_FS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE
|
|
|
2011 #define USB_FS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE
|
|
|
2012 #define USB_FS_EXTI_LINE_WAKEUP USB_OTG_FS_WAKEUP_EXTI_LINE
|
|
|
2013
|
|
|
2014 #define USB_HS_EXTI_TRIGGER_RISING_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE
|
|
|
2015 #define USB_HS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE
|
|
|
2016 #define USB_HS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE
|
|
|
2017 #define USB_HS_EXTI_LINE_WAKEUP USB_OTG_HS_WAKEUP_EXTI_LINE
|
|
|
2018
|
|
|
2019 #define __HAL_USB_EXTI_ENABLE_IT __HAL_USB_WAKEUP_EXTI_ENABLE_IT
|
|
|
2020 #define __HAL_USB_EXTI_DISABLE_IT __HAL_USB_WAKEUP_EXTI_DISABLE_IT
|
|
|
2021 #define __HAL_USB_EXTI_GET_FLAG __HAL_USB_WAKEUP_EXTI_GET_FLAG
|
|
|
2022 #define __HAL_USB_EXTI_CLEAR_FLAG __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG
|
|
|
2023 #define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE
|
|
|
2024 #define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE
|
|
|
2025 #define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
|
|
|
2026
|
|
|
2027 #define __HAL_USB_FS_EXTI_ENABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT
|
|
|
2028 #define __HAL_USB_FS_EXTI_DISABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT
|
|
|
2029 #define __HAL_USB_FS_EXTI_GET_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG
|
|
|
2030 #define __HAL_USB_FS_EXTI_CLEAR_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG
|
|
|
2031 #define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE
|
|
|
2032 #define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
|
|
|
2033 #define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
|
|
|
2034 #define __HAL_USB_FS_EXTI_GENERATE_SWIT __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT
|
|
|
2035
|
|
|
2036 #define __HAL_USB_HS_EXTI_ENABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT
|
|
|
2037 #define __HAL_USB_HS_EXTI_DISABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT
|
|
|
2038 #define __HAL_USB_HS_EXTI_GET_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG
|
|
|
2039 #define __HAL_USB_HS_EXTI_CLEAR_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG
|
|
|
2040 #define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE
|
|
|
2041 #define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
|
|
|
2042 #define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
|
|
|
2043 #define __HAL_USB_HS_EXTI_GENERATE_SWIT __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT
|
|
|
2044
|
|
|
2045 #define HAL_PCD_ActiveRemoteWakeup HAL_PCD_ActivateRemoteWakeup
|
|
|
2046 #define HAL_PCD_DeActiveRemoteWakeup HAL_PCD_DeActivateRemoteWakeup
|
|
|
2047
|
|
|
2048 #define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo
|
|
|
2049 #define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo
|
|
|
2050 /**
|
|
|
2051 * @}
|
|
|
2052 */
|
|
|
2053
|
|
|
2054 /** @defgroup HAL_TIM_Aliased_Macros HAL TIM Aliased Macros maintained for legacy purpose
|
|
|
2055 * @{
|
|
|
2056 */
|
|
|
2057 #define __HAL_TIM_SetICPrescalerValue TIM_SET_ICPRESCALERVALUE
|
|
|
2058 #define __HAL_TIM_ResetICPrescalerValue TIM_RESET_ICPRESCALERVALUE
|
|
|
2059
|
|
|
2060 #define TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE
|
|
|
2061 #define TIM_GET_CLEAR_IT __HAL_TIM_CLEAR_IT
|
|
|
2062
|
|
|
2063 #define __HAL_TIM_DIRECTION_STATUS __HAL_TIM_IS_TIM_COUNTING_DOWN
|
|
|
2064 #define __HAL_TIM_PRESCALER __HAL_TIM_SET_PRESCALER
|
|
|
2065 #define __HAL_TIM_SetCounter __HAL_TIM_SET_COUNTER
|
|
|
2066 #define __HAL_TIM_GetCounter __HAL_TIM_GET_COUNTER
|
|
|
2067 #define __HAL_TIM_SetAutoreload __HAL_TIM_SET_AUTORELOAD
|
|
|
2068 #define __HAL_TIM_GetAutoreload __HAL_TIM_GET_AUTORELOAD
|
|
|
2069 #define __HAL_TIM_SetClockDivision __HAL_TIM_SET_CLOCKDIVISION
|
|
|
2070 #define __HAL_TIM_GetClockDivision __HAL_TIM_GET_CLOCKDIVISION
|
|
|
2071 #define __HAL_TIM_SetICPrescaler __HAL_TIM_SET_ICPRESCALER
|
|
|
2072 #define __HAL_TIM_GetICPrescaler __HAL_TIM_GET_ICPRESCALER
|
|
|
2073 #define __HAL_TIM_SetCompare __HAL_TIM_SET_COMPARE
|
|
|
2074 #define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
|
|
|
2075
|
|
|
2076 #define TIM_TS_ITR0 ((uint32_t)0x0000)
|
|
|
2077 #define TIM_TS_ITR1 ((uint32_t)0x0010)
|
|
|
2078 #define TIM_TS_ITR2 ((uint32_t)0x0020)
|
|
|
2079 #define TIM_TS_ITR3 ((uint32_t)0x0030)
|
|
|
2080 #define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
|
|
|
2081 ((SELECTION) == TIM_TS_ITR1) || \
|
|
|
2082 ((SELECTION) == TIM_TS_ITR2) || \
|
|
|
2083 ((SELECTION) == TIM_TS_ITR3))
|
|
|
2084
|
|
|
2085 #define TIM_CHANNEL_1 ((uint32_t)0x0000)
|
|
|
2086 #define TIM_CHANNEL_2 ((uint32_t)0x0004)
|
|
|
2087 #define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
|
|
|
2088 ((CHANNEL) == TIM_CHANNEL_2))
|
|
|
2089
|
|
|
2090 #define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000)
|
|
|
2091 #define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE)
|
|
|
2092
|
|
|
2093 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OUTPUTNSTATE_DISABLE) || \
|
|
|
2094 ((STATE) == TIM_OUTPUTNSTATE_ENABLE))
|
|
|
2095
|
|
|
2096 #define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000)
|
|
|
2097 #define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
|
|
|
2098
|
|
|
2099 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OUTPUTSTATE_DISABLE) || \
|
|
|
2100 ((STATE) == TIM_OUTPUTSTATE_ENABLE))
|
|
|
2101 /**
|
|
|
2102 * @}
|
|
|
2103 */
|
|
|
2104
|
|
|
2105 /** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose
|
|
|
2106 * @{
|
|
|
2107 */
|
|
|
2108
|
|
|
2109 #define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT
|
|
|
2110 #define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT
|
|
|
2111 #define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG
|
|
|
2112 #define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG
|
|
|
2113 #define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER
|
|
|
2114 #define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER
|
|
|
2115 #define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER
|
|
|
2116
|
|
|
2117 #define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE
|
|
|
2118 #define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE
|
|
|
2119 #define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE
|
|
|
2120 /**
|
|
|
2121 * @}
|
|
|
2122 */
|
|
|
2123
|
|
|
2124 /** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose
|
|
|
2125 * @{
|
|
|
2126 */
|
|
|
2127 #define __HAL_LTDC_LAYER LTDC_LAYER
|
|
|
2128 /**
|
|
|
2129 * @}
|
|
|
2130 */
|
|
|
2131
|
|
|
2132 /** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose
|
|
|
2133 * @{
|
|
|
2134 */
|
|
|
2135 #define SAI_OUTPUTDRIVE_DISABLED SAI_OUTPUTDRIVE_DISABLE
|
|
|
2136 #define SAI_OUTPUTDRIVE_ENABLED SAI_OUTPUTDRIVE_ENABLE
|
|
|
2137 #define SAI_MASTERDIVIDER_ENABLED SAI_MASTERDIVIDER_ENABLE
|
|
|
2138 #define SAI_MASTERDIVIDER_DISABLED SAI_MASTERDIVIDER_DISABLE
|
|
|
2139 #define SAI_STREOMODE SAI_STEREOMODE
|
|
|
2140 #define SAI_FIFOStatus_Empty SAI_FIFOSTATUS_EMPTY
|
|
|
2141 #define SAI_FIFOStatus_Less1QuarterFull SAI_FIFOSTATUS_LESS1QUARTERFULL
|
|
|
2142 #define SAI_FIFOStatus_1QuarterFull SAI_FIFOSTATUS_1QUARTERFULL
|
|
|
2143 #define SAI_FIFOStatus_HalfFull SAI_FIFOSTATUS_HALFFULL
|
|
|
2144 #define SAI_FIFOStatus_3QuartersFull SAI_FIFOSTATUS_3QUARTERFULL
|
|
|
2145 #define SAI_FIFOStatus_Full SAI_FIFOSTATUS_FULL
|
|
|
2146 #define IS_SAI_BLOCK_MONO_STREO_MODE IS_SAI_BLOCK_MONO_STEREO_MODE
|
|
|
2147
|
|
|
2148 /**
|
|
|
2149 * @}
|
|
|
2150 */
|
|
|
2151
|
|
|
2152
|
|
|
2153 /** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
|
|
|
2154 * @{
|
|
|
2155 */
|
|
|
2156
|
|
|
2157 /**
|
|
|
2158 * @}
|
|
|
2159 */
|
|
|
2160
|
|
|
2161 #ifdef __cplusplus
|
|
|
2162 }
|
|
|
2163 #endif
|
|
|
2164
|
|
|
2165 #endif /* ___STM32_HAL_LEGACY */
|
|
|
2166
|
|
|
2167 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
|
2168
|
