Mercurial > public > ostc4
annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_spi.h @ 892:0e084e5554a8 Evo_2_23
Smal modification slow exit counter:
The slow exit counter is not only activated if deco obligations have been completed and if the dive time is longer than 15 minutes.
author | ideenmodellierer |
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date | Tue, 10 Sep 2024 21:18:36 +0200 |
parents | c78bcbd5deda |
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rev | line source |
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128
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_ll_spi.h |
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4 * @author MCD Application Team |
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5 * @brief Header file of SPI LL module. |
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6 ****************************************************************************** |
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7 * @attention |
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8 * |
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9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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10 * |
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11 * Redistribution and use in source and binary forms, with or without modification, |
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12 * are permitted provided that the following conditions are met: |
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13 * 1. Redistributions of source code must retain the above copyright notice, |
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14 * this list of conditions and the following disclaimer. |
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15 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 * this list of conditions and the following disclaimer in the documentation |
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17 * and/or other materials provided with the distribution. |
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 * may be used to endorse or promote products derived from this software |
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20 * without specific prior written permission. |
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21 * |
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 * |
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33 ****************************************************************************** |
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34 */ |
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35 |
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36 /* Define to prevent recursive inclusion -------------------------------------*/ |
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37 #ifndef __STM32F4xx_LL_SPI_H |
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38 #define __STM32F4xx_LL_SPI_H |
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39 |
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40 #ifdef __cplusplus |
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41 extern "C" { |
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42 #endif |
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43 |
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44 /* Includes ------------------------------------------------------------------*/ |
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45 #include "stm32f4xx.h" |
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46 |
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47 /** @addtogroup STM32F4xx_LL_Driver |
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48 * @{ |
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49 */ |
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50 |
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51 #if defined (SPI1) || defined (SPI2) || defined (SPI3) || defined (SPI4) || defined (SPI5) || defined(SPI6) |
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52 |
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53 /** @defgroup SPI_LL SPI |
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54 * @{ |
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55 */ |
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56 |
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57 /* Private types -------------------------------------------------------------*/ |
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58 /* Private variables ---------------------------------------------------------*/ |
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59 /* Private macros ------------------------------------------------------------*/ |
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60 |
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61 /* Exported types ------------------------------------------------------------*/ |
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62 #if defined(USE_FULL_LL_DRIVER) |
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63 /** @defgroup SPI_LL_ES_INIT SPI Exported Init structure |
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64 * @{ |
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65 */ |
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66 |
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67 /** |
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68 * @brief SPI Init structures definition |
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69 */ |
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70 typedef struct |
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71 { |
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72 uint32_t TransferDirection; /*!< Specifies the SPI unidirectional or bidirectional data mode. |
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73 This parameter can be a value of @ref SPI_LL_EC_TRANSFER_MODE. |
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74 |
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75 This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferDirection().*/ |
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76 |
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77 uint32_t Mode; /*!< Specifies the SPI mode (Master/Slave). |
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78 This parameter can be a value of @ref SPI_LL_EC_MODE. |
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79 |
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80 This feature can be modified afterwards using unitary function @ref LL_SPI_SetMode().*/ |
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81 |
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82 uint32_t DataWidth; /*!< Specifies the SPI data width. |
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83 This parameter can be a value of @ref SPI_LL_EC_DATAWIDTH. |
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84 |
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85 This feature can be modified afterwards using unitary function @ref LL_SPI_SetDataWidth().*/ |
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86 |
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87 uint32_t ClockPolarity; /*!< Specifies the serial clock steady state. |
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88 This parameter can be a value of @ref SPI_LL_EC_POLARITY. |
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89 |
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90 This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPolarity().*/ |
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91 |
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92 uint32_t ClockPhase; /*!< Specifies the clock active edge for the bit capture. |
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93 This parameter can be a value of @ref SPI_LL_EC_PHASE. |
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94 |
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95 This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPhase().*/ |
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96 |
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97 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (NSS pin) or by software using the SSI bit. |
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98 This parameter can be a value of @ref SPI_LL_EC_NSS_MODE. |
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99 |
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100 This feature can be modified afterwards using unitary function @ref LL_SPI_SetNSSMode().*/ |
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101 |
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102 uint32_t BaudRate; /*!< Specifies the BaudRate prescaler value which will be used to configure the transmit and receive SCK clock. |
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103 This parameter can be a value of @ref SPI_LL_EC_BAUDRATEPRESCALER. |
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104 @note The communication clock is derived from the master clock. The slave clock does not need to be set. |
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105 |
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106 This feature can be modified afterwards using unitary function @ref LL_SPI_SetBaudRatePrescaler().*/ |
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107 |
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108 uint32_t BitOrder; /*!< Specifies whether data transfers start from MSB or LSB bit. |
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109 This parameter can be a value of @ref SPI_LL_EC_BIT_ORDER. |
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110 |
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111 This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferBitOrder().*/ |
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112 |
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113 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. |
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114 This parameter can be a value of @ref SPI_LL_EC_CRC_CALCULATION. |
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115 |
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116 This feature can be modified afterwards using unitary functions @ref LL_SPI_EnableCRC() and @ref LL_SPI_DisableCRC().*/ |
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117 |
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118 uint32_t CRCPoly; /*!< Specifies the polynomial used for the CRC calculation. |
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119 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF. |
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120 |
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121 This feature can be modified afterwards using unitary function @ref LL_SPI_SetCRCPolynomial().*/ |
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122 |
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123 } LL_SPI_InitTypeDef; |
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124 |
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125 /** |
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126 * @} |
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127 */ |
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128 #endif /* USE_FULL_LL_DRIVER */ |
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129 |
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130 /* Exported constants --------------------------------------------------------*/ |
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131 /** @defgroup SPI_LL_Exported_Constants SPI Exported Constants |
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132 * @{ |
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133 */ |
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134 |
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135 /** @defgroup SPI_LL_EC_GET_FLAG Get Flags Defines |
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136 * @brief Flags defines which can be used with LL_SPI_ReadReg function |
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137 * @{ |
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138 */ |
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139 #define LL_SPI_SR_RXNE SPI_SR_RXNE /*!< Rx buffer not empty flag */ |
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140 #define LL_SPI_SR_TXE SPI_SR_TXE /*!< Tx buffer empty flag */ |
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141 #define LL_SPI_SR_BSY SPI_SR_BSY /*!< Busy flag */ |
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142 #define LL_SPI_SR_CRCERR SPI_SR_CRCERR /*!< CRC error flag */ |
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143 #define LL_SPI_SR_MODF SPI_SR_MODF /*!< Mode fault flag */ |
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144 #define LL_SPI_SR_OVR SPI_SR_OVR /*!< Overrun flag */ |
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145 #define LL_SPI_SR_FRE SPI_SR_FRE /*!< TI mode frame format error flag */ |
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146 /** |
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147 * @} |
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148 */ |
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149 |
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150 /** @defgroup SPI_LL_EC_IT IT Defines |
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151 * @brief IT defines which can be used with LL_SPI_ReadReg and LL_SPI_WriteReg functions |
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152 * @{ |
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153 */ |
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154 #define LL_SPI_CR2_RXNEIE SPI_CR2_RXNEIE /*!< Rx buffer not empty interrupt enable */ |
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155 #define LL_SPI_CR2_TXEIE SPI_CR2_TXEIE /*!< Tx buffer empty interrupt enable */ |
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156 #define LL_SPI_CR2_ERRIE SPI_CR2_ERRIE /*!< Error interrupt enable */ |
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157 /** |
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158 * @} |
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159 */ |
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160 |
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161 /** @defgroup SPI_LL_EC_MODE Operation Mode |
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162 * @{ |
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163 */ |
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164 #define LL_SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) /*!< Master configuration */ |
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165 #define LL_SPI_MODE_SLAVE 0x00000000U /*!< Slave configuration */ |
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166 /** |
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167 * @} |
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168 */ |
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169 |
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170 /** @defgroup SPI_LL_EC_PROTOCOL Serial Protocol |
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171 * @{ |
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172 */ |
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173 #define LL_SPI_PROTOCOL_MOTOROLA 0x00000000U /*!< Motorola mode. Used as default value */ |
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174 #define LL_SPI_PROTOCOL_TI (SPI_CR2_FRF) /*!< TI mode */ |
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175 /** |
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176 * @} |
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177 */ |
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178 |
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179 /** @defgroup SPI_LL_EC_PHASE Clock Phase |
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180 * @{ |
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181 */ |
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182 #define LL_SPI_PHASE_1EDGE 0x00000000U /*!< First clock transition is the first data capture edge */ |
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183 #define LL_SPI_PHASE_2EDGE (SPI_CR1_CPHA) /*!< Second clock transition is the first data capture edge */ |
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184 /** |
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185 * @} |
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186 */ |
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187 |
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188 /** @defgroup SPI_LL_EC_POLARITY Clock Polarity |
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189 * @{ |
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190 */ |
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191 #define LL_SPI_POLARITY_LOW 0x00000000U /*!< Clock to 0 when idle */ |
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192 #define LL_SPI_POLARITY_HIGH (SPI_CR1_CPOL) /*!< Clock to 1 when idle */ |
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193 /** |
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194 * @} |
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195 */ |
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196 |
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197 /** @defgroup SPI_LL_EC_BAUDRATEPRESCALER Baud Rate Prescaler |
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198 * @{ |
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199 */ |
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200 #define LL_SPI_BAUDRATEPRESCALER_DIV2 0x00000000U /*!< BaudRate control equal to fPCLK/2 */ |
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201 #define LL_SPI_BAUDRATEPRESCALER_DIV4 (SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/4 */ |
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202 #define LL_SPI_BAUDRATEPRESCALER_DIV8 (SPI_CR1_BR_1) /*!< BaudRate control equal to fPCLK/8 */ |
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203 #define LL_SPI_BAUDRATEPRESCALER_DIV16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/16 */ |
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204 #define LL_SPI_BAUDRATEPRESCALER_DIV32 (SPI_CR1_BR_2) /*!< BaudRate control equal to fPCLK/32 */ |
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205 #define LL_SPI_BAUDRATEPRESCALER_DIV64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/64 */ |
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206 #define LL_SPI_BAUDRATEPRESCALER_DIV128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) /*!< BaudRate control equal to fPCLK/128 */ |
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207 #define LL_SPI_BAUDRATEPRESCALER_DIV256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) /*!< BaudRate control equal to fPCLK/256 */ |
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208 /** |
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209 * @} |
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210 */ |
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211 |
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212 /** @defgroup SPI_LL_EC_BIT_ORDER Transmission Bit Order |
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213 * @{ |
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214 */ |
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215 #define LL_SPI_LSB_FIRST (SPI_CR1_LSBFIRST) /*!< Data is transmitted/received with the LSB first */ |
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216 #define LL_SPI_MSB_FIRST 0x00000000U /*!< Data is transmitted/received with the MSB first */ |
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217 /** |
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218 * @} |
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219 */ |
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220 |
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221 /** @defgroup SPI_LL_EC_TRANSFER_MODE Transfer Mode |
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222 * @{ |
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223 */ |
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224 #define LL_SPI_FULL_DUPLEX 0x00000000U /*!< Full-Duplex mode. Rx and Tx transfer on 2 lines */ |
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225 #define LL_SPI_SIMPLEX_RX (SPI_CR1_RXONLY) /*!< Simplex Rx mode. Rx transfer only on 1 line */ |
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226 #define LL_SPI_HALF_DUPLEX_RX (SPI_CR1_BIDIMODE) /*!< Half-Duplex Rx mode. Rx transfer on 1 line */ |
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227 #define LL_SPI_HALF_DUPLEX_TX (SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE) /*!< Half-Duplex Tx mode. Tx transfer on 1 line */ |
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228 /** |
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229 * @} |
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230 */ |
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231 |
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232 /** @defgroup SPI_LL_EC_NSS_MODE Slave Select Pin Mode |
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233 * @{ |
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234 */ |
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235 #define LL_SPI_NSS_SOFT (SPI_CR1_SSM) /*!< NSS managed internally. NSS pin not used and free */ |
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236 #define LL_SPI_NSS_HARD_INPUT 0x00000000U /*!< NSS pin used in Input. Only used in Master mode */ |
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237 #define LL_SPI_NSS_HARD_OUTPUT (((uint32_t)SPI_CR2_SSOE << 16U)) /*!< NSS pin used in Output. Only used in Slave mode as chip select */ |
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238 /** |
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239 * @} |
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240 */ |
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241 |
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242 /** @defgroup SPI_LL_EC_DATAWIDTH Datawidth |
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243 * @{ |
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244 */ |
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245 #define LL_SPI_DATAWIDTH_8BIT 0x00000000U /*!< Data length for SPI transfer: 8 bits */ |
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246 #define LL_SPI_DATAWIDTH_16BIT (SPI_CR1_DFF) /*!< Data length for SPI transfer: 16 bits */ |
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247 /** |
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248 * @} |
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249 */ |
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250 #if defined(USE_FULL_LL_DRIVER) |
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251 |
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252 /** @defgroup SPI_LL_EC_CRC_CALCULATION CRC Calculation |
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253 * @{ |
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254 */ |
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255 #define LL_SPI_CRCCALCULATION_DISABLE 0x00000000U /*!< CRC calculation disabled */ |
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256 #define LL_SPI_CRCCALCULATION_ENABLE (SPI_CR1_CRCEN) /*!< CRC calculation enabled */ |
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257 /** |
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258 * @} |
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259 */ |
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260 #endif /* USE_FULL_LL_DRIVER */ |
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261 |
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262 /** |
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263 * @} |
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264 */ |
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265 |
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266 /* Exported macro ------------------------------------------------------------*/ |
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267 /** @defgroup SPI_LL_Exported_Macros SPI Exported Macros |
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268 * @{ |
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269 */ |
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270 |
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271 /** @defgroup SPI_LL_EM_WRITE_READ Common Write and read registers Macros |
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272 * @{ |
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273 */ |
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274 |
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275 /** |
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276 * @brief Write a value in SPI register |
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277 * @param __INSTANCE__ SPI Instance |
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278 * @param __REG__ Register to be written |
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279 * @param __VALUE__ Value to be written in the register |
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280 * @retval None |
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281 */ |
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282 #define LL_SPI_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
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283 |
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284 /** |
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285 * @brief Read a value in SPI register |
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286 * @param __INSTANCE__ SPI Instance |
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287 * @param __REG__ Register to be read |
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288 * @retval Register value |
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289 */ |
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290 #define LL_SPI_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
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291 /** |
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292 * @} |
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293 */ |
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294 |
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295 /** |
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296 * @} |
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297 */ |
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298 |
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299 /* Exported functions --------------------------------------------------------*/ |
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300 /** @defgroup SPI_LL_Exported_Functions SPI Exported Functions |
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301 * @{ |
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302 */ |
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303 |
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304 /** @defgroup SPI_LL_EF_Configuration Configuration |
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305 * @{ |
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306 */ |
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307 |
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308 /** |
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309 * @brief Enable SPI peripheral |
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310 * @rmtoll CR1 SPE LL_SPI_Enable |
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311 * @param SPIx SPI Instance |
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312 * @retval None |
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313 */ |
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314 __STATIC_INLINE void LL_SPI_Enable(SPI_TypeDef *SPIx) |
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315 { |
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316 SET_BIT(SPIx->CR1, SPI_CR1_SPE); |
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317 } |
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318 |
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319 /** |
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320 * @brief Disable SPI peripheral |
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321 * @note When disabling the SPI, follow the procedure described in the Reference Manual. |
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322 * @rmtoll CR1 SPE LL_SPI_Disable |
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323 * @param SPIx SPI Instance |
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324 * @retval None |
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325 */ |
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326 __STATIC_INLINE void LL_SPI_Disable(SPI_TypeDef *SPIx) |
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327 { |
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328 CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE); |
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329 } |
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330 |
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331 /** |
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332 * @brief Check if SPI peripheral is enabled |
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333 * @rmtoll CR1 SPE LL_SPI_IsEnabled |
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334 * @param SPIx SPI Instance |
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335 * @retval State of bit (1 or 0). |
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336 */ |
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337 __STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx) |
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338 { |
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339 return (READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE)); |
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340 } |
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341 |
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342 /** |
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343 * @brief Set SPI operation mode to Master or Slave |
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344 * @note This bit should not be changed when communication is ongoing. |
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345 * @rmtoll CR1 MSTR LL_SPI_SetMode\n |
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346 * CR1 SSI LL_SPI_SetMode |
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347 * @param SPIx SPI Instance |
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348 * @param Mode This parameter can be one of the following values: |
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349 * @arg @ref LL_SPI_MODE_MASTER |
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350 * @arg @ref LL_SPI_MODE_SLAVE |
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351 * @retval None |
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352 */ |
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353 __STATIC_INLINE void LL_SPI_SetMode(SPI_TypeDef *SPIx, uint32_t Mode) |
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354 { |
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355 MODIFY_REG(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI, Mode); |
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356 } |
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357 |
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358 /** |
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359 * @brief Get SPI operation mode (Master or Slave) |
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360 * @rmtoll CR1 MSTR LL_SPI_GetMode\n |
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361 * CR1 SSI LL_SPI_GetMode |
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362 * @param SPIx SPI Instance |
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363 * @retval Returned value can be one of the following values: |
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364 * @arg @ref LL_SPI_MODE_MASTER |
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365 * @arg @ref LL_SPI_MODE_SLAVE |
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366 */ |
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367 __STATIC_INLINE uint32_t LL_SPI_GetMode(SPI_TypeDef *SPIx) |
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368 { |
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369 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI)); |
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370 } |
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371 |
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372 /** |
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373 * @brief Set serial protocol used |
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374 * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation. |
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375 * @rmtoll CR2 FRF LL_SPI_SetStandard |
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376 * @param SPIx SPI Instance |
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377 * @param Standard This parameter can be one of the following values: |
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378 * @arg @ref LL_SPI_PROTOCOL_MOTOROLA |
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379 * @arg @ref LL_SPI_PROTOCOL_TI |
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380 * @retval None |
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381 */ |
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382 __STATIC_INLINE void LL_SPI_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard) |
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383 { |
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384 MODIFY_REG(SPIx->CR2, SPI_CR2_FRF, Standard); |
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385 } |
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386 |
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387 /** |
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388 * @brief Get serial protocol used |
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389 * @rmtoll CR2 FRF LL_SPI_GetStandard |
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390 * @param SPIx SPI Instance |
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391 * @retval Returned value can be one of the following values: |
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392 * @arg @ref LL_SPI_PROTOCOL_MOTOROLA |
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393 * @arg @ref LL_SPI_PROTOCOL_TI |
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394 */ |
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395 __STATIC_INLINE uint32_t LL_SPI_GetStandard(SPI_TypeDef *SPIx) |
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396 { |
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397 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF)); |
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398 } |
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399 |
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400 /** |
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401 * @brief Set clock phase |
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402 * @note This bit should not be changed when communication is ongoing. |
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403 * This bit is not used in SPI TI mode. |
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404 * @rmtoll CR1 CPHA LL_SPI_SetClockPhase |
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405 * @param SPIx SPI Instance |
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406 * @param ClockPhase This parameter can be one of the following values: |
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407 * @arg @ref LL_SPI_PHASE_1EDGE |
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408 * @arg @ref LL_SPI_PHASE_2EDGE |
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409 * @retval None |
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410 */ |
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411 __STATIC_INLINE void LL_SPI_SetClockPhase(SPI_TypeDef *SPIx, uint32_t ClockPhase) |
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412 { |
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413 MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase); |
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414 } |
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415 |
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416 /** |
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417 * @brief Get clock phase |
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418 * @rmtoll CR1 CPHA LL_SPI_GetClockPhase |
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419 * @param SPIx SPI Instance |
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420 * @retval Returned value can be one of the following values: |
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421 * @arg @ref LL_SPI_PHASE_1EDGE |
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422 * @arg @ref LL_SPI_PHASE_2EDGE |
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423 */ |
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424 __STATIC_INLINE uint32_t LL_SPI_GetClockPhase(SPI_TypeDef *SPIx) |
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425 { |
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426 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); |
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427 } |
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428 |
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429 /** |
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430 * @brief Set clock polarity |
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431 * @note This bit should not be changed when communication is ongoing. |
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432 * This bit is not used in SPI TI mode. |
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433 * @rmtoll CR1 CPOL LL_SPI_SetClockPolarity |
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434 * @param SPIx SPI Instance |
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435 * @param ClockPolarity This parameter can be one of the following values: |
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436 * @arg @ref LL_SPI_POLARITY_LOW |
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437 * @arg @ref LL_SPI_POLARITY_HIGH |
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438 * @retval None |
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439 */ |
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440 __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) |
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441 { |
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442 MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity); |
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443 } |
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444 |
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445 /** |
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446 * @brief Get clock polarity |
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447 * @rmtoll CR1 CPOL LL_SPI_GetClockPolarity |
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448 * @param SPIx SPI Instance |
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449 * @retval Returned value can be one of the following values: |
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450 * @arg @ref LL_SPI_POLARITY_LOW |
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451 * @arg @ref LL_SPI_POLARITY_HIGH |
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452 */ |
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453 __STATIC_INLINE uint32_t LL_SPI_GetClockPolarity(SPI_TypeDef *SPIx) |
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454 { |
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455 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPOL)); |
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456 } |
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457 |
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458 /** |
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459 * @brief Set baud rate prescaler |
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460 * @note These bits should not be changed when communication is ongoing. SPI BaudRate = fPCLK/Prescaler. |
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461 * @rmtoll CR1 BR LL_SPI_SetBaudRatePrescaler |
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462 * @param SPIx SPI Instance |
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463 * @param BaudRate This parameter can be one of the following values: |
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464 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV2 |
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465 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV4 |
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466 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV8 |
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467 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV16 |
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468 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV32 |
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469 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV64 |
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470 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128 |
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471 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256 |
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472 * @retval None |
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473 */ |
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474 __STATIC_INLINE void LL_SPI_SetBaudRatePrescaler(SPI_TypeDef *SPIx, uint32_t BaudRate) |
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475 { |
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476 MODIFY_REG(SPIx->CR1, SPI_CR1_BR, BaudRate); |
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477 } |
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478 |
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479 /** |
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480 * @brief Get baud rate prescaler |
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481 * @rmtoll CR1 BR LL_SPI_GetBaudRatePrescaler |
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482 * @param SPIx SPI Instance |
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483 * @retval Returned value can be one of the following values: |
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484 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV2 |
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485 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV4 |
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486 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV8 |
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487 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV16 |
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488 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV32 |
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489 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV64 |
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490 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128 |
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491 * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256 |
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492 */ |
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493 __STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(SPI_TypeDef *SPIx) |
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494 { |
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495 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_BR)); |
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496 } |
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497 |
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498 /** |
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499 * @brief Set transfer bit order |
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500 * @note This bit should not be changed when communication is ongoing. This bit is not used in SPI TI mode. |
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501 * @rmtoll CR1 LSBFIRST LL_SPI_SetTransferBitOrder |
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502 * @param SPIx SPI Instance |
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503 * @param BitOrder This parameter can be one of the following values: |
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504 * @arg @ref LL_SPI_LSB_FIRST |
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505 * @arg @ref LL_SPI_MSB_FIRST |
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506 * @retval None |
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507 */ |
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508 __STATIC_INLINE void LL_SPI_SetTransferBitOrder(SPI_TypeDef *SPIx, uint32_t BitOrder) |
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509 { |
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510 MODIFY_REG(SPIx->CR1, SPI_CR1_LSBFIRST, BitOrder); |
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511 } |
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512 |
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513 /** |
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514 * @brief Get transfer bit order |
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515 * @rmtoll CR1 LSBFIRST LL_SPI_GetTransferBitOrder |
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516 * @param SPIx SPI Instance |
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517 * @retval Returned value can be one of the following values: |
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518 * @arg @ref LL_SPI_LSB_FIRST |
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519 * @arg @ref LL_SPI_MSB_FIRST |
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520 */ |
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521 __STATIC_INLINE uint32_t LL_SPI_GetTransferBitOrder(SPI_TypeDef *SPIx) |
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522 { |
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523 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_LSBFIRST)); |
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524 } |
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525 |
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526 /** |
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527 * @brief Set transfer direction mode |
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528 * @note For Half-Duplex mode, Rx Direction is set by default. |
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529 * In master mode, the MOSI pin is used and in slave mode, the MISO pin is used for Half-Duplex. |
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530 * @rmtoll CR1 RXONLY LL_SPI_SetTransferDirection\n |
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531 * CR1 BIDIMODE LL_SPI_SetTransferDirection\n |
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532 * CR1 BIDIOE LL_SPI_SetTransferDirection |
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533 * @param SPIx SPI Instance |
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534 * @param TransferDirection This parameter can be one of the following values: |
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535 * @arg @ref LL_SPI_FULL_DUPLEX |
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536 * @arg @ref LL_SPI_SIMPLEX_RX |
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537 * @arg @ref LL_SPI_HALF_DUPLEX_RX |
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538 * @arg @ref LL_SPI_HALF_DUPLEX_TX |
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539 * @retval None |
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540 */ |
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541 __STATIC_INLINE void LL_SPI_SetTransferDirection(SPI_TypeDef *SPIx, uint32_t TransferDirection) |
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542 { |
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543 MODIFY_REG(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE, TransferDirection); |
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544 } |
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545 |
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546 /** |
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547 * @brief Get transfer direction mode |
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548 * @rmtoll CR1 RXONLY LL_SPI_GetTransferDirection\n |
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549 * CR1 BIDIMODE LL_SPI_GetTransferDirection\n |
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550 * CR1 BIDIOE LL_SPI_GetTransferDirection |
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551 * @param SPIx SPI Instance |
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552 * @retval Returned value can be one of the following values: |
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553 * @arg @ref LL_SPI_FULL_DUPLEX |
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554 * @arg @ref LL_SPI_SIMPLEX_RX |
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555 * @arg @ref LL_SPI_HALF_DUPLEX_RX |
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556 * @arg @ref LL_SPI_HALF_DUPLEX_TX |
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557 */ |
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558 __STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(SPI_TypeDef *SPIx) |
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559 { |
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560 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE)); |
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561 } |
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562 |
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563 /** |
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564 * @brief Set frame data width |
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565 * @rmtoll CR1 DFF LL_SPI_SetDataWidth |
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566 * @param SPIx SPI Instance |
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567 * @param DataWidth This parameter can be one of the following values: |
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568 * @arg @ref LL_SPI_DATAWIDTH_8BIT |
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569 * @arg @ref LL_SPI_DATAWIDTH_16BIT |
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570 * @retval None |
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571 */ |
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572 __STATIC_INLINE void LL_SPI_SetDataWidth(SPI_TypeDef *SPIx, uint32_t DataWidth) |
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573 { |
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574 MODIFY_REG(SPIx->CR1, SPI_CR1_DFF, DataWidth); |
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575 } |
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576 |
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577 /** |
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578 * @brief Get frame data width |
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579 * @rmtoll CR1 DFF LL_SPI_GetDataWidth |
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580 * @param SPIx SPI Instance |
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581 * @retval Returned value can be one of the following values: |
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582 * @arg @ref LL_SPI_DATAWIDTH_8BIT |
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583 * @arg @ref LL_SPI_DATAWIDTH_16BIT |
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584 */ |
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585 __STATIC_INLINE uint32_t LL_SPI_GetDataWidth(SPI_TypeDef *SPIx) |
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586 { |
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587 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_DFF)); |
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588 } |
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589 |
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590 /** |
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591 * @} |
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592 */ |
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593 |
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594 /** @defgroup SPI_LL_EF_CRC_Management CRC Management |
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595 * @{ |
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596 */ |
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597 |
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598 /** |
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599 * @brief Enable CRC |
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600 * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation. |
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601 * @rmtoll CR1 CRCEN LL_SPI_EnableCRC |
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602 * @param SPIx SPI Instance |
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603 * @retval None |
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604 */ |
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605 __STATIC_INLINE void LL_SPI_EnableCRC(SPI_TypeDef *SPIx) |
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606 { |
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607 SET_BIT(SPIx->CR1, SPI_CR1_CRCEN); |
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608 } |
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609 |
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610 /** |
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611 * @brief Disable CRC |
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612 * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation. |
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613 * @rmtoll CR1 CRCEN LL_SPI_DisableCRC |
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614 * @param SPIx SPI Instance |
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615 * @retval None |
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616 */ |
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617 __STATIC_INLINE void LL_SPI_DisableCRC(SPI_TypeDef *SPIx) |
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618 { |
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619 CLEAR_BIT(SPIx->CR1, SPI_CR1_CRCEN); |
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620 } |
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621 |
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622 /** |
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623 * @brief Check if CRC is enabled |
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624 * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation. |
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625 * @rmtoll CR1 CRCEN LL_SPI_IsEnabledCRC |
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626 * @param SPIx SPI Instance |
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627 * @retval State of bit (1 or 0). |
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628 */ |
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629 __STATIC_INLINE uint32_t LL_SPI_IsEnabledCRC(SPI_TypeDef *SPIx) |
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630 { |
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631 return (READ_BIT(SPIx->CR1, SPI_CR1_CRCEN) == (SPI_CR1_CRCEN)); |
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632 } |
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633 |
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634 /** |
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635 * @brief Set CRCNext to transfer CRC on the line |
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636 * @note This bit has to be written as soon as the last data is written in the SPIx_DR register. |
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637 * @rmtoll CR1 CRCNEXT LL_SPI_SetCRCNext |
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638 * @param SPIx SPI Instance |
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639 * @retval None |
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640 */ |
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641 __STATIC_INLINE void LL_SPI_SetCRCNext(SPI_TypeDef *SPIx) |
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642 { |
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643 SET_BIT(SPIx->CR1, SPI_CR1_CRCNEXT); |
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644 } |
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645 |
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646 /** |
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647 * @brief Set polynomial for CRC calculation |
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648 * @rmtoll CRCPR CRCPOLY LL_SPI_SetCRCPolynomial |
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649 * @param SPIx SPI Instance |
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650 * @param CRCPoly This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF |
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651 * @retval None |
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652 */ |
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653 __STATIC_INLINE void LL_SPI_SetCRCPolynomial(SPI_TypeDef *SPIx, uint32_t CRCPoly) |
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654 { |
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655 WRITE_REG(SPIx->CRCPR, (uint16_t)CRCPoly); |
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656 } |
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657 |
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658 /** |
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659 * @brief Get polynomial for CRC calculation |
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660 * @rmtoll CRCPR CRCPOLY LL_SPI_GetCRCPolynomial |
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661 * @param SPIx SPI Instance |
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662 * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF |
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663 */ |
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664 __STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(SPI_TypeDef *SPIx) |
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665 { |
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666 return (uint32_t)(READ_REG(SPIx->CRCPR)); |
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667 } |
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668 |
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669 /** |
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670 * @brief Get Rx CRC |
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671 * @rmtoll RXCRCR RXCRC LL_SPI_GetRxCRC |
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672 * @param SPIx SPI Instance |
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673 * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF |
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674 */ |
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675 __STATIC_INLINE uint32_t LL_SPI_GetRxCRC(SPI_TypeDef *SPIx) |
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676 { |
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677 return (uint32_t)(READ_REG(SPIx->RXCRCR)); |
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678 } |
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679 |
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680 /** |
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681 * @brief Get Tx CRC |
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682 * @rmtoll TXCRCR TXCRC LL_SPI_GetTxCRC |
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683 * @param SPIx SPI Instance |
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684 * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF |
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685 */ |
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686 __STATIC_INLINE uint32_t LL_SPI_GetTxCRC(SPI_TypeDef *SPIx) |
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687 { |
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688 return (uint32_t)(READ_REG(SPIx->TXCRCR)); |
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689 } |
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690 |
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691 /** |
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692 * @} |
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693 */ |
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694 |
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695 /** @defgroup SPI_LL_EF_NSS_Management Slave Select Pin Management |
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696 * @{ |
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697 */ |
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698 |
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699 /** |
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700 * @brief Set NSS mode |
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701 * @note LL_SPI_NSS_SOFT Mode is not used in SPI TI mode. |
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702 * @rmtoll CR1 SSM LL_SPI_SetNSSMode\n |
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703 * @rmtoll CR2 SSOE LL_SPI_SetNSSMode |
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|
704 * @param SPIx SPI Instance |
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705 * @param NSS This parameter can be one of the following values: |
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706 * @arg @ref LL_SPI_NSS_SOFT |
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707 * @arg @ref LL_SPI_NSS_HARD_INPUT |
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708 * @arg @ref LL_SPI_NSS_HARD_OUTPUT |
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|
709 * @retval None |
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|
710 */ |
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|
711 __STATIC_INLINE void LL_SPI_SetNSSMode(SPI_TypeDef *SPIx, uint32_t NSS) |
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712 { |
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713 MODIFY_REG(SPIx->CR1, SPI_CR1_SSM, NSS); |
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714 MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, ((uint32_t)(NSS >> 16U))); |
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715 } |
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|
716 |
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|
717 /** |
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718 * @brief Get NSS mode |
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719 * @rmtoll CR1 SSM LL_SPI_GetNSSMode\n |
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720 * @rmtoll CR2 SSOE LL_SPI_GetNSSMode |
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721 * @param SPIx SPI Instance |
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722 * @retval Returned value can be one of the following values: |
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723 * @arg @ref LL_SPI_NSS_SOFT |
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724 * @arg @ref LL_SPI_NSS_HARD_INPUT |
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725 * @arg @ref LL_SPI_NSS_HARD_OUTPUT |
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|
726 */ |
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727 __STATIC_INLINE uint32_t LL_SPI_GetNSSMode(SPI_TypeDef *SPIx) |
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728 { |
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|
729 register uint32_t Ssm = (READ_BIT(SPIx->CR1, SPI_CR1_SSM)); |
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730 register uint32_t Ssoe = (READ_BIT(SPIx->CR2, SPI_CR2_SSOE) << 16U); |
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731 return (Ssm | Ssoe); |
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|
732 } |
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|
733 |
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734 /** |
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735 * @} |
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736 */ |
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|
737 |
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738 /** @defgroup SPI_LL_EF_FLAG_Management FLAG Management |
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739 * @{ |
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740 */ |
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741 |
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742 /** |
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743 * @brief Check if Rx buffer is not empty |
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744 * @rmtoll SR RXNE LL_SPI_IsActiveFlag_RXNE |
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745 * @param SPIx SPI Instance |
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746 * @retval State of bit (1 or 0). |
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747 */ |
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748 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx) |
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749 { |
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750 return (READ_BIT(SPIx->SR, SPI_SR_RXNE) == (SPI_SR_RXNE)); |
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751 } |
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752 |
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753 /** |
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754 * @brief Check if Tx buffer is empty |
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755 * @rmtoll SR TXE LL_SPI_IsActiveFlag_TXE |
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756 * @param SPIx SPI Instance |
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757 * @retval State of bit (1 or 0). |
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758 */ |
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759 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx) |
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760 { |
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761 return (READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE)); |
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762 } |
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763 |
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764 /** |
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765 * @brief Get CRC error flag |
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766 * @rmtoll SR CRCERR LL_SPI_IsActiveFlag_CRCERR |
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767 * @param SPIx SPI Instance |
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768 * @retval State of bit (1 or 0). |
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769 */ |
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770 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(SPI_TypeDef *SPIx) |
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771 { |
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772 return (READ_BIT(SPIx->SR, SPI_SR_CRCERR) == (SPI_SR_CRCERR)); |
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773 } |
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774 |
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775 /** |
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776 * @brief Get mode fault error flag |
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777 * @rmtoll SR MODF LL_SPI_IsActiveFlag_MODF |
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778 * @param SPIx SPI Instance |
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779 * @retval State of bit (1 or 0). |
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780 */ |
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781 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(SPI_TypeDef *SPIx) |
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782 { |
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783 return (READ_BIT(SPIx->SR, SPI_SR_MODF) == (SPI_SR_MODF)); |
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784 } |
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|
785 |
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786 /** |
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787 * @brief Get overrun error flag |
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788 * @rmtoll SR OVR LL_SPI_IsActiveFlag_OVR |
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789 * @param SPIx SPI Instance |
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790 * @retval State of bit (1 or 0). |
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791 */ |
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792 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(SPI_TypeDef *SPIx) |
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|
793 { |
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794 return (READ_BIT(SPIx->SR, SPI_SR_OVR) == (SPI_SR_OVR)); |
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|
795 } |
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796 |
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|
797 /** |
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|
798 * @brief Get busy flag |
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|
799 * @note The BSY flag is cleared under any one of the following conditions: |
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|
800 * -When the SPI is correctly disabled |
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|
801 * -When a fault is detected in Master mode (MODF bit set to 1) |
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802 * -In Master mode, when it finishes a data transmission and no new data is ready to be |
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|
803 * sent |
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|
804 * -In Slave mode, when the BSY flag is set to '0' for at least one SPI clock cycle between |
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|
805 * each data transfer. |
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806 * @rmtoll SR BSY LL_SPI_IsActiveFlag_BSY |
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|
807 * @param SPIx SPI Instance |
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|
808 * @retval State of bit (1 or 0). |
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|
809 */ |
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|
810 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx) |
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|
811 { |
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|
812 return (READ_BIT(SPIx->SR, SPI_SR_BSY) == (SPI_SR_BSY)); |
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|
813 } |
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|
814 |
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|
815 /** |
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|
816 * @brief Get frame format error flag |
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817 * @rmtoll SR FRE LL_SPI_IsActiveFlag_FRE |
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818 * @param SPIx SPI Instance |
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|
819 * @retval State of bit (1 or 0). |
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|
820 */ |
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|
821 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(SPI_TypeDef *SPIx) |
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|
822 { |
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|
823 return (READ_BIT(SPIx->SR, SPI_SR_FRE) == (SPI_SR_FRE)); |
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824 } |
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|
825 |
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|
826 /** |
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|
827 * @brief Clear CRC error flag |
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|
828 * @rmtoll SR CRCERR LL_SPI_ClearFlag_CRCERR |
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|
829 * @param SPIx SPI Instance |
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|
830 * @retval None |
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|
831 */ |
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|
832 __STATIC_INLINE void LL_SPI_ClearFlag_CRCERR(SPI_TypeDef *SPIx) |
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|
833 { |
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|
834 CLEAR_BIT(SPIx->SR, SPI_SR_CRCERR); |
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|
835 } |
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|
836 |
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|
837 /** |
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838 * @brief Clear mode fault error flag |
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839 * @note Clearing this flag is done by a read access to the SPIx_SR |
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840 * register followed by a write access to the SPIx_CR1 register |
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841 * @rmtoll SR MODF LL_SPI_ClearFlag_MODF |
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842 * @param SPIx SPI Instance |
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843 * @retval None |
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|
844 */ |
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845 __STATIC_INLINE void LL_SPI_ClearFlag_MODF(SPI_TypeDef *SPIx) |
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846 { |
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847 __IO uint32_t tmpreg; |
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848 tmpreg = SPIx->SR; |
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|
849 (void) tmpreg; |
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|
850 tmpreg = CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE); |
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|
851 (void) tmpreg; |
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|
852 } |
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|
853 |
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|
854 /** |
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|
855 * @brief Clear overrun error flag |
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856 * @note Clearing this flag is done by a read access to the SPIx_DR |
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857 * register followed by a read access to the SPIx_SR register |
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858 * @rmtoll SR OVR LL_SPI_ClearFlag_OVR |
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859 * @param SPIx SPI Instance |
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|
860 * @retval None |
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|
861 */ |
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|
862 __STATIC_INLINE void LL_SPI_ClearFlag_OVR(SPI_TypeDef *SPIx) |
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863 { |
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|
864 __IO uint32_t tmpreg; |
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|
865 tmpreg = SPIx->DR; |
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|
866 (void) tmpreg; |
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|
867 tmpreg = SPIx->SR; |
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|
868 (void) tmpreg; |
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869 } |
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|
870 |
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|
871 /** |
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|
872 * @brief Clear frame format error flag |
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873 * @note Clearing this flag is done by reading SPIx_SR register |
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|
874 * @rmtoll SR FRE LL_SPI_ClearFlag_FRE |
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875 * @param SPIx SPI Instance |
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876 * @retval None |
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|
877 */ |
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|
878 __STATIC_INLINE void LL_SPI_ClearFlag_FRE(SPI_TypeDef *SPIx) |
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879 { |
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|
880 __IO uint32_t tmpreg; |
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|
881 tmpreg = SPIx->SR; |
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882 (void) tmpreg; |
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|
883 } |
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|
884 |
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|
885 /** |
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886 * @} |
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887 */ |
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888 |
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889 /** @defgroup SPI_LL_EF_IT_Management Interrupt Management |
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890 * @{ |
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891 */ |
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892 |
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893 /** |
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894 * @brief Enable error interrupt |
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895 * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). |
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896 * @rmtoll CR2 ERRIE LL_SPI_EnableIT_ERR |
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897 * @param SPIx SPI Instance |
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898 * @retval None |
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|
899 */ |
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900 __STATIC_INLINE void LL_SPI_EnableIT_ERR(SPI_TypeDef *SPIx) |
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901 { |
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902 SET_BIT(SPIx->CR2, SPI_CR2_ERRIE); |
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903 } |
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904 |
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905 /** |
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906 * @brief Enable Rx buffer not empty interrupt |
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907 * @rmtoll CR2 RXNEIE LL_SPI_EnableIT_RXNE |
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908 * @param SPIx SPI Instance |
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909 * @retval None |
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910 */ |
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911 __STATIC_INLINE void LL_SPI_EnableIT_RXNE(SPI_TypeDef *SPIx) |
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912 { |
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913 SET_BIT(SPIx->CR2, SPI_CR2_RXNEIE); |
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914 } |
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915 |
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916 /** |
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917 * @brief Enable Tx buffer empty interrupt |
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918 * @rmtoll CR2 TXEIE LL_SPI_EnableIT_TXE |
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919 * @param SPIx SPI Instance |
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920 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
921 */ |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
922 __STATIC_INLINE void LL_SPI_EnableIT_TXE(SPI_TypeDef *SPIx) |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
923 { |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
924 SET_BIT(SPIx->CR2, SPI_CR2_TXEIE); |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
925 } |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
926 |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
927 /** |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
928 * @brief Disable error interrupt |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
929 * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode). |
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Added current STM32 standandard libraries in version independend folder structure
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|
930 * @rmtoll CR2 ERRIE LL_SPI_DisableIT_ERR |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
931 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
changeset
|
932 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
933 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
934 __STATIC_INLINE void LL_SPI_DisableIT_ERR(SPI_TypeDef *SPIx) |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
935 { |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
936 CLEAR_BIT(SPIx->CR2, SPI_CR2_ERRIE); |
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Ideenmodellierer
parents:
diff
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|
937 } |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
938 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
939 /** |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
940 * @brief Disable Rx buffer not empty interrupt |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
941 * @rmtoll CR2 RXNEIE LL_SPI_DisableIT_RXNE |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
942 * @param SPIx SPI Instance |
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diff
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|
943 * @retval None |
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|
944 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
945 __STATIC_INLINE void LL_SPI_DisableIT_RXNE(SPI_TypeDef *SPIx) |
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|
946 { |
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|
947 CLEAR_BIT(SPIx->CR2, SPI_CR2_RXNEIE); |
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|
948 } |
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|
949 |
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Added current STM32 standandard libraries in version independend folder structure
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|
950 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
951 * @brief Disable Tx buffer empty interrupt |
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Added current STM32 standandard libraries in version independend folder structure
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|
952 * @rmtoll CR2 TXEIE LL_SPI_DisableIT_TXE |
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|
953 * @param SPIx SPI Instance |
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|
954 * @retval None |
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|
955 */ |
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|
956 __STATIC_INLINE void LL_SPI_DisableIT_TXE(SPI_TypeDef *SPIx) |
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|
957 { |
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|
958 CLEAR_BIT(SPIx->CR2, SPI_CR2_TXEIE); |
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|
959 } |
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|
960 |
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|
961 /** |
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|
962 * @brief Check if error interrupt is enabled |
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|
963 * @rmtoll CR2 ERRIE LL_SPI_IsEnabledIT_ERR |
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|
964 * @param SPIx SPI Instance |
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|
965 * @retval State of bit (1 or 0). |
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|
966 */ |
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|
967 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx) |
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|
968 { |
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|
969 return (READ_BIT(SPIx->CR2, SPI_CR2_ERRIE) == (SPI_CR2_ERRIE)); |
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|
970 } |
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|
971 |
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|
972 /** |
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|
973 * @brief Check if Rx buffer not empty interrupt is enabled |
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974 * @rmtoll CR2 RXNEIE LL_SPI_IsEnabledIT_RXNE |
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|
975 * @param SPIx SPI Instance |
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|
976 * @retval State of bit (1 or 0). |
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|
977 */ |
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|
978 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(SPI_TypeDef *SPIx) |
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|
979 { |
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|
980 return (READ_BIT(SPIx->CR2, SPI_CR2_RXNEIE) == (SPI_CR2_RXNEIE)); |
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|
981 } |
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|
982 |
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|
983 /** |
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|
984 * @brief Check if Tx buffer empty interrupt |
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|
985 * @rmtoll CR2 TXEIE LL_SPI_IsEnabledIT_TXE |
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|
986 * @param SPIx SPI Instance |
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|
987 * @retval State of bit (1 or 0). |
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|
988 */ |
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|
989 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXE(SPI_TypeDef *SPIx) |
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|
990 { |
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|
991 return (READ_BIT(SPIx->CR2, SPI_CR2_TXEIE) == (SPI_CR2_TXEIE)); |
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|
992 } |
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|
993 |
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|
994 /** |
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|
995 * @} |
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|
996 */ |
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|
997 |
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|
998 /** @defgroup SPI_LL_EF_DMA_Management DMA Management |
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|
999 * @{ |
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|
1000 */ |
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|
1001 |
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|
1002 /** |
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|
1003 * @brief Enable DMA Rx |
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|
1004 * @rmtoll CR2 RXDMAEN LL_SPI_EnableDMAReq_RX |
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|
1005 * @param SPIx SPI Instance |
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|
1006 * @retval None |
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|
1007 */ |
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|
1008 __STATIC_INLINE void LL_SPI_EnableDMAReq_RX(SPI_TypeDef *SPIx) |
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|
1009 { |
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|
1010 SET_BIT(SPIx->CR2, SPI_CR2_RXDMAEN); |
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|
1011 } |
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|
1012 |
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|
1013 /** |
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|
1014 * @brief Disable DMA Rx |
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1015 * @rmtoll CR2 RXDMAEN LL_SPI_DisableDMAReq_RX |
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1016 * @param SPIx SPI Instance |
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|
1017 * @retval None |
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|
1018 */ |
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1019 __STATIC_INLINE void LL_SPI_DisableDMAReq_RX(SPI_TypeDef *SPIx) |
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1020 { |
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1021 CLEAR_BIT(SPIx->CR2, SPI_CR2_RXDMAEN); |
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|
1022 } |
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1023 |
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|
1024 /** |
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1025 * @brief Check if DMA Rx is enabled |
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|
1026 * @rmtoll CR2 RXDMAEN LL_SPI_IsEnabledDMAReq_RX |
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|
1027 * @param SPIx SPI Instance |
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1028 * @retval State of bit (1 or 0). |
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1029 */ |
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1030 __STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx) |
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1031 { |
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|
1032 return (READ_BIT(SPIx->CR2, SPI_CR2_RXDMAEN) == (SPI_CR2_RXDMAEN)); |
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|
1033 } |
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|
1034 |
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|
1035 /** |
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|
1036 * @brief Enable DMA Tx |
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|
1037 * @rmtoll CR2 TXDMAEN LL_SPI_EnableDMAReq_TX |
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|
1038 * @param SPIx SPI Instance |
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|
1039 * @retval None |
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|
1040 */ |
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|
1041 __STATIC_INLINE void LL_SPI_EnableDMAReq_TX(SPI_TypeDef *SPIx) |
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|
1042 { |
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|
1043 SET_BIT(SPIx->CR2, SPI_CR2_TXDMAEN); |
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|
1044 } |
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|
1045 |
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|
1046 /** |
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|
1047 * @brief Disable DMA Tx |
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|
1048 * @rmtoll CR2 TXDMAEN LL_SPI_DisableDMAReq_TX |
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|
1049 * @param SPIx SPI Instance |
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|
1050 * @retval None |
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|
1051 */ |
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|
1052 __STATIC_INLINE void LL_SPI_DisableDMAReq_TX(SPI_TypeDef *SPIx) |
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|
1053 { |
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1054 CLEAR_BIT(SPIx->CR2, SPI_CR2_TXDMAEN); |
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1055 } |
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1056 |
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1057 /** |
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1058 * @brief Check if DMA Tx is enabled |
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1059 * @rmtoll CR2 TXDMAEN LL_SPI_IsEnabledDMAReq_TX |
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1060 * @param SPIx SPI Instance |
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1061 * @retval State of bit (1 or 0). |
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1062 */ |
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1063 __STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx) |
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1064 { |
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1065 return (READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN)); |
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1066 } |
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1067 |
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1068 /** |
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1069 * @brief Get the data register address used for DMA transfer |
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1070 * @rmtoll DR DR LL_SPI_DMA_GetRegAddr |
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1071 * @param SPIx SPI Instance |
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1072 * @retval Address of data register |
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1073 */ |
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1074 __STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(SPI_TypeDef *SPIx) |
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1075 { |
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1076 return (uint32_t) & (SPIx->DR); |
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1077 } |
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1078 |
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1079 /** |
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1080 * @} |
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1081 */ |
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1082 |
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1083 /** @defgroup SPI_LL_EF_DATA_Management DATA Management |
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1084 * @{ |
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1085 */ |
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1086 |
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1087 /** |
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1088 * @brief Read 8-Bits in the data register |
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1089 * @rmtoll DR DR LL_SPI_ReceiveData8 |
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1090 * @param SPIx SPI Instance |
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1091 * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFF |
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1092 */ |
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1093 __STATIC_INLINE uint8_t LL_SPI_ReceiveData8(SPI_TypeDef *SPIx) |
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1094 { |
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1095 return (uint8_t)(READ_REG(SPIx->DR)); |
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1096 } |
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1097 |
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1098 /** |
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1099 * @brief Read 16-Bits in the data register |
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1100 * @rmtoll DR DR LL_SPI_ReceiveData16 |
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1101 * @param SPIx SPI Instance |
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1102 * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFFFF |
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1103 */ |
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1104 __STATIC_INLINE uint16_t LL_SPI_ReceiveData16(SPI_TypeDef *SPIx) |
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1105 { |
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1106 return (uint16_t)(READ_REG(SPIx->DR)); |
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1107 } |
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1108 |
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1109 /** |
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1110 * @brief Write 8-Bits in the data register |
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1111 * @rmtoll DR DR LL_SPI_TransmitData8 |
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1112 * @param SPIx SPI Instance |
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1113 * @param TxData Value between Min_Data=0x00 and Max_Data=0xFF |
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1114 * @retval None |
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1115 */ |
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1116 __STATIC_INLINE void LL_SPI_TransmitData8(SPI_TypeDef *SPIx, uint8_t TxData) |
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1117 { |
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1118 SPIx->DR = TxData; |
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1119 } |
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1120 |
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1121 /** |
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1122 * @brief Write 16-Bits in the data register |
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1123 * @rmtoll DR DR LL_SPI_TransmitData16 |
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1124 * @param SPIx SPI Instance |
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1125 * @param TxData Value between Min_Data=0x00 and Max_Data=0xFFFF |
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1126 * @retval None |
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1127 */ |
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1128 __STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData) |
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1129 { |
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1130 SPIx->DR = TxData; |
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1131 } |
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1132 |
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1133 /** |
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1134 * @} |
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1135 */ |
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1136 #if defined(USE_FULL_LL_DRIVER) |
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1137 /** @defgroup SPI_LL_EF_Init Initialization and de-initialization functions |
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1138 * @{ |
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1139 */ |
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1140 |
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1141 ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx); |
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1142 ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct); |
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1143 void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct); |
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1144 |
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1145 /** |
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1146 * @} |
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1147 */ |
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1148 #endif /* USE_FULL_LL_DRIVER */ |
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1149 /** |
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1150 * @} |
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1151 */ |
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1152 |
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1153 /** |
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1154 * @} |
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1155 */ |
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1156 |
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1157 /** @defgroup I2S_LL I2S |
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1158 * @{ |
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1159 */ |
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1160 |
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1161 /* Private variables ---------------------------------------------------------*/ |
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1162 /* Private constants ---------------------------------------------------------*/ |
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1163 /* Private macros ------------------------------------------------------------*/ |
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1164 |
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1165 /* Exported types ------------------------------------------------------------*/ |
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1166 #if defined(USE_FULL_LL_DRIVER) |
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1167 /** @defgroup I2S_LL_ES_INIT I2S Exported Init structure |
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1168 * @{ |
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1169 */ |
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1170 |
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1171 /** |
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1172 * @brief I2S Init structure definition |
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1173 */ |
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1174 |
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1175 typedef struct |
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1176 { |
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1177 uint32_t Mode; /*!< Specifies the I2S operating mode. |
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1178 This parameter can be a value of @ref I2S_LL_EC_MODE |
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1179 |
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1180 This feature can be modified afterwards using unitary function @ref LL_I2S_SetTransferMode().*/ |
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1181 |
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1182 uint32_t Standard; /*!< Specifies the standard used for the I2S communication. |
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1183 This parameter can be a value of @ref I2S_LL_EC_STANDARD |
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1184 |
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1185 This feature can be modified afterwards using unitary function @ref LL_I2S_SetStandard().*/ |
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1186 |
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1187 |
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1188 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. |
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1189 This parameter can be a value of @ref I2S_LL_EC_DATA_FORMAT |
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1190 |
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1191 This feature can be modified afterwards using unitary function @ref LL_I2S_SetDataFormat().*/ |
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1192 |
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1193 |
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1194 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. |
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1195 This parameter can be a value of @ref I2S_LL_EC_MCLK_OUTPUT |
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1196 |
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1197 This feature can be modified afterwards using unitary functions @ref LL_I2S_EnableMasterClock() or @ref LL_I2S_DisableMasterClock.*/ |
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1198 |
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1199 |
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1200 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. |
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1201 This parameter can be a value of @ref I2S_LL_EC_AUDIO_FREQ |
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1202 |
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1203 Audio Frequency can be modified afterwards using Reference manual formulas to calculate Prescaler Linear, Parity |
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1204 and unitary functions @ref LL_I2S_SetPrescalerLinear() and @ref LL_I2S_SetPrescalerParity() to set it.*/ |
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1205 |
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1206 |
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1207 uint32_t ClockPolarity; /*!< Specifies the idle state of the I2S clock. |
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1208 This parameter can be a value of @ref I2S_LL_EC_POLARITY |
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1209 |
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1210 This feature can be modified afterwards using unitary function @ref LL_I2S_SetClockPolarity().*/ |
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1211 |
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1212 } LL_I2S_InitTypeDef; |
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1213 |
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1214 /** |
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1215 * @} |
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1216 */ |
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1217 #endif /*USE_FULL_LL_DRIVER*/ |
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1218 |
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1219 /* Exported constants --------------------------------------------------------*/ |
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1220 /** @defgroup I2S_LL_Exported_Constants I2S Exported Constants |
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1221 * @{ |
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1222 */ |
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1223 |
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1224 /** @defgroup I2S_LL_EC_GET_FLAG Get Flags Defines |
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1225 * @brief Flags defines which can be used with LL_I2S_ReadReg function |
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1226 * @{ |
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1227 */ |
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1228 #define LL_I2S_SR_RXNE LL_SPI_SR_RXNE /*!< Rx buffer not empty flag */ |
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1229 #define LL_I2S_SR_TXE LL_SPI_SR_TXE /*!< Tx buffer empty flag */ |
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1230 #define LL_I2S_SR_BSY LL_SPI_SR_BSY /*!< Busy flag */ |
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1231 #define LL_I2S_SR_UDR SPI_SR_UDR /*!< Underrun flag */ |
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1232 #define LL_I2S_SR_OVR LL_SPI_SR_OVR /*!< Overrun flag */ |
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1233 #define LL_I2S_SR_FRE LL_SPI_SR_FRE /*!< TI mode frame format error flag */ |
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1234 /** |
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1235 * @} |
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1236 */ |
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1237 |
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1238 /** @defgroup SPI_LL_EC_IT IT Defines |
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1239 * @brief IT defines which can be used with LL_SPI_ReadReg and LL_SPI_WriteReg functions |
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1240 * @{ |
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1241 */ |
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1242 #define LL_I2S_CR2_RXNEIE LL_SPI_CR2_RXNEIE /*!< Rx buffer not empty interrupt enable */ |
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1243 #define LL_I2S_CR2_TXEIE LL_SPI_CR2_TXEIE /*!< Tx buffer empty interrupt enable */ |
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1244 #define LL_I2S_CR2_ERRIE LL_SPI_CR2_ERRIE /*!< Error interrupt enable */ |
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1245 /** |
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1246 * @} |
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1247 */ |
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1248 |
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1249 /** @defgroup I2S_LL_EC_DATA_FORMAT Data format |
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1250 * @{ |
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1251 */ |
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1252 #define LL_I2S_DATAFORMAT_16B 0x00000000U /*!< Data length 16 bits, Channel lenght 16bit */ |
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1253 #define LL_I2S_DATAFORMAT_16B_EXTENDED (SPI_I2SCFGR_CHLEN) /*!< Data length 16 bits, Channel lenght 32bit */ |
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1254 #define LL_I2S_DATAFORMAT_24B (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0) /*!< Data length 24 bits, Channel lenght 32bit */ |
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1255 #define LL_I2S_DATAFORMAT_32B (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1) /*!< Data length 16 bits, Channel lenght 32bit */ |
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1256 /** |
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1257 * @} |
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1258 */ |
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1259 |
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1260 /** @defgroup I2S_LL_EC_POLARITY Clock Polarity |
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1261 * @{ |
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1262 */ |
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1263 #define LL_I2S_POLARITY_LOW 0x00000000U /*!< Clock steady state is low level */ |
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1264 #define LL_I2S_POLARITY_HIGH (SPI_I2SCFGR_CKPOL) /*!< Clock steady state is high level */ |
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1265 /** |
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1266 * @} |
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1267 */ |
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1268 |
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1269 /** @defgroup I2S_LL_EC_STANDARD I2s Standard |
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1270 * @{ |
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1271 */ |
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1272 #define LL_I2S_STANDARD_PHILIPS 0x00000000U /*!< I2S standard philips */ |
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1273 #define LL_I2S_STANDARD_MSB (SPI_I2SCFGR_I2SSTD_0) /*!< MSB justified standard (left justified) */ |
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1274 #define LL_I2S_STANDARD_LSB (SPI_I2SCFGR_I2SSTD_1) /*!< LSB justified standard (right justified) */ |
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1275 #define LL_I2S_STANDARD_PCM_SHORT (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1) /*!< PCM standard, short frame synchronization */ |
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1276 #define LL_I2S_STANDARD_PCM_LONG (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC) /*!< PCM standard, long frame synchronization */ |
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1277 /** |
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1278 * @} |
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1279 */ |
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1280 |
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1281 /** @defgroup I2S_LL_EC_MODE Operation Mode |
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1282 * @{ |
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1283 */ |
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1284 #define LL_I2S_MODE_SLAVE_TX 0x00000000U /*!< Slave Tx configuration */ |
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1285 #define LL_I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0) /*!< Slave Rx configuration */ |
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1286 #define LL_I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1) /*!< Master Tx configuration */ |
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1287 #define LL_I2S_MODE_MASTER_RX (SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1) /*!< Master Rx configuration */ |
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1288 /** |
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1289 * @} |
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1290 */ |
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1291 |
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1292 /** @defgroup I2S_LL_EC_PRESCALER_FACTOR Prescaler Factor |
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1293 * @{ |
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1294 */ |
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1295 #define LL_I2S_PRESCALER_PARITY_EVEN 0x00000000U /*!< Odd factor: Real divider value is = I2SDIV * 2 */ |
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1296 #define LL_I2S_PRESCALER_PARITY_ODD (SPI_I2SPR_ODD >> 8U) /*!< Odd factor: Real divider value is = (I2SDIV * 2)+1 */ |
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1297 /** |
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1298 * @} |
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1299 */ |
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1300 |
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1301 #if defined(USE_FULL_LL_DRIVER) |
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1302 |
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1303 /** @defgroup I2S_LL_EC_MCLK_OUTPUT MCLK Output |
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1304 * @{ |
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1305 */ |
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1306 #define LL_I2S_MCLK_OUTPUT_DISABLE 0x00000000U /*!< Master clock output is disabled */ |
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1307 #define LL_I2S_MCLK_OUTPUT_ENABLE (SPI_I2SPR_MCKOE) /*!< Master clock output is enabled */ |
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1308 /** |
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1309 * @} |
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1310 */ |
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1311 |
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1312 /** @defgroup I2S_LL_EC_AUDIO_FREQ Audio Frequency |
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1313 * @{ |
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1314 */ |
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1315 |
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1316 #define LL_I2S_AUDIOFREQ_192K 192000U /*!< Audio Frequency configuration 192000 Hz */ |
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1317 #define LL_I2S_AUDIOFREQ_96K 96000U /*!< Audio Frequency configuration 96000 Hz */ |
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1318 #define LL_I2S_AUDIOFREQ_48K 48000U /*!< Audio Frequency configuration 48000 Hz */ |
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1319 #define LL_I2S_AUDIOFREQ_44K 44100U /*!< Audio Frequency configuration 44100 Hz */ |
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1320 #define LL_I2S_AUDIOFREQ_32K 32000U /*!< Audio Frequency configuration 32000 Hz */ |
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1321 #define LL_I2S_AUDIOFREQ_22K 22050U /*!< Audio Frequency configuration 22050 Hz */ |
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1322 #define LL_I2S_AUDIOFREQ_16K 16000U /*!< Audio Frequency configuration 16000 Hz */ |
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1323 #define LL_I2S_AUDIOFREQ_11K 11025U /*!< Audio Frequency configuration 11025 Hz */ |
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1324 #define LL_I2S_AUDIOFREQ_8K 8000U /*!< Audio Frequency configuration 8000 Hz */ |
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1325 #define LL_I2S_AUDIOFREQ_DEFAULT 2U /*!< Audio Freq not specified. Register I2SDIV = 2 */ |
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1326 /** |
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1327 * @} |
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1328 */ |
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1329 #endif /* USE_FULL_LL_DRIVER */ |
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1330 |
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1331 /** |
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1332 * @} |
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1333 */ |
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1334 |
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1335 /* Exported macro ------------------------------------------------------------*/ |
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1336 /** @defgroup I2S_LL_Exported_Macros I2S Exported Macros |
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1337 * @{ |
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1338 */ |
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1339 |
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1340 /** @defgroup I2S_LL_EM_WRITE_READ Common Write and read registers Macros |
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1341 * @{ |
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1342 */ |
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1343 |
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1344 /** |
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1345 * @brief Write a value in I2S register |
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1346 * @param __INSTANCE__ I2S Instance |
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1347 * @param __REG__ Register to be written |
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1348 * @param __VALUE__ Value to be written in the register |
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1349 * @retval None |
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1350 */ |
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1351 #define LL_I2S_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
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1352 |
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1353 /** |
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1354 * @brief Read a value in I2S register |
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1355 * @param __INSTANCE__ I2S Instance |
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1356 * @param __REG__ Register to be read |
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1357 * @retval Register value |
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1358 */ |
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1359 #define LL_I2S_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
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1360 /** |
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1361 * @} |
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1362 */ |
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1363 |
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1364 /** |
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1365 * @} |
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1366 */ |
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1367 |
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1368 |
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1369 /* Exported functions --------------------------------------------------------*/ |
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1370 |
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1371 /** @defgroup I2S_LL_Exported_Functions I2S Exported Functions |
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1372 * @{ |
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1373 */ |
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1374 |
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1375 /** @defgroup I2S_LL_EF_Configuration Configuration |
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1376 * @{ |
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1377 */ |
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1378 |
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1379 /** |
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1380 * @brief Select I2S mode and Enable I2S peripheral |
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1381 * @rmtoll I2SCFGR I2SMOD LL_I2S_Enable\n |
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1382 * I2SCFGR I2SE LL_I2S_Enable |
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1383 * @param SPIx SPI Instance |
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1384 * @retval None |
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1385 */ |
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1386 __STATIC_INLINE void LL_I2S_Enable(SPI_TypeDef *SPIx) |
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1387 { |
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1388 SET_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD | SPI_I2SCFGR_I2SE); |
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1389 } |
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1390 |
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1391 /** |
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1392 * @brief Disable I2S peripheral |
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1393 * @rmtoll I2SCFGR I2SE LL_I2S_Disable |
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1394 * @param SPIx SPI Instance |
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1395 * @retval None |
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1396 */ |
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1397 __STATIC_INLINE void LL_I2S_Disable(SPI_TypeDef *SPIx) |
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1398 { |
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1399 CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD | SPI_I2SCFGR_I2SE); |
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1400 } |
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1401 |
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1402 /** |
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1403 * @brief Check if I2S peripheral is enabled |
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1404 * @rmtoll I2SCFGR I2SE LL_I2S_IsEnabled |
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1405 * @param SPIx SPI Instance |
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1406 * @retval State of bit (1 or 0). |
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1407 */ |
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1408 __STATIC_INLINE uint32_t LL_I2S_IsEnabled(SPI_TypeDef *SPIx) |
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1409 { |
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1410 return (READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SE) == (SPI_I2SCFGR_I2SE)); |
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1411 } |
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1412 |
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1413 /** |
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1414 * @brief Set I2S data frame length |
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1415 * @rmtoll I2SCFGR DATLEN LL_I2S_SetDataFormat\n |
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1416 * I2SCFGR CHLEN LL_I2S_SetDataFormat |
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1417 * @param SPIx SPI Instance |
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1418 * @param DataFormat This parameter can be one of the following values: |
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1419 * @arg @ref LL_I2S_DATAFORMAT_16B |
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1420 * @arg @ref LL_I2S_DATAFORMAT_16B_EXTENDED |
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1421 * @arg @ref LL_I2S_DATAFORMAT_24B |
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1422 * @arg @ref LL_I2S_DATAFORMAT_32B |
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1423 * @retval None |
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1424 */ |
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1425 __STATIC_INLINE void LL_I2S_SetDataFormat(SPI_TypeDef *SPIx, uint32_t DataFormat) |
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1426 { |
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1427 MODIFY_REG(SPIx->I2SCFGR, SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN, DataFormat); |
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1428 } |
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1429 |
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1430 /** |
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1431 * @brief Get I2S data frame length |
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1432 * @rmtoll I2SCFGR DATLEN LL_I2S_GetDataFormat\n |
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1433 * I2SCFGR CHLEN LL_I2S_GetDataFormat |
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1434 * @param SPIx SPI Instance |
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1435 * @retval Returned value can be one of the following values: |
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1436 * @arg @ref LL_I2S_DATAFORMAT_16B |
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1437 * @arg @ref LL_I2S_DATAFORMAT_16B_EXTENDED |
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1438 * @arg @ref LL_I2S_DATAFORMAT_24B |
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1439 * @arg @ref LL_I2S_DATAFORMAT_32B |
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1440 */ |
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1441 __STATIC_INLINE uint32_t LL_I2S_GetDataFormat(SPI_TypeDef *SPIx) |
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Added current STM32 standandard libraries in version independend folder structure
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1442 { |
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Added current STM32 standandard libraries in version independend folder structure
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1443 return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)); |
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Added current STM32 standandard libraries in version independend folder structure
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|
1444 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
1445 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1446 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
1447 * @brief Set I2S clock polarity |
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Added current STM32 standandard libraries in version independend folder structure
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|
1448 * @rmtoll I2SCFGR CKPOL LL_I2S_SetClockPolarity |
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Added current STM32 standandard libraries in version independend folder structure
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|
1449 * @param SPIx SPI Instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
1450 * @param ClockPolarity This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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|
1451 * @arg @ref LL_I2S_POLARITY_LOW |
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Added current STM32 standandard libraries in version independend folder structure
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1452 * @arg @ref LL_I2S_POLARITY_HIGH |
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Added current STM32 standandard libraries in version independend folder structure
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|
1453 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
1454 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1455 __STATIC_INLINE void LL_I2S_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) |
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Added current STM32 standandard libraries in version independend folder structure
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1456 { |
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|
1457 SET_BIT(SPIx->I2SCFGR, ClockPolarity); |
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Added current STM32 standandard libraries in version independend folder structure
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|
1458 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
1459 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1460 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
1461 * @brief Get I2S clock polarity |
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Added current STM32 standandard libraries in version independend folder structure
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|
1462 * @rmtoll I2SCFGR CKPOL LL_I2S_GetClockPolarity |
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Added current STM32 standandard libraries in version independend folder structure
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1463 * @param SPIx SPI Instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
1464 * @retval Returned value can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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1465 * @arg @ref LL_I2S_POLARITY_LOW |
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Added current STM32 standandard libraries in version independend folder structure
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1466 * @arg @ref LL_I2S_POLARITY_HIGH |
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Added current STM32 standandard libraries in version independend folder structure
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|
1467 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1468 __STATIC_INLINE uint32_t LL_I2S_GetClockPolarity(SPI_TypeDef *SPIx) |
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Added current STM32 standandard libraries in version independend folder structure
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|
1469 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
1470 return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_CKPOL)); |
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|
1471 } |
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Added current STM32 standandard libraries in version independend folder structure
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1472 |
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1473 /** |
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1474 * @brief Set I2S standard protocol |
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Added current STM32 standandard libraries in version independend folder structure
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1475 * @rmtoll I2SCFGR I2SSTD LL_I2S_SetStandard\n |
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Added current STM32 standandard libraries in version independend folder structure
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1476 * I2SCFGR PCMSYNC LL_I2S_SetStandard |
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1477 * @param SPIx SPI Instance |
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1478 * @param Standard This parameter can be one of the following values: |
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1479 * @arg @ref LL_I2S_STANDARD_PHILIPS |
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Added current STM32 standandard libraries in version independend folder structure
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1480 * @arg @ref LL_I2S_STANDARD_MSB |
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Added current STM32 standandard libraries in version independend folder structure
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1481 * @arg @ref LL_I2S_STANDARD_LSB |
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Added current STM32 standandard libraries in version independend folder structure
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1482 * @arg @ref LL_I2S_STANDARD_PCM_SHORT |
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Added current STM32 standandard libraries in version independend folder structure
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1483 * @arg @ref LL_I2S_STANDARD_PCM_LONG |
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Added current STM32 standandard libraries in version independend folder structure
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|
1484 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
1485 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1486 __STATIC_INLINE void LL_I2S_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard) |
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Added current STM32 standandard libraries in version independend folder structure
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|
1487 { |
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|
1488 MODIFY_REG(SPIx->I2SCFGR, SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC, Standard); |
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Added current STM32 standandard libraries in version independend folder structure
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|
1489 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
1490 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1491 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
1492 * @brief Get I2S standard protocol |
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Added current STM32 standandard libraries in version independend folder structure
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|
1493 * @rmtoll I2SCFGR I2SSTD LL_I2S_GetStandard\n |
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Added current STM32 standandard libraries in version independend folder structure
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1494 * I2SCFGR PCMSYNC LL_I2S_GetStandard |
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Added current STM32 standandard libraries in version independend folder structure
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|
1495 * @param SPIx SPI Instance |
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Added current STM32 standandard libraries in version independend folder structure
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1496 * @retval Returned value can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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1497 * @arg @ref LL_I2S_STANDARD_PHILIPS |
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Added current STM32 standandard libraries in version independend folder structure
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1498 * @arg @ref LL_I2S_STANDARD_MSB |
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Added current STM32 standandard libraries in version independend folder structure
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1499 * @arg @ref LL_I2S_STANDARD_LSB |
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Added current STM32 standandard libraries in version independend folder structure
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1500 * @arg @ref LL_I2S_STANDARD_PCM_SHORT |
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Added current STM32 standandard libraries in version independend folder structure
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1501 * @arg @ref LL_I2S_STANDARD_PCM_LONG |
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Added current STM32 standandard libraries in version independend folder structure
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|
1502 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1503 __STATIC_INLINE uint32_t LL_I2S_GetStandard(SPI_TypeDef *SPIx) |
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Added current STM32 standandard libraries in version independend folder structure
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|
1504 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
1505 return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC)); |
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Added current STM32 standandard libraries in version independend folder structure
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|
1506 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
1507 |
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Added current STM32 standandard libraries in version independend folder structure
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|
1508 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
1509 * @brief Set I2S transfer mode |
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Added current STM32 standandard libraries in version independend folder structure
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|
1510 * @rmtoll I2SCFGR I2SCFG LL_I2S_SetTransferMode |
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Added current STM32 standandard libraries in version independend folder structure
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|
1511 * @param SPIx SPI Instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
1512 * @param Mode This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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|
1513 * @arg @ref LL_I2S_MODE_SLAVE_TX |
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Added current STM32 standandard libraries in version independend folder structure
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|
1514 * @arg @ref LL_I2S_MODE_SLAVE_RX |
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Added current STM32 standandard libraries in version independend folder structure
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|
1515 * @arg @ref LL_I2S_MODE_MASTER_TX |
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Added current STM32 standandard libraries in version independend folder structure
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1516 * @arg @ref LL_I2S_MODE_MASTER_RX |
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|
1517 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
1518 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1519 __STATIC_INLINE void LL_I2S_SetTransferMode(SPI_TypeDef *SPIx, uint32_t Mode) |
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Added current STM32 standandard libraries in version independend folder structure
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|
1520 { |
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|
1521 MODIFY_REG(SPIx->I2SCFGR, SPI_I2SCFGR_I2SCFG, Mode); |
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|
1522 } |
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|
1523 |
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|
1524 /** |
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Added current STM32 standandard libraries in version independend folder structure
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|
1525 * @brief Get I2S transfer mode |
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Added current STM32 standandard libraries in version independend folder structure
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|
1526 * @rmtoll I2SCFGR I2SCFG LL_I2S_GetTransferMode |
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Added current STM32 standandard libraries in version independend folder structure
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|
1527 * @param SPIx SPI Instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
1528 * @retval Returned value can be one of the following values: |
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|
1529 * @arg @ref LL_I2S_MODE_SLAVE_TX |
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Added current STM32 standandard libraries in version independend folder structure
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|
1530 * @arg @ref LL_I2S_MODE_SLAVE_RX |
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|
1531 * @arg @ref LL_I2S_MODE_MASTER_TX |
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|
1532 * @arg @ref LL_I2S_MODE_MASTER_RX |
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|
1533 */ |
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|
1534 __STATIC_INLINE uint32_t LL_I2S_GetTransferMode(SPI_TypeDef *SPIx) |
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|
1535 { |
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|
1536 return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SCFG)); |
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|
1537 } |
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|
1538 |
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|
1539 /** |
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|
1540 * @brief Set I2S linear prescaler |
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|
1541 * @rmtoll I2SPR I2SDIV LL_I2S_SetPrescalerLinear |
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|
1542 * @param SPIx SPI Instance |
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|
1543 * @param PrescalerLinear Value between Min_Data=0x02 and Max_Data=0xFF |
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|
1544 * @retval None |
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|
1545 */ |
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|
1546 __STATIC_INLINE void LL_I2S_SetPrescalerLinear(SPI_TypeDef *SPIx, uint8_t PrescalerLinear) |
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|
1547 { |
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|
1548 MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_I2SDIV, PrescalerLinear); |
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|
1549 } |
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|
1550 |
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|
1551 /** |
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|
1552 * @brief Get I2S linear prescaler |
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|
1553 * @rmtoll I2SPR I2SDIV LL_I2S_GetPrescalerLinear |
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|
1554 * @param SPIx SPI Instance |
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|
1555 * @retval PrescalerLinear Value between Min_Data=0x02 and Max_Data=0xFF |
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|
1556 */ |
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|
1557 __STATIC_INLINE uint32_t LL_I2S_GetPrescalerLinear(SPI_TypeDef *SPIx) |
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|
1558 { |
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|
1559 return (uint32_t)(READ_BIT(SPIx->I2SPR, SPI_I2SPR_I2SDIV)); |
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|
1560 } |
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|
1561 |
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|
1562 /** |
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|
1563 * @brief Set I2S parity prescaler |
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|
1564 * @rmtoll I2SPR ODD LL_I2S_SetPrescalerParity |
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|
1565 * @param SPIx SPI Instance |
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|
1566 * @param PrescalerParity This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1567 * @arg @ref LL_I2S_PRESCALER_PARITY_EVEN |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1568 * @arg @ref LL_I2S_PRESCALER_PARITY_ODD |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1569 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1570 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1571 __STATIC_INLINE void LL_I2S_SetPrescalerParity(SPI_TypeDef *SPIx, uint32_t PrescalerParity) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1572 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1573 MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_ODD, PrescalerParity << 8U); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1574 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1575 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1576 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1577 * @brief Get I2S parity prescaler |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1578 * @rmtoll I2SPR ODD LL_I2S_GetPrescalerParity |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1579 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1580 * @retval Returned value can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1581 * @arg @ref LL_I2S_PRESCALER_PARITY_EVEN |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1582 * @arg @ref LL_I2S_PRESCALER_PARITY_ODD |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1583 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1584 __STATIC_INLINE uint32_t LL_I2S_GetPrescalerParity(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1585 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1586 return (uint32_t)(READ_BIT(SPIx->I2SPR, SPI_I2SPR_ODD) >> 8U); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1587 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1588 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1589 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1590 * @brief Enable the master clock ouput (Pin MCK) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1591 * @rmtoll I2SPR MCKOE LL_I2S_EnableMasterClock |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1592 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1593 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1594 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1595 __STATIC_INLINE void LL_I2S_EnableMasterClock(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1596 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1597 SET_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1598 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1599 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1600 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1601 * @brief Disable the master clock ouput (Pin MCK) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1602 * @rmtoll I2SPR MCKOE LL_I2S_DisableMasterClock |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1603 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1604 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1605 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1606 __STATIC_INLINE void LL_I2S_DisableMasterClock(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1607 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1608 CLEAR_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1609 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1610 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1611 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1612 * @brief Check if the master clock ouput (Pin MCK) is enabled |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1613 * @rmtoll I2SPR MCKOE LL_I2S_IsEnabledMasterClock |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1614 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1615 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1616 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1617 __STATIC_INLINE uint32_t LL_I2S_IsEnabledMasterClock(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1618 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1619 return (READ_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE) == (SPI_I2SPR_MCKOE)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1620 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1621 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1622 #if defined(SPI_I2SCFGR_ASTRTEN) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1623 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1624 * @brief Enable asynchronous start |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1625 * @rmtoll I2SCFGR ASTRTEN LL_I2S_EnableAsyncStart |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1626 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1627 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1628 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1629 __STATIC_INLINE void LL_I2S_EnableAsyncStart(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1630 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1631 SET_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_ASTRTEN); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1632 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1633 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1634 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1635 * @brief Disable asynchronous start |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1636 * @rmtoll I2SCFGR ASTRTEN LL_I2S_DisableAsyncStart |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1637 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1638 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1639 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1640 __STATIC_INLINE void LL_I2S_DisableAsyncStart(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1641 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1642 CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_ASTRTEN); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1643 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1644 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1645 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1646 * @brief Check if asynchronous start is enabled |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1647 * @rmtoll I2SCFGR ASTRTEN LL_I2S_IsEnabledAsyncStart |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1648 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1649 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1650 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1651 __STATIC_INLINE uint32_t LL_I2S_IsEnabledAsyncStart(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1652 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1653 return (READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_ASTRTEN) == (SPI_I2SCFGR_ASTRTEN)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1654 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1655 #endif /* SPI_I2SCFGR_ASTRTEN */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1656 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1657 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1658 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1659 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1660 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1661 /** @defgroup I2S_LL_EF_FLAG FLAG Management |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1662 * @{ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1663 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1664 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1665 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1666 * @brief Check if Rx buffer is not empty |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1667 * @rmtoll SR RXNE LL_I2S_IsActiveFlag_RXNE |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1668 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1669 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1670 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1671 __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_RXNE(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1672 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1673 return LL_SPI_IsActiveFlag_RXNE(SPIx); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1674 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1675 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1676 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1677 * @brief Check if Tx buffer is empty |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1678 * @rmtoll SR TXE LL_I2S_IsActiveFlag_TXE |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1679 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1680 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
1681 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1682 __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_TXE(SPI_TypeDef *SPIx) |
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Added current STM32 standandard libraries in version independend folder structure
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|
1683 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1684 return LL_SPI_IsActiveFlag_TXE(SPIx); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1685 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1686 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1687 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1688 * @brief Get busy flag |
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Added current STM32 standandard libraries in version independend folder structure
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|
1689 * @rmtoll SR BSY LL_I2S_IsActiveFlag_BSY |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1690 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1691 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1692 */ |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1693 __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_BSY(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1694 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
1695 return LL_SPI_IsActiveFlag_BSY(SPIx); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
1696 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
1697 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1698 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1699 * @brief Get overrun error flag |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1700 * @rmtoll SR OVR LL_I2S_IsActiveFlag_OVR |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1701 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1702 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1703 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1704 __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_OVR(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1705 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1706 return LL_SPI_IsActiveFlag_OVR(SPIx); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1707 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1708 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1709 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1710 * @brief Get underrun error flag |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1711 * @rmtoll SR UDR LL_I2S_IsActiveFlag_UDR |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1712 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1713 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1714 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1715 __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_UDR(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1716 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1717 return (READ_BIT(SPIx->SR, SPI_SR_UDR) == (SPI_SR_UDR)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1718 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1719 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1720 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1721 * @brief Get frame format error flag |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1722 * @rmtoll SR FRE LL_I2S_IsActiveFlag_FRE |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1723 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1724 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1725 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1726 __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_FRE(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1727 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1728 return LL_SPI_IsActiveFlag_FRE(SPIx); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1729 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1730 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1731 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1732 * @brief Get channel side flag. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1733 * @note 0: Channel Left has to be transmitted or has been received\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1734 * 1: Channel Right has to be transmitted or has been received\n |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1735 * It has no significance in PCM mode. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1736 * @rmtoll SR CHSIDE LL_I2S_IsActiveFlag_CHSIDE |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1737 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1738 * @retval State of bit (1 or 0). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1739 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1740 __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_CHSIDE(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1741 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1742 return (READ_BIT(SPIx->SR, SPI_SR_CHSIDE) == (SPI_SR_CHSIDE)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1743 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1744 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1745 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1746 * @brief Clear overrun error flag |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1747 * @rmtoll SR OVR LL_I2S_ClearFlag_OVR |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1748 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1749 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1750 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1751 __STATIC_INLINE void LL_I2S_ClearFlag_OVR(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1752 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1753 LL_SPI_ClearFlag_OVR(SPIx); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1754 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1755 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1756 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1757 * @brief Clear underrun error flag |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1758 * @rmtoll SR UDR LL_I2S_ClearFlag_UDR |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1759 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1760 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1761 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1762 __STATIC_INLINE void LL_I2S_ClearFlag_UDR(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1763 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1764 __IO uint32_t tmpreg; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1765 tmpreg = SPIx->SR; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1766 (void)tmpreg; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1767 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1768 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1769 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1770 * @brief Clear frame format error flag |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1771 * @rmtoll SR FRE LL_I2S_ClearFlag_FRE |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1772 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1773 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1774 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1775 __STATIC_INLINE void LL_I2S_ClearFlag_FRE(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1776 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1777 LL_SPI_ClearFlag_FRE(SPIx); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1778 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1779 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1780 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1781 * @} |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1782 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1783 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1784 /** @defgroup I2S_LL_EF_IT Interrupt Management |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1785 * @{ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1786 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1787 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1788 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1789 * @brief Enable error IT |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1790 * @note This bit controls the generation of an interrupt when an error condition occurs (OVR, UDR and FRE in I2S mode). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1791 * @rmtoll CR2 ERRIE LL_I2S_EnableIT_ERR |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1792 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1793 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1794 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1795 __STATIC_INLINE void LL_I2S_EnableIT_ERR(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1796 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1797 LL_SPI_EnableIT_ERR(SPIx); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1798 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1799 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1800 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1801 * @brief Enable Rx buffer not empty IT |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1802 * @rmtoll CR2 RXNEIE LL_I2S_EnableIT_RXNE |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1803 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1804 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1805 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1806 __STATIC_INLINE void LL_I2S_EnableIT_RXNE(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1807 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1808 LL_SPI_EnableIT_RXNE(SPIx); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1809 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1810 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1811 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1812 * @brief Enable Tx buffer empty IT |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1813 * @rmtoll CR2 TXEIE LL_I2S_EnableIT_TXE |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1814 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1815 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1816 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1817 __STATIC_INLINE void LL_I2S_EnableIT_TXE(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1818 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1819 LL_SPI_EnableIT_TXE(SPIx); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1820 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1821 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1822 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1823 * @brief Disable error IT |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1824 * @note This bit controls the generation of an interrupt when an error condition occurs (OVR, UDR and FRE in I2S mode). |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1825 * @rmtoll CR2 ERRIE LL_I2S_DisableIT_ERR |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1826 * @param SPIx SPI Instance |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1827 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1828 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1829 __STATIC_INLINE void LL_I2S_DisableIT_ERR(SPI_TypeDef *SPIx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1830 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1831 LL_SPI_DisableIT_ERR(SPIx); |
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Added current STM32 standandard libraries in version independend folder structure
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|
1832 } |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1833 |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1834 /** |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1835 * @brief Disable Rx buffer not empty IT |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1836 * @rmtoll CR2 RXNEIE LL_I2S_DisableIT_RXNE |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1837 * @param SPIx SPI Instance |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1838 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
1839 */ |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1840 __STATIC_INLINE void LL_I2S_DisableIT_RXNE(SPI_TypeDef *SPIx) |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1841 { |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
1842 LL_SPI_DisableIT_RXNE(SPIx); |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1843 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
1844 |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1845 /** |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
1846 * @brief Disable Tx buffer empty IT |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
1847 * @rmtoll CR2 TXEIE LL_I2S_DisableIT_TXE |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1848 * @param SPIx SPI Instance |
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Added current STM32 standandard libraries in version independend folder structure
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|
1849 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1850 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1851 __STATIC_INLINE void LL_I2S_DisableIT_TXE(SPI_TypeDef *SPIx) |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1852 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
1853 LL_SPI_DisableIT_TXE(SPIx); |
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Added current STM32 standandard libraries in version independend folder structure
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|
1854 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
1855 |
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|
1856 /** |
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parents:
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|
1857 * @brief Check if ERR IT is enabled |
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Added current STM32 standandard libraries in version independend folder structure
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|
1858 * @rmtoll CR2 ERRIE LL_I2S_IsEnabledIT_ERR |
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Added current STM32 standandard libraries in version independend folder structure
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|
1859 * @param SPIx SPI Instance |
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|
1860 * @retval State of bit (1 or 0). |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1861 */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1862 __STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_ERR(SPI_TypeDef *SPIx) |
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|
1863 { |
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|
1864 return LL_SPI_IsEnabledIT_ERR(SPIx); |
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|
1865 } |
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|
1866 |
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|
1867 /** |
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|
1868 * @brief Check if RXNE IT is enabled |
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Added current STM32 standandard libraries in version independend folder structure
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|
1869 * @rmtoll CR2 RXNEIE LL_I2S_IsEnabledIT_RXNE |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
1870 * @param SPIx SPI Instance |
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|
1871 * @retval State of bit (1 or 0). |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1872 */ |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1873 __STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_RXNE(SPI_TypeDef *SPIx) |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
1874 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
1875 return LL_SPI_IsEnabledIT_RXNE(SPIx); |
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|
1876 } |
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|
1877 |
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|
1878 /** |
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parents:
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|
1879 * @brief Check if TXE IT is enabled |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
1880 * @rmtoll CR2 TXEIE LL_I2S_IsEnabledIT_TXE |
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|
1881 * @param SPIx SPI Instance |
c78bcbd5deda
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|
1882 * @retval State of bit (1 or 0). |
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Added current STM32 standandard libraries in version independend folder structure
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|
1883 */ |
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|
1884 __STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_TXE(SPI_TypeDef *SPIx) |
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Added current STM32 standandard libraries in version independend folder structure
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|
1885 { |
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|
1886 return LL_SPI_IsEnabledIT_TXE(SPIx); |
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Added current STM32 standandard libraries in version independend folder structure
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|
1887 } |
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Added current STM32 standandard libraries in version independend folder structure
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|
1888 |
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|
1889 /** |
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|
1890 * @} |
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|
1891 */ |
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|
1892 |
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|
1893 /** @defgroup I2S_LL_EF_DMA DMA Management |
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|
1894 * @{ |
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|
1895 */ |
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|
1896 |
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|
1897 /** |
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|
1898 * @brief Enable DMA Rx |
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|
1899 * @rmtoll CR2 RXDMAEN LL_I2S_EnableDMAReq_RX |
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|
1900 * @param SPIx SPI Instance |
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|
1901 * @retval None |
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|
1902 */ |
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|
1903 __STATIC_INLINE void LL_I2S_EnableDMAReq_RX(SPI_TypeDef *SPIx) |
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|
1904 { |
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|
1905 LL_SPI_EnableDMAReq_RX(SPIx); |
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|
1906 } |
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|
1907 |
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|
1908 /** |
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|
1909 * @brief Disable DMA Rx |
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|
1910 * @rmtoll CR2 RXDMAEN LL_I2S_DisableDMAReq_RX |
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|
1911 * @param SPIx SPI Instance |
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|
1912 * @retval None |
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|
1913 */ |
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|
1914 __STATIC_INLINE void LL_I2S_DisableDMAReq_RX(SPI_TypeDef *SPIx) |
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|
1915 { |
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|
1916 LL_SPI_DisableDMAReq_RX(SPIx); |
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|
1917 } |
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|
1918 |
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|
1919 /** |
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|
1920 * @brief Check if DMA Rx is enabled |
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|
1921 * @rmtoll CR2 RXDMAEN LL_I2S_IsEnabledDMAReq_RX |
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|
1922 * @param SPIx SPI Instance |
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|
1923 * @retval State of bit (1 or 0). |
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|
1924 */ |
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|
1925 __STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx) |
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|
1926 { |
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|
1927 return LL_SPI_IsEnabledDMAReq_RX(SPIx); |
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|
1928 } |
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|
1929 |
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|
1930 /** |
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|
1931 * @brief Enable DMA Tx |
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|
1932 * @rmtoll CR2 TXDMAEN LL_I2S_EnableDMAReq_TX |
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|
1933 * @param SPIx SPI Instance |
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|
1934 * @retval None |
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|
1935 */ |
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|
1936 __STATIC_INLINE void LL_I2S_EnableDMAReq_TX(SPI_TypeDef *SPIx) |
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1937 { |
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|
1938 LL_SPI_EnableDMAReq_TX(SPIx); |
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|
1939 } |
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|
1940 |
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|
1941 /** |
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|
1942 * @brief Disable DMA Tx |
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|
1943 * @rmtoll CR2 TXDMAEN LL_I2S_DisableDMAReq_TX |
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|
1944 * @param SPIx SPI Instance |
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|
1945 * @retval None |
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|
1946 */ |
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|
1947 __STATIC_INLINE void LL_I2S_DisableDMAReq_TX(SPI_TypeDef *SPIx) |
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|
1948 { |
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|
1949 LL_SPI_DisableDMAReq_TX(SPIx); |
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|
1950 } |
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|
1951 |
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|
1952 /** |
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|
1953 * @brief Check if DMA Tx is enabled |
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|
1954 * @rmtoll CR2 TXDMAEN LL_I2S_IsEnabledDMAReq_TX |
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|
1955 * @param SPIx SPI Instance |
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|
1956 * @retval State of bit (1 or 0). |
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|
1957 */ |
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|
1958 __STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx) |
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|
1959 { |
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|
1960 return LL_SPI_IsEnabledDMAReq_TX(SPIx); |
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|
1961 } |
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1962 |
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|
1963 /** |
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|
1964 * @} |
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|
1965 */ |
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|
1966 |
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1967 /** @defgroup I2S_LL_EF_DATA DATA Management |
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1968 * @{ |
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1969 */ |
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1970 |
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1971 /** |
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1972 * @brief Read 16-Bits in data register |
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1973 * @rmtoll DR DR LL_I2S_ReceiveData16 |
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1974 * @param SPIx SPI Instance |
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1975 * @retval RxData Value between Min_Data=0x0000 and Max_Data=0xFFFF |
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1976 */ |
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1977 __STATIC_INLINE uint16_t LL_I2S_ReceiveData16(SPI_TypeDef *SPIx) |
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1978 { |
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1979 return LL_SPI_ReceiveData16(SPIx); |
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1980 } |
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1981 |
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1982 /** |
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1983 * @brief Write 16-Bits in data register |
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1984 * @rmtoll DR DR LL_I2S_TransmitData16 |
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1985 * @param SPIx SPI Instance |
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1986 * @param TxData Value between Min_Data=0x0000 and Max_Data=0xFFFF |
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1987 * @retval None |
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1988 */ |
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1989 __STATIC_INLINE void LL_I2S_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData) |
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1990 { |
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1991 LL_SPI_TransmitData16(SPIx, TxData); |
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1992 } |
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1993 |
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1994 /** |
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1995 * @} |
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1996 */ |
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1997 |
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1998 #if defined(USE_FULL_LL_DRIVER) |
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1999 /** @defgroup I2S_LL_EF_Init Initialization and de-initialization functions |
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2000 * @{ |
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2001 */ |
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2002 |
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2003 ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx); |
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2004 ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct); |
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2005 void LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct); |
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2006 void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity); |
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2007 #if defined (SPI_I2S_FULLDUPLEX_SUPPORT) |
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2008 ErrorStatus LL_I2S_InitFullDuplex(SPI_TypeDef *I2Sxext, LL_I2S_InitTypeDef *I2S_InitStruct); |
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2009 #endif /* SPI_I2S_FULLDUPLEX_SUPPORT */ |
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2010 |
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2011 /** |
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2012 * @} |
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2013 */ |
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2014 #endif /* USE_FULL_LL_DRIVER */ |
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2015 |
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2016 /** |
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2017 * @} |
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2018 */ |
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2019 |
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2020 /** |
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2021 * @} |
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2022 */ |
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2023 |
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2024 #endif /* defined (SPI1) || defined (SPI2) || defined (SPI3) || defined (SPI4) || defined (SPI5) || defined(SPI6) */ |
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2025 |
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2026 /** |
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2027 * @} |
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2028 */ |
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2029 |
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2030 #ifdef __cplusplus |
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2031 } |
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2032 #endif |
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2033 |
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2034 #endif /* __STM32F4xx_LL_SPI_H */ |
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2035 |
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2036 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |